A PN junction base coupled gallium nitride Schottky diode and preparation method thereof

Abstract

The present invention relates to a PN junction base-coupled gallium nitride Schottky diode and a preparation method thereof. The Schottky diode comprises a substrate layer, an epitaxial layer, an ohmic electrode, an anode and a cathode, wherein the epitaxial layer is located on the substrate layer, the epitaxial layer comprises a buffer layer, a contact layer, a drift layer and a regrown barrier layer, the buffer layer, the contact layer and the drift layer are stacked in sequence, the regrown barrier layer is arranged on the side and part of the upper surface of the drift layer, a PN junction is formed between the regrown barrier layer and the drift layer; the ohmic electrode is located on the regrown barrier layer; the anode is located on the drift layer and the regrown barrier layer and covers the ohmic electrode; the cathode is located on the contact layer. A PN junction is formed between the regrown barrier layer and the drift layer in the Schottky diode, which can deplete the sidewall electrons in the N-type material, play a role in modulating the electric field, reduce the edge electric field strength of the Schottky metal deposition, improve the breakdown voltage and reverse breakdown voltage, and has little effect on the forward characteristics, and has a higher forward current.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to a PN junction base-coupled gallium nitride Schottky diode and a preparation method thereof. Background Art

[0002] Group III nitride Schottky barrier diodes are considered suitable for low-loss and high-frequency rectification applications due to their low forward voltage drop and fast reverse recovery advantages. However, limited by the small chip size and high cost of GaN free-standing substrates, GaN self-substrate Schottky diodes are difficult to achieve large-scale commercial applications in the near future. Therefore, quasi-vertical GaN diodes on other low-cost and large-size substrates, to some extent, have the advantages of vertical power devices and the cost-effectiveness of silicon substrates, which are very attractive for large-scale production and application.

[0003] Due to the large lattice mismatch and thermal expansion coefficient difference between GaN and foreign substrates, it is very challenging to grow a crack-free thick GaN drift layer on foreign substrates such as silicon, sapphire, and silicon carbide. At the same time, in Schottky diodes, excessive leakage current under a specific electric field may cause premature breakdown. In order to suppress leakage current, an effective method is to move the electric field peak from the top Schottky contact to the bulk semiconductor under high reverse bias. Edge termination is an effective way to suppress electric field crowding at the electrode edge and solve the problem of premature breakdown of quasi-vertical Schottky diodes. However, the edge termination at the anode affects the forward characteristics of the device, increases the on-resistance and reduces the device current. It may also induce deep energy level traps in the GaN drift layer, affecting the reliability of the device. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a PN junction base coupled gallium nitride Schottky diode and a preparation method. The technical problem to be solved by the present invention is achieved by the following technical solutions:

[0005] The embodiment of the present invention provides a PN junction base-coupled gallium nitride Schottky diode, comprising a substrate layer, an epitaxial layer, an ohmic electrode, an anode and a cathode, wherein:

[0006] The epitaxial layer is located on the substrate layer, and the epitaxial layer includes a buffer layer, a contact layer, a drift layer and a regrowth barrier layer. The buffer layer, the contact layer and the drift layer are stacked in sequence, and the regrowth barrier layer is arranged on the side and a part of the upper surface of the drift layer, and a PN junction is formed between the regrowth barrier layer and the drift layer;

[0007] The ohmic electrode is located on the regrown barrier layer;

[0008] The anode is located on the drift layer and the regrown barrier layer, and covers the ohmic electrode;

[0009] The cathode is located on the contact layer.

[0010] In one embodiment of the present invention, the material of the substrate layer includes one or more of silicon, sapphire, and silicon carbide, and has a thickness of 50-1500 μm.

[0011] In one embodiment of the present invention, the material of the buffer layer includes one or more of gallium nitride, aluminum gallium nitride, and aluminum nitride, and the thickness is 0.5-2 μm.

[0012] In one embodiment of the present invention, the material of the contact layer includes one or more heavily doped N-type group III nitrides, with a doping concentration of 10 18 -5×10 20 cm -3 , thickness is 0.1-1μm.

[0013] In one embodiment of the present invention, the material of the drift layer includes one or more of lightly doped N-type group III nitrides, the doping impurities include one or more of silicon and germanium, and the doping concentration is less than 5×10 16 cm -3 , thickness is 0.1-4μm.

[0014] In one embodiment of the present invention, the material of the regrown barrier layer includes one or more lightly doped P-type group III nitrides, and the doping impurities are one or more of magnesium and zinc, and the doping concentration is 1×10 17 -5×10 19 cm -3 , thickness is 50-500nm.

[0015] In one embodiment of the present invention, the material of the ohmic electrode includes one or more of Ni, Ti, and ITO.

[0016] Another embodiment of the present invention provides a method for preparing a PN junction base-coupled high-voltage-resistant gallium nitride Schottky diode, comprising the steps of:

[0017] S1, epitaxially growing a buffer layer, a contact layer and a drift layer on the substrate layer in sequence;

[0018] S2, preparing a regrowth barrier layer on the side and part of the upper surface of the drift layer;

[0019] S3, preparing a cathode on the upper surface of the drift layer;

[0020] S4, preparing an ohmic electrode on the regrown barrier layer;

[0021] S5. Prepare an anode on the drift layer and the regrown barrier layer, so that the anode covers the ohmic electrode.

[0022] In one embodiment of the present invention, step S2 comprises:

[0023] S21, epitaxially growing a dielectric layer on the drift layer;

[0024] S22, etching the dielectric layer and two ends of the drift layer to expose the side surfaces of the drift layer and the upper surfaces of the two ends of the contact layer;

[0025] S23, etching the two ends of the dielectric layer again to expose a portion of the upper surface of the drift layer;

[0026] S24, growing and regrowing barrier layer materials on the upper surfaces at both ends of the contact layer, the side surfaces of the drift layer and a portion of the upper surface;

[0027] S25, etching away the dielectric layer;

[0028] S26 , etching away the regrowth barrier layer material on the upper surfaces of both ends of the drift layer to form the regrowth barrier layer.

[0029] In one embodiment of the present invention, the material of the regrown barrier layer comprises a lightly doped P-type gallium nitride material, the doping impurities are one or more of magnesium and zinc, and the doping concentration is 1×10 17 -5×10 19 cm -3 , thickness is 50-500nm.

[0030] Compared with the prior art, the present invention has the following beneficial effects:

[0031] 1. In the Schottky diode of the present invention, a PN junction is formed between the regrown barrier layer and the drift layer, which can deplete the sidewall electrons in the N-type material, play a role in modulating the electric field, reduce the electric field strength at the edge of the Schottky metal deposition, improve the breakdown voltage and reverse breakdown voltage of the quasi-vertical Schottky diode, and have little effect on the forward characteristics, have a higher forward current, and ensure the reliability of the device.

[0032] 2. The preparation method of the PN junction base-coupled high-voltage-resistant gallium nitride Schottky diode of the present invention is compatible with existing conventional processes, has a simple manufacturing process and low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A schematic diagram of the structure of a PN junction base-coupled gallium nitride Schottky diode provided in an embodiment of the present invention;

[0034] Figure 2a-2jA schematic diagram of a process for preparing a PN junction base-coupled high-voltage resistant gallium nitride Schottky diode provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0036] Embodiment 1

[0037] See also Figure 1 , Figure 1 The present invention provides a schematic structural diagram of a PN junction base-coupled GaN Schottky diode. The PN junction base-coupled GaN Schottky diode is a high-voltage Schottky diode, comprising a substrate layer 10, an epitaxial layer 20, an ohmic electrode 30, an anode 40 and a cathode 50.

[0038] The epitaxial layer 20 is located on the substrate layer 10. The epitaxial layer 20 is a group III nitride epitaxial layer, including a buffer layer 201, a contact layer 202, a drift layer 203 and a regrowth barrier layer 204. The buffer layer 201, the contact layer 202 and the drift layer 203 are stacked in sequence from bottom to top. The regrowth barrier layer 204 is arranged on the side and part of the upper surface of the drift layer 203, and a PN junction is formed between the regrowth barrier layer 204 and the drift layer 203; the ohmic electrode 30 is located on the regrowth barrier layer 204; the anode 40 is located on the drift layer 203 and the regrowth barrier layer 204, and covers the ohmic electrode 30; the cathode 50 is located on the contact layer 202.

[0039] Specifically, the drift layer 203 is located in the middle part of the contact layer 202 and forms an island structure; a regrowth barrier layer 204 is formed on both side surfaces of the island structure and on the upper surfaces of both ends of the island structure; the ohmic electrode 30 is located on part of the upper surface of the regrowth barrier layer 204; the anode 40 is located on the drift layer 203 and the regrowth barrier layer 204, and covers the ohmic electrode 30 and wraps the ohmic electrode 30; the cathode 50 is located in the area at both ends of the contact layer 202 that is not covered by the drift layer 203, and the cathode 50 is not in contact with the regrowth barrier layer 204 and is at a certain distance from each other.

[0040] In a specific embodiment, the material of the substrate layer 10 includes one or more of silicon, sapphire, and silicon carbide, and the thickness is 50-1500 μm. Optionally, the material of the substrate layer 10 is P-type silicon, the thickness is 675 μm, the resistivity is 0.01 Ωcm, and the crystal orientation is <111> .

[0041] In a specific embodiment, the material of the buffer layer 201 includes one or more of gallium nitride, aluminum gallium nitride, and aluminum nitride, with a thickness of 0.5-2 μm. Optionally, the material of the buffer layer 201 is a gradient aluminum gallium nitride material, with a thickness of 750 nm.

[0042] In a specific embodiment, the material of the contact layer 202 includes one or more of heavily doped N-type group III nitrides, for example, the material of the contact layer 202 includes one or more of heavily doped N-type gallium nitride, heavily doped N-type aluminum gallium nitride, heavily doped N-type indium gallium nitride, and heavily doped N-type aluminum nitride, and the doping element includes Si, and the doping concentration is 10 18 -5×10 20 cm -3 , with a thickness of 0.1-1 μm. Optionally, the material of the contact layer 202 is heavily doped N-type gallium nitride, with a thickness of 500 nm and a doping concentration of 1×10 19 cm -3 .

[0043] In a specific embodiment, the material of the drift layer 203 includes one or more lightly doped N-type group III nitrides, and the doping impurities include one or more of silicon and germanium, and the doping concentration is less than 5×10 16 cm -3 , with a thickness of 0.1-4 μm. Optionally, the drift layer 203 is made of a lightly doped N-type gallium nitride material with a thickness of 4 μm and a doping concentration of 1×10 16 cm -3 .

[0044] In a specific embodiment, the material of the regrowth barrier layer 204 includes one or more lightly doped P-type group III nitrides, and the doping impurities are one or more of magnesium and zinc, and the doping concentration is 1×10 17 -5×10 19 cm -3 , with a thickness of 50-500 nm. Optionally, the material of the regrown barrier layer 204 is a lightly doped P-type gallium nitride material with a thickness of 500 nm; the doping impurity is magnesium with a doping concentration of 1×10 19 cm -3 .

[0045] In this embodiment, the material of the regrowth barrier layer 204 is a lightly doped P-type group III nitride. The setting of the P-type group III nitride requires that electrons flow from the N-type drift layer 203. Therefore, the thickness of the regrowth barrier layer 204 is set to 50-500nm to ensure that electrons flow from the N-type material. If the thickness of the regrowth barrier layer 204 is too thick or too thin, it cannot ensure that electrons flow from the N-type material, affecting the performance of the device.

[0046] In a specific embodiment, the material of the ohmic electrode 30 includes one or more of Ni, Ti, and ITO. Optionally, the material of the ohmic electrode 30 is a nickel / gold laminated metal with a thickness of 5 / 10 nm.

[0047] In a specific embodiment, the material of the anode 40 includes one or more of titanium, aluminum, nickel, and gold. Optionally, the material of the anode 40 is a titanium / aluminum / nickel / gold laminated metal with a thickness of 220 nm.

[0048] In the present embodiment, since the potential barrier between the anode 40 and the p-type group III nitride of the regrowth barrier layer is relatively high, a good ohmic contact cannot be formed and a good current output cannot be achieved. Therefore, an ohmic electrode 30 is provided between the anode 40 and the regrowth barrier layer 204. On the one hand, the contact resistance can be reduced, and on the other hand, the p-type group III nitride and the anode can be made to have the same potential, thereby achieving a good current transmission effect.

[0049] In a specific embodiment, the material of the cathode 50 includes one or more of nickel and gold. Optionally, the material of the cathode 50 is a nickel / gold laminated metal with a thickness of 50 / 300 nm.

[0050] In the PN junction base-coupled gallium nitride Schottky diode of the present embodiment, the regrown barrier layer is made of lightly doped P-type group III nitride, and the drift layer is made of doped N-type group III nitride. A PN junction charge coupling is formed between the P-type regrown barrier layer and the N-type drift layer. The PN junction formed with the P-type group III nitride is applied to the Schottky diode with a quasi-vertical structure, which can deplete the electrons in the N-type material, i.e., near the side of the drift layer, and play a role in modulating the electric field, thereby reducing the electric field strength at the edge of the Schottky metal deposition, reducing the power line crowding and electric field spikes at the anode terminal, and improving the breakdown voltage and reverse breakdown voltage of the quasi-vertical Schottky diode. The forward characteristics are less affected, and the device has a higher forward current, thereby ensuring the reliability of the device.

[0051] Embodiment 2

[0052] Based on Example 1, see Figure 2a-2j , Figure 2a-2j A schematic diagram of a method for preparing a PN junction base-coupled high-voltage-resistant gallium nitride Schottky diode provided in an embodiment of the present invention. The preparation method comprises the following steps:

[0053] S1. epitaxially grow a buffer layer 201, a contact layer 202 and a drift layer 203 on the substrate layer 10 in sequence. Figure 2a .

[0054] In this embodiment, the buffer layer 201 is an aluminum nitride / gallium nitride superlattice buffer layer with a thickness of 750 nm; the contact layer 202 is a heavily doped N-type contact layer with a thickness of 1 μm and a doping concentration of 1×10 19 cm -3 The drift layer 203 is a lightly doped N-type drift layer with a thickness of 2.2 μm and a doping concentration of 2×10 19 cm -3 .

[0055] S2, preparing a regrown barrier layer 204 on the side and part of the upper surface of the drift layer 203. Specifically comprising the steps of:

[0056] S21, epitaxially growing a dielectric layer 1a on the drift layer 203, see Figure 2b .

[0057] Specifically, the material of the dielectric layer 1a can be SiO 2 , SiN, and has a thickness of 20-200 nm. In this embodiment, the material of the dielectric layer 1a is SiO 2 , thickness is 100nm.

[0058] S22, etching the dielectric layer 1a and both ends of the drift layer 203 to expose the side surfaces of the drift layer 203 and the upper surfaces of both ends of the contact layer 202, see Figure 2c .

[0059] Specifically, in SiO 2 The surface of the dielectric layer 1a is spin-coated with photoresist, and the etched area is exposed and developed using a photolithography machine. 2 The dielectric layer 1 a and the two end regions of the lightly doped N-type drift layer 203 are etched to expose the side surfaces of the drift layer 203 and the upper surfaces of the two ends of the contact layer 202 .

[0060] S23, etching the two ends of the dielectric layer 1a again to expose part of the upper surface of the drift layer 203, see Figure 2d .

[0061] Specifically, for SiO 2 The dielectric layer 1a and the lightly doped N-type drift layer 203 are etched and then the surface of the structure is spin-coated with photoresist. The etched area is exposed and developed using a photolithography machine. 2 The two end regions of the dielectric layer 1 a are etched again to expose a portion of the upper surface of the drift layer 203 , that is, to expose the upper surfaces of the two ends of the drift layer 203 .

[0062] S24, growing and regrowing barrier layer materials on the upper surfaces of both ends of the contact layer 202, the side surfaces and a part of the upper surface of the drift layer 203, see Figure 2e .

[0063] Specifically, in the case of containing SiO 2 The surface epitaxial regrown barrier layer material of the dielectric layer 1a structure, the material of the regrown barrier layer 204 includes a lightly doped P-type gallium nitride material, the doping impurities are one or more of magnesium and zinc, and the doping concentration is 1×10 17 -5×10 19 cm -3 In this embodiment, the material of the regrowth barrier layer 204 is lightly doped P-type gallium nitride, and the thickness is 500 nm.

[0064] S25, etch away the dielectric layer 1a, see Figure 2f .

[0065] Specifically, HF is used to treat SiO 2 The dielectric layer 1a and the lightly doped P-type gallium nitride barrier layer material are etched to remove SiO 2 Dielectric layer 1a.

[0066] S26, etching away the regrown barrier layer material on the upper surfaces of both ends of the drift layer 203 to form a regrown barrier layer 204, see Figure 2g .

[0067] Specifically, photoresist is spin-coated on the surface of the structure containing the regrowth barrier layer material, namely, lightly-doped P-type gallium nitride, and a photolithography machine is used for exposure and development, and the lightly-doped P-type gallium nitride is etched to etch away the lightly-doped P-type gallium nitride on the upper surfaces of both ends of the contact layer 202 to form a regrowth barrier layer 204.

[0068] S3. Prepare a cathode 50 on the upper surface of the drift layer 203, see 2h.

[0069] Specifically, photoresist is spin-coated on the surface of the regrown barrier layer 204 , and a photolithography machine is used for exposure and development, and Ti / Al / Ni / Au ohmic metals are deposited on a partial area of ​​the conductive layer, namely the drift layer 203 , with a thickness of 20 / 140 / 50 / 40 nm to obtain the cathode 50 .

[0070] Then, in N 2 The annealing is carried out in an atmosphere at a temperature of 700-900°C for a time of 20-60 seconds. 2 The annealing was performed using a rapid thermal processing (RTP) process under an atmosphere with an annealing temperature of 750° C. and an annealing time of 30 s.

[0071] S4, preparing an ohmic electrode 30 on the regrown barrier layer 204, see Figure 2i .

[0072] Specifically, photoresist is spin-coated on the annealed surface of the cathode 50 , and a photolithography machine is used for exposure and development. Ohmic metal is deposited on the lightly doped P-type gallium nitride. The material may be Ni / Au with a thickness of 15 / 20 nm to obtain the ohmic electrode 30 .

[0073] S5. Prepare an anode 40 on the drift layer 203 and the regrown barrier layer 204 so that the anode 40 covers the ohmic electrode 30. Figure 2j .

[0074] Specifically, photoresist is spin-coated on the surface of the structure for preparing the ohmic electrode 30, and a photolithography machine is used for exposure and development. Metal is deposited on the drift layer 203 and the regrowth barrier layer 204. The material may be Ni / Au with a thickness of 50 / 150 nm to obtain the anode 40, which covers the ohmic electrode 30.

[0075] The method for preparing the PN junction base-coupled high-voltage-resistant gallium nitride Schottky diode of the present embodiment is compatible with the existing conventional processes, has a simple manufacturing process and low cost.

[0076] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A PN junction base-coupled gallium nitride Schottky diode, characterized in that: The invention comprises a substrate layer (10), an epitaxial layer (20), an ohmic electrode (30), an anode (40) and a cathode (50), wherein: The epitaxial layer (20) is located on the substrate layer (10), and the epitaxial layer (20) comprises a buffer layer (201), a contact layer (202), a drift layer (203), and a regrown barrier layer (204); the buffer layer (201), the contact layer (202), and the drift layer (203) are stacked in sequence; the regrown barrier layer (204) is arranged on the side surface and a part of the upper surface of the drift layer (203); a PN junction is formed between the regrown barrier layer (204) and the drift layer (203); The material of the regrown barrier layer (204) includes one or more lightly doped P-type group III nitrides, and the doping impurities are one or more of magnesium and zinc, with a doping concentration of 1×10 17 -5×10 19 cm -3 , thickness is 50-500nm; The ohmic electrode (30) is located on the re-growth barrier layer (204); The material of the ohmic electrode (30) includes one or more of Ni, Ti, and ITO; The anode (40) is located on the drift layer (203) and the regrown barrier layer (204), and covers the ohmic electrode (30) and the drift layer (203); The cathode (50) is located on the contact layer (202); The cathode (50) is spaced a certain distance from the regrowth barrier layer (204).

2. The PN junction base-coupled gallium nitride Schottky diode according to claim 1, characterized in that: The material of the substrate layer (10) includes one or more of silicon, sapphire, and silicon carbide, and has a thickness of 50-1500 μm.

3. The PN junction base coupled gallium nitride Schottky diode according to claim 1, characterized in that: The material of the buffer layer (201) includes one or more of gallium nitride, aluminum gallium nitride, and aluminum nitride, and has a thickness of 0.5-2 μm.

4. The PN junction base coupled gallium nitride Schottky diode according to claim 1, characterized in that: The material of the contact layer (202) includes one or more heavily doped N-type group III nitrides, with a doping concentration of 10 18 -5×10 20 cm -3 , thickness is 0.1-1μm.

5. The PN junction base coupled gallium nitride Schottky diode according to claim 1, characterized in that: The material of the drift layer (203) includes one or more lightly doped N-type group III nitrides, and the doping impurities include one or more of silicon and germanium, with a doping concentration of less than 5×10 16 cm -3 , thickness is 0.1-4μm.

6. A method for preparing a PN junction base-coupled high-voltage gallium nitride Schottky diode, characterized in that: The method for preparing the PN junction base-coupled gallium nitride Schottky diode according to any one of claims 1 to 5 comprises the following steps: S1, epitaxially growing a buffer layer (201), a contact layer (202) and a drift layer (203) in sequence on a substrate layer (10); S2, preparing a regrowth barrier layer (204) on the side and part of the upper surface of the drift layer (203); the material of the regrowth barrier layer (204) comprises a lightly doped P-type gallium nitride material, the doping impurities are one or more of magnesium and zinc, and the doping concentration is 1×10 17 -5×10 19 cm -3 , thickness is 50-500nm; S3, preparing a cathode (50) on the upper surface of the drift layer (203); S4, preparing an ohmic electrode (30) on the regrown barrier layer (204); S5. Prepare an anode (40) on the drift layer (203) and the regrown barrier layer (204), so that the anode (40) covers the ohmic electrode (30) and the drift layer (203).

7. The method for preparing the PN junction base coupled high voltage resistant gallium nitride Schottky diode according to claim 6, characterized in that: Step S2 includes: S21, epitaxially growing a dielectric layer (1a) on the drift layer (203); S22, etching the dielectric layer (1a) and the two ends of the drift layer (203) to expose the side surfaces of the drift layer (203) and the upper surfaces of the two ends of the contact layer (202); S23, etching the two ends of the dielectric layer (1a) again to expose a portion of the upper surface of the drift layer (203); S24, growing and regrowing barrier layer materials on the upper surfaces at both ends of the contact layer (202), the side surfaces of the drift layer (203) and a portion of the upper surface; S25, etching away the dielectric layer (1a); S26, etching away the regrowth barrier layer material on the upper surfaces of both ends of the drift layer (203) to form the regrowth barrier layer (204).

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