A method, system, device, and storage medium for replacing a cache
By combining Heming distance with counters and selecting replacement strategies according to different memory access programs, the problem of low cache hit rate in the existing technology is solved, and higher cache hit rate and system performance are achieved.
Patent Information
- Application Number
- CN202111150459.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-09-29
- Publication Date
- 2025-06-17
- Estimated Expiration
- 2041-09-29
AI Technical Summary
In the face of surge in data volume and changes in access mode, existing cache replacement algorithms cannot effectively improve cache hit rate, resulting in performance degradation.
Combining Heming distance and counter, select replacement strategies according to the different memory access procedures. When the locality is strong, use LRU to use data to access local characteristics to the greatest extent; when the probability is strong, use LFU to filter according to the frequency of use.
By adaptively selecting the appropriate replacement strategy, improve cache hit rate and improve system performance.
Smart Images

Figure CN113986783B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of caches, and more particularly, to a method, system, device, and storage medium for replacing caches. Background Art
[0002] Generally speaking, storage latency is a key factor affecting the performance of computer systems. The last-level cache of the storage system can effectively solve the storage wall problem, and an appropriate management method can effectively improve the performance of the processor. Based on the temporal locality characteristic of storage, the Least Recently Used (LRU) algorithm is used more frequently. Cache management is performed according to the recent information of the cache, and the object that has not been accessed for the longest time recently is selected for elimination. A counter is set for each way of data. Each time there is a hit, the count is cleared to zero, and the counts of other ways are incremented by one, so as to record the number of accesses. When replacement is needed, the storage object with the largest count is found. It can better reflect the locality characteristics of data access, and has a good hit rate under strong locality access characteristics. In the early stage, the data access interval is small, and the LRU has a good convergence speed and excellent performance. The structure for implementing the count will increase rapidly as the cache capacity increases, consuming a large amount of hardware resources, with a slow speed and high power consumption. With the explosion of data volume and the change of access patterns, the data access interval expands, and simply relying on the increase in capacity can no longer meet the needs of memory access. Summary of the Invention
[0003] In view of this, the purpose of the embodiments of the present invention is to provide a method, system, computer device, and computer-readable storage medium for replacing caches. The present invention combines the Hamming distance with a counter, and selects different replacement strategies according to different memory access programs. When the locality is strong, the LRU is used to make the most of the data access locality characteristics; when the probability is strong, the LFU (Least Frequently Used) is used to screen according to the usage frequency. By adaptively selecting an appropriate replacement strategy, the cache hit rate is improved.
[0004] For the above purposes, one aspect of the embodiments of the present invention provides a method for replacing a cache, including the following steps: in response to replacing the cache, respectively determine the first maximum value in the first counters corresponding to all caches and the second maximum value in the second counters, and calculate the first Hamming distance between the first maximum value and the other first counters and the second Hamming distance between the second maximum value and the other second counters; in response to the Hamming distance being greater than the first threshold, replace the cache corresponding to the first maximum value; in response to the Hamming distance being less than or equal to the first threshold and greater than the second threshold, perform a weighted calculation on the values of the first counter and the second counter, and replace the cache corresponding to the maximum value after the weighted calculation; and in response to the Hamming distance being less than or equal to the second threshold, determine the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance.
[0005] In some embodiments, the method further includes: calculating the current average value of the first counters of the caches corresponding to all data blocks, and in response to the processor accessing a data block, determining whether the value of the first counter of the cache corresponding to the data block is greater than the current average value; in response to the value of the first counter of the cache corresponding to the data block being greater than the current average value, increment the values of the first counters of the other caches by one; and in response to the value of the first counter of the cache corresponding to the data block not being greater than the current average value, clear the value of the first counter.
[0006] In some embodiments, the method further includes: in response to the processor accessing a data block, decrement the value of the second counter of the cache corresponding to the data block by one.
[0007] In some embodiments, the determining the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance includes: in response to the second Hamming distance being greater than the first Hamming distance, replace the cache corresponding to the second maximum value; and in response to the second Hamming distance not being greater than the first Hamming distance, replace the cache corresponding to the first maximum value.
[0008] On the other hand, an embodiment of the present invention provides a system for replacing a cache, including: a computing module configured to, in response to replacing the cache, respectively determine a first maximum value in first counters corresponding to all caches and a second maximum value in second counters, and calculate a first Hamming distance between the first maximum value and other first counters and a second Hamming distance between the second maximum value and other second counters; a first execution module configured to, in response to the Hamming distance being greater than a first threshold, replace the cache corresponding to the first maximum value; a second execution module configured to, in response to the Hamming distance being less than or equal to the first threshold and greater than a second threshold, perform a weighted calculation on the values of the first counter and the second counter, and replace the cache corresponding to the maximum value after the weighted calculation; and a third execution module configured to, in response to the Hamming distance being less than or equal to the second threshold, determine the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance.
[0009] In some embodiments, the system further includes a first counting module configured to: calculate a current average value of first counters of caches corresponding to all data blocks, and in response to the processor accessing a data block, determine whether the value of the first counter of the cache corresponding to the data block is greater than the current average value; in response to the value of the first counter of the cache corresponding to the data block being greater than the current average value, increment the values of the first counters of other caches by one; and in response to the value of the first counter of the cache corresponding to the data block not being greater than the current average value, clear the value of the first counter.
[0010] In some embodiments, the system further includes a second counting module configured to: in response to the processor accessing a data block, decrement the value of the second counter of the cache corresponding to the data block by one.
[0011] In some embodiments, the third execution module is configured to: in response to the second Hamming distance being greater than the first Hamming distance, replace the cache corresponding to the second maximum value; and in response to the second Hamming distance not being greater than the first Hamming distance, replace the cache corresponding to the first maximum value.
[0012] In yet another aspect, an embodiment of the present invention further provides a computer device, including: at least one processor; and a memory storing computer instructions that can be run on the processor, and when the instructions are executed by the processor, the steps of the above method are implemented.
[0013] In still another aspect, an embodiment of the present invention further provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the above method.
[0014] The present invention has the following beneficial technical effects: By combining the Hamming distance with a counter and selecting different replacement strategies according to different memory access programs, the LRU is used when the locality is strong to maximize the utilization of the data access locality feature; the LFU is used when the probability is strong to screen according to the usage frequency, and the cache hit rate is improved by adaptively selecting an appropriate replacement strategy. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other embodiments can be obtained based on these drawings without creative efforts.
[0016] Figure 1 Schematic diagram of an embodiment of the method for replacing a cache provided by the present invention;
[0017] Figure 2 Schematic diagram of an embodiment of the system for replacing a cache provided by the present invention;
[0018] Figure 3 Schematic diagram of the hardware structure of an embodiment of the computer device for replacing a cache provided by the present invention;
[0019] Figure 4 Schematic diagram of an embodiment of the computer storage medium for replacing a cache provided by the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0020] To make the objectives, technical solutions, and advantages of the present invention clearer, the following further elaborates on the embodiments of the present invention in detail with reference to specific embodiments and the accompanying drawings.
[0021] It should be noted that all the expressions using "first" and "second" in the embodiments of the present invention are used to distinguish two entities or parameters with the same name but different identities. It can be seen that "first" and "second" are only for the convenience of expression and should not be construed as a limitation on the embodiments of the present invention. This will not be elaborated further in the subsequent embodiments.
[0022] In the first aspect of the embodiments of the present invention, an embodiment of a method for replacing a cache is proposed. Figure 1 Shown is a schematic diagram of an embodiment of the method for replacing a cache provided by the present invention. As Figure 1 shown, the embodiments of the present invention include the following steps:
[0023] S1. In response to replacing the cache, respectively determine the first maximum value in the first counters corresponding to all caches and the second maximum value in the second counters, and calculate the first Hamming distance between the first maximum value and other first counters and the second Hamming distance between the second maximum value and other second counters;
[0024] S2. In response to the Hamming distance being greater than the first threshold, replace the cache corresponding to the first maximum value;
[0025] S3. In response to the Hamming distance being less than or equal to the first threshold and greater than the second threshold, perform a weighted calculation on the values of the first counter and the second counter, and replace the cache corresponding to the maximum value after the weighted calculation; and
[0026] S4. In response to the Hamming distance being less than or equal to the second threshold, determine the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance.
[0027] Use two counters to mark cache data blocks, judge the program memory access type according to the statistical characteristics of the counters, and thus adopt different counters as the replacement basis. The specific solution is as follows:
[0028] In some embodiments, the method includes: calculating the current average value of the first counters of the caches corresponding to all data blocks, and in response to the processor accessing a data block, judging whether the value of the first counter of the cache corresponding to the data block is greater than the current average value; in response to the value of the first counter of the cache corresponding to the data block being greater than the current average value, increment the values of the first counters of other caches by one; and in response to the value of the first counter of the cache corresponding to the data block not being greater than the current average value, clear the value of the first counter.
[0029] The counter C1 is implemented based on LRU, uses a relatively small number of bits N compared to traditional LRU to count the recent usage of data blocks in the cache, so as to save physical address space. Each time the processor accesses the cache, compare this cache with the counter values of other caches. If the accessed cache counter value is smaller, clear the count, and the counts of other caches remain unchanged; if the accessed cache counter value is larger, the count remains unchanged, and the counts of other caches are incremented by one. Therefore, the larger the counter value, the longer the corresponding cache has not been accessed. Select the cache with the largest counter value for replacement.
[0030] In some embodiments, the method further includes: in response to the processor accessing a data block, decrement the value of the second counter of the cache corresponding to the data block by one.
[0031] The counter C2 also uses fewer bits M than the relatively traditional LFU to record the recent usage times of data blocks in the cache. To be consistent with C1, an aging counting strategy is adopted. All bits of C2 are updated to all 1s during initialization. At each hit, the corresponding cache counter value is decremented by one. The smaller the counter value, the more recently the corresponding cache has been used. When replacing, the cache with the largest counter value is selected. Since M is small, it avoids the situation where certain data blocks are intensively accessed during a certain period, resulting in an excessive proportion of that data block. After the intensive access, it will not stay in the cache for too long and occupy space. At the same time, after all the C2 counters reach 0, all the C2 counter values are initialized to all 1s.
[0032] In response to replacing the cache, respectively determine the first maximum value in the first counters corresponding to all caches and the second maximum value in the second counters, and calculate the first Hamming distance between the first maximum value and the other first counters and the second Hamming distance between the second maximum value and the other second counters. In response to the Hamming distance being greater than the first threshold, replace the cache corresponding to the first maximum value.
[0033] In response to the Hamming distance being less than or equal to the first threshold and greater than the second threshold, perform a weighted calculation on the values of the first counter and the second counter, and replace the cache corresponding to the maximum value after the weighted calculation. The weights of the first counter and the second counter can be set correspondingly according to specific situations.
[0034] In response to the Hamming distance being less than or equal to the second threshold, determine the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance.
[0035] In some embodiments, the determining the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance includes: in response to the second Hamming distance being greater than the first Hamming distance, replace the cache corresponding to the second maximum value; and in response to the second Hamming distance not being greater than the first Hamming distance, replace the cache corresponding to the first maximum value.
[0036] Different program types have different performances for C1 and C2 counters. When the program is of the type with strong memory access locality and high density, due to frequent access to certain data blocks, the counter values of these data blocks are larger, while the counter values of other data blocks are smaller. This makes the distribution of counter values of each data block in C1 more dispersed and the standard deviation larger. When the program is of the type with a large memory access interval and poor locality, the access probabilities of each data block in C1 are not very different, the counter value distribution is more concentrated, and the standard deviation is smaller. The size of each data in C2 only depends on the usage frequency. When the locality is weak and probabilistic memory access dominates, the range distribution is more obvious. At the same time, since only the cache data corresponding to the maximum values of C1 and C2 counters is concerned during replacement, the Hamming distance H1 between the maximum value of C1 and other counter values can be calculated. The larger the value, the more discrete the distribution of C1 values, the stronger the locality characteristics of program access, and the more the C1 values can reflect the access requirements. The data block with the largest C1 value can be used as the replacement block; the smaller the H1 value, the more concentrated the distribution of C1 values, the stronger the probabilistic access distribution, and it is suitable to use the data block with the largest C2 value as the replacement block. Therefore, the Hamming distance H2 between the maximum value of C2 and other counter values is calculated synchronously and compared with H1. When H1 is larger, the cache replacement refers to C1; otherwise, the cache replacement refers to C2.
[0037] When using LRU, N is smaller, which avoids the main memory access jitter caused by simply relying on the recent data usage situation; when using LFU, M is smaller, which avoids the situation that the data blocks accessed intensively during a certain period stay in the cache for too long and occupy space, and at the same time saves physical space. The embodiments of the present invention select different replacement strategies according to different memory access programs. When the locality is strong, LRU is used to make the most of the data access locality characteristics; when the probability is strong, LFU is used to screen according to the usage frequency, and the cache hit rate is improved by adaptively selecting the appropriate replacement strategy.
[0038] It should be particularly noted that each step in each embodiment of the above method for replacing the cache can be mutually crossed, replaced, added, or deleted. Therefore, these reasonable permutation and combination transformations for the method of replacing the cache should also fall within the protection scope of the present invention, and the protection scope of the present invention should not be limited to the embodiments.
[0039] Based on the above purpose, in the second aspect of the embodiments of the present invention, a cache replacement system is proposed. As Figure 2As shown, system 200 includes the following modules: a calculation module configured to, in response to replacing a cache, respectively determine a first maximum value in first counters corresponding to all caches and a second maximum value in second counters, and calculate a first Hamming distance between the first maximum value and other first counters and a second Hamming distance between the second maximum value and other second counters; a first execution module configured to, in response to the Hamming distance being greater than a first threshold, replace the cache corresponding to the first maximum value; a second execution module configured to, in response to the Hamming distance being less than or equal to the first threshold and greater than a second threshold, perform a weighted calculation on the values of the first counter and the second counter, and replace the cache corresponding to the maximum value after the weighted calculation; and a third execution module configured to, in response to the Hamming distance being less than or equal to the second threshold, determine the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance.
[0040] In some embodiments, the system further includes a first counting module configured to: calculate a current average value of first counters of caches corresponding to all data blocks, and in response to a processor accessing a data block, determine whether the value of the first counter of the cache corresponding to the data block is greater than the current average value; in response to the value of the first counter of the cache corresponding to the data block being greater than the current average value, increment the values of the first counters of other caches by one; and in response to the value of the first counter of the cache corresponding to the data block not being greater than the current average value, clear the value of the first counter.
[0041] In some embodiments, the system further includes a second counting module configured to: in response to a processor accessing a data block, decrement the value of the second counter of the cache corresponding to the data block by one.
[0042] In some embodiments, the third execution module is configured to: in response to the second Hamming distance being greater than the first Hamming distance, replace the cache corresponding to the second maximum value; and in response to the second Hamming distance not being greater than the first Hamming distance, replace the cache corresponding to the first maximum value.
[0043] For the above purposes, in the third aspect of the embodiments of the present invention, a computer device is proposed, including: at least one processor; and a memory storing computer instructions that can run on the processor, and the instructions are executed by the processor to implement the following steps: S1. In response to replacing the cache, respectively determine the first maximum value in the first counters corresponding to all caches and the second maximum value in the second counters, and calculate the first Hamming distance between the first maximum value and other first counters and the second Hamming distance between the second maximum value and other second counters; S2. In response to the Hamming distance being greater than the first threshold, replace the cache corresponding to the first maximum value; S3. In response to the Hamming distance being less than or equal to the first threshold and greater than the second threshold, perform a weighted calculation on the values of the first counter and the second counter, and replace the cache corresponding to the maximum value after the weighted calculation; and S4. In response to the Hamming distance being less than or equal to the second threshold, determine the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance.
[0044] In some embodiments, the steps further include: calculating the current average value of the first counters of the caches corresponding to all data blocks, and in response to the processor accessing a data block, determining whether the value of the first counter of the cache corresponding to the data block is greater than the current average value; in response to the value of the first counter of the cache corresponding to the data block being greater than the current average value, incrementing the values of the first counters of other caches by one; and in response to the value of the first counter of the cache corresponding to the data block not being greater than the current average value, clearing the value of the first counter.
[0045] In some embodiments, the steps further include: in response to the processor accessing a data block, decrementing the value of the second counter of the cache corresponding to the data block by one.
[0046] In some embodiments, determining the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance includes: in response to the second Hamming distance being greater than the first Hamming distance, replacing the cache corresponding to the second maximum value; and in response to the second Hamming distance not being greater than the first Hamming distance, replacing the cache corresponding to the first maximum value.
[0047] As Figure 3 shown, it is a schematic hardware structure diagram of an embodiment of the above computer device for replacing the cache provided by the present invention.
[0048] Taking the device as Figure 3 shown as an example, in this device, there is a processor 301 and a memory 302.
[0049] The processor 301 and the memory 302 can be connected through a bus or other means. Figure 3Take the bus connection as an example.
[0050] The memory 302, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the method of replacing the cache in the embodiments of the present application. The processor 301 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions, and modules stored in the memory 302, that is, implements the method of replacing the cache.
[0051] The memory 302 may include a program storage area and a data storage area. Among them, the program storage area can store an operating system and application programs required for at least one function; the data storage area can store data created according to the use of the method of replacing the cache, etc. In addition, the memory 302 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other non-volatile solid-state storage devices. In some embodiments, the memory 302 may optionally include a memory remotely disposed relative to the processor 301, and these remote memories can be connected to the local module through a network. Examples of the above network include but are not limited to the Internet, an enterprise intranet, a local area network, a mobile communication network, and combinations thereof.
[0052] One or more computer instructions 303 corresponding to the method of replacing the cache are stored in the memory 302, and when executed by the processor 301, execute the method of replacing the cache in any of the above method embodiments.
[0053] Any embodiment of the computer device that executes the above method of replacing the cache can achieve the same or similar effects as any of the foregoing method embodiments corresponding thereto.
[0054] The present invention also provides a computer-readable storage medium, and the computer-readable storage medium stores a computer program that, when executed by a processor, executes the method of replacing the cache.
[0055] As Figure 4 shown, it is a schematic diagram of an embodiment of the above computer storage medium for replacing the cache provided by the present invention. Taking the computer storage medium as shown in Figure 4 shown as an example, the computer-readable storage medium 401 stores a computer program 402 that, when executed by a processor, executes the above method.
[0056] Finally, it should be noted that a person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program of the method for replacing the cache can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, the storage medium of the program can be a disk, an optical disk, a read-only storage memory (ROM) or a random access memory (RAM), etc. The above-mentioned computer program embodiments can achieve the same or similar effects as the corresponding above-mentioned arbitrary method embodiments.
[0057] The above are exemplary embodiments disclosed in the present invention, but it should be noted that various changes and modifications may be made without departing from the scope disclosed in the embodiments of the present invention as defined in the claims. The functions, steps and / or actions of the method claims according to the disclosed embodiments described herein do not need to be performed in any particular order. In addition, although the elements disclosed in the embodiments of the present invention may be described or required in individual form, they may also be understood as multiple unless explicitly limited to the singular.
[0058] It should be understood that, as used herein, the singular forms "a", "an" are intended to include the plural forms as well, unless the context clearly supports an exception. It should also be understood that, as used herein, "and / or" refers to any and all possible combinations including one or more of the associated listed items.
[0059] The serial numbers of the embodiments disclosed in the above embodiments of the present invention are only for description and do not represent the advantages or disadvantages of the embodiments.
[0060] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.
[0061] A person skilled in the art should understand that the discussion of any of the above embodiments is only exemplary and is not intended to imply that the scope of the disclosure of the embodiments of the present invention (including the claims) is limited to these examples; under the concept of the embodiments of the present invention, the technical features in the above embodiments or different embodiments can also be combined, and there are many other changes in different aspects of the embodiments of the present invention as above, which are not provided in detail for the sake of simplicity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present invention should be included in the protection scope of the embodiments of the present invention.
Claims
1. A method for replacing a cache, characterized in that, It includes the following steps: In response to replacing the cache, respectively determine the first maximum value in the first counters corresponding to all caches and the second maximum value in the second counters, and calculate the first Hamming distance between the first maximum value and other first counters and the second Hamming distance between the second maximum value and other second counters; In response to the first Hamming distance being greater than the first threshold, replace the cache corresponding to the first maximum value; In response to the first Hamming distance being less than or equal to the first threshold and greater than the second threshold, perform a weighted calculation on the values of the first counter and the second counter, and replace the cache corresponding to the maximum value after the weighted calculation; And In response to the first Hamming distance being less than or equal to the second threshold, determine the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance; wherein, the first counter is used to determine the memory access interval between caches, and the second counter is used to determine the usage frequency of each cache; The determining the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance includes: in response to the second Hamming distance being greater than the first Hamming distance, replacing the cache corresponding to the second maximum value; and in response to the second Hamming distance not being greater than the first Hamming distance, replacing the cache corresponding to the first maximum value.
2. The method according to claim 1, characterized in that, The method further includes: Calculate the current average value of the first counters of the caches corresponding to all data blocks, and in response to the processor accessing a data block, determine whether the value of the first counter of the cache corresponding to the data block is greater than the current average value; In response to the value of the first counter of the cache corresponding to the data block being greater than the current average value, increment the values of the first counters of other caches by one; and In response to the value of the first counter of the cache corresponding to the data block not being greater than the current average value, clear the value of the first counter to zero.
3. The method according to claim 1, characterized in that, The method further includes: In response to the processor accessing a data block, decrement the value of the second counter of the cache corresponding to the data block by one.
4. A system for replacing a cache, characterized in that, It includes: A calculation module configured to, in response to replacing the cache, respectively determine the first maximum value in the first counters corresponding to all caches and the second maximum value in the second counters, and calculate the first Hamming distance between the first maximum value and other first counters and the second Hamming distance between the second maximum value and other second counters; A first execution module configured to, in response to the first Hamming distance being greater than the first threshold, replace the cache corresponding to the first maximum value; A second execution module configured to, in response to the first Hamming distance being less than or equal to the first threshold and greater than the second threshold, perform a weighted calculation on the values of the first counter and the second counter, and replace the cache corresponding to the maximum value after the weighted calculation; And A third execution module configured to, in response to the first Hamming distance being less than or equal to the second threshold, determine the cache to be replaced according to the magnitudes of the first Hamming distance and the second Hamming distance; wherein, the first counter is used to determine the memory access interval between caches, and the second counter is used to determine the usage frequency of each cache; The third execution module is further configured to: replace the cache corresponding to the second maximum value in response to the second Hamming distance being greater than the first Hamming distance; and replace the cache corresponding to the first maximum value in response to the second Hamming distance not being greater than the first Hamming distance.
5. The system according to claim 4, characterized in that, The system further includes a first counting module configured to: calculate the current average value of the first counters of the caches corresponding to all data blocks, and determine whether the value of the first counter of the cache corresponding to the data block is greater than the current average value in response to the processor accessing the data block; in response to the value of the first counter of the cache corresponding to the data block being greater than the current average value, increment the values of the first counters of other caches by one; and in response to the value of the first counter of the cache corresponding to the data block not being greater than the current average value, clear the value of the first counter.
6. The system according to claim 4, characterized in that, The system further includes a second counting module configured to: decrement the value of the second counter of the cache corresponding to the data block in response to the processor accessing the data block.
7. A computer device, characterized in that, Comprising: at least one processor; and a memory storing computer instructions executable on the processor, the instructions implementing the steps of the method according to any one of claims 1-3 when executed by the processor.
8. A computer-readable storage medium storing a computer program, characterized in that, The computer program implements the steps of the method according to any one of claims 1-3 when executed by the processor.
Citation Information
Patent Citations
Hit ratio estimation device, hit ratio estimation method, hit ration estimation program and recording medium
US20050108327A1
Cache replacement technique
WO2019128958A1