A parallel stacked chip set structure and its mounting method

By stacking low-power chip modules in parallel and supporting them with copper conductors, the high cost problem was solved, and the cost and size of MCUs in new energy vehicles were reduced.

CN114005806BActive Publication Date: 2025-11-28AIDES AUTOMOTIVE MOTOR WUXI CO LTD
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Patent Information

Application Number
CN202111192785.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-10-13
Publication Date
2025-11-28
Estimated Expiration
2041-10-13

AI Technical Summary

Technical Problem

In the existing technology, the high price of IGBT or silicon carbide and gallium nitride power modules has led to the high cost of MCUs in new energy vehicles, which has become a bottleneck for the development of the new energy vehicle industry. In addition, each hub motor of the distributed drive requires a high-power chip, which leads to a significant increase in cost.

Method used

The parallel stacked chipset structure is adopted, in which multiple low-power chip modules are stacked or arranged in parallel and then packaged. Copper material is used to make a conductor to provide structural support. Multiple chip modules are connected by welding, and the number of chips is configured according to the power requirements.

Benefits of technology

This effectively reduces the production cost of motor drivers while also reducing the packaged size, achieving the same power output as high-power chips.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a parallel stacked chip set structure and a mounting method thereof, which comprises chip modules and guide rows; a plurality of chip modules are arranged on the guide rows in sequence along the length direction of the guide rows, and the chip modules are connected through welding; a plurality of low-power chip modules are stacked in parallel or arranged in parallel, and then encapsulated, so that the chip modules have the same power as high-power chip modules, and the price can be greatly reduced, and the production cost is reduced; the first guide row and the second guide row are arranged to provide structural support for the chip modules, so that the plurality of chip modules can be regularly arranged, and the volume after encapsulation is reduced.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of motor driver, in particular to a parallel stacked chip set structure and a mounting method thereof. BACKGROUND

[0002] Under the condition of the growing market of new energy vehicles, the demand for IGBT or silicon carbide and gallium nitride power modules is increasing, and the technical requirements for the chips of these drive modules are also increasing with the increase of motor power and voltage. The increase of these technical requirements means that the price of the chip will also increase, and the price of the whole MCU (micro control unit) will also be high. For new energy vehicles which are very sensitive to price, high-priced MCUs will become a bottleneck for the development of new energy vehicle industry. For distributed drive new energy vehicles, each in-wheel motor needs a power module (MCU contains). Using the current general technology, each in-wheel motor in distributed drive needs a high-power chip (IGBT), which will cause a large increase in cost and may make distributed drive lose market competitiveness in some new energy vehicle markets.

[0003] The present application is to solve the above problems and reduce the manufacturing cost of power modules. Before packaging the power module, a plurality of small power (IGBT, silicon carbide or gallium nitride) chips are stacked in parallel or arranged in parallel, small power chips are configured according to power requirements, and then packaged. The price difference between small power chips and large power chips is very large. Taking IGBT chips as an example, the price of a small power chip of about 10A is only a few yuan, and the price of a large power chip of 500A is thousands of yuan. SUMMARY

[0004] The present application provides a parallel stacked chip set structure and a mounting method thereof, which can effectively reduce the production cost of motor driver.

[0005] Technical scheme: In order to achieve the above purpose, the parallel stacked chip set structure of the present application comprises a chip module and a busbar; a plurality of chip modules are arranged on the busbar along the length direction of the busbar, and a plurality of chip modules are connected by welding.

[0006] Further, the busbar comprises a first busbar and a second busbar; the first busbar is parallel to the second busbar, and the chip module is arranged at the two ends of the first busbar and the second busbar respectively.

[0007] Further, the cross-sectional area of the first busbar and the second busbar is the same, and the cross-sectional area of the first busbar and the second busbar is positively correlated with the current density of the chip module.

[0008] Further, the guide is made of copper material.

[0009] Further, a mounting method of the parallel stacked chip set structure comprises the following steps,

[0010] Step one, according to the required power of the power module, the number of chip modules is selected, the greater the required power of the power module, the more the number of chip modules;

[0011] Step two, all the chip modules are arranged on the first guide and the second guide in turn, and the chip modules are welded and connected;

[0012] Step three, the chip modules after welding are encapsulated and inspected.

[0013] Beneficial effects: the parallel stacked chip set structure can effectively reduce the production cost of the motor driver, including but not limited to the following technical effects:

[0014] 1) a plurality of small power chip modules are stacked in parallel or arranged in parallel, and then encapsulated, so as to have the same power as the large power chip, while the price can be greatly reduced, and the production cost is reduced;

[0015] 2) the first guide and the second guide are provided to provide structural support for the chip modules, so that the plurality of chip modules can be regularly arranged, and the volume after encapsulation is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0016] ATTACH Figure 1 The structure diagram of the present application. DETAILED DESCRIPTION

[0017] The present application will be further described below in combination with the drawings.

[0018] As shown in the accompanying Figure 1 : a parallel stacked chip set structure, comprising chip modules 1 and guides 2; a plurality of chip modules 1 are arranged on the guide 2 in the length direction of the guide 2, and a plurality of chip modules 1 are connected by welding; since the price of the large power chip is high, a plurality of small power chip modules 1 are stacked in parallel or arranged in parallel, and then encapsulated, so as to have the same power as the large power chip, while the price can be greatly reduced, and the production cost is reduced.

[0019] The guide 2 comprises a first guide 21 and a second guide 22; the first guide 21 is parallel to the second guide 22, and the chip modules 1 are arranged on the first guide 21 and the second guide 22 at both ends; the first guide 21 and the second guide 22 provide structural support for the chip modules 1, so that the plurality of chip modules 1 can be regularly arranged, and the volume after encapsulation is reduced.

[0020] The cross-sectional area of the first and second bus bars 21 and 22 is the same, and the cross-sectional area of the first and second bus bars 21 and 22 is positively correlated with the current density of the chip module 1.

[0021] The bus bar 2 is made of copper material.

[0022] The method comprises the following steps:

[0023] Step one, the number of chip modules 1 is selected according to the required power of the power module, the greater the required power of the power module, the more the number of chip modules 1;

[0024] Step two, all the chip modules 1 are arranged on the first and second bus bars 21 and 22 in sequence, and the chip modules 1 are welded and connected;

[0025] Step three, the chip modules 1 after welding are encapsulated and inspected.

[0026] The above only describes the preferred embodiments of the present application, and it should be noted that for those skilled in the art, some improvements and refinements can be made without departing from the principles of the present application, and these improvements and refinements should also be considered as the protection scope of the present application.

Claims

1. A mounting method of parallel stacked chip set structure, characterized in that: The parallel stacked chip set structure comprises chip modules (1) and a guide row (2); a plurality of chip modules (1) are arranged on the guide row (2) in sequence along the length direction of the guide row (2), and a plurality of chip modules (1) are connected by welding; The guide row (2) comprises a first guide row (21) and a second guide row (22); the first guide row (21) is parallel to the second guide row (22), and the chip module (1) is arranged at both ends of the first guide row (21) and the second guide row (22); The cross-sectional area of the first guide row (21) and the second guide row (22) is the same, and the cross-sectional area of the first guide row (21) and the second guide row (22) is positively correlated with the current density of the chip module (1); The first guide row (21) and the second guide row (22) provide structural support for the chip module (1), so that a plurality of chip modules (1) can be arranged regularly; The guide row (2) is made of copper material; The mounting method of the parallel stacked chip set structure, Comprising the following steps, Step one, according to the required power of the power module, select the number of chip modules (1), the greater the required power of the power module, the more the number of chip modules (1); Step two, arrange all the chip modules (1) on the first guide row (21) and the second guide row (22) in sequence, and weld the chip modules (1); Step three, encapsulation inspection is performed on the chip modules (1) after welding.

Citation Information

Patent Citations

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