Capacitor structure and method for manufacturing the same

Abstract

The present invention discloses a capacitor structure and a manufacturing method thereof. The capacitor structure includes a first electrode, a second electrode and a capacitor dielectric stack. The capacitor dielectric stack is arranged between the first electrode and the second electrode, and the capacitor dielectric stack includes a first dielectric layer. The first dielectric layer includes a first zirconium oxide layer and a first silicon zirconium oxide layer. The manufacturing method of the capacitor structure includes the following steps. A capacitor dielectric stack is formed on the first electrode, and the capacitor dielectric stack includes a first dielectric layer. The first dielectric layer includes a first zirconium oxide layer and a first silicon zirconium oxide layer. Then, a second electrode is formed on the capacitor dielectric stack, and the capacitor dielectric stack is located between the first electrode and the second electrode.

Description

Technical Field

[0001] The present invention relates to a capacitor structure and a manufacturing method thereof, in particular to a capacitor structure including a capacitor dielectric stack and a manufacturing method thereof. Background Art

[0002] In modern society, microprocessor systems composed of integrated circuits (ICs) have long been widely used in all aspects of life. Many electronic devices such as personal computers, mobile phones, and household appliances all have integrated circuits. With the continuous advancement of technology and the continuous development of various emerging electronic products, the design of integrated circuits is also developing in the direction of diversification, precision, and miniaturization.

[0003] In current electronic products, most of them use various semiconductor technologies to form circuit components on a silicon substrate, such as metal oxide semiconductor transistors (MOS transistors), capacitors or resistors. Various circuit components can be electrically connected to each other to form a complex circuit system. Generally speaking, a capacitor structure can be composed of an upper electrode, a dielectric layer and a lower electrode, for example, it can have a (metal-insulator-metal (MIM)) structure. However, as the functions and performance requirements of electronic products continue to increase, the operating performance requirements of the capacitor structure are relatively increased. Therefore, how to change the structural design and / or manufacturing method of the capacitor structure to meet product requirements has always been the research direction of people in related fields. Summary of the invention

[0004] An object of the present invention is to provide a capacitor structure and a method for manufacturing the same, wherein a capacitor dielectric stack including a zirconium oxide layer and a silicon zirconium oxide layer is disposed between two electrodes of the capacitor structure, and the silicon zirconium oxide layer is utilized to reduce the leakage current of the capacitor structure, thereby improving the operating performance of the capacitor structure.

[0005] To achieve the above object, one embodiment of the present invention provides a capacitor structure, which includes a first electrode, a second electrode and a capacitor dielectric stack. The capacitor dielectric stack is disposed between the first electrode and the second electrode, and the capacitor dielectric stack includes a first dielectric layer. The first dielectric layer includes a first zirconium oxide layer and a first silicon zirconium oxide layer.

[0006] To achieve the above object, one embodiment of the present invention provides a method for manufacturing a capacitor structure, which includes the following steps: forming a capacitor dielectric stack on a first electrode, and the capacitor dielectric stack includes a first dielectric layer. The first dielectric layer includes a first zirconium oxide layer and a first silicon zirconium oxide layer. Then, forming a second electrode on the capacitor dielectric stack, and the capacitor dielectric stack is located between the first electrode and the second electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a schematic diagram of a capacitor structure according to a first embodiment of the present invention;

[0008] Figure 2 FIG. 1 is a schematic flow chart of an atomic layer deposition process for forming a silicon zirconium oxide layer according to an embodiment of the present invention;

[0009] Figure 3 FIG. 1 is a schematic flow chart of an atomic layer deposition process for forming a silicon zirconium oxide layer according to another embodiment of the present invention;

[0010] Figure 4 A schematic diagram of a process flow of an atomic layer deposition process for forming a zirconium oxide layer according to an embodiment of the present invention;

[0011] Figure 5 is a schematic diagram of a capacitor structure according to a second embodiment of the present invention;

[0012] Figure 6 A schematic diagram of a process flow of an atomic layer deposition process for forming a silicon oxide layer according to an embodiment of the present invention;

[0013] Figure 7 is a schematic diagram of a capacitor structure according to a third embodiment of the present invention;

[0014] Figure 8 is a schematic diagram of a capacitor structure according to a fourth embodiment of the present invention;

[0015] Fig. 9 is a schematic diagram of a capacitor structure according to a fifth embodiment of the present invention;

[0016] Fig.10 is a schematic diagram of a capacitor structure according to a sixth embodiment of the present invention;

[0017] Fig.11 A schematic diagram of a process for forming a capacitor dielectric stack according to an embodiment of the present invention;

[0018] Fig.12 is a schematic diagram of a capacitor structure according to a seventh embodiment of the present invention;

[0019] Fig.13 A schematic diagram of a process for forming a capacitor dielectric stack according to another embodiment of the present invention;

[0020] Fig.14 FIG. 4 is a schematic diagram of a capacitor structure according to an eighth embodiment of the present invention.

[0021] The reference numerals are described as follows:

[0022] 10 Base

[0023] 20 First electrode

[0024] 30 Dielectric layer

[0025] 32 Silicon zirconium oxide layer

[0026] 34 Zirconia layer

[0027] 36 Zirconia layer

[0028] 38 Silicon oxide layer

[0029] 40 Alumina layer

[0030] 50 Dielectric layer

[0031] 52 Silicon zirconium oxide layer

[0032] 54 Zirconia layer

[0033] 60 Second electrode

[0034] 91 Atomic Layer Deposition Process

[0035] 91' Atomic Layer Deposition Process

[0036] 92 Atomic Layer Deposition Process

[0037] 93 Atomic Layer Deposition Process

[0038] 101 Capacitor Structure

[0039] 102 Capacitor Structure

[0040] 103 Capacitor Structure

[0041] 104 Capacitor Structure

[0042] 105 Capacitor Structure

[0043] 106 Capacitor Structure

[0044] 107 Capacitor Structure

[0045] 108 Capacitor Structure

[0046] DS Capacitor Dielectric Stack

[0047] Steps S11-S19

[0048] Steps S21-S25

[0049] Steps S31-S35

[0050] Steps S41-S43

[0051] T32 Thickness

[0052] T34 Thickness

[0053] T36 Thickness

[0054] T38 Thickness

[0055] T40 Thickness

[0056] T52 Thickness

[0057] T54 Thickness

[0058] TK1 Thickness

[0059] TK2 Thickness

[0060] TK3 Thickness

[0061] TK4 Thickness

[0062] Z vertical direction DETAILED DESCRIPTION

[0063] In order to enable a person skilled in the art to further understand the present invention, several preferred embodiments of the present invention are listed below, and the technical scheme of the present invention and the effects to be achieved are described in detail with the accompanying drawings. A person skilled in the art to which the present invention belongs can refer to the following embodiments and replace, reorganize, and mix the features of several different embodiments to complete other embodiments without departing from the spirit of the present invention.

[0064] See also Figure 1 . Figure 1 FIG. 1 is a schematic diagram of a capacitor structure 101 according to a first embodiment of the present invention. Figure 1 As shown, the capacitor structure 101 includes a first electrode 20, a second electrode 60 and a capacitor dielectric stack DS. The capacitor dielectric stack DS is disposed between the first electrode 20 and the second electrode 60, and the capacitor dielectric stack DS includes a first dielectric layer (eg Figure 1 The dielectric layer 30 shown in FIG. 3 includes a first zirconium oxide layer (eg Figure 1 ) and a first zirconium silicon oxide layer (e.g. Figure 1The silicon zirconium oxide layer 32 is shown in FIG. 1 . The silicon zirconium oxide layer 32 can be used to change the energy band distribution in the dielectric layer 30 and the capacitor dielectric stack DS and / or reduce leakage paths (such as leakage paths formed by the crystalline grain boundaries of zirconium oxide crystals, but not limited thereto), thereby reducing the leakage current of the capacitor structure 101 and improving the operating performance of the capacitor structure 101.

[0065] In some embodiments, the capacitor structure 101 may be disposed on the substrate 10, the first electrode 20 may be disposed between the capacitor dielectric stack DS and the substrate 10 in the vertical direction Z, and the capacitor dielectric stack DS may be disposed between the first electrode 20 and the second electrode 60 in the vertical direction Z, so the first electrode 20 may be regarded as a lower electrode and the second electrode 60 may be regarded as an upper electrode, but the invention is not limited thereto. In some embodiments, the substrate 10 may include a semiconductor substrate or a non-semiconductor substrate, the semiconductor substrate may include a silicon substrate, a silicon germanium semiconductor substrate or a silicon-on-insulator (SOI) substrate, etc., and the non-semiconductor substrate may include a glass substrate, a plastic substrate or a ceramic substrate, etc., but the invention is not limited thereto. In addition, other active components (such as transistor structures, not shown) and / or passive components may be disposed in the substrate 10 according to design requirements, and the capacitor structure 101 may be electrically connected to the active components and / or passive components in the substrate 10, for example, it may be electrically connected to the transistor structure to form a memory cell, but the invention is not limited thereto.

[0066] In some embodiments, the first electrode 20 and the second electrode 60 may include a single layer or multiple layers of conductive materials, such as titanium nitride (TiN), tantalum nitride (TaN), tungsten nitride (WN), platinum (Pt) or other suitable metal or non-metal conductive materials. In addition, in some embodiments, the zirconium oxide layer 34 may be pure zirconium oxide (e.g., formed only of zirconium oxide) or nearly pure zirconium oxide (e.g., including zirconium oxide and some unintentionally doped impurities), so the atomic percentage (at.%) of zirconium in the zirconium oxide layer 34 may be higher than the atomic percentage of zirconium in the silicon zirconium oxide layer 32. In addition, although the silicon zirconium oxide layer 32 can be used to reduce leakage current, since the dielectric constant of the silicon zirconium oxide layer 32 is lower than the dielectric constant of the zirconium oxide layer 34, in order to reduce the influence on the permittivity and / or capacitance density of the capacitor dielectric stack DS as a whole, the thickness T34 of the zirconium oxide layer 34 in the vertical direction Z can be greater than the thickness T32 of the silicon zirconium oxide layer 32 in the vertical direction Z, but the invention is not limited thereto. In some embodiments, the silicon zirconium oxide layer 32 can be disposed between the zirconium oxide layer 34 and the first electrode 20 in the vertical direction Z, but the invention is not limited thereto. In other words, in some embodiments, the zirconium oxide layer 34 can be disposed between the silicon zirconium oxide layer 32 and the first electrode 20 in the vertical direction Z.

[0067] In some embodiments, the capacitor dielectric stack DS may further include an aluminum oxide layer 40, and the dielectric layer 30 may be disposed between the aluminum oxide layer 40 and the first electrode 20, but is not limited thereto. In other words, in some embodiments, the dielectric layer 30 having the zirconium oxide layer 34 and the silicon zirconium oxide layer 32 may also be disposed between the aluminum oxide layer 40 and the second electrode 60 in the vertical direction Z according to design requirements. In some embodiments, the aluminum oxide layer 40 may have a relatively high crystallization temperature and / or a large energy barrier, which may be used to reduce leakage current caused by crystallization of the zirconium oxide layer 34, but the dielectric constant of the aluminum oxide layer 40 is relatively low (for example, lower than the dielectric constants of the zirconium oxide layer 34 and the silicon zirconium oxide layer 32, respectively), so the thickness T34 of the zirconium oxide layer 34 may be greater than the thickness T40 of the aluminum oxide layer 40 in the vertical direction Z, so as to reduce the influence of the aluminum oxide layer 40 on the overall permittivity and / or capacitance density of the capacitor dielectric stack DS. In addition, in some embodiments, the zirconium oxide layer 34 in the dielectric layer 30 may be disposed between the silicon zirconium oxide layer 32 and the aluminum oxide layer 40 in the vertical direction Z to reduce the effect of silicon in the silicon zirconium oxide layer 32 on the aluminum oxide layer 40, but the invention is not limited thereto. In some embodiments, the capacitor dielectric stack DS may further include a second dielectric layer (e.g. Figure 1The dielectric layer 50 shown in FIG. 5 is disposed between the aluminum oxide layer 40 and the second electrode 60. The dielectric layer 50 may include a zirconium oxide layer 54, and the material composition of the zirconium oxide layer 54 may be the same as the material composition of the zirconium oxide layer 34, but the invention is not limited thereto. In some embodiments, the zirconium oxide layer 54 may be pure zirconium oxide (e.g., formed only of zirconium oxide) or nearly pure zirconium oxide (e.g., including zirconium oxide and some unintentionally doped impurities), so the zirconium atomic percentage in the zirconium oxide layer 54 may be higher than the zirconium atomic percentage in the silicon zirconium oxide layer 32, and the thickness T54 of the zirconium oxide layer 54 in the vertical direction Z may be greater than the thickness T32 of the silicon zirconium oxide layer 32, but the invention is not limited thereto.

[0068] See also Figures 1 to 4 . Figure 2 FIG. 1 is a schematic flow chart of an atomic layer deposition process for forming a silicon zirconium oxide layer according to an embodiment of the present invention. Figure 3 FIG. 1 is a schematic flow chart of an atomic layer deposition process for forming a silicon zirconium oxide layer according to another embodiment of the present invention. Figure 4 FIG. 1 is a schematic diagram of a process flow of an atomic layer deposition process for forming a zirconium oxide layer according to an embodiment of the present invention. Figure 1 As shown, the manufacturing method of the capacitor structure 101 may include the following steps. A capacitor dielectric stack DS is formed on the first electrode 20, and the capacitor dielectric stack DS includes a first dielectric layer (e.g., the dielectric layer 30 described above). The dielectric layer 30 includes a first zirconium oxide layer (e.g., the zirconium oxide layer 34 described above) and a first silicon zirconium oxide layer (e.g., the silicon zirconium oxide layer 32 described above). Then, a second electrode 60 is formed on the capacitor dielectric stack DS, and the capacitor dielectric stack DS is located between the first electrode 20 and the second electrode 60.

[0069] In some embodiments, the manufacturing method of the capacitor structure 101 may include but is not limited to the following steps. The first electrode 20 may be formed on the substrate 10, and the first electrode 20 and the second electrode 60 may be formed by sputtering, atomic layer deposition (ALD) or other suitable film forming methods. In some embodiments, the first electrode 20, the second electrode 60 and each material layer in the capacitor dielectric stack DS may be formed on the substrate 10 by corresponding film forming methods and one or more patterning processes (such as but not limited to photolithography processes). In some embodiments, the silicon zirconium oxide layer 32 and the zirconium oxide layer 34 in the dielectric layer 30 may be formed by corresponding atomic layer deposition processes. For example, the silicon zirconium oxide layer 32 may be formed by Figure 2 The atomic layer deposition process shown in 91 or Figure 3 The atomic layer deposition process 91' shown in FIG. 1 is used to form the zirconium oxide layer 34. Figure 4 The atomic layer deposition process 92 shown in FIG. 1 is used for formation, but the present invention is not limited thereto.

[0070] like Figure 1 and Figure 2As shown, in some embodiments, the atomic layer deposition process 91 may include the following steps. First, step S11 is performed to introduce a zirconium-containing precursor. In some embodiments, the zirconium-containing precursor may be introduced into a process chamber of the atomic layer deposition process 91, and the substrate 10 formed with the first electrode 20 may be placed in this process chamber before step S11. The above-mentioned zirconium-containing precursor may include a zirconium halide such as zirconium chloride or other suitable zirconium-containing precursor materials. Then, after step S11, step S12 is performed to purge to remove the zirconium-containing precursor and / or possible reaction byproducts. The above-mentioned zirconium-containing precursor can be introduced into the process chamber and maintained for a preset time (for example, step S11 can be regarded as a pulse step) so that the zirconium in the zirconium-containing precursor is adsorbed on the surface of the target (for example, the first electrode 20) to form a zirconium atomic layer (atomic monolayer), and the above-mentioned blowing step can be used to remove the excess zirconium-containing precursor and / or possible reaction byproducts in the process chamber out of the process chamber. After step S12, step S13 can be performed to introduce an oxidant. The oxidant can be introduced into the process chamber and maintained for a preset time so that oxygen atoms can be combined with the zirconium atomic layer to form zirconium oxide. After step S13, step S14 can be performed to blow off to remove the oxidant. The blowing of step S14 can be used to remove the excess oxidant and / or possible reaction byproducts in the process chamber out of the process chamber. After step S14, step S15 can be performed to introduce a silicon-containing precursor. A silicon-containing precursor may be introduced into the process chamber and maintained for a preset time so that the silicon in the silicon-containing precursor is adsorbed on the surface of the target (e.g., the zirconium oxide formed in the above step S13) to form a silicon atomic layer. In some embodiments, the above silicon-containing precursor may include a silicon halide such as silicon fluoride, silicon chloride, or other suitable silicon-containing precursor materials. After step S15, step S16 may be performed to blow off to remove the silicon-containing precursor. The blowing off of step S16 can be used to remove excess silicon-containing precursor and / or possible reaction byproducts in the process chamber out of the process chamber. After step S16, step S17 may be performed to introduce an oxidant, which may be introduced into the process chamber and maintained for a preset time so that oxygen atoms can be bonded to the silicon atomic layer. After step S17, step S18 may be performed to blow off to remove the oxidant. The purge in step S18 may be used to remove excess oxidant and / or possible reaction byproducts in the process chamber out of the process chamber.

[0071] In the above-mentioned steps S12, S14, S16 and S18, an inert gas may be used for blowing or other suitable methods may be used to achieve the effect of removing the precursor, oxidant and / or reaction byproducts. In addition, the oxidant used in the above-mentioned steps S13 and S17 may include oxygen, ozone, water vapor, hydrogen peroxide, nitrogen oxide or other suitable oxidant materials, and the oxidant used in step S13 and the oxidant used in step S17 may have the same or different material compositions depending on the design requirements. The above-mentioned steps S11 to S18 can be regarded as a cycle in the atomic layer deposition process 91, and the thickness of the formed silicon zirconium oxide layer (such as silicon zirconium oxide layer 32) can be increased by repeating this cycle (i.e., repeating steps S11 to S18). In other words, the silicon zirconium oxide layer 32 may include a plurality of zirconium atomic layers, a plurality of oxygen atomic layers and a plurality of silicon atomic layers alternately stacked in the vertical direction Z. In addition, the number of times the above-mentioned cycle is required to be performed can be calculated based on the designed thickness of the silicon zirconium oxide layer 32. If the expected thickness calculated by the number of cycles that have been performed after step S18 has not reached the predetermined thickness, the above-mentioned cycle needs to be performed again. If the expected thickness calculated by the number of cycles that have been performed after step S18 has reached the predetermined thickness, step S19 can be performed to perform subsequent manufacturing processes. In some embodiments, the steps in the above-mentioned cycle can be designed and adjusted according to the silicon atomic ratio in the silicon zirconium oxide layer to be formed. For example, steps S15 to S18 in some of the above-mentioned repeated multiple cycles can be removed to reduce the silicon atomic percentage in the silicon zirconium oxide layer, but the present invention is not limited thereto. In other words, the zirconium atomic percentage and the silicon atomic percentage in the silicon zirconium oxide layer 32 can be equal to or different from each other according to design requirements. In some embodiments, the above cycle (i.e., step S11 to step S18) may be repeated at least three times, and the last step may be step S14, and the silicon zirconium oxide layer formed in this way may have a monolayer structure of zirconium oxide at both opposite ends in the vertical direction Z, but is not limited thereto.

[0072] like Figure 1 and Figure 3As shown, in some embodiments, the atomic layer deposition process 91' may include the following steps. First, step S15 is performed to introduce a silicon-containing precursor. After step S15, step S16 may be performed to blow off to remove the silicon-containing precursor and / or possible reaction byproducts. After step S16, step S17 may be performed to introduce an oxidant to allow oxygen atoms to bond with the silicon atomic layer. After step S17, step S18 may be performed to blow off to remove the oxidant and / or possible reaction byproducts. After step S18, step S11 may be performed to introduce a zirconium-containing precursor. After step S11, step S12 is performed to blow off to remove the zirconium-containing precursor and / or possible reaction byproducts. After step S12, step S13 may be performed to introduce an oxidant to allow oxygen atoms to bond with the zirconium atomic layer to form zirconium oxide. After step S13, step S14 may be performed to blow off to remove the oxidant and / or possible reaction byproducts.

[0073] The above steps S15, S16, S17, S18, S11, S12, S13 and S14 can be regarded as a cycle in the atomic layer deposition process 91'. By repeating this cycle, the thickness of the formed silicon zirconium oxide layer (e.g., silicon zirconium oxide layer 32) can be increased. If the expected thickness calculated by the number of cycles that have been executed after step S14 has not reached the predetermined thickness, the above cycle needs to be performed again. If the expected thickness calculated by the number of cycles that have been executed after step S14 has reached the predetermined thickness, step S19 can be performed to perform subsequent manufacturing processes. In some embodiments, the above cycle (i.e., step S15, step S16, step S17, step S18, step S11, step S12, step S13 and step S14) can be repeated at least 3 times, and the last step can be step S18, and the silicon zirconium oxide layer formed in this way can be a single layer structure of silicon oxide at both opposite ends in the vertical direction Z, but is not limited thereto.

[0074] In other words, the atomic layer deposition process 91' is similar to the above Figure 2 The difference between the atomic layer deposition process 91 in the embodiment is that the atomic layer deposition process 91 first performs steps S11 to S14 to form zirconium oxide, while the atomic layer deposition process 91' first performs steps S15 to S18 to form silicon oxide.

[0075] like Figure 1 and Figure 4As shown, in some embodiments, the atomic layer deposition process 92 may include the following steps. First, step S21 is performed to introduce a zirconium-containing precursor. The zirconium-containing precursor may be introduced into a process chamber of the atomic layer deposition process 92. In some embodiments, different atomic layer deposition processes may be performed successively in the same process chamber, for example, in the above process chamber. Figure 2 Atomic layer deposition process 91 or Figure 3 After the atomic layer deposition process 91', the atomic layer deposition process 92 is directly carried out in the same process chamber to avoid being affected by the external environmental conditions, but it is not limited to this. In some embodiments, the above-mentioned different atomic layer deposition processes can also be carried out separately in different process chambers of the same process machine according to design needs. Then, after step S21, step S22 can be carried out to blow off to remove the zirconium-containing precursor and / or possible reaction by-products. The zirconium in the zirconium-containing precursor introduced in step S21 can be adsorbed on the surface of the target object (such as the silicon oxide zirconium layer 32) to form a zirconium atomic layer, and the above-mentioned blowing off step can be used to remove the excess zirconium-containing precursor and / or possible reaction by-products in the process chamber from the process chamber. After step S22, step S23 can be carried out to introduce an oxidant. The oxidant can be introduced into the process chamber and maintained for a preset time to allow oxygen atoms to combine with the zirconium atomic layer to form zirconium oxide. After step S23, step S24 may be performed to remove excess oxidant and / or possible reaction byproducts in the process chamber. In some embodiments, the manufacturing process conditions of steps S21 to S24 may be the same as those of steps S21 to S24. Figure 2 The manufacturing process conditions from step S11 to step S14 are the same or similar.

[0076] In some embodiments, the above-mentioned steps S21 to S24 can be regarded as a cycle in the atomic layer deposition manufacturing process 92. By repeating this cycle (i.e., repeating steps S21 to S24), the thickness of the formed zirconium oxide layer (e.g., zirconium oxide layer 34) can be increased. In other words, the zirconium oxide layer 34 may include a plurality of zirconium atom layers and a plurality of oxygen atom layers alternately stacked in the vertical direction Z. In addition, the number of times the above-mentioned cycles are required can be calculated based on the designed thickness of the zirconium oxide layer 34. If the expected thickness calculated by the number of cycles that have been executed after step S24 has not reached the predetermined thickness, the above-mentioned cycle needs to be performed again. If the expected thickness calculated by the number of cycles that have been executed after step S24 has reached the predetermined thickness, step S25 can be executed to perform subsequent manufacturing processes. Figure 1As shown, in some embodiments, the capacitor dielectric stack DS may further include an aluminum oxide layer 40 and a dielectric layer 50, and the dielectric layer 50 may include a zirconium oxide layer 54. The aluminum oxide layer 40 and the zirconium oxide layer 54 may be formed by corresponding atomic layer deposition processes. For example, the aluminum oxide layer 40 may be formed on the dielectric layer 30 by an atomic layer deposition process, and the zirconium oxide layer 54 may be formed by Figure 4 The atomic layer deposition process 92 shown in FIG. 1 is formed on the aluminum oxide layer 40 , but the present invention is not limited thereto.

[0077] The following will be described with respect to different embodiments of the present invention, and for the sake of simplicity, the following description will mainly describe in detail the different parts of each embodiment, and will not repeat the same parts. In addition, the same parts in each embodiment of the present invention are marked with the same reference numerals to facilitate comparison between the embodiments.

[0078] See also Figure 5 . Figure 5 FIG. 1 is a schematic diagram of a capacitor structure 102 according to a second embodiment of the present invention. Figure 5 As shown, in the capacitor structure 102, the first dielectric layer 30 may further include a third zirconium oxide layer (eg Figure 5 In some embodiments, the zirconium oxide layer 34 may be provided between the zirconium oxide layer 34 and the zirconium oxide layer 36, and the silicon oxide layer 38 may be provided between the zirconium oxide layer 34 and the zirconium oxide layer 36 in the vertical direction Z. In some embodiments, the silicon oxide layer 38 may be used to reduce leakage current caused by crystallization of the zirconium oxide layer 34, but the dielectric constant of the silicon oxide layer 38 is relatively low (for example, lower than the dielectric constants of the zirconium oxide layer 34, the zirconium oxide layer 36 and the silicon oxide layer 32, respectively). Therefore, the thickness T38 of the silicon oxide layer 38 in the vertical direction Z may be less than the thickness T36 of the zirconium oxide layer 36 in the vertical direction Z and / or the thickness T34 of the zirconium oxide layer 34, so as to reduce the influence of the silicon oxide layer 38 on the overall permittivity and / or capacitance density of the capacitor dielectric stack DS. In addition, in some embodiments, the zirconium oxide layer 36 and the silicon oxide layer 38 may be formed by corresponding atomic layer deposition processes, respectively. For example, the zirconium oxide layer 36 may be made of Figure 4 The silicon oxide layer 38 may be formed by the atomic layer deposition process 92 shown in FIG. Figure 6 The atomic layer deposition process 93 shown in FIG. 1 is used for the formation of the nanostructured carbon nanotubes, but the present invention is not limited thereto.

[0079] like Figure 5 and Figure 6As shown, in some embodiments, the atomic layer deposition process 93 may include the following steps. First, step S31 is performed to introduce a silicon-containing precursor. The silicon-containing precursor may be introduced into the process chamber of the atomic layer deposition process 93. In some embodiments, different atomic layer deposition processes may be performed successively in the same process chamber. For example, the atomic layer deposition process 93 may be performed directly in the same process chamber after the atomic layer deposition process for forming the zirconium oxide layer 36, but is not limited thereto. Then, step S32 is performed after step S31 to perform a purge to remove the silicon-containing precursor and / or possible reaction byproducts. The silicon in the silicon-containing precursor introduced in step S31 may be adsorbed on the surface of the target object (e.g., the zirconium oxide layer 36) to form a silicon atomic layer, and the above-mentioned purge step may be used to remove excess silicon-containing precursors and / or possible reaction byproducts in the process chamber out of the process chamber. After step S32, step S33 may be performed to introduce an oxidant. The oxidant may be introduced into the process chamber and maintained for a predetermined time to allow oxygen atoms to bond with the silicon atom layer to form silicon oxide. After step S33, step S34 may be performed to purge excess oxidant and / or possible reaction byproducts in the process chamber out of the process chamber. In some embodiments, the manufacturing process conditions of steps S31 to S34 may be the same as those of steps S31 to S34. Figure 2 The manufacturing process conditions from step S15 to step S18 are the same or similar.

[0080] In some embodiments, the above steps S31 to S34 can be regarded as a cycle in the atomic layer deposition process 93. By repeating this cycle (i.e., repeating steps S31 to S34), the thickness of the formed silicon oxide layer (e.g., silicon oxide layer 38) can be increased. In other words, the silicon oxide layer 38 can include a plurality of silicon atomic layers and a plurality of oxygen atomic layers alternately stacked in the vertical direction Z. In addition, the number of required cycles can be calculated based on the designed thickness of the silicon oxide layer 38. If the expected thickness calculated by the number of cycles that have been executed after step S34 has not reached the predetermined thickness, the above cycle needs to be performed again. If the expected thickness calculated by the number of cycles that have been executed after step S34 has reached the predetermined thickness, step S35 can be executed to perform a subsequent process (e.g., a process for forming the silicon zirconium oxide layer 32).

[0081] See also Figure 7 . Figure 7 FIG. 1 is a schematic diagram of a capacitor structure 103 according to a third embodiment of the present invention. Figure 7As shown, in the capacitor structure 103, the dielectric layer 50 may further include a second silicon zirconium oxide layer (e.g., silicon zirconium oxide layer 52), and the silicon zirconium oxide layer 52 and the zirconium oxide layer 54 in the dielectric layer 50 may be stacked in the vertical direction Z. In some embodiments, the silicon zirconium oxide layer 52 may be disposed between the second electrode 60 and the zirconium oxide layer 54, and the silicon zirconium oxide layer 32 may be disposed between the first electrode 20 and the zirconium oxide layer 34, so the silicon zirconium oxide layer 52 and the silicon zirconium oxide layer 32 may be located at opposite ends of the capacitor dielectric stack DS in the vertical direction Z, but the invention is not limited thereto. In some embodiments, the zirconium oxide layer 54 may be pure zirconium oxide (e.g., formed only of zirconium oxide) or nearly pure zirconium oxide, so the zirconium atomic percentage in the zirconium oxide layer 54 may be higher than the zirconium atomic percentage in the silicon zirconium oxide layer 52, and the thickness T52 of the silicon zirconium oxide layer 52 in the vertical direction Z may be less than the thickness T54 of the zirconium oxide layer 54, but the invention is not limited thereto. In some embodiments, the zirconium oxide layer 54 and the silicon zirconium oxide layer 52 can be formed by corresponding atomic layer deposition processes. Figure 4 The aluminum oxide layer 40 is formed by the atomic layer deposition process 92 shown in FIG. Figure 2 The atomic layer deposition process shown in 91 or Figure 3 The atomic layer deposition process 91 ′ shown in FIG. 1 is used to form the zirconium oxide layer 54 , but the present invention is not limited thereto.

[0082] See also Figure 8 . Figure 8 FIG. 1 is a schematic diagram of a capacitor structure 104 according to a fourth embodiment of the present invention. Figure 8 As shown, in the capacitor structure 104, the dielectric layer 30 may only include the zirconium oxide layer 34, and the silicon zirconium oxide layer 52 in the capacitor dielectric stack DS may be located on a side close to the second electrode 60. Fig. 9 . Fig. 9 FIG. 1 is a schematic diagram of a capacitor structure 105 according to a fifth embodiment of the present invention. Fig. 9 As shown, in the capacitor structure 105, the silicon zirconium oxide layer 32 can be disposed between the zirconium oxide layer 34 and the aluminum oxide layer 40, and the silicon zirconium oxide layer 52 can be disposed between the zirconium oxide layer 54 and the aluminum oxide layer 40, so the silicon zirconium oxide layer 52 and the silicon zirconium oxide layer 32 can be respectively located on opposite sides of the aluminum oxide layer 40 in the vertical direction Z and directly connected to the aluminum oxide layer 40, but the present invention is not limited thereto. In other words, the location of each silicon zirconium oxide layer in the capacitor dielectric stack DS can be adjusted according to design requirements (e.g., the manner in which voltages are applied to the first electrode 20 and the second electrode 60 during operation and / or the conduction mechanism of electrons in the capacitor structure, etc.).

[0083] See also Fig.10 and Fig.11 . Fig.10is a schematic diagram of a capacitor structure 106 according to a sixth embodiment of the present invention, and Fig.11 FIG. 1 is a schematic diagram of a process for forming a capacitor dielectric stack according to an embodiment of the present invention. Fig.10 As shown, in the capacitor structure 106, the dielectric layer 30 may include a plurality of zirconium oxide layers 34 and a plurality of silicon zirconium oxide layers 32 alternately stacked, and the capacitor dielectric stack DS may not include the aluminum oxide layer in the above embodiment. In addition, in some embodiments, each zirconium oxide layer 34 and each silicon zirconium oxide layer 32 in the dielectric layer 30 may be formed by corresponding atomic layer deposition processes. For example, Fig.10 and Fig.11 As shown, the manufacturing method of the capacitor dielectric stack DS of this embodiment may include the following steps. Step S41 may be performed first to perform a second atomic layer deposition process (such as the above Figure 4 The atomic layer deposition process 92 shown in FIG. 1 is used to form the zirconium oxide layer 34 on the first electrode 20. Then, step S42 may be performed to perform a first atomic layer deposition process (such as the above-mentioned Figure 2 The atomic layer deposition process shown in 91 or Figure 3 The atomic layer deposition process 91 ′ shown in FIG. 1 is used to form a silicon zirconium oxide layer 32 on the zirconium oxide layer 34 .

[0084] In some embodiments, the above-mentioned steps S41 and S42 can be regarded as a cycle in the atomic layer deposition process for forming a dielectric layer 30 having a plurality of zirconium oxide layers 34 and a plurality of silicon zirconium oxide layers 32 alternately stacked. By repeating this cycle, the number of zirconium oxide layers 34 and silicon zirconium oxide layers 32 in the dielectric layer 30 can be increased. Therefore, the number of times the above-mentioned cycles are required can be calculated based on the designed number of layers of zirconium oxide layers 34 and silicon zirconium oxide layers 32 in the dielectric layer 30. If the number of layers calculated by the number of cycles that have been executed after step S42 has not reached the predetermined number of layers, the above-mentioned cycle needs to be performed again. If the number of layers calculated by the number of cycles that have been executed after step S42 has reached the predetermined number of layers, step S43 can be executed to perform subsequent manufacturing processes (for example, a manufacturing process for forming a second electrode). In other words, the manufacturing method of the dielectric layer 30 of the present embodiment may include alternating and repeating different atomic layer deposition manufacturing processes (for example Figure 4 The atomic layer deposition process 92 shown in FIG. Figure 2 The atomic layer deposition process shown in 91 or Figure 3 The atomic layer deposition process 91' shown in FIG. 1 is used to form a dielectric layer 30 having a plurality of zirconium oxide layers 34 and a plurality of silicon zirconium oxide layers 32 alternately stacked.

[0085] See also Fig.12 and Fig.13 . Fig.12is a schematic diagram of a capacitor structure 107 according to a seventh embodiment of the present invention, and Fig.13 FIG. 1 is a schematic diagram of a process for forming a capacitor dielectric stack according to another embodiment of the present invention. Fig.12 As shown, in the capacitor structure 107, the dielectric layer 30 may include a plurality of zirconium oxide layers 34 and a plurality of silicon zirconium oxide layers 32 alternately stacked, and the material layers at the two opposite ends of the capacitor dielectric stack DS in the vertical direction Z may be the same material layers. For example, the material layers at the two opposite ends of the capacitor dielectric stack DS in the vertical direction Z may both be zirconium oxide layers 34, thereby reducing the proportion of silicon zirconium oxide layers 32 in the capacitor dielectric stack DS, but it is not limited thereto. In some embodiments, the capacitor dielectric stack DS may include a plurality of zirconium oxide layers 34 and a plurality of silicon zirconium oxide layers 32 alternately stacked, and the material layers at the two opposite ends of the capacitor dielectric stack DS in the vertical direction Z may both be silicon zirconium oxide layers 32. As shown in FIG. Fig.12 and Fig.13 As shown, the manufacturing method of the capacitor dielectric stack DS of this embodiment may include alternating and repeating the above-mentioned steps S41 and S42, and the content of the last step is the same as the initial step (for example, both are step S41), so that the material layers at the opposite ends of the capacitor dielectric stack DS in the vertical direction Z are both zirconium oxide layers 34.

[0086] See also Fig.14 . Fig.14 FIG. 1 is a schematic diagram of a capacitor structure 108 according to an eighth embodiment of the present invention. Fig.14As shown, in the capacitor structure 108, the capacitor dielectric stack DS may include a plurality of zirconium oxide layers 34 and a plurality of silicon zirconium oxide layers 32 alternately stacked in the vertical direction Z, and at least a portion of the zirconium oxide layers 34 may have different thicknesses, and at least a portion of the silicon zirconium oxide layers 32 may have different thicknesses. For example, the thickness TK2 of the zirconium oxide layer 34 near the middle portion of the capacitor dielectric stack DS in the vertical direction Z may be greater than the thickness TK1 of the zirconium oxide layer 34 at the opposite ends of the capacitor dielectric stack DS in the vertical direction Z, and the thickness TK4 of the silicon zirconium oxide layer 32 near the middle portion of the capacitor dielectric stack DS in the vertical direction Z may be greater than the thickness TK3 of the silicon zirconium oxide layer 32 near the opposite ends of the capacitor dielectric stack DS in the vertical direction Z, thereby adjusting the electric field distribution in the capacitor dielectric stack DS when the capacitor structure 108 is in operation, but the present invention is not limited thereto. In some embodiments, the relative thickness relationship between each zirconium oxide layer 34 and / or each silicon zirconium oxide layer 32 in the capacitor dielectric stack DS may be designed in a different manner from the above situation according to design requirements. In addition, the capacitor dielectric stack DS having zirconium oxide layers 34 of different thicknesses and / or silicon zirconium oxide layers 32 of different thicknesses may be formed by adjusting the number of cycles performed in the corresponding atomic layer deposition process. For example, the number of cycles required for the atomic layer deposition process to form a thicker zirconium oxide layer 34 (e.g., the above-mentioned Figure 4 The number of times that steps S21 to S24 are repeated in the above process can be relatively large, and the number of cycles required for the atomic layer deposition process to form a thicker silicon zirconium oxide layer 32 (for example, the number of cycles required for the above atomic layer deposition process to form a thicker silicon zirconium oxide layer 32) can be relatively large. Figure 2 Repeat steps S11 to S18 for the number of times or the above Figure 3 The number of times that steps S15 to S18 and steps S11 to S14 are repeated may also be relatively large, but is not limited thereto.

[0087] In summary, in the capacitor structure and its manufacturing method of the present invention, a capacitor dielectric stack including a zirconium oxide layer and a silicon zirconium oxide layer can be set between the two electrodes of the capacitor structure, and the silicon zirconium oxide layer can be used to reduce the leakage current of the capacitor structure, thereby improving the operating performance of the capacitor structure.

[0088] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A capacitor structure, characterized in that: include: a first electrode; a second electrode; as well as A capacitor dielectric stack is disposed between the first electrode and the second electrode, and the capacitor dielectric stack includes: A first dielectric layer, wherein the first dielectric layer comprises: a first zirconium oxide layer; and a first silicon zirconium oxide layer; The atomic percentage of zirconium in the first zirconium oxide layer is higher than the atomic percentage of zirconium in the first zirconium silicon oxide layer; and the thickness of the first zirconium oxide layer is greater than the thickness of the first zirconium silicon oxide layer.

2. The capacitor structure according to claim 1, wherein: The first dielectric layer includes a plurality of the first zirconium oxide layers and a plurality of the first silicon zirconium oxide layers alternately stacked.

3. The capacitor structure according to claim 1, wherein: The capacitor dielectric stack also includes: An aluminum oxide layer, wherein the first dielectric layer is disposed between the aluminum oxide layer and the first electrode, and a thickness of the first zirconium oxide layer is greater than a thickness of the aluminum oxide layer.

4. The capacitor structure according to claim 3, characterized in that The first zirconium oxide layer is disposed between the first silicon zirconium oxide layer and the aluminum oxide layer.

5. The capacitor structure according to claim 3, wherein: The first silicon zirconium oxide layer is disposed between the first zirconium oxide layer and the aluminum oxide layer.

6. The capacitor structure according to claim 3, wherein: The capacitor dielectric stack also includes: The second dielectric layer is disposed between the aluminum oxide layer and the second electrode, and the second dielectric layer includes a second zirconium oxide layer.

7. The capacitor structure according to claim 6, wherein: The second dielectric layer further comprises: A second silicon zirconium oxide layer, wherein the zirconium atomic percentage in the second zirconium oxide layer is higher than the zirconium atomic percentage in the second silicon zirconium oxide layer.

8. The capacitor structure according to claim 1, wherein: The first dielectric layer further comprises: a third zirconium oxide layer, wherein the first zirconium oxide layer is disposed between the first zirconium oxide layer and the third zirconium oxide layer; and The silicon oxide layer is disposed between the first zirconium oxide layer and the third zirconium oxide layer.

9. A method for manufacturing a capacitor structure, characterized in that: include: A capacitor dielectric stack is formed on the first electrode, wherein the capacitor dielectric stack comprises: A first dielectric layer, wherein the first dielectric layer comprises: a first zirconium oxide layer; and a first silicon zirconium oxide layer; and forming a second electrode on the capacitor dielectric stack, wherein the capacitor dielectric stack is located between the first electrode and the second electrode; The atomic percentage of zirconium in the first zirconium oxide layer is higher than the atomic percentage of zirconium in the first zirconium silicon oxide layer; and the thickness of the first zirconium oxide layer is greater than the thickness of the first zirconium silicon oxide layer.

10. The method for manufacturing a capacitor structure according to claim 9, wherein: The first silicon zirconium oxide layer is formed by an atomic layer deposition process, and the atomic layer deposition process includes: Performing a first step, introducing a zirconium-containing precursor; After the first step, a second step is performed to remove the zirconium-containing precursor; After the second step, a third step is performed to introduce a first oxidant; After the third step, a fourth step is performed to remove the first oxidant; After the fourth step, a fifth step is performed to introduce a silicon-containing precursor; After the fifth step, a sixth step is performed to remove the silicon-containing precursor; After the sixth step, a seventh step is performed to introduce a second oxidant; performing an eighth step after the seventh step to remove the second oxidant; and Repeat the first step to the eighth step.

11. The method for manufacturing a capacitor structure according to claim 9, wherein: The first silicon zirconium oxide layer is formed by an atomic layer deposition process, and the atomic layer deposition process includes: Performing a first step, introducing a silicon-containing precursor; After the first step, a second step is performed to remove the silicon-containing precursor; After the second step, a third step is performed to introduce a first oxidant; After the third step, a fourth step is performed to remove the first oxidant; After the fourth step, a fifth step is performed to introduce a zirconium-containing precursor; After the fifth step, a sixth step is performed to remove the zirconium-containing precursor; After the sixth step, a seventh step is performed to introduce a second oxidant; performing an eighth step after the seventh step to remove the second oxidant; and Repeat the first step to the eighth step.

12. The method for manufacturing a capacitor structure according to claim 10 or 11, characterized in that: The first step to the eighth step are repeated at least 3 times, and the final step is the fourth step.

13. The method for manufacturing a capacitor structure according to claim 9, wherein: The capacitor dielectric stack also includes: An aluminum oxide layer, wherein the first dielectric layer is disposed between the aluminum oxide layer and the first electrode, and a thickness of the first zirconium oxide layer is greater than a thickness of the aluminum oxide layer.

14. The method for manufacturing a capacitor structure according to claim 13, wherein: The capacitor dielectric stack also includes: The second dielectric layer is disposed between the aluminum oxide layer and the second electrode, and the second dielectric layer includes a second zirconium oxide layer.

15. The method for manufacturing a capacitor structure according to claim 14, wherein: The second dielectric layer further comprises: The second silicon zirconium oxide layer, wherein the first zirconium oxide layer and the second silicon zirconium oxide layer are respectively formed by atomic layer deposition process.

16. The method for manufacturing a capacitor structure according to claim 9, wherein: The first dielectric layer further comprises: a third zirconium oxide layer, wherein the first silicon zirconium oxide layer is disposed between the first zirconium oxide layer and the third zirconium oxide layer; and The silicon oxide layer is disposed between the first zirconium oxide layer and the third zirconium oxide layer.

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