Signaling of global motion vector in picture header

By sending a signal of global motion vector in the video header, the decoder can determine the global motion model of the current block, solving the problem of low global motion vector transmission efficiency in the prior art, and achieving more efficient video compression and improved video quality.

CN114009038BActive Publication Date: 2025-03-28DOLBY INTERNATIONAL AB
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Patent Information

Application Number
CN202080045922.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-04-25
Filing Date
2020-04-24
Publication Date
2025-03-28
Estimated Expiration
2040-04-24

AI Technical Summary

Technical Problem

Existing video compression techniques are less efficient when transmitting and using global motion vectors, resulting in lower video quality and increased encoding complexity.

Method used

By sending a signal of the global motion vector in the video header, the decoder can determine the global motion model of the current block and use the model to decode the current block, thereby improving video compression efficiency.

Benefits of technology

This approach reduces the motion vector information required by the block, improves prediction efficiency, reduces encoding complexity, and improves video quality.

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Abstract

A decoder includes a circuit configured to: receive a bitstream, extract a header including a list of reference frames that can be used for global motion compensation, use the header to determine a global motion model of a current block (the global motion is relative to a reference frame included in the list of reference frames), and decode the current block using the global motion model. The present disclosure also describes related devices, systems, techniques, and articles of manufacture.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Patent Application Serial No. 62 / 838,517, filed on April 25, 2019, and entitled “SIGNALING GLOBAL MOTION VECTOR IN IMAGE HEADER,” which are incorporated herein by reference in their entirety. Technical Field

[0003] The present invention relates generally to the field of video compression. In particular, the present invention relates to the signaling of global motion vectors relative to available reference frames. Background Art

[0004] A video codec may include electronic circuits or software that compress or decompress digital video. It can convert uncompressed video to a compressed format and vice versa. In the case of video compression, a device that compresses video (and / or performs certain functions of the device that compresses video) may generally be referred to as an encoder, while a device that decompresses video (and / or performs certain functions of the device that compresses video) may be referred to as a decoder.

[0005] The compressed data may be formatted in accordance with standard video compression specifications. Compression may be lossy in that the compressed video lacks some information that was present in the original video. As a result, the quality of the decompressed video may be lower than the original uncompressed video because there is not enough information to accurately reconstruct the original video.

[0006] There can be a complex relationship between video quality, the amount of data used to represent the video (e.g., determined by the bitrate), the complexity of the encoding and decoding algorithms, sensitivity to data loss and errors, ease of editing, random access, end-to-end latency (e.g., delay), and so on.

[0007] Motion compensation may include a method of predicting a video frame or a portion of a video frame given a reference frame, such as a previous and / or future frame, by calculating the motion of a camera and / or objects in the video. It may be used for encoding and decoding of video data for video compression, such as encoding and decoding using the Moving Picture Experts Group (MPEG)-2 (also known as Advanced Video Coding (AVC) and H.264) standard. Motion compensation may describe an image based on a transformation from a reference image to a current image. The reference image may be previous in time when compared to the current image and may be future when compared to the current image. Compression efficiency may be improved when an image may be accurately synthesized from previously transmitted and / or stored images. Summary of the invention

[0008] In one aspect, a decoder includes circuitry configured to receive a bitstream, extract a header including a list of reference frames that can be used for global motion compensation, determine a global motion model for a current block using the header, global motion relative to reference frames included in the list of reference frames, and decode the current block using the global motion model.

[0009] In another aspect, a method includes receiving a bitstream by a decoder. The method includes extracting a header, the header including a list of reference frames that can be used for global motion compensation. The method includes using the header to determine a global motion model for a current block, the global motion relative to a reference frame included in the list of reference frames. The method includes decoding the current block using the global motion model.

[0010] The details of one or more variations of the subject matter described herein are set forth in the accompanying drawings and the description below.Other features and advantages of the subject matter described herein will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] For the purpose of illustrating the present invention, the accompanying drawings show various aspects of one or more embodiments of the present invention. However, it should be understood that the present invention is not limited to the precise arrangements and structures shown in the accompanying drawings, in which:

[0012] Figure 1 is a motion vector diagram illustrating an example frame with global and local motion;

[0013] Figure 2 is a process flow diagram according to some example implementations of the current subject matter;

[0014] Figure 3 is a system block diagram of an example decoder according to some example implementations of the current subject matter;

[0015] Figure 4 is a process flow diagram according to some example implementations of the current subject matter;

[0016] Figure 5 is a system block diagram of an example encoder according to some example implementations of the current subject matter; and

[0017] Figure 6 is a block diagram of a computing system that can be used to implement any one or more of the methods disclosed herein, and any one or more portions thereof.

[0018] The drawings are not necessarily drawn to scale and may be illustrated by dashed lines, diagrammatic representations, and partial views. In some cases, details that are not necessary for understanding the embodiments or that render other details difficult to understand may have been omitted. The same reference numerals in the various drawings represent the same elements. DETAILED DESCRIPTION

[0019] Global motion in a video refers to motion that occurs in the entire frame. Global motion can be caused by camera motion, for example, camera pan and zoom can produce motion in a frame that usually affects the entire frame. Motion that exists in a portion of a video can be called local motion. Local motion can be caused by moving objects in a scene; for example, but not limited to, objects moving from left to right in a scene. A video can contain a combination of local and global motion. Some implementations of the current subject matter can provide an efficient method for transmitting global motion to a decoder, and use global motion vectors to improve compression efficiency.

[0020] Figure 1 1 is a diagram showing motion vectors for an example frame 100 having global and local motion. Frame 100 may include a plurality of pixel blocks, shown as squares, and motion vectors associated therewith, shown as arrows. Squares (e.g., pixel blocks) with arrows pointing upward and to the left represent blocks with what may be considered global motion, and squares with arrows pointing in other directions (indicated by 104) indicate blocks with local motion. Figure 1 In the example shown in , many of the blocks have the same global motion. Signaling global motion in a header (e.g., a Picture Parameters Set (PPS) or a Sequence Parameters Set (SPS)) and using the signaled global motion can reduce the motion vector information required for the blocks and can result in improved prediction. Although for illustrative purposes, the examples described below relate to determining and / or applying global or local motion vectors at the block level, global motion vectors can be determined and / or applied for any region of a frame and / or image and / or the entirety of a frame and / or image, including regions consisting of multiple blocks, regions defined by any geometric form, such as but not limited to regions defined by geometric and / or exponential coding, where one or more lines and / or curves defining the shape can be angled and / or curved. Although the signaling is described herein as being performed at the frame level and / or in a header and / or parameter set of a frame, the signaling can alternatively or additionally be performed at a sub-image level, where a sub-image can include any region of a frame and / or image, as described above.

[0021] As an example, and still for reference Figure 1 , we can use a two-component MV x , MV y A simple translation motion is described by a motion vector (MV) x , MV yDescribes the displacement of blocks and / or pixels in the current frame. Affine motion vectors can be used to describe more complex motions such as rotation, scaling, and distortion, where an "affine motion vector" as used in the present disclosure is a vector that describes a uniform displacement of a group of pixels or points represented in a video image and / or image, such as a group of pixels that illustrate an object moving across a view in a video without changing its apparent shape during the motion. Some methods of video encoding and / or decoding may use a 4-parameter or 6-parameter affine model that is used for motion compensation in inter-image coding.

[0022] For example, a six-parameter affine motion can be:

[0023] x'=ax+by+c

[0024] y'=dx+ey+f

[0025] The four-parameter affine motion can be described as:

[0026] x'=ax+by+c

[0027] y'=-bx+ay+f

[0028] where (x, y) and (x', y') are the pixel positions in the current image and the reference image respectively; a, b, c, d, e and f are the parameters of the affine motion model.

[0029] Still reference Figure 1 , parameters describing affine motion can be signaled to a decoder to apply affine motion compensation in the decoder. In some approaches, motion parameters can be signaled explicitly or by signaling translational control point motion vectors (CPMVs) and then deriving affine motion parameters from the translational motion vectors. Two control point motion vectors (CPMVs) can be used to derive affine motion parameters for a four-parameter affine motion model, and three control point translational motion vectors (CPMVs) can be used to obtain parameters for a six-parameter motion model. Using control point motion vectors to signal affine motion parameters can allow efficient motion vector coding methods to be used to signal affine motion parameters.

[0030] Continue to refer Figure 1, some modern video compression techniques may use multiple reference frames in inter-frame prediction. When multiple reference frames are present, global motion relative to the available reference frames may be signaled to more effectively apply motion compensation and improve compression efficiency. A list of frames available for reference may be maintained in a frame list List0. The frames in the list may be indexed in their order relative to the current frame. When encoding the current image, all frames that may be used as reference may be indexed in List0. Global motion parameters may be specified for all available reference frames. The presence or absence of global motion relative to the reference frame list may be signaled; this may allow efficient signaling of global motion information.

[0031] For example, still refer to Figure 1 , Table 1 shows a new PPS with global motion parameters for one or more frames in the reference image list. In the example of Table 1, up to 16 reference images can be signaled. For each available reference frame, the presence of global motion can be signaled. For all frames where global motion exists, the global motion parameters can be encoded as shown in Table 1. If no prediction block in the current image uses global motion from a previously encoded frame that can be used for reference, the corresponding global motion parameters may not be encoded. On the encoder side, this may cause frame delays if the PPS has to be updated after encoding the current image. Alternatively, an efficient encoding method may be able to predict which available reference frames are not suitable for global motion compensation and remove such frames from the PPS. Table 1:

[0032]

[0033]

[0034] In one embodiment, still referring to Figure 1 , the sps_affine_enabled_flag in the PPS and / or SPS may specify whether affine model-based motion compensation can be used for inter-frame prediction. If sps_affine_enabled_flag=0, the syntax may be constrained so that affine model-based motion compensation is not used in the post-coded video sequence (CLVS), and inter_affine_flag and cu_affine_type_flag may not exist in the coding unit syntax of CLVS. Otherwise (sps_affine_enabled_flag=1), affine model-based motion compensation may be used in CLVS.

[0035] Continue to refer Figure 1, the sps_affine_type_flag in the PPS and / or SPS may specify whether motion compensation based on a 6-parameter affine model may be used for inter prediction. If sps_affine_type_flag = 0, the syntax may be constrained so that motion compensation based on a 6-parameter affine model is not used in CLVS, and cu_affine_type_flag may not be present in the coding unit syntax in CLVS. Otherwise (sps_affine_type_flag = 1), motion compensation based on a 6-parameter affine model may be used in CLVS. When not present, it may be inferred that the value of sps_affine_type_flag is equal to 0.

[0036] Therefore, still refer to Figure 1 Some implementations of the current subject matter can include utilizing global motion between a current frame and one of a plurality of reference frames. Which reference frame to use can be explicitly signaled (e.g., in a PPS). In some implementations, if the reference frame to be utilized is not explicitly signaled, then the reference frame to be utilized can be the frame immediately preceding the current frame. This approach can achieve more accurate motion representation (e.g., smaller motion vector residuals) and smaller pixel residuals.

[0037] Figure 2 is a process flow diagram illustrating an exemplary process 200 for utilizing global motion between a current frame and one of a plurality of reference frames.

[0038] In step 205, and still referring to Figure 2 , a decoder receives a bitstream. The current block may be included in a bitstream received by the decoder. The bitstream may include, for example, data found in a bitstream that is input to the decoder when data compression is used. The bitstream may contain information necessary for decoding the video. Receiving may include extracting and / or parsing blocks and associated signal information from the bitstream. In some implementations, the current block may include a coding tree unit CTU, a coding unit CU, or a prediction unit PU.

[0039] At step 210, continue to refer to Figure 2 , a header may be extracted. The header may contain a list of reference frames for global motion compensation. At step 215, a global motion model for the current block may be determined using the header. The global motion may be relative to the reference frames contained in the list of reference coordinate systems. At step 220, the current block may be decoded using the global motion model.

[0040] Figure 33 is a system block diagram illustrating an exemplary decoder 300 capable of exploiting global motion between a current frame and one of several reference frames to decode a bitstream 328. The decoder 300 may include an entropy decoder processor 304, an inverse quantization and inverse transform processor 308, a deblocking filter 312, a frame buffer 316, a motion compensation processor 320, and an intra prediction processor 324.

[0041] In operation, and further reference Figure 3 , the bitstream 328 may be received by the decoder 300 and input to the entropy decoder processor 304, which entropy decodes a portion of the bitstream into quantized coefficients. The quantized coefficients may be provided to the inverse quantization and inverse transform processor 308, which may perform inverse quantization and inverse transform to create a residual signal, which may be added to the output of the motion compensation processor 320 or the intra-frame prediction processor 324 depending on the processing mode. The output of the motion compensation processor 320 and the intra-frame prediction processor 324 may include a block prediction based on a previously decoded block. The sum of the prediction and the residual may be processed by the deblocking filter 630 and stored in the frame buffer 640.

[0042] Figure 4 is a process flow diagram illustrating an exemplary embodiment of a process 400 for encoding a video using INSERT according to aspects disclosed herein, which process 400 can reduce encoding complexity while improving compression efficiency. In step 405, the video frame can undergo an initial block partitioning, which can be implemented, for example, using a tree-structured macroblock partitioning scheme, which can include partitioning the image frame into CTUs and CUs. In step 410, the global motion of the current block can be determined, including determining a reference frame from multiple available reference frames. In step 415, the global motion information and the block can be encoded and included in the bitstream. The encoding information may include an index to a list of available reference frames. For example, the encoding may include utilizing inter-frame prediction and intra-frame prediction modes.

[0043] Figure 5is a system block diagram illustrating a non-limiting example of a video encoder 500 capable of exploiting global motion between a current frame and one of a plurality of reference frames. The example video encoder 500 may receive an input video 504 that may be initially partitioned or divided according to a tree-structured macroblock partitioning scheme, such as a tree-structured macroblock partitioning scheme (e.g., a quadtree plus a binary tree). An example of a tree-structured macroblock partitioning scheme may include partitioning an image frame into large block elements called coding tree units (CTUs). In some implementations, each CTU may be further divided into one or more sub-blocks called coding units (CUs). The final result of this partitioning may include a set of sub-blocks called prediction units (PUs). Transform units (TUs) may also be used.

[0044] Still reference Figure 5 , the example video encoder 500 may include an intra prediction processor 415 capable of supporting global motion between a current frame and one of a plurality of reference frames, a motion estimation / compensation processor 512 (also referred to as an inter prediction processor), a transform / quantization processor 516, an inverse quantization / inverse transform processor 520, a loop filter 524, a decoded picture buffer 528, and / or an entropy encoding processor 532. The bitstream parameters may be input to the entropy encoding processor 532 for inclusion in an output bitstream 536.

[0045] In operation, and continue to refer to Figure 5 For each block of the input video 504 frame, it may be determined whether the block is to be processed via intra-image prediction or using motion estimation / compensation. The block may be provided to an intra-frame prediction processor 508 or a motion estimation / compensation processor 512. If the block is to be processed via intra-frame prediction, the intra-frame prediction processor 508 may perform processing to output a prediction value. If the block is to be processed via motion estimation / compensation, the motion estimation / compensation processor 512 may perform processing including using global motion between the current frame and one of the multiple reference frames, if applicable.

[0046] Further references Figure 5, a residual can be formed by subtracting the predicted value from the input video. The residual can be received by a transform / quantization processor 516, which receives a transform process (e.g., a discrete cosine transform (DCT)) to produce quantizable coefficients. The quantized coefficients and any associated signal information can be provided to an entropy coding processor 532 for entropy coding and included in an output bitstream 536. The entropy coding processor 532 can support the encoding of signal information related to encoding the current block. In addition, the quantized coefficients can be provided to an inverse quantization / inverse transform processor 520, which reproduces pixels, which can be combined with a predictor and processed by a loop filter 524, and the loop filter 524 processing output can be stored in a decoded image buffer 528 for use by a motion estimation / compensation processor 512, which can utilize global motion between a current frame and one of a plurality of reference frames.

[0047] Still reference Figure 5 Although some variations have been described in detail above, other modifications or additions are possible. For example, in some implementations, the current block may include any symmetric block (8x8, 16x16, 32x32, 64x64, 128x128, etc.) and any asymmetric block (8x4, 16x8, etc.).

[0048] Continue to refer Figure 5 In some implementations, a quadtree plus binary decision tree (Quadtree Plus Binary Decision, QTBT) can be implemented. In QTBT, at the coding tree unit level, the partitioning parameters of QTBT are dynamically derived to adapt to local characteristics without transmitting any overhead. Subsequently, at the coding unit level, the joint classifier decision tree structure can eliminate unnecessary iterations and control the risk of misprediction. In some implementations, the LTR frame block update mode can be used as an additional option available at each leaf node of the QTBT.

[0049] In some implementations, further reference is made to Figure 5 , additional syntax elements may be signaled at different levels of the bitstream. For example, a flag may be enabled for the entire sequence by including an enable flag encoded in a sequence parameter set (SPS). In addition, a CTU flag may be encoded at the coding tree unit (CTU) level.

[0050] It should be noted that any one or more aspects and embodiments described herein may be conveniently implemented using digital electronic circuits, integrated circuits, specially designed application-specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), computer hardware, firmware, software, and / or combinations thereof, implemented and / or implemented in one or more machines (e.g., one or more computing devices used as user computing devices for electronic documents, one or more server devices such as document servers, etc.) programmed according to the teachings of this specification, as will be apparent to those of ordinary skill in the computer field. These various aspects or features may include implementations in one or more computer programs and / or software that are executable and / or interpretable on a programmable system including at least one programmable processor, which may be dedicated or general purpose, coupled to receive data and instructions from a storage system, at least one input device, and at least one output device, and to send data and instructions to a storage system, at least one input device, and at least one output device. It is apparent to those of ordinary skill in the software field that a skilled programmer may readily prepare appropriate software coding based on the teachings of this disclosure. The aspects and implementations discussed above that employ software and / or software modules may also include appropriate hardware for facilitating implementation of the machine-executable instructions of the software and / or software modules.

[0051] Such software can be a computer program product, and the computer program product adopts a machine-readable storage medium. A machine-readable storage medium can be any medium capable of storing and / or encoding a sequence of instructions executed by a machine (e.g., a computing device) and causing the machine to execute any of the methods and / or embodiments described herein. Examples of machine-readable storage media include, but are not limited to, disks, optical disks (e.g., CDs, CD-Rs, DVDs, DVD-Rs, etc.), magneto-optical disks, read-only memory "ROM" devices, random access memory "RAM" devices, magnetic cards, optical cards, solid-state memory devices, EPROMs, EEPROMs, programmable logic devices (PLDs), and / or any combination thereof. As used herein, machine-readable media is intended to include a single medium and a collection of physically separated media, such as a collection of optical disks or one or more hard disk drives combined with a computer memory. As used herein, a machine-readable storage medium does not include signal transmission in an instantaneous form.

[0052] Such software may also include information (e.g., data) carried as a data signal on a data carrier such as a carrier wave. For example, machine executable information may include as a data-bearing signal embodied in a data carrier, wherein the signal encodes a sequence of instructions or a portion of the sequence of instructions for execution by a machine (e.g., a computing device), and any related information (e.g., data structures and data) that causes the machine to perform any of the methods and / or embodiments described herein.

[0053] Examples of computing devices include, but are not limited to, electronic book reading devices, computer workstations, terminal computers, server computers, handheld devices (e.g., tablet computers, smart phones, etc.), network devices, network routers, network switches, bridges, any machine capable of executing a sequence of instructions specifying actions to be taken by the machine, and any combination thereof. In one example, the computing device may include and / or be included in a kiosk.

[0054] Figure 6 An illustration of one embodiment is shown, which is an exemplary form of a computing device in the form of a computer system 600 in which an instruction set for causing a control system to perform any one or more of the aspects and / or methods of the present disclosure may be executed. It is also contemplated that a plurality of computing devices may be utilized to implement a specially configured instruction set for causing one or more of the devices to perform any one or more of the aspects and / or methods of the present invention. The computer system 600 includes a processor 604 and a memory 608 that communicate with each other and with other components via a bus 612. The bus 612 may include any of several types of bus structures, including but not limited to a memory bus, a memory controller, a peripheral bus, a local bus, and any combination thereof using any of a variety of bus architectures.

[0055] The memory 608 may include various components (e.g., machine-readable media), including, but not limited to, random access memory components, read-only components, and any combination thereof. In one example, a basic input / output system 616 (BIOS) may be stored in the memory 608, including, for example, basic routines that help transfer information between elements within the computer system 600 during startup. The memory 608 may also include (e.g., stored on one or more machine-readable media) instructions (e.g., software) 620 that embody any one or more of the aspects and / or methods of the present disclosure. In another example, the memory 608 may also include any number of program modules, including, but not limited to, an operating system, one or more application programs, other program modules, program data, and any combination thereof.

[0056] The computer system 600 may also include a storage device 624. Examples of storage devices (e.g., storage devices 624) include, but are not limited to, hard disk drives, disk drives, optical disk drives combined with optical media, solid-state memory devices, and any combination thereof. The storage device 624 may be connected to the bus 612 via an appropriate interface (not shown). Exemplary interfaces include, but are not limited to, SCSI, Advanced Technology Attachment (ATA), Serial ATA, Universal Serial Bus (USB), IEEE1394 (FIREWIRE), and any combination thereof. In one example, the storage device 624 (or one or more components of the storage device 624) may be removably interfaced with the computer system 600 (e.g., via an external port connector (not shown)). In particular, the storage device 624 and the associated machine-readable medium 628 may provide non-volatile and / or volatile storage of machine-readable instructions, data structures, program modules, and / or other data for the computer system 600. In one example, the software 620 may reside in the machine-readable medium 628 in whole or in part. In another example, software 620 may reside completely or partially within processor 604 .

[0057] The computer system 600 may also include an input device 632. In one example, a user of the computer system 600 may input commands and / or other information into the computer system 600 via the input device 632. Examples of the input device 632 include, but are not limited to, an alphanumeric input device (e.g., a keyboard), a pointing device, a joystick, a game controller, an audio input device (e.g., a microphone, a voice response system, etc.), a cursor control device (e.g., a mouse), a touch pad, an optical scanner, a video capture device (e.g., a still camera, a video camera), a touch screen, and any combination thereof. The input device 632 may be connected to the bus 612 via any of a variety of interfaces (not shown), including, but not limited to, a serial interface, a parallel interface, a game port, a USB interface, a FIREWIRE interface, a direct interface to the bus 612, and any combination thereof. The input device 632 may include a touch screen interface, which may be part of or separate from the display 636, as will be discussed further below. The input device 632 may be used as a user selection device for selecting one or more graphical representations in the graphical interface described above.

[0058] The user may also input commands and / or other information to the computer system 600 via a storage device 624 (e.g., a removable disk drive, a flash drive, etc.) and / or a network interface device 640. A network interface device, such as the network interface device 640, may be used to connect the computer system 600 to one or more of a variety of networks, such as a network 644, and one or more remote devices 648 connected to the network 644. Examples of network interface devices include, but are not limited to, a network interface card (e.g., a mobile network interface card, a LAN card), a modem, and any combination thereof. Examples of networks include, but are not limited to, a wide area network (e.g., the Internet, an enterprise network), a local area network (e.g., a network associated with an office, a building, a campus, or other relatively small geographic space), a telephone network, a data network associated with a telephone / voice provider (e.g., a mobile communications provider data and / or voice network), a direct connection between two computing devices, and any combination thereof. A network such as the network 644 may employ wired and / or wireless communication modes. In general, any network topology may be used. Information (eg, data, software 620 , etc.) may be transferred to and / or from computer system 600 via network interface device 640 .

[0059] The computer system 600 may also include a video display adapter 652, which is used to transmit a displayable image to a display device, such as a display device 636. Examples of display devices include, but are not limited to, liquid crystal displays (LCDs), cathode ray tubes (CRTs), plasma displays, light emitting diode (LED) displays, and any combination thereof. Display adapter 652 and display device 636 may be used in conjunction with processor 604 to provide graphical representations of various aspects of the present disclosure. In addition to the display device, the computer system 600 may include one or more other peripheral output devices, including, but not limited to, audio speakers, printers, and any combination thereof. Such peripheral output devices may be connected to bus 612 via a peripheral interface 656. Examples of peripheral interfaces include, but are not limited to, serial ports, USB connections, FIREWIRE connections, parallel connections, and any combination thereof.

[0060] The above is a detailed description of an illustrative embodiment of the present invention. Various modifications and additions may be made without departing from the spirit and scope of the present invention. The features of each of the above embodiments may be appropriately combined with the features of other described embodiments so as to provide a variety of feature combinations in related new embodiments. In addition, although a plurality of separate embodiments are described above, what is described herein is merely an illustration of the application of the principles of the present invention. In addition, although the specific methods herein may be shown and / or described as being performed in a particular order, the order is highly variable within the ordinary technician to implement the embodiments disclosed herein. Therefore, this specification is intended to be exemplary only, and not to limit the scope of the present invention.

[0061] In the above description and claims, phrases such as "at least one" or "one or more" may appear, followed by a joint list of elements or features. The term "and / or" may also appear in a list of two or more elements or features. Unless there is an opposite implication or clear contradiction to the context in which it is used, such a phrase is intended to represent any element or feature listed separately, or any referenced element or feature combined with any other referenced element or feature. For example, the phrases "at least one of A and B;" "one or more of A and B;" and "A and / or B" each respectively mean "alone A, alone B, or A and B together". A similar interpretation is also intended to be used for a list including three or more items. For example, the phrases "at least one of A, B, and C;", "one or more of A, B, and C;" and "A, B, and / or C" each respectively mean "alone A, alone B, alone C, A and B together, A and C together, B and C together, or A and B and C together". In addition, the term "based on" used above and in the claims is intended to mean "based at least in part", so that unreferenced features or elements are also allowed.

[0062] Depending on the desired configuration, the subject matter described herein may be embodied in systems, devices, methods and / or articles. The implementations set forth in the above description do not represent all implementations consistent with the subject matter described herein. Instead, they are merely some examples consistent with various aspects of the subject matter described. Although some changes have been described in detail above, other modifications or additions are also possible. In particular, in addition to those set forth herein, additional features and / or variations may be provided. For example, the above-described embodiments may relate to various combinations and sub-combinations of the disclosed features and / or combinations and sub-combinations of several other features disclosed above. In addition, the logical flows depicted in the drawings and / or described herein do not necessarily require the specific order or sequential order shown to achieve the desired results. Other embodiments may be within the scope of the appended claims.

Claims

1. A decoder, comprising a circuit, wherein the circuit is configured as follows: Receiving a bitstream, the bitstream comprising an encoded current picture, the encoded current picture comprising a plurality of coding tree units, each coding tree unit comprising one or more coding units; constructing a stored list of previously decoded pictures using the bitstream for use as reference pictures for motion compensated prediction of the encoded current picture; for a current coding unit in the encoded current picture, detecting a first flag from header information in the bitstream for the current coding unit, the first flag indicating that motion compensated prediction is enabled for the current coding unit, thereby indicating that each motion vector of the current coding unit is determined relative to a reference picture in the list based on motion vectors of neighboring coding units; If motion compensation prediction is enabled for the current coding unit, determining, based on the header information of the current coding unit, whether the motion model of the current coding unit is translational motion, four-parameter affine motion, or six-parameter affine motion; Based on neighboring coding units, at least one motion vector is determined, where: If the motion model of the current coding unit is translational motion, determining the at least one motion vector further comprises: determining a translational motion vector from motion vectors of neighboring coding units, and decoding the current coding unit using the translational motion vector; If the motion model of the current coding unit is a four-parameter affine motion, determining the at least one motion vector further comprises: determining two control point motion vectors from motion vectors of neighboring coding units, and decoding the current coding unit using the two control point motion vectors; and If the motion model of the current coding unit is six-parameter affine motion, determining the at least one motion vector further comprises: determining three control point motion vectors from motion vectors of neighboring coding units, and decoding the current coding unit using the three control point motion vectors.

2. The decoder according to claim 1, wherein: The reference frames used for the motion compensated prediction are indexed in the list in order relative to the current frame.

3. The decoder according to claim 1, wherein: The header information includes a picture parameter set or a sequence parameter set.

4. The decoder according to claim 1, wherein: The header information includes a second flag, where the second flag indicates whether there is global motion in the current coding unit.

5. The decoder according to claim 1, further comprising: an entropy decoder processor configured to receive the bitstream and decode the bitstream into quantized coefficients; an inverse quantization and inverse transform processor configured to process the quantized coefficients, including performing an inverse discrete cosine; Deblocking filter; a frame buffer; and Intra-frame prediction processor.

6. The decoder according to claim 1, wherein: The encoded current picture includes a plurality of 128x128 coding tree units.

7. The decoder according to claim 6, wherein: One of the coding tree units has coding units with geometric partitioning.

8. A decoding method, the method comprising: Receiving a bitstream by a decoder, the bitstream comprising an encoded current picture, the encoded current picture comprising a plurality of coding tree units, each coding tree unit comprising one or more coding units; constructing a stored list of previously decoded pictures using the bitstream for use as reference pictures for motion compensated prediction of the encoded current picture; detecting, for a current coding unit in the encoded current picture, a first flag from header information in the bitstream for the current coding unit, the first flag indicating that motion compensated prediction is enabled for the current coding unit, thereby indicating that each motion vector of the current coding unit is determined relative to a reference picture in the list based on motion vectors of neighboring coding units; If motion compensation prediction is enabled for the current coding unit, determining, based on the header information of the current coding unit, whether the motion model of the current coding unit is translational motion, four-parameter affine motion, or six-parameter affine motion; Based on neighboring coding units, at least one motion vector is determined, where: If the motion model of the current coding unit is translational motion, determining the at least one motion vector further comprises: determining a translational motion vector from motion vectors of neighboring coding units, and decoding the current coding unit using the translational motion vector; If the motion model of the current coding unit is a four-parameter affine motion, determining the at least one motion vector further comprises: determining two control point motion vectors from motion vectors of neighboring coding units, and decoding the current coding unit using the two control point motion vectors; and If the motion model of the current coding unit is six-parameter affine motion, determining the at least one motion vector further comprises: determining three control point motion vectors from motion vectors of neighboring coding units, and decoding the current coding unit using the three control point motion vectors.

9. The method according to claim 8, wherein: The reference frames used for the motion compensated prediction are indexed in the list in order relative to the current frame.

10. The method according to claim 8, wherein: The header information includes a picture parameter set PPS or a sequence parameter set SPS.

11. The method according to claim 8, wherein: The header information includes a second flag, where the second flag indicates whether there is global motion in the current coding unit.

12. The method according to claim 8, wherein the decoder further comprises: an entropy decoder processor configured to receive the bitstream and decode the bitstream into quantized coefficients; an inverse quantization and inverse transform processor configured to process the quantized coefficients, including performing an inverse discrete cosine; Deblocking filter; a frame buffer; and Intra-frame prediction processor.

13. The method according to claim 8, wherein: The encoded current picture includes a plurality of 128x128 coding tree units.

14. The method according to claim 13, wherein: One of the coding tree units has coding units with geometric partitioning.

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