Clock acceleration synchronization method, device, electronic device and computer-readable storage medium

Abstract

The present application provides a method, device, electronic device and computer-readable storage medium for accelerating a clock simultaneously, belonging to the field of data processing technologies. The method is applied to a service system, and the service system includes a plurality of subsystems. The service system is communicatively connected to a scheduling center. The method includes: receiving a clock control command sent by the scheduling center, which includes a playback start time, a first start time point, an acceleration multiple, and service parameters; obtaining a second start time point of each subsystem according to the first start time point and the local physical time of each subsystem; then, combining the acceleration multiple and the playback start time to obtain an analog time of each subsystem based on the first start time point; and further combining the acceleration multiple to obtain the task scheduling time of each subsystem, so that each subsystem executes tasks at its respective task scheduling time to achieve synchronous acceleration, thereby being able to reduce the test time consumption of the transaction execution algorithm and improve the problems of low R & D efficiency and high cost.

Description

Technical Field

[0001] The present application relates to the field of data processing technologies, and in particular, to a clock acceleration synchronization method, apparatus, electronic device, and computer-readable storage medium. Background Art

[0002] With the development of Internet technologies, electronic transactions are everywhere in life. In an electronic transaction, to complete a complete transaction task, interactions between system nodes such as a transaction system, an execution algorithm, a matching system, and a market quotation system are required, and each system node has a strong correlation with time.

[0003] The research and development of a transaction execution algorithm requires repeated testing and verification. However, the transaction time of an electronic transaction is often several hours, and the transaction period also spans several hours. Moreover, traditional clock synchronization solutions mostly rely on professional hardware or software, require frequent network communication to calibrate time, and cannot perform arbitrary clock acceleration or periodic acceleration. Therefore, if a traditional clock synchronization solution is used to verify the research and development results of a transaction execution algorithm, it is necessary to wait for several hours, which results in low research and development efficiency, long duration, and high cost of the transaction execution algorithm. Summary of the Invention

[0004] To make the above objects, features, and advantages of the present disclosure more obvious and understandable, the following specifically enumerates preferred embodiments and, in conjunction with the accompanying drawings, makes a detailed description as follows.

[0005] The objects of the present application include providing a clock acceleration synchronization method, apparatus, electronic device, and computer-readable storage medium, which can improve the problems that traditional clock synchronization solutions mostly rely on professional hardware or software, require frequent network communication to calibrate time, and cannot perform arbitrary clock acceleration or periodic acceleration, resulting in low research and development efficiency, long duration, and high cost of the transaction execution algorithm.

[0006] In a first aspect, the present application provides a clock acceleration synchronization method, adopting the following technical solution:

[0007] A clock acceleration synchronization method is applied to a service system, the service system includes multiple subsystems, the service system is communicatively connected to a scheduling center, and the method includes:

[0008] Receiving a clock control command sent by the scheduling center, the clock control command including a playback start time, a first start time point, an acceleration multiple, and service parameters, the first start time point being the local physical time of the scheduling center;

[0009] Obtaining a second start time point of each subsystem according to the first start time point and the local physical time of each subsystem;

[0010] Based on the second start time point, the acceleration multiple, and the playback start time, obtain the simulation time of each subsystem with respect to the first start time point. Based on the simulation time and the acceleration multiple, obtain the task scheduling time of each subsystem, so that each subsystem executes tasks according to the service parameters and its respective task scheduling time.

[0011] In a feasible implementation manner, the step of obtaining the second start time point of each subsystem according to the first start time point and the local physical time of each subsystem includes:

[0012] For each subsystem, determine whether the local physical time of the subsystem is consistent with the first start time point;

[0013] If they are consistent, use the first start time point as the second start time point of the subsystem;

[0014] Otherwise, calculate the second start time point of the subsystem according to the local physical time of the subsystem and the first start time point.

[0015] In a feasible implementation manner, the step of calculating the second start time point of the subsystem according to the local physical time of the subsystem and the first start time point includes:

[0016] Determine whether the first start time point is earlier than the local physical time of the subsystem;

[0017] If so, the second start time point of the subsystem is:

[0018] BT2 = LT - (LT - BT1) / SP

[0019] Otherwise, the second start time point of the subsystem is:

[0020] BT2 = LT - (BT1 - LT) / SP

[0021] Wherein, BT2 represents the second start time point, BT1 represents the first start time point, LT represents the local physical time of the subsystem, and SP represents the acceleration multiple.

[0022] In a feasible implementation manner, the step of obtaining the simulation time of each subsystem with respect to the first start time point according to the second start time point, the acceleration multiple, and the playback start time includes:

[0023] Use the first parsing formula to obtain the simulation time of the subsystem. The first parsing formula includes:

[0024] ST = DT * SP + ST p

[0025] Wherein, DT = LT - BT2, ST represents the simulation time, SP represents the acceleration multiple, ST p represents the playback start time, LT represents the local physical time of the subsystem, and BT2 represents the second start time point of the subsystem.

[0026] In a feasible implementation manner, the step of obtaining the task scheduling time of each of the subsystems according to the simulation time and the acceleration multiple includes:

[0027] Using a second parsing formula to obtain the scheduling time of each task of the subsystem, and the second parsing formula includes:

[0028] FT2 = (LT + FT1 - ST) / SP

[0029] Wherein, FT2 represents the scheduling time of the task, LT represents the local physical time of the subsystem, FT1 represents the original execution time of the task, ST represents the simulation time of the subsystem, and SP represents the acceleration multiple.

[0030] In a feasible implementation manner, the method further includes:

[0031] Receiving a reset instruction regularly sent by the scheduling center, where the reset instruction includes the local physical time of the scheduling center;

[0032] Updating the value of the first start time point to the local physical time in the reset instruction;

[0033] Based on the updated first start time point, re-obtaining the second start time point and the simulation time of each of the subsystems to calibrate the second start time point and the simulation time of each of the subsystems.

[0034] In a feasible implementation manner, the clock control command further includes an instruction playback period, and the method further includes:

[0035] For each of the subsystems, obtaining the task processing period of a single round of services of the subsystem according to the task scheduling time of each task of the subsystem, and discarding the execution of the next round of services of the subsystem when the task processing period is less than the instruction playback period.

[0036] In a second aspect, the present application provides a clock acceleration synchronization device, adopting the following technical solution:

[0037] A clock acceleration synchronization device is applied to a service system, the service system includes a plurality of subsystems, the service system is communicatively connected to a scheduling center, and the device includes:

[0038] A receiving module, configured to receive the clock control command sent by the dispatching center, where the clock control command includes a playback start time, a first start time point, an acceleration multiple, and service parameters, and the first start time point is the local physical time of the dispatching center;

[0039] A verification and calibration module, configured to obtain a second start time point of each subsystem according to the first start time point and the local physical time of each subsystem;

[0040] An acceleration synchronization module, configured to obtain, according to the second start time point, the acceleration multiple, and the playback start time, an analog time of each subsystem based on the first start time point, and obtain a task scheduling time of each subsystem according to the analog time and the acceleration multiple, so that each subsystem executes tasks according to the service parameters and its respective task scheduling time.

[0041] In a feasible implementation manner, the step in which the verification and calibration module is configured to obtain the second start time point of each subsystem according to the first start time point and the local physical time of each subsystem includes:

[0042] For each subsystem, determine whether the local physical time of the subsystem is consistent with the first start time point;

[0043] If they are consistent, use the first start time point as the second start time point of the subsystem;

[0044] Otherwise, calculate the second start time point of the subsystem according to the local physical time of the subsystem and the first start time point.

[0045] In a feasible implementation manner, the acceleration synchronization module includes a first calculation unit and a second calculation unit;

[0046] The first calculation unit is configured to obtain the analog time of the subsystem by using a first parsing formula, and the first parsing formula includes:

[0047] ST = DT * SP + ST p

[0048] where DT = LT - BT2, ST represents the analog time, SP represents the acceleration multiple, ST p represents the playback start time, LT represents the local physical time of the subsystem, and BT2 represents the second start time point of the subsystem;

[0049] The second calculation unit is configured to obtain the scheduling time of each task of the subsystem by using a second parsing formula.

[0050] The second parsing formula includes:

[0051] FT2 = (LT + FT1 - ST) / SP

[0052] Among them, FT2 represents the scheduling time of the task, and FT1 represents the original execution time of the task.

[0053] In a feasible implementation manner, the system further includes an update module;

[0054] The receiving module is further configured to receive a reset instruction regularly sent by the scheduling center;

[0055] The update module is configured to update the value of the first start time point to the local physical time in the reset instruction, and based on the updated first start time point, re-obtain the second start time point and the simulation time of each subsystem, so as to calibrate the second start time point and the simulation time of each subsystem.

[0056] In a feasible implementation manner, the clock control command further includes an instruction playback period, and the system further includes a processing module;

[0057] The processing module is configured to, for each subsystem, obtain the task processing period of a single round of services of the subsystem according to the task scheduling time of each task of the subsystem, and discard the execution of the next round of services of the subsystem if the task processing period is less than the instruction playback period.

[0058] In a third aspect, the present application provides an electronic device, adopting the following technical solution:

[0059] An electronic device includes: a memory, a processor, and a computer program stored on the memory and executable on the processor, and when the processor executes the computer program, it implements the method described in the first aspect.

[0060] In a fourth aspect, the present application provides a computer-readable storage medium, adopting the following technical solution:

[0061] A computer-readable storage medium, the computer-readable storage medium includes a computer program, and when the computer program runs, it controls the electronic device where the computer-readable storage medium is located to execute the method described in the first aspect.

[0062] The beneficial effects of the embodiments of the present application include, for example:

[0063] Receive the clock control command sent by the dispatching center. According to the first start time point of the clock control command, i.e., the local physical time of the dispatching center, and the local physical time of each subsystem, calibrate and correct the first start time point from the perspective of each subsystem to obtain the second start time point of each subsystem. Further, according to the second start time point of each subsystem, as well as the acceleration multiple and playback start time in the clock control command, obtain the simulated time of each subsystem based on the first start time point (i.e., the local physical time of the dispatching center), so that each subsystem can more accurately simulate the physical time of the dispatching center according to its own simulated time. Furthermore, obtain the task scheduling time of each subsystem based on the simulated time and the acceleration multiple. This task scheduling time is the time after acceleration based on the simulated time, so as to enable the tasks of each subsystem on the business system to be synchronously accelerated, and then reduce the test time-consuming of the transaction execution algorithm to improve the problems of low R & D efficiency and high cost. Brief Description of the Drawings

[0064] To more clearly illustrate the technical solutions of the present disclosure, the accompanying drawings required for implementation will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present disclosure, and thus should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0065] Figure 1 It is a structural block diagram of an electronic device.

[0066] Figure 2 It is a structural block diagram of a clock acceleration synchronization device.

[0067] Figure 3 It is a flowchart of a clock acceleration synchronization method in an embodiment.

[0068] Figure 4 For Figure 3 It is a flowchart of an embodiment of sub-steps of step S200.

[0069] Figure 5 It is a flowchart of a clock acceleration synchronization method in another embodiment.

[0070] Figure 6 It is a flowchart of a clock acceleration synchronization method in yet another embodiment.

[0071] Figure 7 It is a timing diagram of the clock acceleration mechanism among the subsystem, the time acceleration receiver, and the dispatching center.

[0072] Figure 8 It is a structural block diagram of a clock acceleration synchronization device in an embodiment.

[0073] Description of reference numerals: 01 - electronic device; 02 - processor; 03 - memory; 04 - receiving module; 05 - verification and calibration module; 06 - acceleration and synchronization module; 061 - first calculation unit; 062 - second calculation unit; 07 - processing module; 08 - system reset module; 09 - update module. Detailed implementation manners

[0074] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Apparently, the described embodiments are some but not all of the embodiments of the present application. The components of the embodiments of the present application described and illustrated herein generally may be arranged and designed in various different configurations.

[0075] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the claimed present application, but merely represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts fall within the scope of protection of the present application.

[0076] It should be noted that: Similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. In addition, terms such as "first" and "second" are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0077] Refer to Figure 1 , which is a schematic block diagram of an electronic device provided for the embodiments of the present application. The electronic device 01 may include, but is not limited to, a memory 03 and a processor 02.

[0078] Among them, both the processor 02 and the memory 03 are located in the electronic device 01 but are separately arranged. However, it should be understood that the memory 03 may be replaced with a computer-readable storage medium, and both the memory 03 and the computer-readable storage medium may be independent of the electronic device 01 and may be accessed by the processor 02 through a bus interface. In addition, the memory 03 may be integrated into the processor 02. For example, it may be a cache and / or a general register.

[0079] In this embodiment, both the computer-readable storage medium and the memory 03 may be used to store computer programs. When the processor 02 executes the computer programs, the clock acceleration and synchronization method given in the embodiments of the present application can be implemented.

[0080] It should be noted that Figure 1 is a schematic structural diagram of the electronic device 01. The electronic device 01 may further include more or fewer components than those Figure 1 shown in, or have a different configuration from that Figure 1 shown. Figure 1 Each component shown in can be implemented by hardware, software, or a combination thereof. The electronic device 01 can be, but is not limited to, a computer, a mobile phone, an iPad, a server, a laptop, a mobile Internet device, etc.

[0081] The clock acceleration synchronization method provided by this application can be applied to an application environment such as Figure 2 shown. This method is applied to a clock acceleration synchronization system. The clock acceleration synchronization system includes multiple business system servers and a scheduling server. The business system servers include multiple subsystem servers. A subsystem is installed on each subsystem server. The subsystem includes a trading system, a market quotation system, an algorithm system, and a trading matching system. A scheduling center is installed on the scheduling server. The scheduling server communicates with each server area through a message distribution component. The scheduling server also includes a screen that supports human-computer interaction. A time acceleration receiver and a task scheduler are also installed on each subsystem server. The task scheduler is used to schedule the tasks of the subsystem on the subsystem server where it is located, that is, the task scheduler corresponds to the subsystem one by one. The subsystem server and the scheduling server can be implemented by independent servers or a cluster composed of multiple servers.

[0082] In one embodiment, as Figure 3 shown, a clock acceleration synchronization method is provided. This embodiment mainly takes this method applied to a business system server such as Figure 2 as an example for illustration. This method is applied to a business system. The business system includes multiple subsystems, and the business system is communicatively connected to the scheduling center.

[0083] Step S100, receive a clock control command sent by the scheduling center.

[0084] Among them, the clock control command includes a playback start time, a first start time point, an acceleration multiple, and service parameters. The first start time point is the local physical time of the scheduling center.

[0085] Specifically, the R & D personnel input scheduling information to the scheduling center through the screen of the scheduling server. The scheduling center reads the scheduling information, and the scheduling information includes an instruction cycle, an acceleration multiple, and service parameters. The scheduling center generates a clock control command for this round of testing according to the scheduling information, and then broadcasts the clock control command to the business system server through the message distribution component.

[0086] Step S200: Obtain the second start time points of each subsystem according to the first start time point and the local physical time of each subsystem.

[0087] Specifically, after the time acceleration receiving server on each subsystem server receives the clock control command, it calibrates and corrects the first start time point according to the first start time point and the local physical time of the subsystem server where it is located, and obtains the second start time point of the subsystem server, that is, the second start time point of the subsystem.

[0088] Step S300: Obtain the simulated time of each subsystem based on the first start time point according to the second start time point, the acceleration multiple, and the playback start time.

[0089] Specifically, the task scheduler on each subsystem server calculates the simulated time of each subsystem based on the first start time point according to the second start time point of its corresponding subsystem, as well as the acceleration multiple and the playback start time in the clock control command.

[0090] Step S400: Obtain the task scheduling time of each subsystem according to the simulated time and the acceleration multiple, so that each subsystem executes tasks according to the service parameters and its own task scheduling time.

[0091] Among them, the service parameters are the environmental parameters.

[0092] Specifically, the task scheduler on each subsystem server obtains the task scheduling time of its corresponding subsystem according to the simulated time of the subsystem server where it is located and the acceleration multiple of the clock control command. The task scheduler schedules according to the task scheduling time, and schedules its corresponding subsystem to execute tasks according to the task scheduling time.

[0093] In the above clock acceleration synchronization method, according to the first start time point of the clock control command, that is, the local physical time of the scheduling center, and the local physical time of each subsystem, the first start time point is calibrated and corrected from the perspective of each subsystem to obtain the second start time point of each subsystem. Further, according to the second start time point of each subsystem, as well as the acceleration multiple and the playback start time in the clock control command, the simulated time of each subsystem based on the first start time point (that is, the local physical time of the scheduling center) is obtained, so that each subsystem can more accurately simulate the physical time of the scheduling center according to its own simulated time. Furthermore, the task scheduling time of each subsystem is obtained according to the simulated time and the acceleration multiple. The task scheduling time is the time after acceleration based on the simulated time, so that the tasks of each subsystem on the service system can be synchronized and accelerated, and then the test time of the transaction execution algorithm can be reduced to improve the problems of low R & D efficiency and high cost.

[0094] In one embodiment, as Figure 4 shown, it is a schematic flowchart of the sub-steps of step S200, including the following steps.

[0095] Step S210: For each subsystem, determine whether the local physical time of the subsystem is consistent with the first start time point.

[0096] If they are consistent, execute step S220.

[0097] Otherwise, execute step S230.

[0098] Step S220: Take the first start time point as the second start time point of the subsystem.

[0099] Step S230: Calculate the second start time point of the subsystem according to the local physical time of the subsystem and the first start time point.

[0100] It should be understood that when the first timestamp is consistent with the local physical time of the subsystem, it indicates that the subsystem and the scheduling center are clock-synchronized, that is, there is no time difference. When the first timestamp is consistent with the local physical time of the subsystem, it means that there is a time difference between the subsystem and the scheduling center, and the first start timestamp needs to be corrected.

[0101] Since the local physical times of the subsystems are different, when correcting the first start time point, it is necessary to take each subsystem as a unit for independent correction. That is, for different subsystems, there are different corrected first start time points, and the second start time point is the corrected first start time point.

[0102] In one embodiment, step S230 specifically includes:

[0103] Determine whether the first start time point is earlier than the local physical time of the subsystem.

[0104] If so, the second start time point of the subsystem is:

[0105] BT2 = LT - (LT - BT1) / SP

[0106] Otherwise, the second start time point of the subsystem is:

[0107] BT2 = LT - (BT1 - LT) / SP

[0108] Wherein, BT2 represents the second start time point, BT1 represents the first start time point, LT represents the local physical time of the subsystem, and SP represents the acceleration multiple.

[0109] It can be clearly known that when the first start time point is earlier than the local physical time of the subsystem, the time difference between the local physical time and the first start time point is divided by the acceleration multiple to obtain the accelerated time difference. (LT - BT1) / SP is the accelerated time difference, and then the local physical time is subtracted by the accelerated time difference to obtain the second start time point; when the first start time point is later than the local physical time of the subsystem, the time difference between the first start time point and the local physical time is divided by the acceleration multiple to obtain the accelerated time difference. (BT1 - LT) / SP is the accelerated time difference, and then the local physical time is added with the accelerated time difference to obtain the second start time point of the subsystem.

[0110] Obviously, when calculating the second start time point, the acceleration multiple is considered, so that the subsystem can more accurately simulate the local physical time of the dispatching center, so that each subsystem synchronously accelerates the simulation of the local physical time of the dispatching center.

[0111] Further, in one implementation, step S310 specifically includes: using the first parsing formula to obtain the simulation time of the subsystem.

[0112] Specifically, the first parsing formula includes: ST = DT * SP + ST p 。

[0113] DT = LT - BT2.

[0114] Wherein, ST represents the simulation time, SP represents the acceleration multiple, ST p represents the playback start time, LT represents the local physical time of the subsystem, and BT2 represents the second start time point of the subsystem.

[0115] First, obtain the time difference between the local physical time of the subsystem and the second start time point, that is, DT, and then multiply the time difference by the acceleration multiple and add the playback start time to obtain the simulation time.

[0116] It should be understood that since a period of time has elapsed from obtaining the second start time point in step S200 to calculating the simulation time in step S300, therefore, in order to make the simulation time more accurately simulate the playback start time of the clock control instruction, this period of time needs to be considered when calculating the simulation time.

[0117] In the above method for obtaining the simulation time of the subsystem, the time elapsed during the program execution is considered, so that the obtained simulation time can more accurately simulate the playback start time in the clock control instruction.

[0118] In one implementation, step S400 may specifically include: using the second parsing formula to obtain the scheduling time of each task of the subsystem.

[0119] The second parsing formula includes:

[0120] FT2 = (LT + FT1 - ST) / SP

[0121] Wherein, FT2 represents the scheduling time of the task, LT represents the local physical time of the subsystem, FT1 represents the original execution time of the task, ST represents the simulation time of the subsystem, and SP represents the acceleration multiple.

[0122] The scheduling time of each task obtained by the above method is the time after accelerating the original execution time based on the simulation time. Therefore, when each task is executed at the scheduling time, clock synchronization acceleration can be achieved.

[0123] Furthermore, the clock control command further includes an instruction replay period. On this basis, as Figure 5 shown, the clock acceleration synchronization method further includes step S500.

[0124] Step S500: For each subsystem, according to the task scheduling time of each task of the subsystem, obtain the task processing cycle of a single round of services of the subsystem. If the task processing cycle is less than the instruction replay period, discard the execution of the next round of services of the subsystem.

[0125] Specifically, the task scheduler obtains the task processing cycle of a single round of services of the corresponding subsystem according to the scheduling time of each task of the subsystem. Generally, according to the scheduling time of the latest executed task. When the task processing cycle is less than the instruction replay period in the clock control command, after the task scheduler schedules the tasks of a single round of services, it discards the scheduling of the next round of services.

[0126] By the above method, the next round of services of the subsystem with a task processing cycle less than the instruction replay period is discarded, so that only a single round of services is executed within a single instruction replay period, thereby to a certain extent avoiding the situation where the next round of services is executed before the previous round of services is completed under the condition of acceleration.

[0127] Since there may still be clock deviations on the servers where each subsystem is located, therefore, when the service system runs for a period of time with the above clock synchronization acceleration method, the clock deviations may accumulate, resulting in a relatively large clock synchronization acceleration deviation between each subsystem.

[0128] Based on the above considerations, on the basis of the above clock synchronization acceleration method, as Figure 6 shown, when the single-round replay task is being executed and not yet completed, the clock acceleration synchronization method further includes:

[0129] Step S600: Receive the reset instruction regularly sent by the scheduling center.

[0130] Among them, the reset instruction includes the local physical time of the dispatching center.

[0131] Specifically, before the replay end time is reached, the dispatching center broadcasts a reset instruction, i.e., the rest instruction, to the business system, and the business system receives the reset instruction.

[0132] Step S700: Update the value of the first start time point to the local physical time in the reset instruction.

[0133] Specifically, after the business system receives the reset instruction, the time acceleration receivers of each subsystem update the first start time point to the local physical time in the reset instruction.

[0134] Based on the updated first start time point, repeat the above steps S200 to S400, that is, re-obtain the second start time points and simulation times of each subsystem to re-calibrate the second start time points and simulation times of each subsystem, and thus also re-obtain the scheduling times of each task.

[0135] In each round of business, the above method can be used to calibrate the time of each subsystem multiple times to reduce the clock deviation between each subsystem, and be able to more accurately simulate the simulation time based on the physical time of the dispatching center, and further achieve clock acceleration synchronization between each subsystem.

[0136] Further, as Figure 6 shown, the clock acceleration synchronization method further includes step S800.

[0137] Step S800: Perform system reset according to the received stop instruction.

[0138] Specifically, the dispatching center sends a stop instruction, and after the business system receives the stop instruction, it performs system reset. The operations of system reset include but are not limited to making a data backup of the task execution result, clearing the memory of each subsystem, comparing the test results, and outputting the test results.

[0139] In one implementation, as Figure 7 shown, the timing diagram of the clock acceleration mechanism among the subsystem, the time acceleration receiver corresponding to the subsystem, and the dispatching center.

[0140] After the subsystem is started, subsystem registration is immediately performed on the time acceleration receiver, and a replay synchronization request is subscribed to the dispatching center. The dispatching center responds to the subscribed replay synchronization request to be able to broadcast a clock control command to the time acceleration receiver.

[0141] When the scheduling center reads in the scheduling information, it generates a clock control command according to the scheduling information and broadcasts the clock control command. After receiving the clock control command, the time acceleration receiver verifies the first start time point and obtains the second start time point.

[0142] It should be understood that although Figures 2 - 6 the steps in the flowchart of Figures 2 - 6 are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise clearly stated in this article, there is no strict order limit for the execution of these steps, and these steps can be executed in other orders. Moreover,

[0143] In one implementation, as Figure 8 shown, a clock acceleration synchronization device is provided. This clock acceleration synchronization device is applied to a service system. The service system includes multiple subsystems. The service system is communicatively connected to the scheduling center. The clock acceleration synchronization device includes: a receiving module 04, a verification and calibration module 05, and an acceleration and synchronization module 06.

[0144] The receiving module 04 is configured to receive the clock control command sent by the scheduling center.

[0145] Among them, the clock control command includes a playback start time, a first start time point, an acceleration multiple, and service parameters. The first start time point is the local physical time of the scheduling center;

[0146] The verification and calibration module 05 is configured to obtain the second start time point of each subsystem according to the first start time point and the local physical time of each subsystem.

[0147] The acceleration and synchronization module 06 is configured to obtain the simulated time of each subsystem based on the first start time point according to the second start time point, the acceleration multiple, and the playback start time, and obtain the task scheduling time of each subsystem according to the simulated time and the acceleration multiple, so that each subsystem executes tasks according to the service parameters and its own task scheduling time.

[0148] In the above clock acceleration synchronization device, after the receiving module 04 receives the clock control command, the verification and calibration module 05 calibrates and corrects the first start time point of the clock control command, that is, the local physical time of the dispatching center, and the local physical time of each subsystem from the perspective of each subsystem to obtain the second start time point of each subsystem. The acceleration synchronization module 06 obtains the simulated time of each subsystem based on the first start time point (i.e., the local physical time of the dispatching center) according to the second start time point of each subsystem, the acceleration multiple in the clock control command, and the playback start time, so that each subsystem can more accurately simulate the physical time of the dispatching center according to its own simulated time, and then obtain the task scheduling time of each subsystem according to the simulated time and the acceleration multiple. The task scheduling time is the time after acceleration based on the simulated time, so that the tasks of each subsystem on the service system can be synchronized and accelerated, and then the test time-consuming of the transaction execution algorithm can be reduced to improve the problems of low R & D efficiency and high cost.

[0149] Further, referring to Figure 8 , the clock acceleration synchronization device further includes an update module 09, a system reset module 08, and a processing module 07.

[0150] The processing module 07 is used to obtain the task processing cycle of a single round of services of each subsystem according to the task scheduling time of each task of the subsystem, and discard the execution of the next round of services of the subsystem if the task processing cycle is less than the instruction playback cycle.

[0151] The receiving module 04 is further used to receive the reset instruction regularly sent by the dispatching center.

[0152] The update module 09 is used to update the value of the first start time point to the local physical time in the reset instruction.

[0153] After the update module 09 performs the update, the verification and calibration module 05 and the acceleration calibration module re-execute the corresponding tasks, re-obtain the second start time point and the simulated time of each subsystem to re-calibrate the second start time point and the simulated time of each subsystem, and then re-obtain the scheduling time of each task.

[0154] The system reset module 08 is used to perform system reset according to the received stop instruction. Among them, stop

[0155] In an implementation manner, the verification and calibration module 05 executes the above steps S210 - S230 to obtain the second start time point of each subsystem according to the first start time point and the local physical time of each subsystem.

[0156] The acceleration synchronization module 06 includes a first calculation unit 061 and a second calculation unit 062.

[0157] The first calculation unit 061 is used to obtain the simulation time of the subsystem by using the first analysis formula.

[0158] The first analysis formula includes:

[0159] ST = DT * SP + ST p

[0160] where DT = LT - BT2, ST represents the simulation time, SP represents the acceleration multiple, and ST p represents the playback start time, LT represents the local physical time of the subsystem, and BT2 represents the second start time point of the subsystem.

[0161] The second calculation unit 062 is used to obtain the scheduling time of each task of the subsystem by using the second analysis formula.

[0162] The second analysis formula includes:

[0163] FT2 = (LT + FT1 - ST) / SP

[0164] where FT2 represents the scheduling time of the task, and FT1 represents the original execution time of the task.

[0165] For the specific limitations of the clock acceleration synchronization device, reference can be made to the limitations of the clock acceleration synchronization method in the above text, which will not be elaborated here. Each module in the above clock acceleration synchronization device can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in the processor 02 in the computer device in hardware form or independent of it, or stored in the memory 03 in the computer device in software form, so that the processor 02 can call and execute the operations corresponding to the above modules.

[0166] In several embodiments provided by the present disclosure, it should be understood that the disclosed devices, system diagrams, and methods can also be implemented in other ways. The device, system, and method embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architectures, functions, and operations of devices, methods, and computer program products according to multiple embodiments of the present disclosure. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code, and the module, program segment, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than that marked in the accompanying drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, as well as the combination of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system that performs the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0167] In addition, the functional modules in each embodiment of the present disclosure may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0168] When the above-mentioned functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present disclosure, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, electronic device 01, or network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present disclosure. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories 03 (ROM, Read-Only Memory), random access memories 03 (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes. It should be noted that in this article, the term "including", "comprising", or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article, or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such a process, method, article, or device. Without more limitations, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article, or device including the said element.

[0169] The above are only optional embodiments of the present disclosure and are not used to limit the present disclosure. For those skilled in the art, the present disclosure can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A clock acceleration synchronization method, characterized in that, Applied to a business system, the business system includes multiple subsystems, and the business system is communicatively connected to a scheduling center. The method includes: Receiving a clock control command sent by the scheduling center, the clock control command including a playback start time, a first start time point, an acceleration multiple, and service parameters, where the first start time point is the local physical time of the scheduling center; Obtaining a second start time point for each of the subsystems according to the first start time point and the local physical time of each of the subsystems; Obtaining, according to the second start time point, the acceleration multiple, and the playback start time, the simulation time of each of the subsystems based on the first start time point, and obtaining the task scheduling time of each of the subsystems according to the simulation time and the acceleration multiple, so that each of the subsystems executes tasks according to the service parameters and their respective task scheduling times; the simulation time enables each of the subsystems to simulate the physical time of the scheduling center; The step of obtaining the second start time point for each of the subsystems according to the first start time point and the local physical time of each of the subsystems includes: For each of the subsystems, determining whether the local physical time of the subsystem is consistent with the first start time point; If they are consistent, using the first start time point as the second start time point of the subsystem; Otherwise, calculating the second start time point of the subsystem according to the local physical time of the subsystem and the first start time point.

2. The method according to claim 1, wherein The step of calculating the second start time point of the subsystem according to the local physical time of the subsystem and the first start time point includes: Determining whether the first start time point is earlier than the local physical time of the subsystem; If so, the second start time point of the subsystem is: BT2 = LT - (LT - BT1) / SP Otherwise, the second start time point of the subsystem is: BT2 = LT - (BT1 - LT) / SP where BT2 represents the second start time point, BT1 represents the first start time point, LT represents the local physical time of the subsystem, and SP represents the acceleration multiple.

3. The method according to claim 1, characterized in that The step of obtaining, according to the second start time point, the acceleration multiple, and the playback start time, the simulation time of each of the subsystems based on the first start time point includes: Using a first parsing formula to obtain the simulation time of the subsystem, and the first parsing formula includes: ST = DT * SP + ST p Among them, DT = LT - BT2, ST represents the simulation time, SP represents the acceleration multiple, ST p represents the replay start time, LT represents the local physical time of the subsystem, and BT2 represents the second start time point of the subsystem.

4. The method according to claim 1 or 3, characterized in that The step of obtaining the task scheduling time of each of the subsystems according to the simulation time and the acceleration multiple includes: Using a second parsing formula to obtain the scheduling time of each task of the subsystem, and the second parsing formula includes: FT2 = (LT + FT1 - ST) / SP where FT2 represents the scheduling time of the task, LT represents the local physical time of the subsystem, FT1 represents the original execution time of the task, ST represents the simulation time of the subsystem, and SP represents the acceleration multiple.

5. The method according to claim 1, wherein The method further includes: Receiving a reset instruction regularly sent by the scheduling center, the reset instruction including the local physical time of the scheduling center; Updating the value of the first start time point to the local physical time in the reset instruction; Based on the updated first start time point, re-obtain the second start time point and the simulation time of each subsystem to calibrate the second start time point and the simulation time of each subsystem.

6. The method according to claim 1, wherein The clock control command further includes an instruction playback period, and the method further includes: For each subsystem, obtain the task processing period of a single round of services of the subsystem according to the task scheduling time of each task of the subsystem. If the task processing period is less than the instruction playback period, discard the execution of the next round of services of the subsystem.

7. A clock acceleration synchronization device, characterized in that, Applied to a service system, the service system includes multiple subsystems, the service system is communicatively connected to a scheduling center, and the device includes: A receiving module, configured to receive a clock control command sent by the scheduling center, where the clock control command includes a playback start time, a first start time point, an acceleration multiple, and service parameters, and the first start time point is the local physical time of the scheduling center; A verification and calibration module, configured to obtain the second start time point of each subsystem according to the first start time point and the local physical time of each subsystem; An acceleration synchronization module, configured to obtain the simulation time of each subsystem based on the first start time point according to the second start time point, the acceleration multiple, and the playback start time, and obtain the task scheduling time of each subsystem according to the simulation time and the acceleration multiple, so that each subsystem executes tasks according to the service parameters and its respective task scheduling time; the simulation time enables each subsystem to simulate the physical time of the scheduling center; The verification and calibration module is further configured to: for each subsystem, determine whether the local physical time of the subsystem is consistent with the first start time point; if they are consistent, use the first start time point as the second start time point of the subsystem; otherwise, calculate the second start time point of the subsystem according to the local physical time of the subsystem and the first start time point.

8. An electronic device, characterized in that, Includes: A memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor implements the method according to any one of claims 1 to 6 when executing the computer program.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a computer program, and when the computer program runs, it controls the electronic device where the computer-readable storage medium is located to execute the method according to any one of claims 1 to 6.

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