Method for manufacturing image display device and image display device

Abstract

A method for manufacturing an image display device according to an embodiment includes: a step of preparing a second substrate having a semiconductor layer including a light-emitting layer on a first substrate; a step of preparing a third substrate having a circuit including circuit elements formed thereon; a step of bonding the semiconductor layer to the third substrate; a step of etching the semiconductor layer to form a light-emitting element; a step of covering the light-emitting element with a light-transmitting insulating member; and a step of forming a wiring layer that electrically connects the light-emitting element to the circuit elements. The light-emitting element includes a light-emitting surface opposite to the surface bonded to the third substrate. The insulating member is configured such that light emitted from the light-emitting element is distributed in the normal direction of the light-emitting surface and on the side of the light-emitting surface.

Description

Technical Field

[0001] This invention relates to a method for manufacturing an image display device and the image display device itself. Background Technology

[0002] There is a desire to achieve thin image display devices with high brightness, wide viewing angle, high contrast, and low power consumption. To meet these market demands, display devices utilizing self-emissive elements are under development.

[0003] As self-emissive elements, there is a growing expectation for display devices using micro-LEDs, which are micro-light-emitting elements. A method for manufacturing such a display device using micro-LEDs has been described, which involves sequentially transferring separately formed micro-LEDs onto a driving circuit. However, with the increasing prevalence of high-definition (Full HD), 4K, and 8K displays, the transfer process becomes extremely time-consuming when multiple micro-LEDs are formed separately and sequentially transferred onto a substrate containing the driving circuit. Furthermore, this can lead to poor connections between the micro-LEDs and the driving circuit, resulting in a decrease in yield.

[0004] There is a known technique of growing a semiconductor layer containing a light-emitting layer on a Si substrate, forming electrodes on the semiconductor layer, and then bonding it to a circuit substrate on which a driving circuit is formed (e.g., Patent Document 1).

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2002-141492 Summary of the Invention

[0008] One embodiment of the present invention provides a method for manufacturing an image display device and an image display device that shortens the transfer process of the light-emitting element and improves the yield.

[0009] A method for manufacturing an image display device according to an embodiment of the present invention includes: a step of preparing a second substrate having a semiconductor layer including a light-emitting layer on a first substrate; a step of preparing a third substrate having a circuit including circuit elements formed thereon; a step of bonding the semiconductor layer to the third substrate; a step of etching the semiconductor layer to form a light-emitting element; a step of covering the light-emitting element with a light-transmitting insulating member; and a step of forming a wiring layer for electrically connecting the light-emitting element and the circuit elements. The light-emitting element includes a light-emitting surface opposite to the surface bonded to the third substrate. The insulating member is configured such that light emitted from the light-emitting element is distributed in the normal direction of the light-emitting surface and on the light-emitting surface side.

[0010] An image display device according to one embodiment of this invention includes: a circuit element; a first wiring layer electrically connected to the circuit element; an insulating film covering the circuit element and the first wiring layer; a second wiring layer disposed on the insulating film; a light-emitting element disposed on the second wiring layer, including a light-emitting surface opposite to the surface of the second wiring layer; an insulating member covering at least a portion of the light-emitting element and having light transmittance; and a third wiring layer electrically connected to the light-emitting element and disposed on the insulating member. The light-emitting element includes: a first semiconductor layer of a first conductivity type disposed on the second wiring layer; a light-emitting layer disposed on the first semiconductor layer; and a second semiconductor layer of a second conductivity type disposed on the light-emitting layer, having a different conductivity type from the first conductivity type. The insulating member is configured to direct light emitted from the light-emitting element in the normal direction of the light-emitting surface and towards the light-emitting surface side.

[0011] An image display device according to one embodiment of this invention includes: a plurality of transistors; a first wiring layer electrically connected to the plurality of transistors; an insulating film covering the plurality of transistors and the first wiring layer; a second wiring layer disposed on the insulating film; a first semiconductor layer disposed on the second wiring layer and having a first conductivity type; a light-emitting layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the light-emitting layer and having a second conductivity type different from the first conductivity type; an insulating member covering the first semiconductor layer and the light-emitting layer, and covering at least a portion of the second semiconductor layer, and having light transmittance; and a third wiring layer connected to light-transmitting electrodes disposed on a plurality of exposed surfaces of the second semiconductor layer, respectively exposed from the insulating member, corresponding to the plurality of transistors. The insulating member is configured to direct light emitted from the light-emitting layer toward the normal direction of each of the plurality of exposed surfaces and toward the sides of the plurality of exposed surfaces.

[0012] Invention Effects

[0013] According to one embodiment of the present invention, a method for manufacturing an image display device and an image display device can be realized that shortens the transfer process of the light-emitting element and improves the yield. Attached Figure Description

[0014] Figure 1 This is a schematic cross-sectional view illustrating a portion of the image display device according to the first embodiment.

[0015] Figure 2 This is a schematic cross-sectional view illustrating a portion of the image display device according to the first embodiment.

[0016] Figure 3A This is a schematic diagram illustrating the lens function of the insulating component in the first embodiment.

[0017] Figure 3B This is a schematic diagram illustrating the lens function of the insulating component in the first embodiment.

[0018] Figure 3C This is a schematic diagram illustrating the lens function of the insulating component in the first embodiment.

[0019] Figure 3D This is a schematic diagram illustrating the lens function of the insulating component in the first embodiment.

[0020] Figure 4 This is a schematic block diagram illustrating the image display device according to the first embodiment.

[0021] Figure 5A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0022] Figure 5B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0023] Figure 6A This is a schematic cross-sectional view illustrating a variation of the manufacturing method of the image display device according to the first embodiment.

[0024] Figure 6B This is a schematic cross-sectional view illustrating a variation of the manufacturing method of the image display device according to the first embodiment.

[0025] Figure 6C This is a schematic cross-sectional view illustrating a variation of the manufacturing method of the image display device according to the first embodiment.

[0026] Figure 7A This is a schematic cross-sectional view illustrating a variation of the manufacturing method of the image display device according to the first embodiment.

[0027] Figure 7B This is a schematic cross-sectional view illustrating a variation of the manufacturing method of the image display device according to the first embodiment.

[0028] Figure 8A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0029] Figure 8B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0030] Figure 8C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0031] Figure 9 This is a schematic perspective view illustrating a method for manufacturing an image display device according to the first embodiment.

[0032] Figure 10 This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0033] Figure 11A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0034] Figure 11B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0035] Figure 11C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0036] Figure 11D This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the first embodiment.

[0037] Figure 12 This is a schematic cross-sectional view illustrating a portion of the image display device according to the second embodiment.

[0038] Figure 13 This is a schematic block diagram illustrating the image display device according to the second embodiment.

[0039] Figure 14A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the second embodiment.

[0040] Figure 14B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the second embodiment.

[0041] Figure 15A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the second embodiment.

[0042] Figure 15B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the second embodiment.

[0043] Figure 15C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the second embodiment.

[0044] Figure 16 This is a schematic cross-sectional view illustrating a portion of the image display device according to the third embodiment.

[0045] Figure 17 This is a schematic cross-sectional view illustrating a portion of the image display device according to the third embodiment.

[0046] Figure 18A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the third embodiment.

[0047] Figure 18B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to the third embodiment.

[0048] Figure 19 This is a schematic cross-sectional view illustrating a portion of the image display device according to the fourth embodiment.

[0049] Figure 20A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0050] Figure 20B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0051] Figure 20C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0052] Figure 21A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0053] Figure 21B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0054] Figure 22A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0055] Figure 22B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0056] Figure 23A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0057] Figure 23B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0058] Figure 24 This is a schematic cross-sectional view of a portion of an image display device illustrating a variation of the fourth embodiment.

[0059] Figure 25A This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0060] Figure 25B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to a variation of the fourth embodiment.

[0061] Figure 26 This is a graph illustrating the characteristics of a pixel LED element.

[0062] Figure 27 This is a block diagram illustrating the image display device according to the fifth embodiment.

[0063] Figure 28 This is a block diagram illustrating a modified example of the fifth embodiment of an image display device.

[0064] Figure 29 This is a perspective view schematically illustrating the first to fourth embodiments and their variations. Detailed Implementation

[0065] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0066] Furthermore, the accompanying drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the sizes between parts, etc., may not be the same as in reality. In addition, even when showing the same part, there may be cases where the dimensions or ratios of each other are represented differently depending on the accompanying drawing.

[0067] In addition, in this application specification and the various drawings, elements that are the same as the above-mentioned content related to the already appeared figures are marked with the same symbols, and detailed descriptions are appropriately omitted.

[0068] (First Implementation)

[0069] Figure 1 This is a schematic cross-sectional view of a portion of an image display device illustrating an embodiment.

[0070] Figure 1 The structure of the sub-pixels 20 of the image display device according to this embodiment is schematically shown. The pixels constituting the image displayed in the image display device are composed of a plurality of sub-pixels 20.

[0071] The following explanation will sometimes use a three-dimensional coordinate system of XYZ. Subpixels 20 are arranged on a two-dimensional plane. The two-dimensional plane with subpixels 20 arranged is designated as the XY plane. Subpixels 20 are arranged along the X-axis and Y-axis.

[0072] Sub-pixel 20 has a light-emitting surface 151S that is approximately parallel to the XY plane. The light-emitting surface 151S primarily emits light in the positive direction of the Z-axis, which is orthogonal to the XY plane. Sometimes, the length along the positive direction of the Z-axis is referred to as the height.

[0073] Figure 1 This schematically illustrates the cross-section when sub-pixel 20 is cut off by a plane parallel to the XZ plane.

[0074] like Figure 1 As shown, the sub-pixel 20 of the image display device includes: a transistor 103, a first wiring layer 110, an interlayer insulating film 112, a second wiring layer 130, a light-emitting element 150, and an insulating member 156. In this embodiment, the insulating member 156 covering the light-emitting element 150 is transparent and has a surface protruding toward the light-emitting surface 151S.

[0075] Sub-pixel 20 also includes a color filter 180. The color filter (wavelength conversion component) 180 is disposed on the adhesive layer 170. The adhesive layer 170 is disposed on the light-emitting element 150, the insulating component 156, and the light-transmitting electrodes 159, 159a, and 159k.

[0076] Transistor 103 is formed on substrate 102. On substrate 102, in addition to transistor 103 for driving light-emitting element 150, other transistors and circuit elements such as capacitors are formed, and circuit 101 is constructed through wiring, etc. For example, transistor 103 and the following... Figure 4 Corresponding to the driving transistor 26 shown, the selection transistor 24 and capacitor 28 are also circuit elements. Hereinafter, circuit 101 includes a component forming region 104 on which circuit elements are formed, an insulating layer 105, a wiring layer 110, vias 111d and 111s connecting the wiring layer 110 and the circuit elements, and an insulating film 108 that provides insulation between circuit elements. Sometimes, it is referred to as circuit board 100, which includes other components such as substrate 102, circuit 101, and interlayer insulating film 112.

[0077] Transistor 103 includes a p-type semiconductor region 104b, n-type semiconductor regions 104s and 104d, and a gate 107. The gate 107 is disposed over the p-type semiconductor region 104b via an insulating layer 105. The insulating layer 105 is provided to insulate the device forming region 104 from the gate 107 and to sufficiently insulate adjacent other circuit elements. When a voltage is applied to the gate 107, a channel can be formed in the p-type semiconductor region 104b. Transistor 103 is an n-channel transistor, such as an n-channel MOSFET.

[0078] A device forming region 104 is disposed on a substrate 102. The substrate 102 is, for example, a Si substrate. The device forming region 104 includes a p-type semiconductor region 104b and n-type semiconductor regions 104s and 104d. The p-type semiconductor region 104b is disposed near the surface of the substrate 102. The n-type semiconductor regions 104s and 104d are disposed near the surface of the p-type semiconductor region 104b, isolated from each other, within the p-type semiconductor region 104b.

[0079] An insulating layer 105 is provided on the surface of the substrate 102. The insulating layer 105 also covers the device formation region 104, as well as the surfaces of the p-type semiconductor region 104b and the n-type semiconductor regions 104s and 104d. The insulating layer 105 is, for example, SiO2. Corresponding to the covered area, the insulating layer 105 may also be a multilayer insulating layer including SiO2 or Si3N4, etc. The insulating layer 105 may also contain a layer of insulating material with a high dielectric constant.

[0080] A gate 107 is disposed on the p-type semiconductor region 104b via the insulating layer 105. The gate 107 is disposed between the n-type semiconductor regions 104s and 104d. The gate 107 is, for example, polycrystalline Si. The gate 107 may also contain silicides or the like, which have lower resistance than polycrystalline Si.

[0081] In this example, the gate 107 and the insulating layer 105 are covered by an insulating film 108. The insulating film 108 is, for example, SiO2 or Si3N4. To planarize the surface during the formation of the wiring layer 110, an organic insulating film such as PSG (Phosphorus Silicon Glass) or BPSG (Boron Phosphorus Silicon Glass) may also be further provided.

[0082] Through-holes 111s and 111d are formed in the insulating film 108. A first wiring layer 110 is formed on the insulating film 108. The first wiring layer 110 includes multiple wirings with different potentials, including wirings 110s and 110d.

[0083] exist Figure 1 In subsequent cross-sectional views, the symbol for the wiring layer will be indicated at the lateral position of one wiring within the wiring layer to which the symbol should be added. Vias 111s and 111d are respectively disposed between wirings 110s and 110d in wiring layer 110 and n-type semiconductor regions 104s and 104d, electrically connecting them. Wiring layer 110 and vias 111s and 111d are formed, for example, of a metal such as Al or Cu. Wiring layer 110 and vias 111s and 111d may also contain high-melting-point metals, etc.

[0084] An interlayer insulating film 112 is further disposed on the insulating film 108 and the wiring layer 110 as a planarization film. The interlayer insulating film (insulating film) 112 is, for example, an organic insulating film such as PSG or BPSG. The interlayer insulating film 112 also functions as a protective film protecting the surface of the circuit board 100.

[0085] A second wiring layer 130 is disposed on the interlayer insulating film 112. The wiring layer 130 includes a first wiring 130a. The first wiring (wiring portion) 130a is provided, for example, per sub-pixel, and in this example, is connected together with a light-transmitting electrode 159a disposed on the first wiring 130a to the [described later] [structure / component]. Figure 4 The power line 3 is shown. The light-emitting element 150 is disposed on the first wiring 130a.

[0086] The wiring layer 130, which includes the first wiring 130a, is formed of a material with high electrical conductivity. The wiring layer 130 may contain, for example, an alloy of Ti, Al, Ti, and Sn. It may also contain noble metals with high light reflectivity, such as Cu or V, or Ag or Pt. Because the wiring layer 130 is formed of such a high-conductivity metallic material, it is possible to electrically connect the light-emitting element 150 and the circuit 101 with low resistance.

[0087] The outer periphery of the first wiring 130a is included in the outer periphery when the light-emitting element 150 is projected from above the Z-axis in the XY plane. Thus, the first wiring 130a can reflect the light scattered below the light-emitting element 150 toward the light-emitting surface 151S, thereby blocking the scattered light.

[0088] By appropriately selecting the material of the first wiring 130a, the scattered light directed downwards towards the light-emitting surface 151S can be reflected towards the light-emitting surface, thereby improving the luminous efficiency. In addition, by blocking the scattered light directed downwards towards the light-emitting element 150 with the first wiring 130a, the light reaching the transistor 103 can be suppressed, and malfunction of the transistor 103 can be prevented.

[0089] The light-emitting element 150 includes a p-type semiconductor layer (first semiconductor layer) 153, a light-emitting layer 152, and an n-type semiconductor layer (second semiconductor layer) 151. The p-type semiconductor layer 153, the light-emitting layer 152, and the n-type semiconductor layer 151 are stacked sequentially from the interlayer insulating film 112 toward the positive Z-axis. That is, each layer of the light-emitting element 150 is stacked from the interlayer insulating film 112 side toward the light-emitting surface 151S side.

[0090] The light-emitting element 150 has, for example, a roughly square or rectangular shape when viewed in the XY plane, but the corners may also be rounded. The light-emitting element 150 may also have, for example, an elliptical or circular shape when viewed in the XY plane. By appropriately selecting the shape and arrangement of the light-emitting elements in planar view, the degree of freedom in layout can be increased.

[0091] The light-emitting element 150 preferably uses, for example, In X Al Y Ga 1－X－YN-type (0≤X, 0≤Y, X+Y<1) and other nitride semiconductors. In one embodiment of the present invention, the light-emitting element 150 is a so-called blue light-emitting diode, and the wavelength of the light emitted by the light-emitting element 150 is, for example, about 467nm ± 20nm. The wavelength of the light emitted by the light-emitting element 150 can also be blue-violet light of about 410nm ± 20nm. The wavelength of the light emitted by the light-emitting element 150 is not limited to the above values ​​and can be any appropriate wavelength.

[0092] The insulating component 156 covers a portion of the interlayer insulating film 112, a portion of the second wiring layer 130, and at least one side of the light-emitting element 150. The insulating component 156 is formed, for example, of a light-transmitting organic insulating material. The insulating component 156 is preferably transparent. The insulating component 156 has a sufficiently large refractive index compared to the refractive index of the adhesive layer 170 covering the insulating component 156.

[0093] Materials used for the insulating component 156 include, for example, polymeric materials having sulfur (S) substituents or phosphorus (P) atom groups, and high-refractive-index nanocomposites incorporating high-refractive-index inorganic nanoparticles into a polymer matrix such as polyimide, but are not limited to these. Additionally, materials used for the adhesive layer 170 include, for example, known organic materials that disperse hollow or porous nanoparticles, but are not limited to these, and can also be used to create spaces near the insulating component 156.

[0094] The insulating member 156 has a convex surface that protrudes toward the light-emitting surface 151S. The insulating member 156 functions as a convex lens that distributes light emitted from the side of the light-emitting element 150 toward the light-emitting surface 151S.

[0095] Figure 2 This is a schematic cross-sectional view illustrating a portion of the image display device of this embodiment.

[0096] Figure 2 This is a schematic diagram illustrating the function of the insulating component 156. Figure 2 The details are shown in Figure 1 The positional relationship of the first wiring 130a, the light-emitting element 150 and the insulating component 156 in the cross-sectional view.

[0097] like Figure 2 As shown, the light-emitting element 150 is stacked in the positive direction of the Z-axis, in the order of p-type semiconductor layer 153, light-emitting layer 152, and n-type semiconductor layer 151. The p-type semiconductor layer 153 is placed on the first surface 131a of the first wiring 130a. Here, the first surface 131a is a plane that is substantially parallel to the XY plane. The light-emitting surface 151S is arranged to protrude from the opening 158 of the insulating member 156 and is substantially parallel to the first surface 131a.

[0098] The insulating component 156 covers the side of the light-emitting element 150. The insulating component 156 has a surface 157a that protrudes from the first wiring 130a side toward the light-emitting surface 151S side.

[0099] The light-emitting layer 152 is exposed from the side of the light-emitting element 150. The light-emitting layer 152, excited by injected electrons and holes, also emits light from the side. The light emitted from the side of the light-emitting layer 152 includes radiated light having a component parallel to the XY plane. The radiated light having a component parallel to the XY plane is emitted from surface 157a. The shape of surface 157a can be set in such a way that the radiated light emitted from surface 157a of the insulating member 156 is directed to the light-emitting surface 151S side.

[0100] Preferably, the height H1 (first height) of the insulating member 156 is set at a position sufficiently higher than the height H2 (second height) of the surface 152a1 (second surface) of the light-emitting layer 152. With this setting, emitted light having a component parallel to the XY plane is distributed to the light-emitting surface 151S side. Height H1 is the height from the first surface 131a to the highest position of the insulating member 156. The surface 152a1 of the light-emitting layer 152 in height H2 is the surface on the side where the n-type semiconductor layer 151 is provided.

[0101] Figures 3A to 3D This is a schematic diagram illustrating the lens function of the insulating component in this embodiment.

[0102] Figures 3A to 3D The details of the positional relationship between the light-emitting layer 152 and surface 157a are shown. In this case, surface 157a is part of a sphere. C1 to C4 represent the centers of the sphere formed by surface 157a. Figures 3A-3C In the example, centers C1 to C3 are located at half the length of the light-emitting layer 152 along the Z-axis. That is, centers C1 to C3 are located at half the distance between one side 152a1 and the other side 152a2 of the light-emitting layer 152. Figure 3D In the example, the center C4 is located at a position offset to the negative Z-axis direction from a position that is half the length of the light-emitting layer 152 in the Z-axis direction.

[0103] The light-emitting layer 152 has an end portion 152a3, which is included on the side surface of the light-emitting layer 152. In addition, one side 152a1 is the side on which an n-type semiconductor layer 151 is stacked, and the other side 152a2 is the side on which a p-type semiconductor layer 153 is stacked.

[0104] In XY plane observation, the luminescent layer 152 is a square with sides parallel to the X-axis and Y-axis respectively. Centers C1 to C4 are located on a straight line parallel to the X-axis, passing through half the distance of the side of the luminescent layer 152 parallel to the Y-axis. Furthermore, the refractive index of the inner side of surface 157a is greater than the refractive index of the outer side of surface 157a.

[0105] like Figure 3A As shown, when the center C1 is located inside the light-emitting layer 152 and at half the length of the light-emitting layer 152 in the Z-axis direction, light other than the light parallel to the X-axis in the light emitted from the end 152a3 is refracted in the direction from the surface 157a toward the light-emitting surface.

[0106] like Figure 3B As shown, when the center C2 is located at the end 152a3 of the light-emitting layer 152 and at half the length of the light-emitting layer 152 in the Z-axis direction, almost all the light emitted from the end 152a3 is incident on the surface 157a at approximately 90°, so there is almost no refraction, and the emitted light from the end 152a3 is emitted from the surface 157a with the angle remaining unchanged.

[0107] like Figure 3C As shown, when the center C3 is located outside the light-emitting layer 152 and at half the length of the light-emitting layer 152 in the Z-axis direction, light emitted from the end 152a3 other than the light parallel to the Y-axis is refracted in a direction orthogonal to the light-emitting surface on surface 157a. Therefore, light distributed towards the light-emitting surface can be suppressed.

[0108] like Figure 3D As shown, when the center C4 is located on a line parallel to the Z-axis of the end 152a3 of the light-emitting layer 152, and at a position offset in the negative direction of the Z-axis from the center of the light-emitting layer 152, light other than light parallel to the Y-axis is refracted in a direction orthogonal to the light-emitting surface on surface 157a. Therefore, light distributed towards the light-emitting surface can be suppressed.

[0109] The above is an example of how the shape of the surface 157a of the insulating member 156 can be appropriately set so that the light emitted from the side of the light-emitting layer 152 is distributed in a direction perpendicular to the normal to the light-emitting surface 151S. In addition, by appropriately selecting the material of the insulating member 156 and the material of the adhesive layer 170 covering the insulating member 156 to set the refractive index, the insulating member 156 can be used as a more suitable light distribution control unit.

[0110] return Figure 1 Let me continue explaining.

[0111] The insulating member 156 has an opening 158. The opening 158 is formed by removing a portion of the insulating member 156 above the light-emitting element 150. The opening 158 is formed to expose the light-emitting surface 151S from the insulating member 156. The light-emitting surface 151S is the surface opposite to the surface of the n-type semiconductor layer 151 that is in contact with the light-emitting layer 152.

[0112] The light-emitting surface 151S is preferably roughened. When the light-emitting surface 151S is roughened, the light extraction efficiency of the light-emitting element 150 can be improved. If the light-emitting surface 151S is not roughened, the roughening process can be omitted.

[0113] An opening 113 is provided in the interlayer insulating film 112. A portion of the surface of the wiring 110d, which is connected to the drain electrode of the transistor 103, is exposed through the opening 113. The opening 113 is formed in the interlayer insulating film 112 for electrically connecting the first semiconductor layer 151 and the wiring 110d.

[0114] A transparent electrode 159k is disposed throughout the roughened light-emitting surface 151S and is electrically connected to the n-type semiconductor layer 151. The transparent electrode 159k extends onto the exposed surfaces of the insulating component 156, the wiring 110d, and the interlayer insulating film 112. Therefore, the n-type semiconductor layer 151 and the wiring 110d are electrically connected through the transparent electrode 159k.

[0115] A light-transmitting electrode 159a is disposed on and electrically connected to the first wiring 130a. In this example, as described later... Figure 4 As shown, the transparent electrode 159a and the first wiring 130a are connected to the power line 3. Therefore, the p-type semiconductor layer 153 is electrically connected to the power line 3 through the transparent electrode 159a and the first wiring 130a.

[0116] Transparent electrodes 159 are also provided on other wirings of the second wiring layer 130. Transparent electrodes 159, 159a, and 159k (third wiring layer) are formed of a transparent conductive film such as ITO (indium tin oxide).

[0117] The adhesive layer 170 covers the insulating component 156, the light-transmitting electrodes 159, 159a, 159k, and the interlayer insulating film 112. The adhesive layer 170 is a generally transparent resin adhesive and is provided to protect the insulating component 156 and the light-transmitting electrodes 159, 159a, 159k, etc., and to bond the color filter 180.

[0118] The color filter 180 includes a light-blocking part 181 and a color-changing part 182. The color-changing part 182 is provided approximately directly above the insulating member 156, which is formed in the shape of a convex lens, and corresponds to the light distribution shape of the insulating member 156 when viewed in the XY plane.

[0119] The color conversion unit 182 has one or two layers. Figure 1 This indicates a two-layer section. Whether it's a one-layer or two-layer section is determined by the color, or wavelength, of the light emitted by the sub-pixel 20. When the emitted light color of the sub-pixel 20 is red or green, the color conversion unit 182 is preferably two-layered. When the emitted light color of the sub-pixel 20 is blue, a one-layer section is preferred.

[0120] In the case where the color conversion unit 182 has two layers, the first layer closer to the light-emitting element 150 is the color conversion layer 183, and the second layer is the filter layer 184. That is, the filter layer 184 is stacked on the color conversion layer 183.

[0121] The color conversion layer 183 is a layer that converts the wavelength of light emitted by the light-emitting element 150 to a desired wavelength. In the case of the sub-pixel 20 emitting red light, the light with a wavelength of 467nm ± 20nm emitted by the light-emitting element 150 is converted to light with a wavelength of approximately 630nm ± 20nm. In the case of the sub-pixel 20 emitting green light, the light with a wavelength of 467nm ± 20nm emitted by the light-emitting element 150 is converted to light with a wavelength of approximately 532nm ± 20nm.

[0122] The filter layer 184 blocks the wavelength components of blue light that remain after the color has not been changed by the color conversion layer 183.

[0123] When the light emitted by sub-pixel 20 is blue, sub-pixel 20 can output light via color conversion layer 183 or directly without color conversion layer 183. When the wavelength of the light emitted by light-emitting element 150 is approximately 467nm ± 20nm, sub-pixel 20 can output light without color conversion layer 183. When the wavelength of the light emitted by light-emitting element 150 is set to 410nm ± 20nm, in order to convert the wavelength of the output light to approximately 467nm ± 20nm, it is preferable to provide one color conversion layer 183.

[0124] In the case of the blue sub-pixel 20, the sub-pixel 20 may also have a filter layer 184. By providing a filter layer 184 on the blue sub-pixel 20, it is possible to suppress minute external light reflections generated on the surface of the light-emitting element 150.

[0125] In the color filter 180, the part other than the color conversion unit 182 is the light-shielding unit 181. The light-shielding unit 181 is a so-called black matrix, which can reduce color bleeding caused by color mixing and other factors from the light emitted from the adjacent color conversion unit 182, so as to display a clear image.

[0126] Figure 4 This is a schematic block diagram illustrating the image display device of this embodiment.

[0127] like Figure 4 As shown, the image display device 1 of this embodiment includes a display area 2. Subpixels 20 are arranged in the display area 2. The subpixels 20 are arranged in a grid pattern, for example. For example, n subpixels 20 are arranged along the X-axis and m subpixels are arranged along the Y-axis.

[0128] Pixel 10 contains multiple sub-pixels 20 that emit light of different colors. Sub-pixel 20R emits red light. Sub-pixel 20G emits green light. Sub-pixel 20B emits blue light. The emission color and brightness of a single pixel 10 are determined by the emission of three sub-pixels 20R, 20G, and 20B at the desired brightness.

[0129] Each pixel 10 contains three subpixels 20R, 20G, and 20B. These subpixels 20R, 20G, and 20B are arranged in a straight line along the X-axis, as shown in this example. Each pixel 10 can arrange subpixels of the same color in the same column, or, as in this example, arrange subpixels of different colors in each column.

[0130] The image display device 1 also includes a power line 3 and a ground line 4. The power line 3 and ground line 4 are wired in a grid pattern along the arrangement of the sub-pixels 20. The power line 3 and ground line 4 are electrically connected to each sub-pixel 20, supplying power to each sub-pixel 20 from a DC power supply connected between a power terminal 3a and a GND terminal 4a. The power terminal 3a and GND terminal 4a are respectively located at the ends of the power line 3 and ground line 4, and are connected to a DC power supply circuit located outside the display area 2. The power terminal 3a is supplied with a positive voltage with reference to the GND terminal 4a.

[0131] The image display device 1 also includes scan lines 6 and signal lines 8. The scan lines 6 are routed in a direction parallel to the X-axis. That is, the scan lines 6 are routed along the row direction of the sub-pixels 20. The signal lines 8 are routed in a direction parallel to the Y-axis. That is, the signal lines 8 are routed along the column direction of the sub-pixels 20.

[0132] The image display device 1 also includes a row selection circuit 5 and a signal voltage output circuit 7. The row selection circuit 5 and the signal voltage output circuit 7 are arranged along the outer edge of the display area 2. The row selection circuit 5 is arranged along the Y-axis direction of the outer edge of the display area 2. The row selection circuit 5 is electrically connected to the sub-pixels 20 of each column via scan lines 6 and supplies selection signals to each sub-pixel 20.

[0133] The signal voltage output circuit 7 is disposed along the outer edge of the display area 2. The signal voltage output circuit 7 is disposed along the X-axis direction of the outer edge of the display area 2. The signal voltage output circuit 7 is electrically connected to the sub-pixels 20 of each row via the signal line 8, and supplies signal voltage to each sub-pixel 20.

[0134] Subpixel 20 includes a light-emitting element 22, a selection transistor 24, a driving transistor 26, and a capacitor 28. Figure 4 In the diagram, transistor 24 is designated as T1, transistor 26 as T2, and capacitor 28 as Cm.

[0135] The light-emitting element 22 is connected in series with the driving transistor 26. In this embodiment, the driving transistor 26 is an n-channel MOSFET, and the n-electrode (cathode) of the light-emitting element 22 is connected to the main electrode (drain) of the driving transistor 26. The series circuit of the light-emitting element 22 and the driving transistor 26 is connected between the power supply line 3 and the ground line 4. The driving transistor 26 corresponds to... Figure 1 In the transistor 103, the light-emitting element 22 corresponds to Figure 1 The light-emitting element 150 is in the form of a light-emitting element 22. The current flowing through the light-emitting element 22 is determined by the voltage applied between the gate and source of the driving transistor 26, and the light-emitting element 22 emits light with a brightness corresponding to the current flowing through it.

[0136] Select transistor 24 is connected via the main electrode between the gate electrode of drive transistor 26 and signal line 8. The gate electrode of select transistor 24 is connected to scan line 6. A capacitor 28 is connected between the gate electrode of drive transistor 26 and ground line 4.

[0137] The row selection circuit 5 selects one row from the arrangement of m rows of sub-pixels 20 and supplies a selection signal to the scan line 6. The signal voltage output circuit 7 supplies a signal voltage with the necessary analog voltage value to each sub-pixel 20 of the selected row. The signal voltage is applied between the gate and source of the driving transistor 26 of the sub-pixel 20 in the selected row. The signal voltage is held by the capacitor 28. The driving transistor 26 causes a current corresponding to the signal voltage to flow through the light-emitting element 22. The light-emitting element 22 emits light with a brightness corresponding to the current flowing through it.

[0138] The row selection circuit 5 sequentially switches the selected row to supply the selection signal. That is, the row selection circuit 5 scans the rows arranged with sub-pixels 20. The light-emitting elements 22 of the sequentially scanned sub-pixels 20 emit light by a current corresponding to the signal voltage. Each pixel 10 emits light with a color and brightness determined by the light emitted by the sub-pixels 20 of each of the RGB colors, thereby displaying an image in the display area 2.

[0139] The manufacturing method of the image display device 1 of this embodiment will be described.

[0140] Figures 5A to 8C This is a schematic cross-sectional view illustrating the manufacturing method of the image display device according to this embodiment and its variations.

[0141] like Figure 5AAs shown, in the manufacturing method of the image display device of this embodiment, a semiconductor growth substrate (second substrate) 1194 is prepared. The semiconductor growth substrate 1194 has a semiconductor layer 1150 grown on a crystal growth substrate (first substrate) 1001. The crystal growth substrate 1001 is, for example, a Si substrate or a sapphire substrate. A Si substrate is preferred.

[0142] In this example, a buffer layer 1140 is formed on one side of the crystal growth substrate 1001. The buffer layer 1140 is preferably a nitride such as AlN. The buffer layer 1140 is used to mitigate the interface mismatch between the GaN crystallization and the crystal growth substrate 1001 during GaN epitaxial growth.

[0143] In the semiconductor growth substrate 1194, an n-type semiconductor layer 1151, a light-emitting layer 1152, and a p-type semiconductor layer 1153 are sequentially stacked on the buffer layer 1140 side. In the growth of the semiconductor layer 1150, for example, a chemical vapor deposition (CVD) method is used, preferably a metal-organic chemical vapor deposition (MOCVD) method. The semiconductor layer 1150 is, for example, In... X Al Y Ga 1－X－Y N(0≤X, 0≤Y, X+Y<1), etc.

[0144] In the early stages of crystal growth, crystal defects caused by lattice constant mismatch are easily generated, resulting in an n-type crystal. Therefore, as in this example, when an n-type semiconductor layer 1151 is stacked on a crystal growth substrate 1001, it has the advantage of easily increasing the manufacturing process allowance and improving the yield.

[0145] A metal layer 1130 is formed on the side of the p-type semiconductor layer 1153 opposite to the side where the light-emitting layer 1152 is disposed. The metal layer 1130 may contain, for example, an alloy of Ti, Al, Ti and Sn. It may also contain noble metals with high light reflectivity such as Cu or V, or Ag or Pt.

[0146] When a metal layer 1130 is formed on the surface of the p-type semiconductor layer 1153, the p-type semiconductor layer 1153 can be protected by the metal layer 1130, resulting in the advantage of easier storage of the semiconductor growth substrate 1194. By forming a thin film layer using a hole-injection-compatible material at the interface between the p-type semiconductor layer 1153 and the metal layer 1130, the driving voltage of the light-emitting element 150 can be further reduced. For example, an ITO film is preferably used as such a hole-injection-compatible material.

[0147] like Figure 5B As shown, a circuit board 1100 is prepared. The circuit board (third board) 1100 is included in... Figure 1 The circuit 101 described herein. The semiconductor growth substrate 1194 is flipped upside down and bonded to the circuit substrate 1100. More specifically, as shown by the arrows in the figure, the exposed surface of the interlayer insulating film 112 formed on the circuit substrate 1100 is aligned with the surface of the metal layer 1130 formed on the semiconductor layer 1150, and the two are bonded together. Then, the crystal growth substrate 1001 is removed. To remove the crystal growth substrate 1001, for example, wet etching or laser lift-off is used.

[0148] In wafer bonding that bonds two substrates, for example, the two substrates are heated and bonded by thermo-pressing. Low-melting-point metals or low-melting-point alloys can also be used during thermo-pressing. Low-melting-point metals can be, for example, Sn or In, and low-melting-point alloys can be, for example, alloys with Zn or In, Ga, Sn, Bi, etc., as their main components.

[0149] In wafer bonding, in addition to the above, chemical mechanical polishing (CMP) can be used to planarize the bonding surfaces of each substrate, and then plasma treatment in a vacuum can be used to clean the bonding surfaces and achieve a tight bond.

[0150] exist Figures 6A to 7B The diagram illustrates variations related to the wafer bonding process. In the wafer bonding process, the following can be used: Figures 6A to 6C Replace the process Figure 5A and Figure 5B The process. Alternatively, it can also be done by... Figure 7A or Figure 7B Replace any one of the processes Figure 5A and Figure 5B The process.

[0151] exist Figures 6A to 6CIn this process, after forming a semiconductor layer 1150 on a crystal growth substrate 1001, the semiconductor layer 1150 is transferred to a support substrate 1190, which is different from the crystal growth substrate 1001. The semiconductor layer 1150 is grown on the crystal growth substrate 1001 via a buffer layer 1140, from the crystal growth substrate 1001 side in the order of p-type semiconductor layer 1153, light-emitting layer 1152, and n-type semiconductor layer 1151.

[0152] like Figure 6A As shown, after forming the semiconductor layer 1150, a support substrate 1190 is bonded to the open surface of the n-type semiconductor layer 1151, opposite to the side where the light-emitting layer 1152 is disposed. The support substrate 1190 is formed, for example, from Si or quartz. Then, the crystal growth substrate 1001 is removed. To remove the crystal growth substrate 1001, laser lift-off is used, for example.

[0153] like Figure 6B As shown, the buffer layer 1140 is removed by wet etching or the like. A metal layer 1130 is formed on the surface of the p-type semiconductor layer 1153, which is exposed after the buffer layer 1140 has been removed.

[0154] like Figure 6C As shown, the semiconductor layer 1150 is bonded to the circuit board 1100 via the metal layer 1130. Then, the support substrate 1190 is removed by laser lift-off or similar means.

[0155] In another variation, such as Figure 5A As shown, a semiconductor growth substrate 1194 with a metal layer 1130 is prepared to be formed.

[0156] like Figure 7A As shown, a metal layer 1120 is pre-formed on the interlayer insulating film 112 of the circuit substrate 1100. The metal layer 1120 preferably contains the same metal material as the metal layer 1130 disposed on the semiconductor growth substrate 1194. The metal layer 1130 formed on the semiconductor layer 1150 and the metal layer 1120 formed on the circuit substrate 1100 are bonded together.

[0157] The metal layer can be provided on at least one of the semiconductor growth substrate 1194 or the circuit substrate 1100. When the metal layer 1120 is formed on the circuit substrate 1100 side, the metal layer 1130 may not be provided on the semiconductor growth substrate 1194, and the semiconductor layer 1150 and the circuit substrate 1100 may be bonded to each other through the metal layer 1120.

[0158] In another variation, such as Figure 7BAs shown, a semiconductor layer 1150 is formed on a crystal growth substrate 1001 without a buffer layer. An n-type semiconductor layer 1151, a light-emitting layer 1152, and a p-type semiconductor layer 1153 are sequentially grown on the crystal growth substrate 1001 from the side of the crystal growth substrate 1001. In this case, the process of removing the buffer layer after wafer bonding can be omitted.

[0159] Let's return to the manufacturing process after wafer bonding and continue the explanation.

[0160] like Figure 8A As shown, after the circuit board 1100 is bonded to the metal layer 1130 and the semiconductor layer 1150 by wafer bonding, the crystal growth substrate 1001 is removed by wet etching or laser lift-off.

[0161] like Figure 8B As shown, after the buffer layer 1140 is removed by wet etching, dry etching, etc., the metal layer 1130 and the semiconductor layer 1150 are shaped into the desired shape by etching.

[0162] The semiconductor layer 1150 is shaped into the form of the light-emitting element 150. The light-emitting element 150 is formed, for example, using a dry etching process, preferably using anisotropic plasma etching (RIE). Then, the metal layer 1130 is etched to form a second wiring layer 130. The wiring layer 130 includes a first wiring 130a. The first wiring 130a is shaped into the desired shape described above by etching.

[0163] like Figure 8C As shown, an opening 113 is formed in the interlayer insulating film 112. The opening 113 can be formed by wet etching or dry etching. The etching continues until the wiring 110d is exposed.

[0164] Next, an insulating member 156 is provided to cover a portion of the interlayer insulating film 112, a portion of the first wiring 130a, and the light-emitting element 150. The insulating member 156 is formed with a dome-shaped shape protruding from the first wiring 130a toward the light-emitting surface 151S. In XY plane view, a portion of the insulating member 156 at the location of the light-emitting element 150 is removed. The light-emitting surface 151S is exposed from the opening 158 where the insulating member 156 has been removed.

[0165] A light-transmitting electrode 159k is formed on the light-emitting surface 151S where the insulating member 156 has been removed. The light-transmitting electrode 159k is formed as a wiring 110d that extends over the insulating member 156 and protrudes from the opening 113. Simultaneously with the formation of the light-transmitting electrode 159k, a light-transmitting electrode 159a is formed on the first wiring 130a. Furthermore, light-transmitting electrodes 159 are also provided on other wirings.

[0166] A portion of the circuitry other than sub-pixel 20 is formed in the circuit board 1100. For example, Figure 4 The row selection circuit 5 shown can be formed in the circuit board 1100 together with the drive transistor, selection transistor, etc. That is, the row selection circuit 5 is sometimes assembled simultaneously through the manufacturing processes described above. On the other hand, the signal voltage output circuit 7 is preferably assembled in a semiconductor device manufactured using a highly integrated manufacturing process capable of microfabrication. The signal voltage output circuit 7 is mounted on another substrate together with the CPU and other circuit elements, and is interconnected with the wiring of the circuit board 1100, for example, before or after the assembly of the color filter described later.

[0167] Preferably, the circuit board 1100 is a chip containing the circuit 101. The circuit 101 for one or more image display devices is formed on the circuit board 1100. Alternatively, in cases where the screen size is larger, the circuit 101 for constituting an image display device may be divided into multiple circuit boards 1100, and all the divided circuits may be combined to constitute an image display device.

[0168] In addition, the preferred crystal growth substrate 1001 is a wafer of the same size as the wafer-shaped circuit board 1100.

[0169] Figure 9 This is a perspective view illustrating a method for manufacturing an image display device according to this embodiment.

[0170] like Figure 9 As shown, multiple semiconductor growth substrates 1194 can be prepared, and semiconductor layers 1150 formed on multiple crystal growth substrates 1001 can be bonded onto a circuit substrate 1100. A metal layer 1130 is formed on the semiconductor layer 1150 of the semiconductor growth substrate 1194. Alternatively, a metal layer 1120 can be formed on the interlayer insulating film 112 of the circuit substrate 1100. The bonding of the semiconductor growth substrate 1194 to the circuit substrate 1100 (100) has been described previously. Figure 5A and Figure 7A The relevant explanations were provided.

[0171] Multiple circuits 101 are arranged in a grid pattern on the circuit board 1100, for example. Each circuit 101 contains all the sub-pixels 20 and the like required for an image display device 1. A spacing of about the width of a scribbled line is provided between adjacent circuits 101. No circuit elements are arranged at or near the ends of the circuits 101.

[0172] The semiconductor layer 1150 is formed such that its ends coincide with the ends of the crystal growth substrate 1001. Therefore, by arranging and bonding the ends of the semiconductor growth substrate 1194 in a manner that coincides with the ends of the circuit 101, the ends of the bonded semiconductor layer 1150 can be made to coincide with the ends of the circuit 101.

[0173] When growing a semiconductor layer 1150 on a crystal growth substrate 1001, the crystal quality is easily reduced at and near the ends of the semiconductor layer 1150. Therefore, by aligning the ends of the semiconductor layer 1150 with the ends of the circuit 101, the area near the ends of the semiconductor layer 1150 on the semiconductor growth substrate 1194 where the crystal quality is easily reduced can be prevented from being used as the display area of ​​the image display device 1.

[0174] Alternatively, multiple circuit boards 1100 may be prepared and bonded to a semiconductor layer 1150 formed on a crystal growth substrate 1001 of a semiconductor growth substrate 1194. Alternatively, at least here, it is important that the ends of the crystal growth substrate 1001 do not overlap with the light-emitting element 22 (150) of the image display device 1.

[0175] Figure 10 This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to this embodiment.

[0176] In addition, Figure 10 To avoid complexity, the structure within the circuit board 1100, the interlayer insulating film 112, and the light-transmitting electrodes 159, 159a, and 159k are omitted from the description. Additionally, in Figure 10 The image shows a portion of color conversion components, such as color filter 180. Figure 10 In this context, the structure comprising the wiring layer 130, the light-emitting element 150, the adhesive layer 170, and the light-transmitting electrodes 159, 159k, and 159a (not shown in the diagram) is referred to as the light-emitting circuit section 172. Furthermore, the structure on which the light-emitting circuit section 172 is provided on the circuit board 1100 is referred to as structure 1192.

[0177] like Figure 10 As shown, one side of the color filter (wavelength conversion component) 180 is bonded to structure 1192. The other side of the color filter 180 is bonded to glass substrate 186. The color filter 180 is bonded to the light-emitting circuit section 172 via adhesive layer 170.

[0178] In this example, the color filter 180 has color conversion sections arranged in the positive X-axis direction in the order of red, green, and blue. For red, a red color conversion layer 183R is provided as the first layer. For green, a green color conversion layer 183G is provided as the first layer, and filter layers 184 are provided as the second layer for each. For blue, a single color conversion layer 183B or a filter layer 184 can be provided. A light-blocking section 181 is provided between each color conversion section.

[0179] Make the positions of the color conversion layers 183R, 183G, and 183B correspond to the positions of the light-emitting elements 150, and then attach the color filter 180 to the structure 1192.

[0180] Figures 11A to 11D This is a schematic cross-sectional view illustrating a modified example of the manufacturing method of the image display device according to this embodiment.

[0181] Figures 11A to 11D This describes a method for forming color filters using inkjet printing.

[0182] like Figure 11A As shown, a structure 1192 with a light-emitting circuit section 172 is prepared to be attached to a circuit board 1100.

[0183] like Figure 11B As shown, a light-shielding portion 181 is formed on the structure 1192. The light-shielding portion 181 is formed, for example, using screen printing or photolithography.

[0184] like Figure 11C As shown, a phosphor corresponding to the emitted color is ejected from an inkjet nozzle to form a color conversion layer 183. The phosphor colors the areas where the light-shielding portion 181 is not formed. The phosphor uses a fluorescent paint that uses, for example, a general phosphor material or a quantum dot phosphor material. When using a quantum dot phosphor material, it is possible to achieve various emitted colors, and the monochromaticity is high, which improves color reproducibility, and is therefore preferred. After being drawn using an inkjet nozzle, it is dried at an appropriate temperature and time. The thickness of the coating film during coloring is set to be thinner than the thickness of the light-shielding portion 181.

[0185] As already explained, for blue emitting subpixels, phosphors are not emitted without forming a color conversion section. Furthermore, for blue emitting subpixels, when forming a blue color conversion layer, if the color conversion section can be a single layer, it is preferable that the thickness of the blue phosphor coating is the same as the thickness of the light-shielding section 181.

[0186] like Figure 11DAs shown, the paint for the filter layer 184 is ejected from the inkjet nozzle. The paint is overlapped onto the phosphor coating. The combined thickness of the phosphor and paint coatings is the same as the thickness of the light-shielding portion 181.

[0187] In this way, it is possible to manufacture the image display device 1.

[0188] The effects of the image display device 1 in this embodiment will be explained.

[0189] In the manufacturing method of the image display device 1 of this embodiment, a semiconductor layer 1150, including a light-emitting layer 1152 for forming the light-emitting element 150, is bonded to a circuit board 1100 (100) that includes circuit elements such as a transistor 103 for driving the light-emitting element 150. Then, the semiconductor layer 1150 is etched to form the light-emitting element 150. Therefore, compared with the case where monolithic light-emitting elements are individually transferred onto the circuit board 1100 (100), the process of transferring the light-emitting elements can be significantly shortened.

[0190] For example, in a 4K image display device, the number of subpixels exceeds 24 million, and in an 8K image display device, the number exceeds 99 million. Mounting such a large number of light-emitting elements onto a circuit board requires a significant amount of time, making it difficult to implement micro-LED-based image display devices at a realistic cost. Furthermore, mounting a large number of light-emitting elements individually leads to reduced yield rates due to poor connections during installation, inevitably further increasing costs.

[0191] In contrast, in the manufacturing method of the image display device 1 in this embodiment, since the semiconductor layer 1150 is bonded to the circuit board 1100 (100) as a whole before the semiconductor layer 1150 is monolithically formed, the transfer process is completed in one step.

[0192] After the light-emitting element is directly formed on the circuit board by etching or the like, the light-emitting element is electrically connected to the circuit element in the circuit board 1100 (100) by forming light-transmitting electrodes 159k and 159a. Therefore, a uniform connection structure can be achieved, and the reduction in yield can be suppressed.

[0193] Furthermore, since the semiconductor layer 1150 is not pre-monopolized or electrodes are formed at the positions corresponding to the circuit elements, but is bonded to the circuit substrate 1100 (100) at the wafer level, alignment is not required. Therefore, the bonding process can be easily performed in a short time. Since alignment is not required during bonding, miniaturization of the light-emitting element 150 is also easy, making it suitable for high-resolution displays.

[0194] In this embodiment, when bonding the semiconductor layer 1150 wafer to the circuit substrate 1100, a metal layer 1130 or 1120 is pre-formed on at least one of the bonding surfaces of the semiconductor layer 1150 and the circuit substrate 1100. Therefore, by appropriately selecting the material of the metal layer, wafer bonding can be easily performed.

[0195] The metal layer formed during wafer bonding serves as the second wiring layer 130 and can be used for connections between the light-emitting element 150 and the outside world.

[0196] The insulating member 156 has a convex surface extending from the wiring layer 130 toward the light-emitting surface 151S. Therefore, by appropriately setting the convex surface of the insulating member 156, light emitted from the light-emitting layer 152 that has a component parallel to the light-emitting surface 151S can have a normal component perpendicular to the light-emitting surface 151S, and the light can be distributed toward the light-emitting surface 151S, thereby substantially improving the luminous efficiency.

[0197] The wiring layer 130 may include a first wiring 130a, and the first wiring 130a may be a light-reflective material. By making the first wiring 130a light-reflective, it is possible to reflect downward light emitted from the light-emitting element 150 and reflect it again to the light-emitting surface 151S side, thereby improving the luminous efficiency.

[0198] The first wiring 130a can block downward light emitted from the light-emitting element 150, thus preventing circuit elements such as transistor 103 from malfunctioning due to unwanted light scattering from the light-emitting element 150.

[0199] (Second Implementation)

[0200] Figure 12 This is a schematic cross-sectional view illustrating a portion of the image display device of this embodiment.

[0201] Figure 12 A cross-section of subpixel 220 cut along a plane parallel to the XZ plane is schematically shown.

[0202] In this embodiment, the structure of the light-emitting element 250 and the structure of the transistor 203 driving the light-emitting element 250 differ from those in the other embodiments described above, while other parts are the same as in other embodiments. For components that are the same as in other embodiments, the same symbols are used, and detailed descriptions are omitted where appropriate.

[0203] like Figure 12As shown, the sub-pixel 220 of the image display device of this embodiment includes a transistor 203 and a light-emitting element 250. The transistor 203 is formed in the element forming region 204 formed on the substrate 102. The element forming region 204 includes an n-type semiconductor region 204b and p-type semiconductor regions 204s and 204d. The n-type semiconductor region 204b is disposed near the surface of the substrate 102. The p-type semiconductor regions 204s and 204d are disposed near the surface of the n-type semiconductor region 204b, isolated from each other within the n-type semiconductor region 204b.

[0204] A gate 107 is disposed on the n-type semiconductor region 204b via the insulating layer 105. The gate 107 is disposed between the p-type semiconductor regions 204s and 204d.

[0205] The upper structure and wiring of transistor 203 are the same as in the other embodiments described above. In this embodiment, transistor 203 is a p-channel transistor, such as a p-channel MOSFET.

[0206] Similar to other embodiments, a second wiring layer 130 is formed on the interlayer insulating film 112, and the wiring layer 130 includes a second wiring (wiring portion) 130k.

[0207] The light-emitting element 250 includes an n-type semiconductor layer 251, a light-emitting layer 252, and a p-type semiconductor layer 253. The n-type semiconductor layer 251, the light-emitting layer 252, and the p-type semiconductor layer 253 are sequentially stacked from the interlayer insulating film 112 side towards the light-emitting surface 253S side. The light-emitting element 250 is, for example, approximately square or rectangular in shape when viewed in the XY plane, but the corners may be rounded. The light-emitting element 250 may also have, for example, an elliptical or circular shape when viewed in the XY plane. By appropriately selecting the shape and arrangement of the light-emitting element in planar viewing, the degree of freedom in layout can be increased.

[0208] The light-emitting element 250 can be made of the same material as in the other embodiments described above. The light-emitting element 250 emits, for example, blue light with a wavelength of about 467 nm ± 20 nm or blue-violet light with a wavelength of 410 nm ± 20 nm.

[0209] The n-type semiconductor layer 251 of the light-emitting element 250 is disposed on the second wiring 130k. Preferably, the second wiring 130k is ohmically connected to the n-type semiconductor layer 251.

[0210] The insulating component 156 covers a portion of the interlayer insulating film 112, a portion of the second wiring layer 130, and at least one side of the light-emitting element 250. The insulating component 156 has a convex surface protruding toward the light-emitting surface 253S. The insulating component 156 has an opening 258. The opening 258 is formed on the light-emitting element 250, and the insulating component 156 is not disposed on the light-emitting surface 253S of the light-emitting element 250. The insulating component 156 is preferably made of a light-transmitting organic insulating material.

[0211] The light-emitting surface 253S is the surface opposite to the surface of the p-type semiconductor layer 253 that is in contact with the light-emitting layer 252. The light-emitting surface 253S is preferably roughened.

[0212] A light-transmitting electrode 159a is provided on the entire surface of the light-emitting surface 253S. The light-transmitting electrode 159a is disposed on the insulating member 156 and extends to the opening 113 of the interlayer insulating film 112. The light-transmitting electrode 159a is also disposed on the wiring 110d exposed from the opening 113 of the interlayer insulating film 112, electrically connecting the p-type semiconductor layer 253 to the wiring 110d.

[0213] A transparent electrode 159k is also disposed on the second wiring 130k, connecting the n-type semiconductor layer 251 together with the second wiring 130k to other circuits. In this example, the transparent electrode 159k and the second wiring 130k are connected to the circuit described later. Figure 13 The grounding wire 4 shown is connected.

[0214] Figure 13 This is a schematic block diagram illustrating the image display device of this embodiment.

[0215] like Figure 13 As shown, the image display device 201 of this embodiment includes a display area 2, a row selection circuit 205, and a signal voltage output circuit 207. In the display area 2, as in other embodiments described above, for example, the sub-pixels 220 are arranged in a grid pattern.

[0216] Subpixel 220 includes a light-emitting element 222, a selection transistor 224, a driving transistor 226, and a capacitor 228. Figure 13 In this context, transistor 224 is sometimes designated as T1, driving transistor 226 as T2, and capacitor 228 as Cm.

[0217] In this embodiment, the light-emitting element 222 is disposed on the ground line 4 side, and the driving transistor 226, which is connected in series with the light-emitting element 222, is disposed on the power line 3 side. That is, the driving transistor 226 is connected to a potential side that is higher than that of the light-emitting element 222. The driving transistor 226 is a p-channel MOSFET.

[0218] Selector transistor 224 is connected between the gate electrode of drive transistor 226 and signal line 208. Capacitor 228 is connected between the gate electrode of drive transistor 226 and power supply line 3.

[0219] In order to drive the drive transistor 226, which is a p-channel MOSFET, the row selection circuit 205 and the signal voltage output circuit 207 supply the scan line 206 and the signal line 208 with a signal voltage of different polarity than that in the other embodiments described above, as well as a selection signal of the same polarity.

[0220] In this embodiment, since the driving transistor 226 is p-channel, the polarity of the signal voltage differs from that in the other embodiments described above. Specifically, the row selection circuit 205 supplies a selection signal to the scan line 206 in a manner that sequentially selects one row from the arrangement of m rows of sub-pixels 220. The signal voltage output circuit 207 supplies a signal voltage with the desired analog voltage value to each sub-pixel 220 of the selected row. The driving transistor 226 of the selected row's sub-pixel 220 causes a current corresponding to the signal voltage to flow through the light-emitting element 222. The light-emitting element 222 emits light with a brightness corresponding to the flowing current.

[0221] The manufacturing method of the image display device 201 of this embodiment will be described.

[0222] Figures 14A to 15C This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to this embodiment.

[0223] In this embodiment, preparation and in Figure 5A The semiconductor growth substrate 1194 described herein is different from the semiconductor growth substrate 1294.

[0224] like Figure 14A As shown, the semiconductor growth substrate 1294 has a semiconductor layer 1150 grown on the crystal growth substrate 1001. In this example, the semiconductor layer 1150 is grown on the crystal growth substrate 1001 via a buffer layer 1140, but as in the other embodiments described above, the semiconductor layer 1150 may be grown without the buffer layer 1140.

[0225] In this embodiment, the semiconductor growth substrate 1294 is stacked in the following order, starting from the buffer layer 1140 side, in the form of a p-type semiconductor layer 1153, a light-emitting layer 1152, and an n-type semiconductor layer 1151. A metal layer 1130 is formed on the open surface of the n-type semiconductor layer 1151.

[0226] like Figure 14BAs shown, the semiconductor growth substrate 1294 is flipped upside down and attached to the circuit substrate 1100. As indicated by the arrow in the figure, one side of the circuit substrate 1100 is bonded to the side of the metal layer 1130 formed on the semiconductor layer 1150. The bonding surface of the circuit substrate 1100 is the exposed surface of the interlayer insulating film 112.

[0227] In the aforementioned wafer bonding process, it is applicable to Figures 6A to 7B The modified example described herein. That is, after transferring the semiconductor layer 1150 to the support substrate 1190, it can also be attached to the circuit board 1100 without flipping the semiconductor growth substrate. In this case, a semiconductor growth substrate 1194 is used, in which an n-type semiconductor layer 1151, a light-emitting layer 1152, and a p-type semiconductor layer 1153 are sequentially stacked from the crystal growth substrate 1001 side. Alternatively, a metal layer can be provided on at least one of the semiconductor layer 1150 and the circuit board 1100, and the crystal-grown semiconductor layer 1150 can be attached without passing through the buffer layer 1140.

[0228] like Figure 15A As shown, the crystal growth substrate 1001 is removed from the semiconductor growth substrate 1294 attached to the circuit board 1100 using laser stripping or the like.

[0229] like Figure 15B As shown, similar to other embodiments, wet etching or dry etching is appropriately used to remove the buffer layer 1140, form the second wiring layer 130 from the metal layer 1130, and form the light-emitting element 250 from the semiconductor layer 1150.

[0230] like Figure 15C As shown, an opening 113 is formed in the interlayer insulating film 112 to expose a portion of the wiring 110d. An insulating member 156 is formed to cover a portion of the second wiring 130k, a portion of the interlayer insulating film 112, and the light-emitting element 250. A portion of the insulating member 156 is removed to expose the light-emitting surface 253S. The p-type semiconductor layer 253 is electrically connected to the wiring 110d via a light-transmitting electrode 159a.

[0231] The effects of the image display device 201 in this embodiment will be explained.

[0232] In this embodiment, the same effects as in the other embodiments described above are achieved. That is, after the semiconductor layer 1150 is bonded to the circuit board 1100, the individual light-emitting element 250 is formed by etching, thus significantly shortening the transfer process of the light-emitting element.

[0233] By shaping the insulating member 156 to protrude towards the light-emitting surface 253S, the light emitted from the light-emitting element 250 to the side or below can be distributed to the light-emitting surface 253S. Therefore, the luminous efficiency can be substantially improved.

[0234] (Third Implementation)

[0235] In this embodiment, the shape of the side surface of the light-emitting element differs from that in the other embodiments described above. Other constituent elements in this embodiment are the same as in other embodiments; the same symbols are used to denote the same constituent elements, and detailed descriptions are omitted where appropriate.

[0236] Figure 16 This is a schematic cross-sectional view illustrating a portion of the image display device of this embodiment.

[0237] Figure 16 A cross-section of subpixel 320 cut along a plane parallel to the XZ plane is schematically shown.

[0238] In this embodiment, the light-emitting element 350 is stacked from the first wiring 130a side toward the light-emitting surface 351S side, in the order of p-type semiconductor layer 353, light-emitting layer 352, and n-type semiconductor layer 351. The light-emitting surface 351S is the surface of the n-type semiconductor layer 351, which is the surface opposite to the surface on which the light-emitting layer 352 is disposed.

[0239] The side surface of the light-emitting element 350 is configured such that the angle θc between the surface of the first wiring 130a on which the light-emitting element 350 is disposed and the side surface of the light-emitting element 350 is less than 90°. That is, the side surface of the light-emitting element 350 is not a vertical surface from the first wiring 130a, but an inclined surface. The light-emitting element 350 is formed into a frustum pyramid or frustum cone shape, etc., with the bottom surface on the surface of the first wiring 130a and the light-emitting surface 351S as the upper surface.

[0240] In this example, the surface of the insulating member 356 covering the side of the light-emitting element 350 also has an inclination relative to the inclination of the side of the light-emitting element 350, originating from the first wiring 130a. The angle θ1 between the surface of the first wiring 130a and the surface of the insulating member 356 is set to be less than the angle θc.

[0241] The insulating component 356 is a light-transmitting insulating material, preferably a transparent resin. The refractive index of the insulating component 356 is preferably greater than the refractive index of the adhesive layer 170 covering the insulating component 356.

[0242] Figure 17 This is a schematic cross-sectional view illustrating a portion of the image display device of this embodiment.

[0243] Figure 17The detailed positional relationship between the first wiring 130a and the light-emitting element 350 is shown.

[0244] like Figure 17 As shown, the first wiring 130a has a first surface 131a. The first surface 131a is a plane that is substantially parallel to the XY plane. The first wiring 130a is formed of a material with high light reflectivity, and light incident on the first surface 131a is reflected with high reflectivity.

[0245] The light-emitting element 350 is mounted on the first surface 131a of the first wiring 130a. The light-emitting element 350 has a side surface 360a. The side surface 360a is the surface between the light-emitting surface 351S and the first surface 131a, and is the surface adjacent to the light-emitting surface 351S. The angle θc formed between the side surface 360a and the first surface 131a is less than 90°. Preferably, the angle θc is about 70°. More preferably, the angle θc is less than the critical angle in the side surface 360a determined based on the refractive index of the light-emitting element 350 and the refractive index of the insulating component 356.

[0246] The insulating member 356 is configured to at least cover the side surface 360a of the light-emitting element 350. The insulating member 356 has a side surface 357a. The side surface 357a is the surface between the top surface 357b of the insulating member 356 and the surface 131a. The top surface 357b of the insulating member 356 is the position where the insulating member 356 is at its highest point from the surface 131a. The height of the insulating member 356 from the first surface 131a refers to the length in the positive direction of the Z-axis between the first surface 131a and the top surface 357b.

[0247] The angle θ1 formed by the side surface 357a of the insulating member 356 and the surface 131a is, for example, less than the angle θc. The shape of the side surface 357a of the insulating member 356 is not limited to a straight line as in this example. The shape of the side surface 357a of the insulating member 356 is preferably configured such that the light emitted from the side surface 357a is distributed in the direction of the light-emitting surface 351S. For example, as in the other embodiments described above, the side surface 357a may also have a convex surface on the side of the light-emitting surface 351S.

[0248] The angle θc formed by the side surface 360a of the light-emitting element 350 and the first surface 131a of the first wiring 130a is determined, for example, as follows.

[0249] If the refractive index of the light-emitting element 350 is set to n0 and the refractive index of the insulating component 356 is n1, then the critical angle θc0 of the light emitted from the light-emitting element 350 to the insulating component 356 can be obtained using the following formula (1).

[0250] θc0=90°-sin －1 (n1 / n0) (1)

[0251] For example, it is known that the refractive index of common transparent organic insulating materials such as acrylic resin is about 1.4 to 1.5. Therefore, when the light-emitting element 350 is formed of GaN and the insulating component 356 is formed of a common transparent organic insulating material, it is possible to make the refractive index n0 of the light-emitting element 350 = 2.5 and the refractive index n of the insulating component 356 = 1.4. Substituting these values ​​into equation (1), we obtain the critical angle θc0 = 56°.

[0252] This means that when the angle θc between the first surface 131a and the side surface 360a is set to 56°, the light emitted from the light-emitting layer 352 that is parallel to the first surface 131a is totally reflected by the side surface 360a. In addition, the light emitted from the light-emitting layer 352 with the negative Z-axis component is also totally reflected by the side surface 360a.

[0253] On the other hand, the component of light emanating from the light-emitting layer 352 with the positive Z-axis direction is emitted from side 360a at an emission angle corresponding to the refractive index. Light incident on the insulating member 356 is emitted at an angle determined by the refractive index of the insulating member 356 and... Figure 16 The angle determined by the refractive index of the adhesive layer 170 shown is emitted from the insulating component 356. Since the refractive index of the adhesive layer 170 is set to be smaller than that of the insulating component 356, the angle of the light incident on the adhesive layer 170 is more towards the light-emitting surface 351S.

[0254] The light that is totally reflected on side 360a is reflected again by the first wiring 130a, and the component of the light with the positive Z-axis in the second reflection is emitted from the light-emitting surface 351S and side 360a. The light parallel to the first surface 131a and the component of the light with the negative Z-axis are totally reflected on side 360a.

[0255] In this way, the light emitted from the light-emitting layer 352 that is parallel to the first surface 131a and has a component with a negative Z-axis direction is transformed into light with a component with a positive Z-axis direction through the side surface 360a and the first wiring 130a. Therefore, the proportion of light oriented towards the light-emitting surface 351S in the light emitted from the light-emitting element 350 increases, and the actual luminous efficiency of the light-emitting element 350 is improved.

[0256] By making θc < θc0, most of the light with a component parallel to the first surface 131a can be totally reflected into the light-emitting element 350. When the refractive index of the insulating member 356 is n = 1.4, the critical angle θc0 is about 56°, so the angle θc is more preferably set to 45° or 30°, etc. In addition, in materials with a larger refractive index n, the critical angle θc0 becomes smaller. However, even if the angle θc is set to about 70°, most of the light with a component in the negative direction of the Z-axis can be converted into light with a component in the positive direction of the Z-axis, so considering manufacturing deviations, for example, the angle θc can be set to 80° or less.

[0257] The manufacturing method of the image display device according to this embodiment will be described.

[0258] In this embodiment, the processes up to the formation of the light-emitting element 350, as described in the other embodiments above, can be compared with... Figures 5A to 8A Same. The following is about... Figure 8A The process following the first process will be explained.

[0259] Figure 18A and Figure 18B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to this embodiment.

[0260] like Figure 18A As shown, after the buffer layer 1140 is removed by wet etching or the like, the metal layer 1130 and the semiconductor layer 1150 are shaped into the desired shape by etching.

[0261] The semiconductor layer 1150 is further shaped into the form of a light-emitting element 350. During the shaping of the light-emitting element 350, the etching rate is selected such that the side surface 360a of the light-emitting element 350 is at an angle θc relative to the surface of the first wiring 130a. For example, the closer to the light-emitting surface 351S, the higher the etching rate is selected. Preferably, the etching rate is set to increase linearly from the side of surface 131a toward the side of the light-emitting surface 351S.

[0262] Specifically, for example, during exposure, the resist mask pattern is designed to gradually thin towards its ends during dry etching. This allows for a gradual retreat from the thinner portion of the resist during dry etching, increasing the etching amount towards the light-emitting surface 351S. Consequently, the side surface 360a of the light-emitting element 350 is formed at a certain angle relative to the surface 131a. Therefore, the light-emitting element 350 is formed such that, when viewed from the plane of the light-emitting surface 351S, the area increases in the order of p-type semiconductor layer 353, light-emitting layer 352, and n-type semiconductor layer 351.

[0263] Then, the metal layer 1130 is etched to form the second wiring layer 130. This wiring layer 130 includes the first wiring 130a. The first wiring 130a is formed into the shape described above by etching.

[0264] The effects of the image display device in this embodiment will be explained.

[0265] The image display device of this embodiment performs the same effect as the image display devices of the other embodiments described above, and in addition, it also performs the following effects.

[0266] In the image display device of this embodiment, the light-emitting element 350 is formed with a side surface at an angle θc relative to the first surface 131a on which the first wiring 130a of the light-emitting element 350 is disposed. The angle θc is less than 90° and is set based on a critical angle θc0 determined by the refractive index of the materials of the light-emitting element 350 and the insulating member 356. The angle θc can convert light emitted from the light-emitting layer 352 that is directed toward the side or below the light-emitting element 350 into light that is directed toward the light-emitting surface 351S. By sufficiently reducing the angle θc, the substantial luminous efficiency in the light-emitting element 350 is improved.

[0267] (Fourth Implementation)

[0268] In this embodiment, by forming multiple light-emitting surfaces equivalent to multiple light-emitting elements on a single semiconductor layer containing a light-emitting layer, an image display device with higher luminous efficiency is achieved. In the following description, the same reference numerals are used for components that are the same as in other embodiments described above, and detailed descriptions are omitted where appropriate.

[0269] Figure 19 This is a schematic cross-sectional view illustrating a portion of the image display device of this embodiment.

[0270] like Figure 19 As shown, the image display device includes a subpixel group 420. The subpixel group 420 includes transistors 203-1 and 203-2, a first wiring layer 410, an interlayer insulating film 112, plugs 416a1 and 416a2, a semiconductor layer 450, and an insulating component 456.

[0271] In this embodiment, holes are injected into the semiconductor layer 450 via plugs 416a1 and 416a2 by turning on the p-channel transistors 203-1 and 203-2, and electrons are injected into the semiconductor layer 450 via the wiring layer 460, causing the light-emitting layer 452 to emit light. A driving circuit, for example, is suitable for... Figure 13 The circuit structure is shown. Other embodiments described above can also be used, replacing the n-type and p-type semiconductor layers vertically. Semiconductor layer 450 is driven by an n-channel transistor. In this case, the driving circuit, for example, is suitable for... Figure 4 The circuit structure.

[0272] The semiconductor layer 450 includes two light-emitting surfaces 451S1 and 451S2, and the sub-pixel group 420 substantially includes two sub-pixels. In this embodiment, similar to the other embodiments described above, the display area is formed by arranging the sub-pixel group 420, which substantially includes two sub-pixels, in a grid pattern.

[0273] Transistors 203-1 and 203-2 are formed in device formation regions 204-1 and 204-2, respectively. In this example, device formation regions 204-1 and 204-2 are n-type semiconductor layers, and p-type semiconductor layers are formed therein, isolated from the n-type semiconductor layers. The n-type semiconductor layer includes a channel region, and the p-type semiconductor layer includes a source region and a drain region, respectively.

[0274] An insulating layer 105 is formed on the component forming regions 204-1 and 204-2, and gates 107-1 and 107-2 are formed through the insulating layer 105, respectively. Gates 107-1 and 107-2 are the gates of transistors 203-1 and 203-2. Transistors 203-1 and 203-2 are p-channel transistors, such as p-channel MOSFETs.

[0275] An insulating film 108 covers two transistors 203-1 and 203-2. A wiring layer 410 is formed on the insulating film 108.

[0276] Vias 111s1 and 111d1 are provided between the p-type semiconductor layer and the wiring layer 410 of transistor 203-1. Vias 111s2 and 111d2 are provided between the p-type semiconductor layer and the wiring layer 410 of transistor 203-2.

[0277] Wiring layer 410 includes wirings 410s1, 410s2, 410d1, and 410d2. Wirings 410s1 and 410s2 are electrically connected via vias 111s1 and 111s2 to the p-type semiconductor layer corresponding to the source electrodes of transistors 203-1 and 203-2, respectively. Wirings 410s1 and 410s2 are, for example, connected to... Figure 13 The power cord 3 shown is connected.

[0278] Wirings 410d1 and 410d2 are connected to the p-type semiconductor layers corresponding to the drain electrodes of transistors 203-1 and 203-2 via vias 111d1 and 111d2, respectively.

[0279] Interlayer insulating film 112 covers transistors 203-1 and 203-2 and wiring layer 410. Plugs 416a1 and 416a2 are formed on interlayer insulating film 112.

[0280] A planarization film 414 is formed on the interlayer insulating film 112. A planarization film 414 is also disposed between plugs 416a1 and 416a2. Plugs 416a1 and 416a2 are embedded in the planarization film 114, and the planarization film 414 and plugs 416a1 and 416a2 have surfaces that are coplanar when viewed in the XY plane. These surfaces are the surfaces opposite to the surfaces on the interlayer insulating film 112.

[0281] A connecting part 415a1 is provided between plug 416a1 and wiring 410d1. Connecting part 415a1 electrically connects plug 416a1 and wiring 410d1. A connecting part 415a2 is provided between plug 416a2 and wiring 410d2. Connecting part 415a2 electrically connects plug 416a2 and wiring 410d2.

[0282] Semiconductor layer 450 is disposed on planarization film 414 and plugs 416a1 and 416a2.

[0283] Semiconductor layer 450 includes a p-type semiconductor layer 453, a light-emitting layer 452, and an n-type semiconductor layer 451. Semiconductor layer 450 is stacked from the interlayer insulating film 112 side toward the light-emitting surfaces 451S1 and 451S2 side, in the order of p-type semiconductor layer 453, light-emitting layer 452, and n-type semiconductor layer 451. Plugs 416a1 and 416a2 are connected to p-type semiconductor layer 453.

[0284] The insulating component 456 covers a portion of the planarization film 414. The insulating component 456 covers a portion of the semiconductor layer 450. Preferably, in addition to the light-emitting surfaces (exposed surfaces) 451S1 and 451S2 of the semiconductor layer 450, the insulating component 456 also covers the surface of the n-type semiconductor layer 451. The insulating component 456 covers the side surfaces of the semiconductor layer 450. The insulating component 456 is formed, for example, of a light-transmitting organic insulating material, preferably of a transparent resin.

[0285] The insulating member 456 has a surface that protrudes toward the light-emitting surfaces 451S1 and 451S2. Through this convex surface, the insulating member 456 directs light emitted from the side of the semiconductor layer 450 toward the light-emitting surfaces 451S1 and 451S2. Therefore, the actual light-emitting efficiency of the semiconductor layer 450 can be improved.

[0286] Openings 458-1 and 458-2 are formed in the portion of semiconductor layer 450 not covered by insulating component 456. Openings 458-1 and 458-2 are formed at positions corresponding to light-emitting surfaces 451S1 and 451S2. Light-emitting surfaces 451S1 and 451S2 are formed at isolated positions on n-type semiconductor layer 451. Light-emitting surface 451S1 is positioned closer to transistor 203-1 on n-type semiconductor layer 451. Light-emitting surface 451S2 is positioned closer to transistor 203-2 on n-type semiconductor layer 451.

[0287] Openings 458-1 and 458-2 appear as squares or rectangles when viewed in the XY plane. They are not limited to squares; they can also be polygons such as circles, ellipses, or hexagons. The luminous surfaces 451S1 and 451S2 also appear as squares, rectangles, other polygons, or circles when viewed in the XY plane. The shapes of the luminous surfaces 451S1 and 451S2 can be similar to or different from the shapes of openings 458-1 and 458-2.

[0288] Wiring layer 460 (third wiring layer) is disposed on insulating member 456. Wiring layer 460 includes wiring 460k. Wiring 460k is disposed on insulating member 456 between openings 458-1 and 458-2 and disposed on n-type semiconductor layer 451. Wiring 460k, for example, is... Figure 13 The grounding wire 4 is connected as shown. Additionally, in... Figure 19 In this context, the symbol for wiring layer 460 is indicated together with the symbol for wiring 460k, signifying that wiring layer 460 includes wiring 460k. (This will be discussed later.) Figure 24 The same applies to China.

[0289] Transparent electrodes 459k are respectively disposed on the light-emitting surfaces 451S1 and 451S2 of the n-type semiconductor layer 451 exposed from openings 458-1 and 458-2. Transparent electrodes 459k are disposed on wiring 460k. Transparent electrodes 459k are disposed between light-emitting surface 451S1 and wiring 460k, and also between light-emitting surface 451S2 and wiring 460k. Transparent electrodes 459k electrically connect the light-emitting surfaces 451S1 and 451S2 and wiring 460k.

[0290] As described above, transparent electrodes 459k are connected to the light-emitting surfaces 451S1 and 451S2 exposed from the openings 458-1 and 458-2. Therefore, electrons supplied from the transparent electrodes 459k are supplied to the n-type semiconductor layer 451 from the exposed light-emitting surfaces 451S1 and 451S2, respectively. On the other hand, holes are supplied to the p-type semiconductor layer 453 via plugs 416a1 and 416a2, respectively.

[0291] Transistors 203-1 and 203-2 are driving transistors for adjacent sub-pixels and are driven sequentially. Therefore, holes supplied from either transistor 203-1 or 203-2 are injected into the light-emitting layer 452, and electrons supplied from wiring 460k are injected into the light-emitting layer 452, causing the light-emitting layer 452 to emit light.

[0292] The opening 458-1 and the light-emitting surface 451S1 are located closer to the transistor 203-1 in the n-type semiconductor layer 451. Therefore, when the transistor 203-1 is turned on, holes are injected through the wiring 410d1, the connection portion 415a1 and the plug 416a1, and the light-emitting surface 451S1 emits light.

[0293] On the other hand, the opening 458-2 and the light-emitting surface 451S2 are located closer to the transistor 203-2 in the n-type semiconductor layer 451. Therefore, when the transistor 203-2 is turned on, the light-emitting surface 451S2 emits light through the wiring 410d2, the connection portion 415a2 and the plug 416a2.

[0294] In this embodiment, plugs 416a1 and 416a2 function as light-shielding and reflective layers, but an insulating planarization film 414 is provided in the gap between the plugs 416a1 and 416a2, and no layer is provided to function as a light-shielding and reflective layer. This gap is necessary to apply different driving voltages between the two plugs 416a1 and 416a2. The n-type semiconductor layer 451 and the p-type semiconductor layer 453 have resistance, which suppresses drift current flowing in a direction parallel to the XY plane within the semiconductor layer 550. Therefore, the actual light-emitting area is limited to the area between the light-emitting surface 451S1 and the plug 416a1, and the area between the light-emitting surface 451S2 and the plug 416a2. Therefore, if the plugs 416a1 and 416a2 are respectively arranged to cover directly below the light-emitting surfaces 451S1 and 451S2, the functions of the light-shielding and reflective layers can be fully utilized.

[0295] The manufacturing method of the image display device according to this embodiment will be described.

[0296] Figures 20A to 23B This is a schematic cross-sectional view illustrating a method for manufacturing an image display device according to this embodiment.

[0297] exist Figures 20A to 21B The process of forming plugs 416a1 and 416a2 on circuit board 4100 is shown.

[0298] exist Figures 22A-23B The process of forming sub-pixel group 420 using circuit board 4100 with plugs 416a1 and 416a2 and semiconductor growth substrate 1194 is shown.

[0299] like Figure 20A As shown, a circuit board 4100 is prepared, and contact holes h1 and h2 are formed on the interlayer insulating film 112. The contact holes h1 and h2 are formed at the locations where wirings 410d1 and 410d2 are respectively disposed. The contact holes h1 and h2 are formed to a depth that exposes the surfaces of wirings 410d1 and 410d2.

[0300] like Figure 20B As shown, a metal layer 4416 is formed over the entire surface of the interlayer insulating film 112. Contact holes h1 and h2 are filled with the same conductive material as the metal layer 4416 during the formation of the metal layer 4416. Connection portions 415a1 and 415a2 are formed in the contact holes h1 and h2 filled with the material of the metal layer 4416.

[0301] like Figure 20C As shown, plugs 416a1 and 416a2 are formed on the connecting portions 415a1 and 415a2 by photolithography and dry etching.

[0302] Alternatively, the connecting parts 415a1 and 415a2 may not be formed, and plugs may be formed directly on the wiring 410d1 and 410d2.

[0303] like Figure 21A As shown, a planarization film 4414 is applied to cover the interlayer insulating film 112 and the plugs 416a1 and 416a2, and then fired. The planarization film 4414 is formed to be thicker than the plugs 416a1 and 416a2. Then, the surface of the planarization film 4414 is polished. The polishing of the planarization film 4414 is performed, for example, using CMP (Chemical Mechanical Polishing).

[0304] like Figure 21B As shown, the surfaces of the plugs 416a1 and 416a2 are exposed by grinding, and a planarization film 414 is formed. In this way, the plugs 416a1 and 416a2 and the connecting portions 415a1 and 415a2 are formed.

[0305] Furthermore, such as Figure 22A As shown, a circuit board 1100 is prepared to form a semiconductor growth substrate 1194 and plugs 416a1 and 416a2. The prepared semiconductor growth substrate 1194 and circuit board 4100 are bonded together.

[0306] like Figure 22B As shown, after the semiconductor layer 1150 is bonded to the circuit board 4100 on which plugs 416a1 and 416a2 are formed, the crystal growth substrate 1001 is removed by laser lift-off or the like.

[0307] like Figure 23A As shown, semiconductor layer 1150 is etched to form semiconductor layer 450.

[0308] like Figure 23B As shown, an insulating component 456 is formed covering a portion of the planarization film 414 and the semiconductor layer 450.

[0309] A wiring layer 460 is formed on the insulating component 456, and wiring 460k is formed by etching, etc.

[0310] By removing the insulating component 456 at the position corresponding to the light-emitting surfaces 451S1 and 451S2, openings 458-1 and 458-2 are formed respectively.

[0311] The light-emitting surfaces 451S1 and 451S2 exposed through openings 458-1 and 458-2 are roughened respectively. Then, a light-transmitting electrode 459k is formed by electrically connecting the light-emitting surfaces 451S1 and 451S2 to the wiring 460k.

[0312] In this way, a sub-pixel group 420 is formed, which has a semiconductor layer 450 with two light-emitting surfaces 451S1 and 451S2.

[0313] In this embodiment, two light-emitting surfaces 451S1 and 451S2 are disposed on a semiconductor layer 450. However, the number of light-emitting surfaces is not limited to two; three or more light-emitting surfaces can also be disposed on a semiconductor layer 450. As an example, one or two columns of sub-pixels can also be implemented using a single semiconductor layer 450. Thus, as described later, it is possible to reduce the composite current that does not contribute to the light emission of each light-emitting surface and to enhance the effect of realizing finer light-emitting elements.

[0314] (Modified Example)

[0315] Figure 24 This is a schematic cross-sectional view of a portion of an image display device illustrating a variation of this embodiment.

[0316] In this modified example, two n-type semiconductor layers 4451a1 and 4451a2 are provided on the light-emitting layer 452, which differs from the case in the fourth embodiment described above. Other aspects are the same as in the fourth embodiment, and the same reference numerals are used to label the same constituent elements, with detailed descriptions omitted where appropriate.

[0317] like Figure 24As shown, the image display device of this modified example includes a subpixel group 420a. The subpixel group 420a includes a semiconductor layer 450a. The semiconductor layer 450a includes a p-type semiconductor layer 453, a light-emitting layer 452, and n-type semiconductor layers 4451a1 and 4451a2. The p-type semiconductor layer 453, the light-emitting layer 452, and the n-type semiconductor layers 4451a1 and 4451a2 are stacked sequentially from the insulating member 456 toward the light-emitting surfaces 4451S1 and 4451S2.

[0318] n-type semiconductor layers 4451a1 and 4451a2 are isolated on the light-emitting layer 452 along the X-axis direction. An insulating member 456 is provided between the n-type semiconductor layers 4451a1 and 4451a2, and the n-type semiconductor layers 4451a1 and 4451a2 are separated by the insulating member 456.

[0319] The n-type semiconductor layers 4451a1 and 4451a2 have approximately the same shape when viewed in the XY plane. Their shape is approximately square or rectangular, but it can also be other polygonal or circular shapes.

[0320] The n-type semiconductor layers 4451a1 and 4451a2 have light-emitting surfaces 4451S1 and 4451S2, respectively. The light-emitting surfaces 4451S1 and 4451S2 are the surfaces of the n-type semiconductor layers 4451a1 and 4451a2 exposed through openings 458-1 and 458-2, respectively.

[0321] The shapes of the light-emitting surfaces 4451S1 and 4451S2 in the XY plane are the same as those in the fourth embodiment, having approximately the same shape, such as a roughly square shape. The shapes of the light-emitting surfaces 4451S1 and 4451S2 are not limited to the square shape of this embodiment; they can also be polygons such as circles, ellipses, or hexagons. The shapes of the light-emitting surfaces 4451S1 and 4451S2 can be similar to, or different from, the shapes of the openings 458-1 and 458-2.

[0322] A light-transmitting electrode 459k is disposed on each of the light-emitting surfaces 4451S1 and 4451S2. The light-transmitting electrode 459k is also disposed on the wiring 460k. The light-transmitting electrode 459k is disposed between the wiring 460k and the light-emitting surface 4451S1, and also between the wiring 460k and the light-emitting surface 4451S2. The light-transmitting electrode 459k electrically connects the wiring 460k and the light-emitting surfaces 4451S1 and 4451S2.

[0323] Figure 25A and Figure 25B This is a schematic cross-sectional view illustrating the manufacturing method of the image display device of this modified example.

[0324] In this modified example, the process continues until the circuit board 4100, on which the plugs 416a1, 416a2 and the connecting portions 415a1, 415a2 are formed, is bonded to the semiconductor layer 1150, which is applicable to the fourth embodiment. Figures 20A to 22B The same process described above. The following will describe the subsequent processes.

[0325] like Figure 25A As shown, in this modified example, in Figure 22B In the process, the buffer layer 1140 is removed, and the p-type semiconductor layer 1153, the light-emitting layer 1152 and the n-type semiconductor layer 1151 are etched to form the light-emitting layer 452 and the p-type semiconductor layer 453. Then, further etching is performed to form two n-type semiconductor layers 4451a1 and 4451a2.

[0326] The n-type semiconductor layers 4451a1 and 4451a2 can also be formed by deeper etching. For example, the etching used to form the n-type semiconductor layers 4451a1 and 4451a2 can be performed to a depth reaching the light-emitting layer 452 or the p-type semiconductor layer 453. In this case, when the n-type semiconductor layer is etched more deeply, the etch position of the n-type semiconductor layer 1151 is preferably located at least 1 μm away from the outer periphery of the light-emitting surfaces 4451S1 and 4451S2 of the n-type semiconductor layer, as described later. By making the etch position away from the outer periphery of the light-emitting surfaces 4451S1 and 4451S2, recombination current can be suppressed.

[0327] like Figure 25B As shown, an insulating component 456 is formed covering a planarization film 414, plugs 416a1 and 416a2, and a semiconductor layer 450a. A wiring layer 460 is formed on the insulating component 456, and wiring 460k is formed by etching.

[0328] Openings 458-1 and 458-2 are formed on the insulating component 456 at positions corresponding to the light-emitting surfaces 4451S1 and 4451S2, respectively. The light-emitting surfaces 4451S1 and 4451S2 of the n-type semiconductor layer exposed through the openings 458-1 and 458-2 are roughened. Then, a light-transmitting electrode 459k is formed.

[0329] In this way, a sub-pixel group 420a with two light-emitting surfaces 4451S1 and 4451S2 is formed.

[0330] In this modified example, similar to the fourth embodiment, the number of light-emitting surfaces is not limited to two; three or more light-emitting surfaces may be disposed on one semiconductor layer 450a.

[0331] The effects of the image display device in this embodiment will be explained.

[0332] Figure 26 This is a graph illustrating the characteristics of a pixel LED element.

[0333] Figure 26 The vertical axis represents luminous efficiency [%). The horizontal axis represents the current density flowing through the pixel LED element as a relative value.

[0334] like Figure 26 As shown, in regions where the relative value of current density is less than 1.0, the luminous efficiency of the pixel LED element increases almost constant or monotonically. In regions where the relative value of current density is greater than 1.0, the luminous efficiency decreases monotonically. That is, there exists an appropriate current density in the pixel LED element that maximizes the luminous efficiency.

[0335] By suppressing the current density to a level sufficient to obtain adequate brightness from the light-emitting element, a highly efficient image display device can be expected to be realized. However, Figure 26 The study shows the trend that luminous efficiency decreases with decreasing current density at low current densities.

[0336] As described in the first to third embodiments, the light-emitting element is formed by separating the entire semiconductor layer 1150 containing the light-emitting layer into individual parts using etching or the like. At this time, the junction surface between the light-emitting layer and the n-type semiconductor layer is exposed at the end. Similarly, the junction surface between the light-emitting layer and the p-type semiconductor layer is exposed at the end.

[0337] In the presence of such an end, electrons and holes recombine at the end. However, this recombination does not contribute to light emission. The recombination at the end occurs almost independently of the current flowing through the light-emitting element. It is assumed that the recombination is generated in accordance with the length of the junction surface that contributes to light emission at the end.

[0338] When two identical cubic light-emitting elements are made to emit light, since the ends are formed on the square of each light-emitting element, composite may occur in a total of eight ends.

[0339] In contrast, in this embodiment, the semiconductor layers 450 and 450a, which have two light-emitting surfaces, have four ends. The region between openings 458-1 and 458-2 experiences minimal electron or hole injection and contributes almost nothing to light emission; therefore, the six ends that contribute to light emission can be considered to be the only ones contributing to it. Thus, in this embodiment, by substantially reducing the number of ends in the semiconductor layers, recombination that does not contribute to light emission can be reduced, and the reduction in recombination current can lower the driving current.

[0340] In cases where the distance between sub-pixels is shortened for purposes such as high resolution or high current density, the distance between the light-emitting surfaces 451S1 and 451S2 is shortened in the sub-pixel group 420 of the fourth embodiment. In this case, if the n-type semiconductor layer 451 is shared, a portion of the electrons injected to the adjacent light-emitting surface side may be shunted, potentially causing micro-emission on the undriven side of the light-emitting surface. In a modified example, since the n-type semiconductor layers 4451a1 and 4451a2 are separated for each light-emitting surface 4451S1 and 4451S2, the occurrence of micro-emission on the undriven side of the light-emitting surface can be reduced.

[0341] In this embodiment, a p-type semiconductor layer, an emissive layer, and an n-type semiconductor layer are sequentially stacked from the interlayer insulating film 112 side. This is preferred from the viewpoint of improving luminous efficiency by roughening the exposed surface of the n-type semiconductor layer. Similar to the other embodiments described above, the stacking order of the p-type semiconductor layer and the n-type semiconductor layer can be changed, and the stacking can be performed in the order of n-type semiconductor layer, emissive layer, and p-type semiconductor layer.

[0342] (Fifth Implementation)

[0343] The aforementioned image display device, as an image display module with an appropriate number of pixels, can be, for example, a computer monitor, a television, a portable terminal such as a smartphone, or a car navigation system.

[0344] Figure 27 This is a block diagram illustrating the image display device of this embodiment.

[0345] Figure 27 The main structural components of a computer monitor are shown.

[0346] like Figure 27 As shown, the image display device 501 includes an image display module 502. The image display module 502 is, for example, an image display device with the structure described in the first embodiment. The image display module 502 includes a display area 2 with sub-pixels 20 arranged therein, a row selection circuit 5, and a signal voltage output circuit 7. The image display device 501 may also have the structures described in the second and third embodiments.

[0347] The image display device 501 also includes a controller 570. The controller 570 takes in a control signal separated and generated by an interface circuit (not shown) as input, and controls the driving of each sub-pixel and the driving sequence of the row selection circuit 5 and the signal voltage output circuit 7.

[0348] (Modified Example)

[0349] Figure 28 This is a block diagram illustrating the image display device of this modified example.

[0350] Figure 28 This describes the structure of a high-resolution, thin-film television.

[0351] like Figure 28 As shown, the image display device 601 includes an image display module 602. The image display module 602 is, for example, the image display device 1 with the structure described in the first embodiment. The image display device 601 includes a controller 670 and a frame memory 680. The controller 670 controls the driving order of each sub-pixel of the display area 2 based on control signals provided by the bus 640. The frame memory 680 stores one frame of display data for processing such as smooth dynamic image reproduction.

[0352] The image display device 601 includes an I / O circuit 610. The I / O circuit 610 provides interface circuitry for connecting to external terminals or devices. The I / O circuit 610 may include, for example, a USB interface or an audio interface for connecting external hard disk devices.

[0353] The image display device 601 includes a receiving unit 620 and a signal processing unit 630. The receiving unit 620 is connected to an antenna 622 and separates and generates the required signal from the radio waves received by the antenna 622. The signal processing unit 630 includes a DSP (Digital Signal Processor) and a CPU (Central Processing Unit), etc., and the signal separated and generated by the receiving unit 620 is separated and generated into image data and sound data, etc. by the signal processing unit 630.

[0354] By configuring the receiving unit 620 and signal processing unit 630 as high-frequency communication modules such as mobile phone transmitters / receivers, WiFi receivers, and GPS receivers, they can also be configured as other image display devices. For example, an image display device with an image display module having an appropriate screen size and resolution can be a portable information terminal such as a smartphone or a car navigation system.

[0355] The image display module in this embodiment is not limited to the structure of the image display device in the first embodiment, but may be a variation thereof or in other embodiments.

[0356] According to the embodiments described above, a method for manufacturing an image display device and an image display device can be realized that shortens the transfer process of the light-emitting element and improves the yield.

[0357] Figure 29 This is a perspective view schematically illustrating the first to fourth embodiments and their variations.

[0358] like Figure 29As shown above, the image display devices of the first to fourth embodiments have a light-emitting circuit 172 having multiple sub-pixels provided on the circuit board 100. A color filter 180 is provided on the light-emitting circuit 172. In addition, in the fifth embodiment, a structure including the circuit board 100, the light-emitting circuit 172, and the color filter 180 is assembled into the image display devices 501 and 601 as image display modules 502 and 602.

[0359] The foregoing has described several embodiments of the present invention, but these embodiments are merely illustrative and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments or their variations are included within the scope or spirit of the invention, and are included within the scope of the invention and its equivalents as described in the claimed scope. Furthermore, the above embodiments can be implemented in combination with each other.

[0360] Symbol Explanation

[0361] 1, 201, 501, 601: Image display device; 2: Display area; 3: Power line; 4: Ground line; 5, 205: Horizontal selection circuit; 6, 206: Scan line; 7, 207: Signal voltage output circuit; 8, 208: Signal line; 10: Pixel; 20, 220, 320: Sub-pixel; 22, 222: Light-emitting element; 24, 224: Selection transistor; 26, 226: Driving transistor; 28, 228: Capacitor; 100: Circuit board; 101: Circuit; 103, 203, 203-1, 203-2: Transistor; 104, 204, 204-1, 204-2: Component forming area; 105: Insulating layer; 107, 1 07-1, 107-2: Gate; 108: Insulating film; 110: First wiring layer; 112: Interlayer insulating film; 130: Second wiring layer; 130a: First wiring; 140: Buffer layer; 150, 250: Light-emitting elements; 156, 356, 456: Insulating components; 159, 159a, 159k, 459k: Transparent electrodes; 180: Color filter; 460: Wiring layer; 420, 420a: Subpixel group; 1001: Crystal growth substrate; 1100, 4100: Circuit board; 1140: Buffer layer; 1150: Semiconductor layer; 1190: Support substrate; 1192: Structure; 1194, 1294: Semiconductor growth substrate

Claims

1. An image display device, comprising: Circuit elements; The first wiring layer is electrically connected to the circuit element; An insulating film that covers the circuit elements and the first wiring layer; The second wiring layer is disposed on the insulating film; A light-emitting element is disposed on the second wiring layer and includes a light-emitting surface opposite to the surface of the second wiring layer. An insulating component that covers at least a portion of the light-emitting element and is transparent to light; The third wiring layer, which is electrically connected to the light-emitting element, is disposed on the insulating component. The light-emitting element includes: a first semiconductor layer of a first conductivity type disposed on the second wiring layer; a light-emitting layer disposed on the first semiconductor layer; and a second semiconductor layer of a second conductivity type disposed on the light-emitting layer and having a different conductivity type from the first conductivity type. The insulating component is configured such that light emitted from the light-emitting element is directed in the normal direction of the light-emitting surface and distributed on the side of the light-emitting surface. The angle between the side surface of the light-emitting element and the surface of the second wiring layer on which the light-emitting element is disposed is less than the critical angle of the side surface of the light-emitting element, which is determined based on the refractive index of the light-emitting element and the refractive index of the insulating component. The critical angle θc0 is obtained using the following formula (1). θc0 = 90°- sin －1 (n1 / n0) (1) θc0 is the critical angle, n1 is the refractive index of the insulating component, and n0 is the refractive index of the light-emitting element.

2. The image display device as claimed in claim 1, wherein, The insulating component covers the side of the light-emitting element and includes a portion of a spherical surface that protrudes toward the light-emitting surface.

3. The image display device as claimed in claim 1, wherein, The first height of the insulating component from the first surface of the second wiring layer where the light-emitting element is disposed is higher than the second height of the surface of the light-emitting layer, i.e., the second surface, from the first surface. The second surface is the side on which the second semiconductor layer is disposed.

4. The image display device as claimed in claim 3, wherein, The angle is less than 70°.

5. The image display device as claimed in claim 1, wherein, The second wiring layer includes a light-shielding wiring portion. The first semiconductor layer is disposed on the wiring portion and is electrically connected to the wiring portion. The outer periphery of the wiring portion includes the outer periphery of the light-emitting element projected onto the wiring portion.

6. The image display device as claimed in claim 1, wherein, The first conductivity type is p-type. The second conductivity type is n-type.

7. The image display device as claimed in claim 1, wherein, The insulating component has an opening that exposes at least a portion of the light-emitting surface, and a light-transmitting electrode is provided on the exposed surface that is exposed from the light-emitting surface.

8. The image display device according to any one of claims 1 to 7, wherein, The light-emitting element comprises a gallium nitride-based compound semiconductor. The circuit elements are formed on a substrate containing silicon.

9. The image display device as claimed in claim 1, wherein, The light-emitting element also includes a wavelength conversion component.

10. An image display device comprising: Multiple transistors; A first wiring layer, which is electrically connected to the plurality of transistors; An insulating film covering the plurality of transistors and the first wiring layer; The second wiring layer is disposed on the insulating film; The first semiconductor layer, disposed on the second wiring layer, is of the first conductivity type; A light-emitting layer is disposed on the first semiconductor layer; The second semiconductor layer, which is disposed on the light-emitting layer, is a second conductivity type different from the first conductivity type; An insulating component that covers the first semiconductor layer and the light-emitting layer, and covers at least a portion of the second semiconductor layer, and is transparent to light; A third wiring layer is connected to light-transmitting electrodes disposed on multiple exposed surfaces of the second semiconductor layer that are exposed from the insulating component corresponding to the plurality of transistors. The insulating component is configured such that light emitted from the light-emitting layer is directed in the respective normal direction of the plurality of exposed surfaces and distributed on the sides of the plurality of exposed surfaces. The light-emitting element includes: a first semiconductor layer of a first conductivity type disposed on the second wiring layer; a light-emitting layer disposed on the first semiconductor layer; and a second semiconductor layer of a second conductivity type disposed on the light-emitting layer and having a different conductivity type from the first conductivity type. The angle between the side surface of the light-emitting element and the surface of the second wiring layer on which the light-emitting element is disposed is less than the critical angle of the side surface of the light-emitting element, which is determined based on the refractive index of the light-emitting element and the refractive index of the insulating component. The critical angle θc0 is obtained using the following formula (1). θc0 = 90°- sin －1 (n1 / n0) (1) θc0 is the critical angle, n1 is the refractive index of the insulating component, and n0 is the refractive index of the light-emitting element.

11. The image display device as claimed in claim 10, wherein, The second semiconductor layer is separated by the insulating component.

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