Power module having at least two power semiconductor arrangements contacting each other on a substrate
By arranging symmetrical feed lines on the substrate of the power module, the problem of uneven power loss of semiconductor components in the prior art is solved, symmetrical current guidance and uniform heat propagation are achieved, and the life and reliability of the power module are optimized.
Patent Information
- Application Number
- CN202110949238.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-08-19
- Filing Date
- 2021-08-18
- Publication Date
- 2025-05-09
- Estimated Expiration
- 2041-08-18
AI Technical Summary
There is asymmetry in the structural layout and current guidance of existing power modules, resulting in uneven power loss of semiconductor components, which easily leads to thermal overload and module failure.
By arranging symmetrical feed lines on the substrate, connecting the power interface and semiconductor components, symmetrical current guidance and uniform heat propagation are achieved.
The drive control of semiconductor components is optimized, the total load of the parallel semiconductor components is evenly distributed, the life of the power module is extended and its reliability is improved.
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Figure CN114078833B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a power module having at least two power semiconductor arrangements which are contact-connected on a substrate and arranged in a housing.
[0002] The invention also relates to a converter having at least one such power module.
[0003] Furthermore, the invention relates to a method for producing such a power module. Background Art
[0004] Typically, in such converters, a power module sealed by a housing (e.g. via a solid metal plate) is screwed onto a heat sink. The converter is, for example, a rectifier, an inverter, a frequency converter or a DC transformer. The maximum output power of such a power module is limited in particular by the housing and the external dimensions associated therewith. The optimization of the arrangement of semiconductor components and current tracks with respect to the structural space can lead in particular to the situation that, for example, the parallel connection of semiconductor components is arranged in an electrically and thermally non-optimal manner, whereby the power losses of the semiconductor components are distributed asymmetrically and the semiconductor components themselves heat up to different degrees. In addition, it can occur that adjacently arranged semiconductor components heat up one another (in particular very strongly), which can lead to failure of the power module.
[0005] Patent application document US2016 / 172995 A1 describes a power semiconductor module that can reduce the change in inductance between the upper / lower branches and reduce the change in current caused by the change in inductance. The power semiconductor module includes a circuit block (upper / lower branch), a first and a second positive electrode terminal, a first and a second negative electrode terminal, and a first and a second AC terminal, wherein each circuit block is configured in series with a self-quenching semiconductor element. In addition, there are first and second wiring diagrams that connect the self-discharging semiconductor element to the DC and AC terminals. The outline of the power semiconductor module has a substantially quadrilateral surface. Summary of the invention
[0006] Against this background, the object of the present invention is to improve the reliability of a power module.
[0007] The object according to the invention is achieved by a power module, which has at least two power semiconductor arrangements contacting each other on a substrate and arranged in a housing, wherein the power semiconductor arrangements each have at least one semiconductor component, wherein the housing has a power interface on opposite sides, wherein the substrate has a power supply line from the power interface to the power semiconductor arrangement, wherein the power supply line is arranged on the substrate so that a symmetrical current conduction is achieved, wherein a first power interface and a second power interface are arranged on at least one first side of the housing, wherein the first power semiconductor arrangement is arranged between the second power semiconductor arrangement and the power interface on the first side of the housing, wherein a power supply line arranged on the substrate and connecting the second power interface to the second power semiconductor arrangement extends on both sides and symmetrically through the first power semiconductor arrangement.
[0008] The object according to the invention is also achieved by a converter having at least one such power module.
[0009] Furthermore, the object according to the invention is achieved by a method for producing such a power module, wherein the substrate is connected to the base plate (in particular by material bonding), wherein the housing is connected to the base plate in a liquid-tight manner, and wherein a connection of the power interface to the base is produced.
[0010] The advantages and preferred embodiments mentioned below with respect to the power module can be transferred to the converter and the method in a meaningful manner.
[0011] The present invention is based on the consideration that the reliability of a power module is improved by symmetrically driving a semiconductor component. The semiconductor component is part of at least two power semiconductor arrangements that are in contact on a substrate. The substrate has a dielectric material layer, which has a (especially double-sided) metallization. The dielectric material layer is, for example, 25 μm to 400 μm, especially 50 μm to 250 μm thick, and includes a ceramic material (for example aluminum nitride or aluminum oxide) or an organic material (for example polyamide). The metallization is, for example, structured and made of copper. The semiconductor component is, for example, implemented as a transistor, especially an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET) or a field effect transistor or a diode. At least one anti-parallel diode is especially assigned to at least one transistor.
[0012] The power semiconductor arrangement is arranged in a (particularly common) housing. The housing has power connections on opposite sides, wherein the substrate has feeders from the power connections to the power semiconductor arrangement. The feeders are, for example, designed in a planar manner, wherein the planar feeders are part of a structured metallization, in particular of the substrate. By arranging the feeders on the substrate in such a way that a symmetrical current conduction is achieved, a symmetrical control of the semiconductor components is achieved. The symmetrical current conduction, for example, leads to a uniform distribution of the total load on the semiconductor components connected in parallel, thereby optimizing the service life of the power module.
[0013] The first power connection and the second power connection are arranged on at least one first side of the housing, wherein the first power semiconductor arrangement is arranged between the second power semiconductor arrangement and the power connection on the first side of the housing. Such an arrangement of the power connection and the power semiconductor arrangement is space-saving and enables (in particular with regard to the dynamic current distribution between the semiconductor components connected in parallel) a symmetrical structure of the arrangement and symmetrical current conduction, thereby optimizing the service life of the power module.
[0014] The feeder lines arranged on the substrate and connecting the second power connection to the second power semiconductor arrangement are arranged to extend bilaterally and symmetrically through the first power semiconductor. The feeder lines are arranged to extend around the first power semiconductor, for example, in a U-shaped or V-shaped manner. Such a symmetrical arrangement of the feeder lines leads to symmetrical current conduction, whereby the semiconductor components (especially those connected in parallel) are controlled identically.
[0015] This uniform control leads to an optimization of the lifetime of the power module.
[0016] Further embodiments provide that the power supply lines arranged on the substrate are arranged so as to extend substantially axisymmetrically with respect to the longitudinal axis. Such an axisymmetric arrangement of the power supply lines leads to a uniform control of the semiconductor components (in particular those connected in parallel).
[0017] Another embodiment provides that the housing has a projection (in particular extending parallel to the longitudinal axis), wherein the power supply line is arranged at least partially below the projection. In particular, the housing frame is retracted below the projection of the housing, thereby providing a larger base area, for example suitable for wider power supply lines. In addition, the semiconductor components can be placed at a greater distance from each other, which leads to heat propagation and thus to improved heat dissipation. The improved heat dissipation improves the reliability of the power module and increases the service life of the power module.
[0018] Further embodiments provide that the projection has a soldering pad for producing a bond connection to a power semiconductor arrangement. The projection enables a shorter bond connection with fewer parasitic features, which leads to an increase in the efficiency of the power module.
[0019] Another embodiment provides that the protrusion covers at least 10% of the substrate surface. The substrate, which is partially arranged below the protrusion, has an area that is at least 11% larger due to the protrusion, so that a higher power density of the power module can be achieved.
[0020] Another embodiment provides that the feed line is connected to the second power semiconductor arrangement via a connecting plate. The connecting plate is designed as a bent or folded metal plate, which is made of copper, for example, and is connected to the metallization of the substrate by material bonding. In particular, such a connecting plate has high electrical conductivity and low losses compared to crimped leads.
[0021] Another embodiment provides that the first power connection and the second power connection are designed as DC connections for at least one half-bridge. Experience has shown that such a connection is particularly advantageous.
[0022] Further embodiments provide that the semiconductor components of the first power semiconductor arrangement are connected to a first metallization of the substrate by material bonding, and wherein the semiconductor components of the second power semiconductor arrangement are connected to a second metallization of the substrate by material bonding, and wherein the first metallization is arranged isolated from the second metallization. For example, the semiconductor components of the first power semiconductor arrangement are connected in parallel with the semiconductor components of the second power semiconductor arrangement, so that a power module designed, for example, as a half bridge can be easily and cost-effectively expanded by simple changes in the layout.
[0023] A further embodiment provides that the substrate comprises two substrate parts which are electrically isolated from one another, wherein the first power semiconductor arrangement is arranged on the first substrate part and the second power semiconductor arrangement is arranged on the second substrate part. The separation of the substrates leads to heat propagation and thus improved heat dissipation. The improved heat dissipation improves the reliability of the power module and increases the life of the power module. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] The present invention will be described and explained in more detail below based on the exemplary embodiments shown in the drawings.
[0025] The accompanying drawings show:
[0026] Figure 1 A schematic illustration of a first embodiment of a power module is shown;
[0027] Figure 2 A schematic illustration of a second embodiment of a power module is shown;
[0028] Figure 3 a schematic illustration showing a third embodiment of a power module; and
[0029] Figure 4 A three-dimensional section through a third specific embodiment of a power module is shown.
[0030] The embodiments explained below are preferred embodiments of the present invention. The components described in the embodiments represent the features of the present invention that are to be considered independently of each other, and the features also improve the present invention independently of each other, and therefore should also be considered as components of the present invention individually or in combinations other than the combinations shown. In addition, the described embodiments can also be supplemented by other described features of the present invention.
[0031] The same figures have the same meaning even in different figures. DETAILED DESCRIPTION
[0032] Figure 1 A schematic diagram of a first embodiment of a power module 2 is shown. The power module 2 has two power semiconductor arrangements 6, 8 with semiconductor components 10, which are contacted on a substrate 4. The semiconductor component 10 is exemplarily implemented as a transistor T, in particular an insulated gate bipolar transistor (IGBTs), a metal oxide semiconductor field effect transistor (MOSFETs) or a field effect transistor or a diode D. The power semiconductor arrangements 6, 8 each have, for example, three transistors T and three diodes D. An anti-parallel diode D is in particular assigned to at least one transistor T. The plurality of semiconductor components 10 is variable. For example, the first power semiconductor arrangement 6 can have two transistors T, two (in particular anti-parallel) diodes D, which are in particular arranged in a checkerboard shape, while the two power semiconductor arrangements 8 have two transistors T and two (in particular anti-parallel) diodes D.
[0033] The substrate 4 comprises two substrate parts 4a, 4b electrically insulated from each other, wherein a first power semiconductor arrangement 6 is arranged on the first substrate part 4a and a second power semiconductor arrangement 8 is arranged on the second substrate part 4b. The substrate 4 can also be constructed as a one-piece. The substrate parts 4a, 4b of the substrate 4 each have a dielectric material layer 12 with a thickness between 25 μm and 400 μm, in particular between 50 μm and 250 μm, the dielectric material layer comprising a ceramic material (e.g., aluminum nitride or aluminum oxide) or an organic material (e.g., polyamide). In addition, the substrate parts 4a, 4b of the substrate 4 each have (in particular structured) double-sided metallization 14, 14a, 14b, the metallization being made of copper, for example. The substrate parts 4a, 4b of the substrate 4 are connected to a substrate 16 by material bonding, the substrate being made of, for example, aluminum or an aluminum alloy. The material bonding connection to the substrate 16 is formed by welding or sintering.
[0034] The substrate 4 with the power semiconductor arrangements 6, 8 is arranged in a housing 18, which has power connections DCp, DCn, AC on opposite sides 20, 22 of the power module 2. For example, a first power connection DCn and a second power connection DCp, which are implemented as direct current power connections, are arranged on the first side 20 of the housing 18, wherein the first power semiconductor arrangement 6 is arranged on the first side 20 of the housing 18 between the second power semiconductor arrangement 8 and the power connections DCp, DCn. A third power connection AC, which is implemented as an alternating current power connection, is arranged on the second side 22 of the housing 18. The power module 2 is implemented as a half bridge, for example.
[0035] A feeder 24 is arranged on the substrate 4, which connects the second power interface DCp with the second power semiconductor arrangement 8 and is arranged to extend bilaterally and symmetrically through the first power semiconductor arrangement 6. The feeder 24 arranged on the substrate 4 is also implemented to extend substantially axially symmetrically about the longitudinal axis 26, wherein symmetrical current conduction is achieved. Symmetrical current conduction leads to a uniform distribution of the total load on the parallel semiconductor components 10, thereby optimizing the life of the power module 2. The feeder 24 connecting the second power interface DCp with the second power semiconductor arrangement 8 is connected to the second power semiconductor arrangement (8) via a connecting plate 25. Such a connecting plate 25 is made of copper, for example, and has high electrical conductivity and low losses, especially compared to crimped leads.
[0036] Likewise, the feeder 28 connecting the first power interface DCn to the first power semiconductor arrangement 6 is arranged centrally on the substrate 4 between the feeder 24 connecting the second power interface DCp to the second power semiconductor arrangement 8 to achieve symmetrical current conduction, which has a positive effect on the life of the power module 2. In particular, the feeder 28 connecting the first power interface DCn to the first power semiconductor arrangement 6 is also implemented to extend substantially axisymmetrically with respect to the longitudinal axis 26. In addition, the feeder 30 connecting the third power interface AC to the second power semiconductor arrangement 8 is implemented to extend substantially axisymmetrically with respect to the longitudinal axis 26, wherein symmetrical current conduction is achieved. The feeder 30 connecting the third power interface AC to the second power semiconductor arrangement 8 has, for example, a shunt 32 configured for current measurement, wherein the shunt 32 is also arranged substantially axisymmetrically with respect to the longitudinal axis 26.
[0037] Figure 2A schematic illustration of a second specific embodiment of a power module 2 is shown, in which a first power semiconductor arrangement 6 is divided into three substantially equally sized partial arrangements 6a, 6b, 6c extending in parallel and arranged axially symmetrically with respect to a longitudinal axis 26. The partial arrangements 6a, 6b, 6c each have, for example, a transistor T with an antiparallel diode D. A feed line 24 connecting a second power connection DCp to the second power semiconductor arrangement 8 is arranged axially symmetrically with respect to the longitudinal axis 26 between the partial arrangements 6a, 6b, 6c, wherein a symmetrical current conduction is achieved, resulting in an optimal heat dissipation. Figure 2 Another embodiment of the medium power module 2 corresponds to Figure 1 Implementation method in .
[0038] Figure 3 A schematic illustration of a third embodiment of a power module 2 is shown, wherein bonding connections 34 to semiconductor components 10 and power supply lines 24, 28, 30 are shown. Semiconductor components 10 of power semiconductor arrangements 6, 8 are arranged on substrate 4 such that current-carrying bonding connections 34 extend substantially parallel to longitudinal axis 26.
[0039] The housing 18 of the power module 2 has a projection 36 extending substantially parallel to the longitudinal axis 26, wherein the power supply line 24 is arranged at least partially below the projection 36. The projection 36 covers, for example, at least 10% of the substrate surface 38. The projection 36 also has a soldering pad 40 for producing a bonding connection to the power semiconductor arrangement 6, 8. Figure 3 Another embodiment of the medium power module 2 corresponds to Figure 1 Implementation method in .
[0040] Figure 4 A three-dimensional cross section of a third embodiment of the power module 2 is shown. Since the bonding surface of the housing 18 is not completely supported by the housing material, the power supply line 24 is partially located under the protrusion 36 of the housing 18. The protrusion provides structural space so that the semiconductor components 10 can be placed further apart, thereby bringing about improved heat dissipation through heat propagation. Due to the additional structural space, the power supply line 24 can be designed to be wider, which leads to higher electrical conductivity. The pad 40 is connected to a pin 42, in particular a press-fit pin or a soldering pin, which is accommodated in the housing 18, and a bonding connection 34 to the semiconductor component 10 is formed via the pad. For the sake of clarity, in Figure 4 The further bonding connections 34 are not shown. Figure 4 Another embodiment of the medium power module 2 corresponds to Figure 3 Implementation method in .
[0041] In summary, the present invention relates to a power module 2, which has at least two power semiconductor arrangements 6, 8, which are contacted on a substrate 4 and arranged in a housing 18. In order to improve the reliability of the power module 2, it is proposed that the power semiconductor arrangements 6, 8 each have at least one semiconductor component 10, wherein the housing 18 has power connections DCp, DCn, AC on opposite sides 20, 22, wherein the substrate 4 has a feeder 24 from the power connection DCp, DCn, AC to the power semiconductor arrangements 6, 8, wherein the feeders 24, 28, 30 are arranged on the substrate 4 so that symmetrical current conduction is achieved.
Claims
1. A power module (2) having at least two power semiconductor arrangements which are contact-connected on a substrate (4) and arranged in a housing (18), wherein: The power semiconductor arrangements each have at least one semiconductor component (10), wherein the housing (18) has power connections on opposite sides, wherein the substrate (4) has a power supply line from the power connection to the power semiconductor arrangement, wherein the power supply line is arranged on the substrate (4) in such a way that symmetrical current conduction is achieved, wherein a first power connection and a second power connection are arranged on at least one first side of the housing (18), wherein the first power semiconductor arrangement is arranged between the second power semiconductor arrangement and the power connection on the first side of the housing (18), wherein a power supply line arranged on the substrate (4) and connecting the second power connection to the second power semiconductor arrangement is arranged to extend bilaterally and symmetrically through the first power semiconductor arrangement.
2. The power module (2) according to claim 1, wherein: The power supply line arranged on the substrate (4) is arranged to extend axially symmetrically with respect to a longitudinal axis (26).
3. The power module (2) according to claim 1 or 2, wherein: The housing (18) has a projection (36) extending parallel to the longitudinal axis (26), wherein the power supply line is arranged at least partially below the projection (36).
4. The power module (2) according to claim 3, wherein: The projection (36) has a pad (40) for producing a bonding connection (34) to a power semiconductor arrangement.
5. The power module (2) according to claim 3, wherein: The protrusions (36) cover at least 10% of the substrate surface (38).
6. The power module (2) according to claim 1 or 2, wherein: The power supply line is connected to the second power semiconductor arrangement via a connection plate (25).
7. The power module (2) according to claim 1 or 2, wherein: The first power interface and the second power interface are designed as DC interfaces for at least one half-bridge.
8. The power module (2) according to claim 1 or 2, wherein: The semiconductor component (10) of the first power semiconductor arrangement is connected to a first metallization of the substrate (4) in a material bond, and the semiconductor component (10) of the second power semiconductor arrangement is connected to a second metallization of the substrate (4) in a material bond, and the first metallization is arranged to be isolated from the second metallization.
9. The power module (2) according to claim 1 or 2, wherein: The substrate (4) comprises two substrate parts which are electrically isolated from one another, wherein the first power semiconductor arrangement is arranged on the first substrate part and the second power semiconductor arrangement is arranged on the second substrate part.
10. A converter having at least one power module (2) according to any one of claims 1 to 9.
11. A method for producing a power module (2) according to any one of claims 1 to 9, wherein: A substrate (4) is connected to a base plate (16) by a material bond, wherein a housing (18) is connected to the base plate (16) in a liquid-tight manner and wherein a connection of a power interface to the substrate (4) is produced.
12. The method according to claim 11, wherein: The power interfaces are respectively connected to the substrate (4) via bonding connections (34).
13. The method according to claim 11 or 12, wherein: The housing (18) is at least partially filled with a casting material.
Citation Information
Patent Citations
Power semiconductor module and power conversion device
US20160172995A1
Semiconductor heat-dissipating substrate, and manufacturing method and assembly therefor
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Power semiconductor module
CN104916630A