Power amplifier circuit

Abstract

The present application provides a power amplifier circuit which suppresses a decrease in power efficiency. The power amplifier circuit includes: a high-pass filter which inputs a high-frequency input signal at one end; a first amplifier which amplifies the high-frequency input signal output from the other end of the high-pass filter and outputs the amplified high-frequency signal; a second amplifier which amplifies the high-frequency signal and outputs the amplified high-frequency output signal; a self-coupled transformer which performs impedance matching between the first amplifier and the second amplifier; and an impedance circuit which is electrically connected at one end to the other end of the high-pass filter, electrically connected at the other end to an output terminal of a bias circuit which outputs a bias voltage or a bias current to the first amplifier, and outputs the high-frequency input signal output from the other end of the high-pass filter to the bias circuit.

Description

TECHNICAL FIELD

[0001] The present application relates to a power amplification circuit. BACKGROUND

[0002] There is known an amplification circuit that flattens gain in a frequency band of a high-frequency signal (hereinafter, sometimes referred to as "signal frequency band") (for example, refer to Patent Literature 1 described below).

[0003] The maximum available power gain (MAG) of a transistor that constitutes an amplifier has a characteristic that is high in a low frequency region and becomes lower as the frequency becomes higher. Therefore, in the technology described in Patent Literature 1, a high-pass filter is used for an inter-stage matching circuit. As a result, a high-frequency signal after the low-frequency component is attenuated by the high-pass filter is input to the base of the transistor. As a result, the characteristic of the maximum available power gain of the transistor is canceled, and thus the signal level of the high-frequency signal output from the collector of the transistor is flattened.

[0004] PRIOR ART DOCUMENTS

[0005] PATENT LITERATURE

[0006] Patent Literature 1: Japanese Patent Application Publication No. 2010-200107

[0007] Patent Literature 2: Japanese Patent Application Publication No. 2004-266875

[0008] Patent Literature 3: U.S. Patent Application Publication No. 2017 / 0257069

[0009] As described above, the technology described in Patent Literature 1 uses a high-pass filter for an inter-stage matching circuit. That is, the technology described in Patent Literature 1 attenuates a high-frequency signal near the lower limit frequency of the signal frequency band, that is, near the cutoff frequency of the high-pass filter. Therefore, the technology described in Patent Literature 1 generates power loss near the lower limit frequency of the signal frequency band, and the power efficiency decreases.

[0010] In the technology described in Patent Literature 1, the above-described power loss is generated in each stage amplifier. In an amplification circuit in which a plurality of amplifiers are connected in multiple stages, the transistor size (the number of "fingers") becomes larger and the power consumption becomes larger as it tends to be a later stage. Therefore, in the technology described in Patent Literature 1, the power loss becomes larger as it tends to be a later stage. That is, the influence of the power loss generated in the amplifier of the later stage is larger than that of the power loss generated in the amplifier of the earlier stage, and this leads to a large decrease in the power efficiency of the entire amplification circuit. SUMMARY

[0011] PROBLEMS TO BE SOLVED BY THE INVENTION

[0012] The present application has been achieved in view of the above-described circumstances, and aims to suppress a decrease in power efficiency.

[0013] Technical solution for solving the problem

[0014] One aspect of the power amplification circuit of the present application includes: a high-pass filter that inputs a high-frequency input signal at one end; a first amplifier that amplifies the high-frequency input signal output from the other end of the high-pass filter and outputs the amplified high-frequency signal; a second amplifier that amplifies the high-frequency signal and outputs the amplified high-frequency output signal; a self-coupled transformer that is electrically connected between the first amplifier and the second amplifier and performs impedance matching between the first amplifier and the second amplifier; and an impedance circuit that is electrically connected at one end to the other end of the high-pass filter, is electrically connected at the other end to an output terminal of a bias circuit that outputs a bias voltage or a bias current to the first amplifier, and outputs the high-frequency input signal output from the other end of the high-pass filter to the bias circuit.

[0015] Another aspect of the power amplification circuit of the present application includes: a high-pass filter that inputs a high-frequency input signal at one end; a first amplifier that amplifies the high-frequency input signal output from the other end of the high-pass filter and outputs the amplified high-frequency signal; a second amplifier that amplifies the high-frequency signal and outputs the amplified high-frequency output signal; a transmission line transformer that is electrically connected between the first amplifier and the second amplifier and performs impedance matching between the first amplifier and the second amplifier; and an impedance circuit that is electrically connected at one end to the other end of the high-pass filter, is electrically connected at the other end to an output terminal of a bias circuit that outputs a bias voltage or a bias current to the first amplifier, and outputs the high-frequency input signal output from the other end of the high-pass filter to the bias circuit.

[0016] Another aspect of the power amplification circuit of the present application includes: a high-pass filter that inputs a high-frequency input signal at one end; a first amplifier that amplifies the high-frequency input signal output from the other end of the high-pass filter and outputs the amplified high-frequency signal; a second amplifier that amplifies the high-frequency signal and outputs the amplified high-frequency output signal; a conventional transformer that is electrically connected between the first amplifier and the second amplifier and performs impedance matching between the first amplifier and the second amplifier; and an impedance circuit that is electrically connected at one end to the other end of the high-pass filter, is electrically connected at the other end to an output terminal of a bias circuit that outputs a bias voltage or a bias current to the first amplifier, and outputs the high-frequency input signal output from the other end of the high-pass filter to the bias circuit.

[0017] Effects of the invention

[0018] According to the present application, it is possible to suppress a decrease in power efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 is a diagram showing a structure of a power amplification circuit of the first embodiment.

[0020] Figure 2 is a diagram showing a structure of a first amplifier of the power amplification circuit of the first embodiment.

[0021] Figure 3 is a diagram showing a structure of a second amplifier of the power amplification circuit of the first embodiment.

[0022] Figure 4 is a diagram showing a structure of a bias circuit of the power amplification circuit of the first embodiment.

[0023] Figure 5 is a diagram showing a structure of a power amplification circuit of the first comparative example.

[0024] Figure 6 is a diagram showing a circuit simulation result of the first embodiment and the first comparative example.

[0025] Figure 7 is a diagram showing a circuit simulation result of the first embodiment and the first comparative example.

[0026] Figure 8 is a diagram showing a circuit simulation result of the first embodiment and the first comparative example.

[0027] Figure 9 is a diagram showing a circuit simulation result of the first embodiment and the first comparative example.

[0028] Figure 10 is a diagram showing a circuit simulation result of the first embodiment and the first comparative example.

[0029] Figure 11 is a diagram showing a circuit simulation result of the power amplification circuit of the first embodiment.

[0030] Figure 12 is a diagram showing a structure of a power amplification circuit of the second comparative example.

[0031] Figure 13 is a diagram showing a circuit simulation result of the first embodiment and the second comparative example.

[0032] Figure 14 is a diagram showing a circuit simulation result of the first embodiment and the second comparative example.

[0033] Figure 15 is a diagram showing a circuit simulation result of the first embodiment and the second comparative example.

[0034] Figure 16Fig. 1 is a graph showing the results of circuit simulation of the first embodiment and the second comparative example.

[0035] Figure 17 Fig. 2 is a graph showing the results of circuit simulation of the first embodiment and the second comparative example.

[0036] Figure 18 Fig. 3 is a graph showing the structure of the inter-stage matching circuit of the second embodiment.

[0037] Figure 19 Fig. 4 is a graph showing the structure of the inter-stage matching circuit of the third embodiment.

[0038] Figure 20 Fig. 5 is a graph showing the structure of the impedance circuit of the fourth embodiment.

[0039] Figure 21 Fig. 6 is a graph showing the structure of the first amplifier of the fifth embodiment.

[0040] Explanation of Reference Numerals

[0041] 1, 100, 110: power amplification circuit

[0042] 11: high-pass filter

[0043] 13, 13A: first amplifier

[0044] 13-1, 13-2,..., 13-M, 13A-1, 13A-2,..., 13A-M, 20-1, 20-2,..., 20-N: unit

[0045] 14, 14A, 14B-1, 14B-2,..., 14B-M: impedance circuit

[0046] 14c: capacitor

[0047] 15: first bias circuit

[0048] 16, 22: choke coil

[0049] 17: DC blocking capacitor

[0050] 18: autotransformer

[0051] 18A: transmission line transformer

[0052] 18B: regular transformer

[0053] 20: second amplifier

[0054] 21: second bias circuit

[0055] Q1, Q2: transistor DETAILED DESCRIPTION

[0056] Hereinafter, the embodiments of the power amplification circuit according to the present disclosure will be described in detail based on the drawings. In addition, the present disclosure is not limited to the embodiments. Each of the embodiments is an example, and it is self-evident that a part of the structure shown in different embodiments can be replaced or combined. After the 2nd embodiment, the description about the matters common to the 1st embodiment will be omitted, and only the different points will be described. In particular, regarding the same effects based on the same structure, the same effects will not be mentioned in each of the embodiments.

[0057] <1st Embodiment and Comparative Example>

[0058] (1st Embodiment)

[0059] Figure 1 is a diagram showing the structure of the power amplification circuit according to the 1st embodiment. The power amplification circuit 1 includes a high-pass filter 11, a 1st amplifier 13, an impedance circuit 14, a 1st bias circuit 15, a choke coil 16, a DC blocking capacitor 17, a autotransformer 18, a 2nd amplifier 20, a 2nd bias circuit 21, and a choke coil 22.

[0060] The power amplification circuit 1 is a multi-stage amplification circuit in which the 1st amplifier 13 is a primary amplifier or a driver stage amplifier, and the 2nd amplifier 20 is a final stage amplifier or a power stage amplifier. The high-pass filter 11 is an input matching circuit of the 1st amplifier 13. The autotransformer 18 is an inter-stage matching circuit that performs impedance matching between the 1st amplifier 13 and the 2nd amplifier 20.

[0061] Although the power amplification circuit 1 is provided as a two-stage amplification circuit in the 1st embodiment, the present disclosure is not limited thereto. The power amplification circuit 1 can also be a three-stage or more amplification circuit.

[0062] The 1st amplifier 13 includes a DC blocking capacitor Cbb1, a resistor Rbb1, and a transistor Q1. The 2nd amplifier 20 includes a DC blocking capacitor Cbb2, a resistor Rbb2, and a transistor Q2.

[0063] In the present disclosure, each of the transistors is provided as a bipolar transistor, but the present disclosure is not limited thereto. As the bipolar transistor, a Heterojunction Bipolar Transistor (HBT) can be exemplified, but the present disclosure is not limited thereto. The transistor can also be a Field Effect Transistor (FET), for example. The transistor can also be a multi-finger transistor in which a plurality of unit transistors are electrically connected in parallel. The so-called unit transistor refers to the smallest structure constituting the transistor.

[0064] The case where the size ("fingers") of the transistor Q2 in the second amplifier 20 is larger than the size ("fingers") of the transistor Q1 in the first amplifier 13 can be exemplified.

[0065] The high-pass filter 11 includes capacitors 11c and 11e and inductors 11d and 11f.

[0066] At one end 11a of the high-pass filter 11, a high-frequency input signal RFin is input. One end of the capacitor 11c is electrically connected to the one end 11a of the high-pass filter 11. One end of the inductor 11d is electrically connected to the other end of the capacitor 11c. The other end of the inductor 11d is electrically connected to a reference potential. As the reference potential, a ground potential can be exemplified, but the present disclosure is not limited thereto. One end of the capacitor 11e is electrically connected to the other end of the capacitor 11c and the one end of the inductor 11d. One end of the inductor 11f is electrically connected to the other end of the capacitor 11e. The other end of the capacitor 11e and the one end of the inductor 11f are electrically connected to the other end 11b of the high-pass filter 11.

[0067] The high-pass filter 11 passes a high-frequency band of the high-frequency input signal RFin and outputs from the other end 11b.

[0068] The case where the cutoff frequency of the high-pass filter 11 is the lower limit frequency of the frequency band of the high-frequency input signal RFin can be exemplified, but the present disclosure is not limited thereto.

[0069] One end of the DC blocking capacitor Cbb1 is electrically connected to the other end 11b of the high-pass filter 11. The other end of the DC blocking capacitor Cbb1 is electrically connected to the base of the transistor Q1.

[0070] The DC blocking capacitor Cbb1 blocks the direct current component of the high-frequency input signal RFin after passing through the high-pass filter 11 and passes the alternating current component.

[0071] One end of the resistance Rbb1 is electrically connected to the base of the transistor Q1. At the other end of the resistance Rbb1, a bias voltage (or bias current) Bias1 is input from the output terminal 15f of the first bias circuit 15.

[0072] The impedance circuit 14 includes a capacitor 14c. One end of the capacitor 14c is electrically connected to one end 14a of the impedance circuit 14. The one end 14a of the impedance circuit 14 is electrically connected to the other end 11b of the high-pass filter 11 and one end of the DC blocking capacitor Cbb1. The other end of the capacitor 14c is electrically connected to the other end 14b of the impedance circuit 14. The other end 14b of the impedance circuit 14 is electrically connected to the output terminal 15f of the first bias circuit 15 and the other end of the resistance Rbb1.

[0073] The impedance circuit 14 blocks a DC component of the high-frequency input signal RFin that has passed through the high-pass filter 11 and passes an AC component to an output terminal 15f of the first bias circuit 15.

[0074] The emitter of the transistor Q1 is electrically connected to a reference potential. A bias voltage (or bias current) Bias1 is input from the output terminal 15f of the first bias circuit 15 to the base of the transistor Q1 via the resistor Rbb1. Further, the high-frequency input signal RFin that has passed through the high-pass filter 11 and the DC blocking capacitor Cbb1 is input to the base of the transistor Q1. The collector of the transistor Q1 is electrically connected to the power supply potential Vc_Q1 via the choke coil 16 and is supplied with power.

[0075] The transistor Q1 amplifies the high-frequency input signal RFin that has passed through the high-pass filter 11 and outputs the amplified high-frequency signal RF1 from the collector to the DC blocking capacitor 17.

[0076] Figure 2 Fig. 1 is a diagram showing the structure of the first amplifier of the power amplification circuit according to the first embodiment.

[0077] The first amplifier 13 includes M (M is a natural number) units of unit 13-1, unit 13-2,..., and unit 13-M. The unit 13-1 includes a unit capacitor Cbb-1, a unit resistor Rbb-1, and a unit transistor Qc-1. The unit 13-2 includes a unit capacitor Cbb-2, a unit resistor Rbb-2, and a unit transistor Qc-2. The unit 13-M includes a unit capacitor Cbb-M, a unit resistor Rbb-M, and a unit transistor Qc-M. The units 13-1 to 13-M are connected in parallel to each other.

[0078] The unit capacitors Cbb-1 to Cbb-M correspond to the DC blocking capacitor Cbb1. The unit resistors Rbb-1 to Rbb-M correspond to the resistor Rbb1. The unit transistors Qc-1 to Qc-M correspond to the transistor Q1.

[0079] One end 14a of the impedance circuit 14 is electrically connected to the other end 11b of the high-pass filter 11 and one end of the unit capacitor Cbb of each unit. The other end 14b of the impedance circuit 14 is electrically connected to the output terminal 15f of the first bias circuit 15 and the other end of the unit resistor Rbb of each unit.

[0080] Referring again to Figure 1 The other end of the DC blocking capacitor 17 is electrically connected to one end 18a of the autotransformer 18.

[0081] The DC blocking capacitor 17 blocks a DC component of the high frequency signal RF1 and passes an AC component.

[0082] The autotransformer 18 includes a first winding 18c, a second winding 18e, and capacitors 18d and 18f.

[0083] The first winding 18c and the capacitor 18d are electrically connected in parallel. One end of the first winding 18c and the capacitor 18d is electrically connected to one end 18a of the autotransformer 18. The other end of the first winding 18c and the capacitor 18d is electrically connected to the other end 18b of the autotransformer 18. The second winding 18e and the capacitor 18f are electrically connected in parallel. One end of the second winding 18e and the capacitor 18f is electrically connected to the other end of the first winding 18c and the capacitor 18d. The other end of the second winding 18e and the capacitor 18f is electrically connected to a reference potential.

[0084] The autotransformer 18 is one example of a wideband and low-loss matching circuit that performs impedance matching between the output impedance of the first amplifier 13 and the input impedance of the second amplifier 20.

[0085] One end of the DC blocking capacitor Cbb2 is electrically connected to the other end 18b of the autotransformer 18. The other end of the DC blocking capacitor Cbb2 is electrically connected to the base of the transistor Q2.

[0086] The DC blocking capacitor Cbb2 blocks a DC component of the high frequency signal RF1 that has passed through the autotransformer 18 and passes an AC component.

[0087] One end of the resistor Rbb2 is electrically connected to the base of the transistor Q2. At the other end of the resistor Rbb2, a bias voltage (or bias current) Bias2 is input from the output terminal 21a of the second bias circuit 21.

[0088] The emitter of the transistor Q2 is electrically connected to a reference potential. At the base of the transistor Q2, a bias voltage (or bias current) Bias2 is input from the output terminal 21a of the second bias circuit 21 via the resistor Rbb2. Further, at the base of the transistor Q2, the high frequency signal RF1 that has passed through the autotransformer 18 and the DC blocking capacitor Cbb2 is input. The collector of the transistor Q2 is electrically connected to the power supply potential Vc_Q2 via the choke coil 22 and is supplied with power.

[0089] The transistor Q2 amplifies the high frequency signal RF1 that has passed through the autotransformer 18 and outputs the amplified high frequency output signal RFout from the collector.

[0090] Figure 3 FIG. 2 is a diagram showing the structure of the second amplifier of the power amplification circuit of the first embodiment.

[0091] The second amplifier 20 includes N (N is a natural number larger than M) units of unit 20-1, unit 20-2,..., and unit 20-N. The unit 20-1 includes a unit capacitor Cbb-1, a unit resistor Rbb-1, and a unit transistor Qc-1. The unit 20-2 includes a unit capacitor Cbb-2, a unit resistor Rbb-2, and a unit transistor Qc-2. The unit 20-N includes a unit capacitor Cbb-N, a unit resistor Rbb-N, and a unit transistor Qc-N. The units 20-1 to 20-N are connected in parallel to each other.

[0092] The unit capacitors Cbb-1 to Cbb-N correspond to the DC blocking capacitor Cbb2. The unit resistors Rbb-1 to Rbb-N correspond to the resistor Rbb2. The unit transistors Qc-1 to Qc-N correspond to the transistor Q2.

[0093] Figure 4 is a view showing the structure of the bias circuit of the power amplification circuit of the first embodiment. In addition, in Figure 4 the circuit structure of the first bias circuit 15 is described. The circuit structure of the second bias circuit 21 is the same as that of the first bias circuit 15, and thus the illustration and the description are omitted.

[0094] The first bias circuit 15 includes a resistor 15a, transistors 15b, 15c, and 15e, and a capacitor 15d.

[0095] A constant current Icont is input to one end of the resistor 15a. In addition, as for the constant current Icont, the current flowing therethrough is changed in accordance with the operation condition.

[0096] In the transistor 15b, the collector and the base are electrically connected. That is, the transistor 15b is diode-connected. The collector and the base of the transistor 15b are electrically connected to the other end of the resistor 15a.

[0097] In the transistor 15c, the collector and the base are electrically connected. That is, the transistor 15c is diode-connected. The collector and the base of the transistor 15c are electrically connected to the emitter of the transistor 15b. The emitter of the transistor 15c is electrically connected to the reference potential.

[0098] The series connection circuit of the transistors 15b and 15c generates a constant potential Vbiasl in accordance with the constant current Icont.

[0099] One end of the capacitor 15d is electrically connected to the collector and the base of the transistor 15b. The other end of the capacitor 15d is electrically connected to the reference potential.

[0100] The capacitor 15d stabilizes the potential Vbiasl of the series connection circuit of the transistors 15b and 15c.

[0101] The base of the transistor 15e is electrically connected to one end of the capacitor 15d, and is input with the potential Vbiasl. The collector of the transistor 15e is electrically connected to the power supply potential Vbat. The emitter of the transistor 15e is electrically connected to the other end of the resistor Rbb 1 (see FIG. 2) via the output terminal 15f of the first bias circuit 15. That is, the transistor 15e and the resistor Rbb 1 are emitter-followed connected. Figure 1 ). That is, the transistor 15e and the resistor Rbb 1 are emitter-followed connected.

[0102] The transistor 15e outputs a bias voltage (or bias current) Biasl from the emitter to the resistor Rbb 1 according to the potential Vbiasl.

[0103] Referring again to Figure 1 In the power amplification circuit that amplifies a high-frequency signal having a wide signal band, it is required to suppress variation of gain, that is, to make the flatness of the frequency characteristic of the amplitude gain within the signal band. That is, in the power amplification circuit, it is required to have a linear amplification characteristic. Furthermore, from the viewpoint of suppressing consumed power and suppressing heat generation, the power amplification circuit is required to have high power efficiency.

[0104] The power amplification circuit 1 has the high-pass filter 11 as the input matching circuit of the first amplifier 13. As a result, at the base of the transistor Ql, the high-frequency input signal RFin after the low-frequency component is attenuated by the high-pass filter 11 is input. As a result, the characteristic of the maximum available power gain of the transistor Ql is cancelled, and thus the signal level in the signal band of the high-frequency signal RF1 output from the collector of the transistor Ql becomes a high-pass characteristic. That is, the first amplifier 13 can suppress variation of gain, and can make the flatness of the frequency characteristic of the amplitude gain within the signal band. Thus, the first amplifier 13 can obtain a linear amplification characteristic.

[0105] However, as already explained, in the amplification circuit in which a plurality of amplifiers are connected in multiple stages, the transistor size ("fingers") becomes large and the consumed power becomes large as it goes to the rear stage. That is, the transistor Q2 has a larger transistor size ("fingers") and a larger consumed power than the transistor Ql.

[0106] For example, a case is studied in which the power amplification circuit 1 is used as a power amplifier for a mobile phone. Figure 1In this case, as the interstage matching circuit between the first amplifier 13 and the second amplifier 20, a high-pass filter is used instead of the autotransformer 18. In this case, the high-pass filter as the interstage matching circuit attenuates the high-frequency signal RF1 near the lower limit frequency of the signal band. Therefore, in the transistor Q2, power loss occurs near the lower limit frequency of the signal band. The consumed power of the transistor Q2 is greater than the consumed power of the transistor Ql. Therefore, the power loss occurring in the transistor Q2 is greater than the power loss occurring in the transistor Ql. That is, the effect of the power loss occurring in the transistor Q2 is greater than the power loss occurring in the transistor Ql, resulting in a large decrease in the power efficiency of the power amplification circuit 1 as a whole.

[0107] Therefore, as shown in FIG. 10, the power amplification circuit 1 is provided with the autotransformer 18 as the interstage matching circuit between the first amplifier 13 and the second amplifier 20. The autotransformer 18 is one example of a matching circuit which is wideband and low-loss, and can suppress the attenuation of the high-frequency signal RF1 near the lower limit frequency of the signal band. Therefore, the second amplifier 20 can suppress the power loss in the transistor Q2 near the lower limit frequency of the signal band. Thus, the power amplification circuit 1 can suppress the decrease in the power efficiency as a whole. Figure 1

[0108] (First Comparative Example)

[0109] As to the position at which the autotransformer 18 is arranged as the matching circuit, in addition to being arranged as the interstage matching circuit between the first amplifier 13 and the second amplifier 20 as in the power amplification circuit 1 (refer to FIG. 1), it is also possible to consider being arranged as the input matching circuit of the first amplifier 13. Figure 1

[0110] Figure 5 is a diagram showing the structure of the power amplification circuit of the first comparative example. The structure of the power amplification circuit 100 is compared with the structure of the power amplification circuit 1 (refer to FIG. 1) of the first embodiment, and the position of the high-pass filter 11 and the position of the autotransformer 18 are reversed. That is, in the power amplification circuit 100, the autotransformer 18 is the input matching circuit of the first amplifier 13, and the high-pass filter 11 is the interstage matching circuit between the first amplifier 13 and the second amplifier 20. The other structure of the power amplification circuit 100 is the same as that of the power amplification circuit 1, and therefore the description thereof is omitted. Figure 1 (Comparison between the First Embodiment and the First Comparative Example)

[0111]

[0112] Figures 6 to 10 is a diagram showing the circuit simulation results of the first embodiment and the first comparative example. In detail, Figure 6 is a diagram showing the circuit simulation results of the gain of the power amplification circuit 1 and the power amplification circuit 100 as a whole.​​​Figure 7 is a graph showing circuit simulation results of the input loss of the power amplification circuit 1 (the loss of the high-pass filter 11) and the input loss of the power amplification circuit 100 (the loss of the autotransformer 18). Figure 8 is a graph showing circuit simulation results of the inter-stage loss of the power amplification circuit 1 (the loss of the autotransformer 18) and the inter-stage loss of the power amplification circuit 100 (the loss of the high-pass filter 11). In Figures 6 to 8 , the signal band is from a lower limit frequency f LO to an upper limit frequency f HI . As the lower limit frequency f LO , 3.30 GHz (gigahertz) can be exemplified. As the upper limit frequency f HI , 5.00 GHz can be exemplified. Figure 9 is a graph showing circuit simulation results of the power added efficiency (PAE) of the power amplification circuit 1 and the power amplification circuit 100 at the lower limit frequency f LO of the signal band. Figure 10 is a graph in which a part of Figure 9 is enlarged.

[0113] Referring to Figure 6 , the waveform 200 indicates the gain of the entire power amplification circuit 1. The waveform 201 indicates the gain of the entire power amplification circuit 100 as a comparative example. At the lower limit frequency f LO of the signal band, the gain of the entire power amplification circuit 1 and the gain of the entire power amplification circuit 100 become substantially the same.

[0114] Referring to Figure 7 , the waveform 202 indicates the input loss of the power amplification circuit 1 (the loss of the high-pass filter 11). The waveform 203 indicates the input loss of the power amplification circuit 100 as a comparative example (the loss of the autotransformer 18). At the lower limit frequency f LO of the signal band, the input loss of the power amplification circuit 1 (the loss of the high-pass filter 11) becomes greater than the input loss of the power amplification circuit 100 (the loss of the autotransformer 18).

[0115] Referring to Figure 8 , the waveform 204 indicates the inter-stage loss of the power amplification circuit 1 (the loss of the autotransformer 18). The waveform 205 indicates the inter-stage loss of the power amplification circuit 100 as a comparative example (the loss of the high-pass filter 11). At the lower limit frequency f LO of the signal band, the inter-stage loss of the power amplification circuit 1 (the loss of the autotransformer 18) becomes smaller than the inter-stage loss of the power amplification circuit 100 (the loss of the high-pass filter 11).

[0116] Referring toFigure 9 and Figure 10 The waveform 206 indicates the power added efficiency of the power amplification circuit 1 at the lower limit frequency f LO The waveform 207 indicates the power added efficiency of the power amplification circuit 100 at the lower limit frequency f LO The peak value of the power added efficiency of the power amplification circuit 100 is 59.8%, and in comparison, the peak value of the power added efficiency of the power amplification circuit 1 is 62.7%. That is, the peak value of the power added efficiency of the power amplification circuit 1 is improved by 2.9% (2.9 percentage points) from the peak value of the power added efficiency of the power amplification circuit 100. This simulation result indicates that, at the lower limit frequency f LO of the signal band, suppressing the loss in the inter-stage matching circuit (input matching circuit of the transistor Q2 of the latter stage) contributes to the improvement of the power added efficiency.

[0117] (Summary)

[0118] As explained above, the power amplification circuit 1 of the first embodiment is able to suppress the variation of the gain, and is able to flatten the frequency characteristics of the amplitude gain within the signal band, by being provided with the high-pass filter 11 as the input matching circuit of the first amplifier 13. Due to this, the power amplification circuit 1 is able to obtain a linear amplification characteristic.

[0119] Further, the power amplification circuit 1 of the first embodiment is able to suppress the power loss in the transistor Q2 at the lower limit frequency f LO of the signal band, by being provided with the autotransformer 18 as the inter-stage matching circuit between the first amplifier 13 and the second amplifier 20. Due to this, the power amplification circuit 1 is able to suppress the decrease in the power efficiency.

[0120] (Possible Phenomena Due to Use of Autotransformer as Inter-stage Matching Circuit)

[0121] However, if the autotransformer 18 is used as the inter-stage matching circuit between the first amplifier 13 and the second amplifier 20, as in the power amplification circuit 1 of the first embodiment, it is conceivable that the following phenomena occur.

[0122] Since the inter-stage matching circuit is provided as the autotransformer 18, the transistor Ql of the preceding stage is vulnerable to a variation in the load. That is, a variation in the input impedance of the transistor Q2 of the succeeding stage is easily observed as a variation in the load impedance of the transistor Ql of the preceding stage. In particular, in a case where the high-frequency input signal RFin is a large signal (large amplitude, large power) (hereinafter, sometimes referred to as "large signal operation"), the input impedance of the transistor Q2 varies due to the nonlinear behavior of the transistor Q2 and the decrease in the base bias voltage accompanying the increase in the base bias current of the transistor Q2. As a result, the matching state in a case where the high-frequency input signal RFin is a small signal (small amplitude, small power) (hereinafter, sometimes referred to as "small signal operation") is lost. This is manifested in terms of characteristics as a change in the phase (AM / PM characteristic) and a decrease in the gain (AM / AM characteristic) in the transistor Ql.

[0123] Therefore, the power amplification circuit 1 (refer to Figure 1 ) of the first embodiment has the impedance circuit 14 between the other end lib of the high-pass filter 11 and the other end of the resistor Rbb1. The impedance circuit 14 passes the high-frequency input signal RFin after passing through the high-pass filter 11. The high-frequency input signal RFin after passing through the impedance circuit 14 is input to the emitter of the transistor 15e of the first bias circuit 15 (refer to Figure 4 ). Thus, the transistor 15e performs a detection operation, and thus the bias voltage Biasl increases. Therefore, the decrease in the base bias voltage of the transistor Ql can be suppressed. Thus, the power amplification circuit 1 can suppress the change in the phase and the decrease in the gain in the transistor Ql, and thus can suppress the distortion of the high-frequency output signal RFout.

[0124] Figure 11 is a graph showing the circuit simulation result of the power amplification circuit of the first embodiment. In detail, Figure 11 is a graph showing the circuit simulation result of the emitter potential of the transistor 15e (refer to Figure 4 ) of the first bias circuit 15. The potential Vbiasl is the base potential of the transistor 15e (refer to Figure 4 ). The potential Vbois is the static emitter potential of the transistor 15e in the absence of a signal.

[0125] The potential Vbiasl of the base of the transistor 15e is fixed to a constant value. Therefore, in the large signal operation, the lower limit of the emitter potential Vboi is clamped to (Vbiasl - Vth) by the threshold voltage Vth of the transistor 15e. In addition, the upper limit of the emitter potential Vboi is not clamped. Thus, the average value of the emitter potential Vboi rises from Vbois to Vboil. Therefore, the decrease in the base bias voltage of the transistor Ql in the large signal operation can be suppressed.

[0126] (Second Comparative Example)

[0127] Figure 12 is a view showing the structure of the power amplification circuit of the second comparative example. The structure of the power amplification circuit 110 is compared with the structure of the power amplification circuit 1 (refer to Figure 1 ) of the first embodiment, and the impedance circuit 14 is removed. The other structure of the power amplification circuit 110 is the same as that of the power amplification circuit 1, and thus the description is omitted.

[0128] (Comparison between the First Embodiment and the Second Comparative Example)

[0129] Figure 13 is a view showing the circuit simulation results of the first embodiment and the second comparative example. In detail, Figure 13 is a view showing the circuit simulation results of the base bias voltage of the transistor Q1 of the power amplification circuit 1 and the power amplification circuit 110.

[0130] Referring to Figure 13 , the waveform 210 represents the base bias voltage of the transistor Q1 of the power amplification circuit 1. The waveform 211 represents the base bias voltage of the transistor Q1 of the power amplification circuit 110. The voltage Vbels is the static base bias voltage of the transistor Q1 at the time of no signal.

[0131] In the power amplification circuit 110 of the comparative object, the base bias voltage of the transistor Q1 is clamped in the voltage region higher than the voltage Vbels due to the limitation of the base bias current. Thus, in the power amplification circuit 110, the average voltage Vbell' of the base bias voltage of the transistor Q1 decreases.

[0132] On the other hand, in the power amplification circuit 1 of the first embodiment, the high-frequency input signal RFin is input to the emitter of the transistor 15e via the impedance circuit 14, and the transistor 15e performs a detection operation, so the bias voltage Bias1 rises, and the base bias voltage of the transistor Q1 rises. Thus, in the power amplification circuit 1, the average voltage Vbe1l of the base bias voltage of the transistor Q1 becomes higher than the average voltage Vbell', and the decrease of the base bias voltage of the transistor Q1 can be suppressed.

[0133] Thus, in the power amplification circuit 1 of the first embodiment, even at the time of large signal operation, the transistor Q1 does not become the off state but remains in the on state, and thus the change of the phase and the fluctuation of the gain in the transistor Q1 can be suppressed. Thus, the power amplification circuit 1 can suppress the distortion of the high-frequency output signal RFout.

[0134] Figures 14 to 17 is a view showing the circuit simulation results of the first embodiment and the second comparative example. In detail,Figure 14 is a graph showing the results of circuit simulation of the power amplification circuit 1 and the phase of the high-frequency output signal RFout of the power amplification circuit 110. Figure 15 is a graph showing the results of circuit simulation of the power amplification circuit 1 and the gain of the power amplification circuit 110 which is a comparative object. Figure 16 is a graph showing the results of circuit simulation of the power amplification circuit 1 and the consumption current of the transistor Ql of the power amplification circuit 110. Figure 17 is a graph showing the results of circuit simulation of the power amplification circuit 1 and the amount of variation of the gain with respect to the gain at the time of small signal operation of the power amplification circuit 110.

[0135] Referring to Figure 14 , the waveform 212 indicates the gain of the phase of the high-frequency output signal RFout of the power amplification circuit 1. The waveform 213 indicates the gain of the phase of the high-frequency output signal RFout of the power amplification circuit 110 which is a comparative object. As shown by the waveform 212, the variation of the phase of the high-frequency output signal RFout of the power amplification circuit 1 is improved (suppressed) as compared with the variation of the phase of the high-frequency output signal RFout of the power amplification circuit 110.

[0136] Referring to Figure 15 , the waveform 214 indicates the gain of the power amplification circuit 1. The waveform 215 indicates the gain of the power amplification circuit 110 which is a comparative object. As shown by the waveform 214, the gain of the power amplification circuit 1 is improved (increased) as compared with the gain of the power amplification circuit 110. The P2dB (output power at the time of 2 dB gain compression) of the power amplification circuit 1 is increased by about 0.4 dB as compared with the power amplification circuit 110.

[0137] Referring to Figure 16 , the waveform 216 indicates the consumption current of the transistor Ql of the power amplification circuit 1. The waveform 217 indicates the consumption current of the transistor Ql of the power amplification circuit 110 which is a comparative object. As shown by the waveform 216, the consumption current of the transistor Ql of the power amplification circuit 1 is increased as compared with the consumption current of the transistor Ql of the power amplification circuit 110. This is accompanied by the suppression of the decrease (increase) of the base bias voltage of the transistor Ql of the power amplification circuit 1 as described above. However, the proportion of the consumption current of the transistor Ql with respect to the consumption current of the power amplification circuit 1 as a whole is very small. Therefore, the influence on the power efficiency of the power amplification circuit 1 as a whole is small.

[0138] Referring to Figure 17, the waveform 218 represents the amount of variation in the gain of the power amplification circuit 1 with respect to the gain at the time of small signal operation. The waveform 219 represents the amount of variation in the gain of the power amplification circuit 110 with respect to the gain at the time of small signal operation, which is the comparison target. As shown by the waveform 218, the amount of variation in the gain of the power amplification circuit 1 is improved (suppressed) as compared with the amount of variation in the gain of the power amplification circuit 110. In the power amplification circuit 1, the decrease in the gain is suppressed by the increase in the base bias voltage of the transistor Ql, and thus P2dB (output power at the time of 2 dB gain compression) is increased.

[0139] (SUMMARY)

[0140] As described above, the power amplification circuit 1 of the first embodiment has the high-pass filter 11 as the input matching circuit of the first amplifier 13, and thus can suppress the variation in the gain and can flatten the frequency characteristic of the amplitude gain within the signal band. Thus, the power amplification circuit 1 can obtain a linear amplification characteristic.

[0141] Further, the power amplification circuit 1 of the first embodiment has the autotransformer 18 as the inter-stage matching circuit between the first amplifier 13 and the second amplifier 20, and thus can suppress the power loss in the second amplifier 20 at the lower limit frequency f LO of the signal band. Thus, the power amplification circuit 1 can suppress the decrease in the power efficiency.

[0142] Further, the power amplification circuit 1 of the first embodiment has the impedance circuit 14 between the other end lib of the high-pass filter 11 and the other end of the resistor Rbb1, and thus can increase the bias voltage Biasl. Thus, the power amplification circuit 1 can suppress the change in the phase and the decrease in the gain.

[0143] (SECOND EMBODIMENT)

[0144] Although the autotransformer 18 is provided as the inter-stage matching circuit between the first amplifier 13 and the second amplifier 20 in the first embodiment, the present disclosure is not limited thereto. The inter-stage matching circuit can be a matching circuit that is wideband and low-loss.

[0145] Figure 18 FIG. 6 is a diagram showing the structure of the inter-stage matching circuit of the second embodiment. Figure 18 The inter-stage matching circuit shown is a transmission line transformer (TLT).

[0146] The transmission line transformer 18A includes a capacitor 18g, a first line 18h, and a second line 18i.

[0147] One end of the capacitor 18g is electrically connected to one end 18a of the transmission line transformer 18A. The other end of the capacitor 18g is electrically connected to one end of the first line 18h. The other end of the first line 18h is electrically connected to the other end 18b of the transmission line transformer 18A. One end of the second line 18i is electrically connected to the other end of the first line 18h. The other end of the second line 18i is electrically connected to the reference potential.

[0148] The transmission line transformer 18A is one example of a wideband and low-loss matching circuit that performs impedance matching between the output impedance of the first amplifier 13 and the input impedance of the second amplifier 20.

[0149] <3rd Embodiment>

[0150] Figure 19 is a diagram showing the structure of the inter-stage matching circuit of the 3rd embodiment. Figure 19 The illustrated inter-stage matching circuit is a conventional transformer 18B.

[0151] The conventional transformer 18B includes a capacitor 18j, a primary winding 18k, and a secondary winding 181. The conventional transformer 18B is a transformer that realizes impedance conversion with a conversion ratio of 1 : n2by magnetically coupling the primary winding 18k and the secondary winding 181 with a turns ratio of 1 : n.

[0152] One end of the capacitor 18j is electrically connected to one end 18a of the conventional transformer 18B. The other end of the capacitor 18j is electrically connected to one end of the primary winding 18k. The other end of the primary winding 18k is electrically connected to the reference potential. One end of the secondary winding 181 is electrically connected to the other end 18b of the conventional transformer 18B. The other end of the secondary winding 181 is electrically connected to the reference potential.

[0153] The conventional transformer 18B is one example of a wideband and low-loss matching circuit that performs impedance matching between the output impedance of the first amplifier 13 and the input impedance of the second amplifier 20.

[0154] <4th Embodiment>

[0155] Although in the 1st embodiment, it is provided that the impedance circuit 14 includes the capacitor 14c, the present disclosure is not limited thereto. The impedance circuit 14 can be a circuit that is capable of blocking the direct current component of the high-frequency input signal RFin after passing through the high-pass filter 11 and passing the alternating current component.

[0156] Figure 20 is a diagram showing the structure of the impedance circuit of the 4th embodiment.

[0157] The impedance circuit 14A includes a capacitor 14d and an inductor 14e. One end of the capacitor 14d is electrically connected to one end 14a of the impedance circuit 14A. The other end of the capacitor 14d is electrically connected to one end of the inductor 14e. That is, the capacitor 14d and the inductor 14e are connected in series. The other end of the inductor 14e is electrically connected to the other end 14b of the impedance circuit 14A. Alternatively, one end of the capacitor 14d can be electrically connected to the other end 14b of the impedance circuit 14A, and the other end of the inductor 14e can be electrically connected to the one end 14a of the impedance circuit 14A.

[0158] The impedance circuit 14A blocks a direct current component of the high-frequency input signal RFin that has passed through the high-pass filter 11 and passes an alternating current component.

[0159] <5th Embodiment>

[0160] Although the impedance circuit 14 is provided as one in the 1st embodiment, the present disclosure is not limited thereto. The 1st amplifier 13 can include a plurality of units each including a unit transistor that amplifies the high-frequency input signal RFin and outputs the amplified high-frequency signal RF1, and the plurality of impedance circuits can be included in the plurality of units.

[0161] Figure 21 Fig. 8 is a diagram showing a structure of the 1st amplifier 13A of the 5th embodiment. The 1st amplifier 13A includes M units of a unit 13A-1, a unit 13A-2, …, and a unit 13A-M.

[0162] The unit 13A-1 includes a unit capacitor Cbb-1, a unit resistor Rbb-1, a unit transistor Qc-1, and an impedance circuit 14B-1. The impedance circuit 14B-1 is electrically connected between the other end 11b of the high-pass filter 11 and one end of the unit capacitor Cbb-1 and the output terminal 15f of the 1st bias circuit 15 and the other end of the unit resistor Rbb-1.

[0163] The unit 13A-2 includes a unit capacitor Cbb-2, a unit resistor Rbb-2, a unit transistor Qc-2, and an impedance circuit 14B-2. The impedance circuit 14B-2 is electrically connected between the other end 11b of the high-pass filter 11 and one end of the unit capacitor Cbb-2 and the output terminal 15f of the 1st bias circuit 15 and the other end of the unit resistor Rbb-2.

[0164] The unit 13A-M includes a unit capacitor Cbb-M, a unit resistor Rbb-M, a unit transistor Qc-M, and an impedance circuit 14B-M. The impedance circuit 14B-M is electrically connected between the other end lib of the high-pass filter 11 and one end of the unit capacitor Cbb-M and between the output terminal 15f of the first bias circuit 15 and the other end of the unit resistor Rbb-M.

[0165] The impedance circuits 14B-1 to 14B-M correspond to the impedance circuit 14 or 14A.

[0166] The first amplifier 13A can adjust the constant of each impedance circuit 14B in accordance with the deviation (individual difference) of the amplification characteristics of each unit accompanying the unit configuration, and thus can more highly accurately suppress the change in phase and the drop in gain in each unit transistor Qc. Therefore, the first amplifier 13A can more highly accurately suppress the distortion of the high-frequency output signal RFout.

[0167] In addition, the above-described embodiments are for facilitating understanding of the present application and are not intended to limit the interpretation of the present application. The present application can be changed / modified without departing from the gist thereof, and the present application also includes equivalents thereof.

Claims

1. A power amplification circuit comprising: a high-pass filter which inputs a high-frequency input signal at one end; a first amplifier which amplifies the high-frequency input signal outputted from the other end of the high-pass filter and outputs an amplified high-frequency signal; a second amplifier which amplifies the high-frequency signal and outputs an amplified high-frequency output signal; a self-coupled transformer which is electrically connected between the first amplifier and the second amplifier and performs impedance matching between the first amplifier and the second amplifier; and an impedance circuit, the first amplifier comprising: a first transistor; a DC blocking capacitor which is electrically connected at one end to the other end of the high-pass filter and at the other end to a base of the first transistor; and a resistance which is electrically connected at one end to the base of the first transistor and at the other end inputs a bias voltage or a bias current from an output terminal of a bias circuit, the impedance circuit being electrically connected at one end to the other end of the high-pass filter, at the other end to the other end of the resistance and to the output terminal of the bias circuit which outputs the bias voltage or the bias current to the first amplifier, and outputting the high-frequency input signal outputted from the other end of the high-pass filter to the bias circuit.

2. A power amplification circuit comprising: a high-pass filter which inputs a high-frequency input signal at one end; a first amplifier which amplifies the high-frequency input signal outputted from the other end of the high-pass filter and outputs an amplified high-frequency signal; a second amplifier which amplifies the high-frequency signal and outputs an amplified high-frequency output signal; a transmission line transformer which is electrically connected between the first amplifier and the second amplifier and performs impedance matching between the first amplifier and the second amplifier; and an impedance circuit, the first amplifier comprising: a first transistor; a DC blocking capacitor which is electrically connected at one end to the other end of the high-pass filter and at the other end to a base of the first transistor; and a resistance which is electrically connected at one end to the base of the first transistor and at the other end inputs a bias voltage or a bias current from an output terminal of a bias circuit, the impedance circuit being electrically connected at one end to the other end of the high-pass filter, at the other end to the other end of the resistance and to the output terminal of the bias circuit which outputs the bias voltage or the bias current to the first amplifier, and outputting the high-frequency input signal outputted from the other end of the high-pass filter to the bias circuit.

3. A power amplification circuit comprising: a high-pass filter which inputs a high-frequency input signal at one end; a first amplifier which amplifies the high-frequency input signal outputted from the other end of the high-pass filter and outputs an amplified high-frequency signal; a second amplifier which amplifies the high-frequency signal and outputs an amplified high-frequency output signal; a regular transformer which is electrically connected between the first amplifier and the second amplifier and performs impedance matching between the first amplifier and the second amplifier; and an impedance circuit, the first amplifier comprising: a first transistor; a DC blocking capacitor which is electrically connected at one end to the other end of the high-pass filter and at the other end to a base of the first transistor; and a resistance which is electrically connected at one end to the base of the first transistor and at the other end inputs a bias voltage or a bias current from an output terminal of a bias circuit, the impedance circuit being electrically connected at one end to the other end of the high-pass filter, at the other end to the other end of the resistance and to the output terminal of the bias circuit which outputs the bias voltage or the bias current to the first amplifier, and outputting the high-frequency input signal outputted from the other end of the high-pass filter to the bias circuit. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ a resistor having one end electrically connected to the base of the first transistor and the other end from which a bias voltage or a bias current is input from an output terminal of a bias circuit, one end of the impedance circuit is electrically connected to the other end of the high-pass filter, the other end is electrically connected to the other end of the resistor and an output terminal of the bias circuit that outputs the bias voltage or the bias current to the first amplifier, and outputs the high-frequency input signal output from the other end of the high-pass filter to the bias circuit.

4. The power amplification circuit according to any one of claims 1 to 3, wherein the first amplifier includes a plurality of units each including a unit transistor that amplifies the high-frequency input signal and outputs the amplified high-frequency signal, a plurality of the impedance circuits are included in the plurality of units.

5. The power amplification circuit according to any one of claims 1 to 3, wherein the impedance circuit includes a capacitor.

6. The power amplification circuit according to any one of claims 1 to 3, wherein the impedance circuit includes a series connection circuit of a capacitor and an inductor.

7. The power amplification circuit according to any one of claims 1 to 3, wherein the other end of the impedance circuit is electrically connected to an emitter of a transistor, the transistor is included in the bias circuit, is connected in emitter follower, and outputs the bias voltage or the bias current from the emitter.

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