Planarization of semiconductor devices

Abstract

In certain embodiments, a method for processing a substrate includes applying a surface treatment to a selected surface of a substrate. The substrate has an uneven topography including structures defining recesses. The method further includes depositing a fill material on the substrate by spin-on deposition. The surface treatment directs the fill material to the recesses and away from the selected surface to fill the recesses with the fill material without adhering to the selected surface. The method further includes removing the surface treatment from the selected surface of the substrate and depositing a planarization film on the substrate by spin-on deposition. The planarization film is deposited on the top surface and on a top surface of the fill material.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of U.S. Provisional Application No. 62 / 860,359, filed June 12, 2019, which is incorporated herein by reference. Background Technology

[0003] This disclosure generally relates to microfabrication, and in some embodiments to the planarization of semiconductor devices.

[0004] Microfabrication involves various steps including deposition, patterning, modification, and material removal from the wafer. The processes used to build integrated circuits involve multiple film coatings deposited on a patterned topography, with the goal of providing a flat top surface. Depositing films on surfaces with patterned topography is beneficial for subsequent processes. For example, exposing photolithography patterns in a photoresist layer is more successful when exposing on a planar layer of photoresist or a planar underlayer such as an anti-reflective coating (ARC). Summary of the Invention

[0005] In some embodiments, a method for processing a substrate includes receiving a substrate having a non-planar topography, the non-planar topography including a structure defining a recess. The method further includes depositing a self-assembled monolayer (SAM) on a top surface of the structure of the substrate, without depositing the SAM on a surface located below the top surface of the structure of the substrate. The SAM provides a dewetting surface condition for a specific filler material. The method further includes depositing the specific filler material on the substrate by spin-coating, such that the specific filler material fills the recess without adhering to the SAM. The method further includes removing the SAM and depositing a planarization film on the substrate by spin-coating. The planarization film is deposited on the top surface of the structure and on the top surface of the specific filler material filling the recess. Attached Figure Description

[0006] To gain a more complete understanding of this disclosure and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which:

[0007] Figures 1A-1B The illustration shows a cross-sectional view of an example process for depositing a planarization film on a semiconductor device, where incomplete planarization occurs.

[0008] Figures 2A-2B The illustration shows a cross-sectional view of an example process for depositing a planarization film on a semiconductor device, where incomplete planarization occurs.

[0009] Figures 3A-3E The illustration shows cross-sectional views of example semiconductor devices at various stages of a process for depositing a planarization film according to certain embodiments of the present disclosure.

[0010] Figures 4A-4E FIGS. 1-4 illustrate cross-sectional views of example semiconductor devices at various stages of a process for depositing a planarization film, in accordance with certain embodiments of the present disclosure;

[0011] Figures 5A-5E FIGS. 1-4 illustrate cross-sectional views of example semiconductor devices at various stages of a process for depositing a planarization film, in accordance with certain embodiments of the present disclosure;

[0012] Figures 6A-6B FIG. 5 illustrates example details of an example self-assembled monolayer, in accordance with certain embodiments of the present disclosure;

[0013] Figure 7 FIG. 6 illustrates an example method for forming a semiconductor device, in accordance with certain embodiments of the present disclosure;

[0014] Figure 8 FIG. 6 illustrates an example method for forming a semiconductor device, in accordance with certain embodiments of the present disclosure; and

[0015] Figure 9 FIG. 6 illustrates an example method for forming a semiconductor device, in accordance with certain embodiments of the present disclosure. DETAILED DESCRIPTION

[0016] In semiconductor manufacturing processes, non-planar surfaces can cause yield problems in subsequent steps. As just one example, lithographic imaging is generally used as part of the process to pattern the surface of a semiconductor device during fabrication. Lithography is used to create a desired pattern in an underlying layer, and can include photolithography, e-beam lithography, extreme ultraviolet lithography, and other types of lithography. However, when the resist image is on top of a non-planar layer (e.g., potentially non-planar due to the various topographies of the layers underneath), the pattern can be distorted after development due to variations in the thickness of the resist image (because of the undulations in the surface on which the resist is deposited). These distortions can affect critical dimensions and other aspects of fabrication.

[0017] Planarization of a film is difficult when the film is deposited on top of a surface having various topographies, resulting in the film itself having various topographies. As semiconductor devices are scaled down, planarization has become even more difficult, at least in part due to the increased topography variations that are accompanied within smaller areas of a wafer undergoing fabrication. For example, as technology nodes are scaled down to 5 nm nodes and even smaller, the problem of planarization continues to exacerbate. Furthermore, long-range planarization of spin-on carbon, spin-on dielectrics, metal oxides, bottom anti-reflective coatings (e.g., planarization over areas greater than 5 pm) frequently experience incomplete planarization over various topographies, resulting in the resulting film thickness deviations beyond acceptable levels.

[0018] One conventional technique to planarize topography is to use chemical mechanical polishing (CMP). While CMP can be useful at some stages of microfabrication, CMP can present certain problems at other stages due to the rough nature or relatively high cost of CMP.

[0019] At some stages of microfabrication, planarization by spin-on deposition (also referred to as spin-on coating) can be desirable. However, planarization by spin-on coating can be very challenging, particularly in certain applications. Film thickness variations of spin-on films deposited over topography often drive downstream processing out of specification, and actions must be taken to control planarization of the films.

[0020] Unit operations that have errors introduced due to high film thickness variations include, for example, lithography critical dimension variations due to reflectivity, lithography focus control, etch depth, and subsequent deposition processes. Additionally, novel three-dimensional applications and processes, such as pattern flip and excavated material pillar spacer processes, can require strict film thickness levels over topography.

[0021] Accordingly, semiconductor fabrication processes often include steps designed to planarize one or more surfaces of a semiconductor to a desired degree or as much as possible at one or more stages of the semiconductor fabrication process, as appropriate.

[0022] Embodiments of the present disclosure provide improved techniques for planarizing films deposited over substrates having a wide variety of topographies. Embodiments of the present disclosure include applying a surface treatment (e.g., a self-assembled monolayer) to selected surfaces of a substrate having a wide variety of topographies, including structures defining recesses. For example, a surface treatment can be applied to a top surface of a substrate without being applied to surfaces of the substrate in recesses. The surface treatment creates a surface condition in which a particular fill material is less likely (or not) to form on selected surfaces of the substrate that include the surface treatment (e.g., the top surface of the substrate) and is directed to and deposited on other surfaces of the substrate that have not been applied with the surface treatment (e.g., surfaces in recesses). As an example, a surface treatment can be described as creating a dewetting surface condition on a top surface of a substrate to direct a particular fill material to recesses that are “wettable” with respect to the particular fill material.

[0023] A specific fill material is then deposited and fills the recesses in the substrate, thereby "pre-filling" the recesses prior to subsequent deposition of a planarization film. The specific fill material can be deposited such that the top surface of the substrate, along with the specific fill material deposited in the recesses, provides a surface that is virtually planar. In certain embodiments, after removal of the surface treatment and any other suitable layers (e.g., a hard mask), a planarization film (e.g., an organic film deposited using a spin-on deposition process) is deposited on the virtually planar surface of the substrate (resulting from the deposition of the specific fill material in the recesses), which has improved planarization relative to films deposited using conventional techniques.

[0024] Embodiments of the present disclosure include spin-on planarization methods that incorporate the use of surface-selective monolayers. Spin-on surface-selective monolayers can have reasonable processing times, as well as the ability to control film dewetting relative to surfaces that have not been applied with a surface-selective monolayer. Embodiments of the present disclosure include attaching surface-selective monolayer(s) to a hard mask surface to direct a spin-on film into recesses (such as trench regions) of a given substrate topography. This initial spin-on film can fill in the topography up to the top surface of the substrate. A second spin-on film is then deposited to complete planarization of the substrate. A variety of different materials can be used in embodiments of the present disclosure. Such techniques can improve planarization through spin-on deposition, and can reduce processing costs and improve yield.

[0025] Figures 1A-1B A cross-sectional view of an example process of depositing a planarization film on a semiconductor device 100 is illustrated, in which incomplete planarization occurs. As shown in FIG. 1A, the semiconductor device 100 includes a substrate 102, which can be a portion of a substrate of a larger device (e.g., a wafer or semiconductor wafer) that is undergoing microfabrication. Figure 1A

[0026] The substrate 102 has a non-planar topography that includes structures 104 that define recesses 106. While a particular number of structures 104 and recesses 106 are illustrated, substrates contemplated by the present disclosure, such as the substrate 102, include any suitable number of structures 104 and recesses 106. Throughout the present disclosure, structures of a substrate (e.g., the structures 104 and structures described below with reference to other figures) can also be referred to as raised regions. While the present disclosure primarily describes "recesses," it will be appreciated that other suitable features can be formed in a semiconductor layer using embodiments of the present disclosure, including lines, holes, open regions, trenches, vias, and / or other suitable structures, whether or not considered "recesses." The recesses (e.g., the recesses 106 or other recesses of the present disclosure) can be formed, for example, by building structures (e.g., the structures 104 or other structures of the present disclosure) on an underlying layer and / or by etching material from one or more layers.

[0027] ​The substrate 102 can include a top surface 108, which can also be referred to as a top surface 108 of the structure 104 of the substrate 102. The recesses 106 can include surfaces 110, such as sidewall surfaces 110a and a bottom surface 110b. The surfaces 110 of the recesses 106 can be considered to be below the top surface 108 of the structure 104 of the substrate 102.

[0028] The substrate 102 (including the structure 104 of the substrate 102) can be any suitable material, such as an organic hard mask, an oxide, a nitride, a dielectric, a barrier material, or a conductive material. In a particular example, the substrate 102 includes silicon dioxide.

[0029] Figure 1B A cross-sectional view of the semiconductor device 100 is illustrated after the planarization film 112 has been deposited on the substrate 102. In one example, the planarization film 112 is deposited using a spin-on deposition process; however, the present disclosure contemplates a planarization film 112 deposited in any suitable manner. In certain embodiments, the planarization film 112 includes an organic material, such as spin-on carbon; however, the present disclosure contemplates a planarization film 112 including any suitable material.

[0030] With spin-on planarization, a particular material (e.g., the material of the planarization film 112) is deposited on a substrate (e.g., the substrate 102). The substrate is then spun at a relatively high speed (if not already spinning, possibly at a relatively low speed) such that centrifugal force causes the deposited material to move toward the edge of the substrate, thereby coating the substrate. Excess material is typically flung off the substrate.

[0031] When a given topography or relief pattern has regions of densely packed structures (e.g., from Figure 1A And Figure 1B From the left side of the figure, the first four recesses 106), this density can push the deposited material upward and manipulate what mass fraction of material can enter the recesses. In regions of sparsely packed or filled features (e.g., where there is an isolation line with no other features nearby) (e.g., in the rightmost recess 106 in Figure 1A And Figure 1B The deposited material can settle into these larger pockets such that the final deposited z-height will follow the percentage of open area. While these issues can exist at various sizes of technology nodes, they can be exacerbated as technology nodes continue to shrink, with the width of the recesses 106 becoming even smaller and features packed more densely, creating increased topography variations in even tighter spaces.

[0032] Figure 1BFIGURE illustrates an example result of spin-on deposition of a planarization film 112 having film z-height variations over the topography regions of the substrate 102. For example, the top surface 114 of the planarization film 112 is not planar. It should be understood that the varied topography of the planarization film 112 as shown in Figure 1B FIGURE illustrates an example result of spin-on deposition of a planarization film 112 having film z-height variations over the topography regions of the substrate 102. For example, the top surface 114 of the planarization film 112 is not planar. It should be understood that the varied topography of the planarization film 112 as shown in

[0033] Figures 2A-2B FIGURE illustrates a cross-sectional view of an example process of depositing a planarization film on a semiconductor device 200 in which incomplete planarization occurs. As shown in Figure 2A

[0034] The substrate 202 has a non-planar topography that includes structures 204 that define recesses 206. While a particular number of structures 204 and recesses 206 are illustrated, a substrate such as the substrate 202 contemplated by the present disclosure includes any suitable number of structures 204 and recesses 206. Throughout the present disclosure, the structures 204 can also be referred to as raised regions.

[0035] The structures 204 and recesses 206 of the substrate 202 as formed can be considered three-dimensional features (e.g., three-dimensional trenches). It can be difficult to fill and planarize such structures simultaneously with a minimum number of processing steps. Such structures vary depending on the application, but can have a considerable degree of size variation (possibly on the order of a few microns wide or deep).

[0036] The substrate 202 can include a top surface 208, which can also be referred to as a top surface 208 of the structures 204 of the substrate 202. The recesses 206 can include surfaces 210, such as sidewall surfaces 210a and a bottom surface 210b. In the illustrated example, the sidewall surfaces 210a produce a stepped sidewall of the recesses 206 that increases the width of the recesses 106 incrementally from the bottom of the recesses 206 to the top of the recesses 206. The surfaces 210 of the recesses 206 can be considered to be below the top surface 208 of the structures 204 of the substrate 202.

[0037] The substrate 202 (including the structures 204 of the substrate 202) can be a similar material as the substrate 102.

[0038] Figure 2B FIGURE illustrates a cross-sectional view of the semiconductor device 200 after the planarization film 212 has been deposited on the substrate 202. In one example, the planarization film 212 is deposited using a similar process as described above with reference to Figures 1A-1B ​The described spin-on process is similar to a spin-on deposition process to deposit the planarization film 212; however, the present disclosure contemplates planarization films 212 deposited in any suitable manner. In certain embodiments, the planarization film 212 comprises an organic material, such as spin-on carbon; however, the present disclosure contemplates planarization films 212 comprising any suitable material.

[0039] Figure 2B An example result of a spin-on deposition coating is illustrated, with film z-height variations over regions of topography. For example, the top surface 214 of the planarization film 212 is not planar. It should be understood that the varied topography of the planarization film 212 as shown in Figure 2B

[0040] As can be seen from Figures 1A-1B and Figures 2A-2B simply depositing a planarization film on a substrate having a wide variety of topography can result in a film having incomplete planarization, which can negatively impact subsequent steps of a manufacturing process.

[0041] Figures 3A-3E Cross-sectional diagrams of an example semiconductor device 300 at various stages of a process for depositing a planarization film in accordance with certain embodiments of the present disclosure are illustrated. As described in greater detail below, Figures 3A-3E An example process includes applying a surface treatment to a selected surface of a substrate of the semiconductor device 300 and depositing a planarization film in multiple deposition steps.

[0042] As shown in Figure 3A The semiconductor device 300 is largely similar to the semiconductor device 100 in Figure 1A and includes a substrate 302, which can be a portion of a substrate of a larger device (e.g., a wafer or semiconductor wafer) that is subject to microfabrication. The substrate 302, structure 304, recess 306, top surface 308, surface 310 are generally similar to the substrate 202, structure 204, recess 206, top surface 208, and surface 210, the description of which is incorporated by reference without repetition.

[0043] Figures 3B-3C ​The stages of the process for depositing a planarization film on the substrate 302 are illustrated, in which a surface treatment is applied to the selected surface of the substrate 302, and in which the recess 306 of the substrate 302 is filled (partially or completely) with a fill material. That is, the surface treatment is first applied to the selected surface of the substrate 302, and the recess 306 of the substrate 302 is filled (partially or completely) with a fill material to provide a more planar underlying topography than Figures 3A-3B that illustrated in FIG. 1, rather than proceeding to deposit a planarization film on the substrate 302 (as was the case with the substrate 102 in FIG. 1). Figures 1A-1B

[0044] In the illustrated example, as shown in FIG. 2, there is a surface condition 216 on the top surface 208 of the substrate 202, and there is a surface condition 218 on the surface 210 of the recess 206. Figure 3B

[0045] The surface having the surface condition 216 (in the illustrated example, the top surface 208 of the substrate 202) tends to repel or otherwise direct certain fill materials (such as the particular fill material to be deposited in FIG. 1) away from the surface having the surface condition 216. The surface condition 216 can also be referred to as a de-wetting state or de-wetting surface condition. In certain embodiments, the surface condition 216 provides a high hydrophobicity mechanism that directs certain fill materials away from the surface having the surface condition 216. In the de-wetting state, the surface contact angle can be matched for the particular fill material (such as the fill material to be deposited in FIG. 1) to achieve optimal solute / solvent de-wetting. Figure 3C Figure 3C

[0046] The surface having the surface condition 218 (in the illustrated example, the surface 210 of the recess 206) tends to bind with or even attract certain fill materials (such as the particular fill material to be deposited in FIG. 1) to the surface having the surface condition 218. The surface condition 218 can also be referred to as a wettable state. In the wettable state, the surface contact angle can be matched for the particular fill material (such as the fill material to be deposited in FIG. 1) to achieve optimal solute / solvent wettability. Figure 3C Figure 3C

[0047] One or both of the surface condition 216 and the surface condition 218 can be created by applying a surface treatment to the surface(s) of the substrate 202 where those conditions exist. The surface condition of a surface of the substrate 202 can also be referred to as the surface energy of the surface, such that changing the surface condition of a surface changes the surface energy of the surface.

[0048] ​​​​​​For example, to provide a surface condition 316 to a selected surface of the substrate 302 (e.g., the top surface 308), a surface treatment can be applied to the surface of the substrate 302 targeted to have the surface condition 316. The surface treatment creates a dewetted surface condition relative to a particular fill material (to be deposited in Figure 3C the substrate 302. In certain embodiments, applying the surface treatment to the top surface 308 of the substrate 302 includes depositing a self-assembled monolayer (SAM) on the top surface 308 of the substrate 302. SAMs are described in greater detail below.

[0049] As another example, to provide a surface condition 318 to a selected surface of the substrate 302 (e.g., the surface 310), a change to the surface condition of the selected surface can be appropriate or can be inappropriate. In certain embodiments, the material at the selected surface (e.g., the surface 310 of the recess 306) can have been selected to be wettable relative to a particular fill material (to be deposited in Figure 3C the substrate 302. Alternatively, the particular fill material (to be deposited in Figure 3C the substrate 302) can have been selected because the material at the selected surface (e.g., the surface 310 of the recess 306) is wettable relative to that particular fill material without additional treatment of the surface of the substrate 302. However, in certain embodiments, the surfaces of the substrate 302 where the fill material is desired to be deposited can be treated to facilitate deposition of the fill material at those surfaces.

[0050] As shown in Figure 3C the substrate 302. As the fill material 320 is deposited, the surface condition 316 of the top surface 308 of the substrate 302 directs the fill material 320 to the recess 306 and away from the top surface 308 to fill the recess 306 with the fill material 320 without adhering to the surface (the top surface 308) having the surface condition 316. In certain embodiments, the combination of the surface condition 316 on the selected surface of the substrate 302 (e.g., the top surface 308 of the substrate 302) and the surface condition 318 on other surfaces of the substrate 302 (e.g., the surface 310 in the recess 306 of the substrate 302) facilitates deposition of the fill material 320 in the recess 306 without depositing the fill material 320 on the selected surface of the substrate 302 (e.g., the top surface 308).

[0051] Throughout this disclosure, reference is made to a fill material (e.g., fill material 320 and other fill materials described with reference to other figures below) that fills one or more recesses (e.g., recess 306 or other recesses described with reference to other figures below). This disclosure contemplates fill materials that partially fill recesses (specifically fill recesses in a manner that does not overflow or underflow) or overfill recesses.

[0052] Fill material 320 can include any suitable material and can be deposited using a particular solute / solvent combination. To name a few examples, fill material 320 can be a photoresist, a silicon-containing anti-reflective coating, a spin-on organic carbon, or a spin-on dielectric. In the case of a photoresist, the photoresist can include several components including, but not limited to, a polymer backbone, a solvent, a photoacid generator (PAG), and a base quencher. Example base polymers can include novolac resins, polymethyl methacrylate, and poly(styrene)-B-poly(4-hydroxystyrene).

[0053] Spin-on carbon or organic materials can be used in patterning processes to optimize optical reflectivity, planarization, and / or etch resistance. Typical chemistries are often highly aromatic (AR) and contain cross-linking components. Polystyrene is an example of an aromatic, high carbon content, spin-on polymer. In the example of a spin-on dielectric, the spin-on dielectric can be a functional, silicon-containing, inorganic polymer material. A particular example spin-on dielectric is polysilazane. In certain embodiments, fill material 320 is deposited using a spin-on deposition process. To name one example, fill material 320 can be an organic material, such as a spin-on carbon, deposited using a spin-on deposition process.

[0054] As shown in Figure 3C After deposition of fill material 320, fill material 320 can substantially fill recesses 306 such that top surface 308 of substrate 302 and a top surface 322 of fill material 320 collectively provide a substantially planar surface for subsequent deposition of a planarization film, as shown in Figures 3A-3B A surface treatment (e.g., a deposited SAM) that produces a surface condition 316 (e.g., a dewetted surface condition) for top surface 308 of substrate 302 directs fill material 320 to recesses 306 without depositing fill material 320 on top surface 308 of substrate 302. Directing fill material 320 to recesses 306 allows fill material 320 to reduce and potentially eliminate at least a portion of the variation in topography (e.g., variation in topography shown in Figures 3A-3B Depositing fill material 320 in recesses 306 provides an improved (and potentially overall flat) surface for deposition of a planarization film in a subsequent deposition step, rather than depositing a planarization film on the various topographies of substrate 302 shown in

[0055] As shown in Figure 3D In certain embodiments, to achieve that both the top surface 308 and the top surface 322 have the surface condition 318 (e.g., a wettability condition relative to a planarization film to be deposited), the surface treatment applied to the selected surface of the substrate 302 (the top surface 308 of the substrate 302) is removed from the selected surface of the substrate 302. Figure 3B The surface treatment applied to the selected surface of the substrate 302 (the top surface 308 of the substrate 302) can be removed from the selected surface of the substrate 302 using any suitable process.

[0056] As shown in Figure 3E A planarization film 324 is deposited on the substrate 302, as shown in Figure 3A The top surface 326 of the planarization film 324 has improved planarity relative to the various topographies of the substrate 302 shown in Figure 3C The top surface 326 of the planarization film 324 has improved planarity relative to the top surface 114 of the planarization film 112 in Figure 1B The top surface 326 of the planarization film 324 has improved planarity relative to the top surface 114 of the planarization film 112 in

[0057] The planarization film 324 can be deposited in any suitable manner. In certain embodiments, the planarization film 324 is deposited using a spin-on deposition process. For example, the planarization film 324 can include an organic material. As a particular example, the planarization film 324 can be spin-on carbon. The planarization film 324 can be deposited to a desired thickness appropriate for the particular implementation.

[0058] After deposition of the planarization film 324 having improved planar properties, additional features of the semiconductor device 300 can be formed in layers above or below the planarization film 324. These features can include metal lines, vias, or other suitable features, to name a few examples. Due to the improved planar properties of the planarization film 324, subsequent patterned features show improved size control and ultimately improved downstream yield.

[0059] Figures 4A-4E FIGS. 1-3 illustrate cross-sectional views of example semiconductor devices 100, 200, and 300, respectively, at various stages of a process for depositing a planarization film in accordance with certain embodiments of the present disclosure. As described in greater detail below, Figures 4A-4E The example process of FIGS. 1-3 includes applying a surface treatment to a selected surface of a substrate of the semiconductor device 100 and depositing a planarization film in multiple deposition steps.

[0060] As Figure 4A illustrated in FIG. 4, semiconductor device 400 is similar to semiconductor device 300 as Figure 3A illustrated in FIG. 3 and is largely analogous; however, semiconductor device 400 includes a hard mask 409. Semiconductor device 400 includes a substrate 402 that is similar to substrate 302 and can include analogous structures and materials, the description of which is not repeated. Substrate 402, structure 404, recess 406, top surface 408, surface 410 are generally similar to substrate 302, structure 304, recess 306, top surface 308, and surface 310, the description of which is incorporated by reference without repetition.

[0061] Semiconductor device 400 includes a hard mask 409 that can include any suitable material and can be used to form recess 406. As an example, hard mask 409 can include a resist layer, a spin-on carbon layer, an amorphous carbon layer (whether deposited using a spin-on deposition process or not), a silicon nitride layer, a silicon dioxide layer, a metal-containing layer, or any other suitable type of hard mask. Although described as a hard mask, hard mask 409 can be any suitable type of deposited film, such as a resist layer.

[0062] In certain embodiments, hard mask 409 is relatively thin with respect to an underlying layer (e.g., an underlying portion of substrate 402), such as, for example, 2 nm to 20 nm. Hard mask 409 has a top surface 411. After formation of recess 406, and as shown in Figure 4A Hard mask 409 can be located at top surface 408 of structure 404 of substrate 402, which can also be referred to as top surface 408 of substrate 402, after formation of recess 406, and as shown in Figures 3A-3E Substrate 302 in FIG. 3 can include a hard mask as a top layer. Thus, for the purposes of the present disclosure, top surface 411 of hard mask 409 can also be considered a top surface of substrate 402.

[0063] Figures 4B-4C phases of a process for depositing a planarization film on substrate 402, in which a surface treatment is applied to selected surfaces of substrate 402, and in which recess 406 of substrate 402 is (partially or completely) filled with a fill material. That is, a surface treatment is first applied to selected surfaces of substrate 402, and recess 406 of substrate 402 is (partially or completely) filled with a fill material to provide an underlying topography that is flatter than the topography as Figures 4A-4B illustrated in FIG. 3, rather than proceeding to deposit a planarization film on substrate 402 (as was the case for substrate 102 in FIG. 1). Figures 1A-1B illustrated in FIG. 3, rather than proceeding to deposit a planarization film on substrate 402 (as was the case for substrate 102 in FIG. 1).

[0064] exist Figure 4B In the example illustrated, surface treatment 416 is applied to the top surface 411 of the hard mask 409 (which can also be considered the top surface of the substrate 402), but not to the surface 410 of the recess 406 of the substrate 402. Surface treatment 416 produces surface condition 316, wherein the surface having surface condition 316 (e.g., the top surface 411 of the hard mask 409 in the illustrated example) tends to hold certain filling materials (such as...) Figure 4C The specific filler material to be deposited in the middle repels or otherwise directs it away from the surface with surface condition 316.

[0065] Surface 410 in the recess 406 of substrate 402 may have a surface condition similar to surface condition 318, and the surface with surface condition 318 tends to be compatible with certain filling materials (such as, Figure 4C The specific filler material to be deposited in the middle is combined with or even attracted to the surface with surface condition 318.

[0066] In some embodiments, surface treatment 416 is a SAM deposited to produce surface condition 316 for a surface on which SAM is deposited. For example, to provide surface condition 316 to a selected surface of substrate 402 (e.g., the top surface 411 of hard mask 409) Figure 4C (In the dewetting state of the filler material to be deposited), surface treatment 416 can be applied to the surface of substrate 402 with the surface condition 316 as the target, so as to guide the filler material away from the surface on which surface treatment 416 has been applied.

[0067] In some embodiments, applying surface treatment 416 to the top surface 411 of hard mask 409 includes depositing SAM on the top surface 411 of hard mask 409. As a particular example, the SAM may be a liquid-phase self-assembled monolayer. Although described as a monolayer, those skilled in the art will understand that complete coverage of surface treatment 416 may or may not be achieved, and various aspects of this disclosure can still be achieved. In other words, perfect alignment of the SAM (or other suitable surface treatment) is not required because solute / solvent dewetting can occur without complete monolayer alignment. A given surface-selective monolayer has terminal molecular groups designed to induce dewetting of the spin-coated material.

[0068] The surface treatment 416 can be applied in any suitable manner. In certain embodiments, the surface treatment 416 (e.g., a SAM) is deposited by a spin-on technique or a low temperature chemical vapor deposition (CVD) process. For example, a particular surface treatment 416 (e.g., a SAM) can be deposited on a selected surface of the substrate 402 (e.g., the top surface 411 of the hardmask 409). The applied surface treatment 416 can be selective to a particular underlying material, such that the surface treatment 416 is applied to a particular surface and not others. For example, the surface treatment 416 can be selective to the material of the hardmask 409, such that the surface treatment 416 is deposited on the top surface 411 of the hardmask 409 and not on the surface 410 of the recess 406. The particular process steps and chemicals used to deposit the surface treatment can vary depending on the surface treatment, the surface to which the surface treatment is applied, and the deposition technique.

[0069] Surface treatments, including self-assembled monolayers (SAMs), can be applied to pure poly crystalline surfaces as well as other types of organic materials or liquids. The surface treatment 416 can be tailored to adhere to a particular substrate and provide specific functionality for various applications (e.g., liquid dewetting). As a few examples, liquid phase SAMs can be able to selectively and significantly alter the wetting properties of surfaces, such as metals (e.g., copper), hardmasks, oxides, organic surfaces, and other dielectrics.

[0070] As shown in FIG. 4B, the surface treatment 416 is applied to the top surface 411 of the hardmask 409. The surface treatment 416 can be applied to the top surface 411 of the hardmask 409 by any suitable technique. In certain embodiments, the surface treatment 416 is applied to the top surface 411 of the hardmask 409 by a spin-on technique or a low temperature chemical vapor deposition (CVD) process. The particular process steps and chemicals used to apply the surface treatment 416 can vary depending on the surface treatment, the surface to which the surface treatment is applied, and the deposition technique. Figure 4C As shown in FIG. 4C, the fill material 420 is deposited in the recess 406, over the surface 410 of the recess 406 (a surface that has not yet been applied with the surface treatment 416 and generally has a similar surface condition as the surface condition 318). With the deposition of the fill material 420, the surface treatment 416 of the top surface 411 of the hardmask 409 directs the fill material 420 into the recess 406 and away from the top surface 411 to fill the recess 406 with the fill material 420 without adhering to the surface that has been applied with the surface treatment 416 (e.g., the top surface 411 of the hardmask 409). In certain embodiments, the combination of the surface treatment 416 on the selected surface of the substrate 402 (e.g., the top surface 411) and the lack of surface treatment 416 on other surfaces (e.g., the surface 410 in the recess 406) facilitates the deposition of the fill material 420 in the recess 406 without depositing the fill material 420 on the selected surface of the substrate 402.

[0071] The fill material 420 is generally similar to the fill material 320, the details of which are incorporated by reference.

[0072] Furthermore, in certain embodiments, one or more deposition steps can be performed until a desired fill level is reached, e.g., depending on the topography of the substrate 402, including the depth of the recess 406 and the selected fill material 420, and the associated deposition technique. In certain embodiments, the fill material 420 is deposited using a spin-on deposition process. As one example only, the fill material 420 can be an organic material, such as spin-on carbon, deposited using a spin-on deposition process.

[0073] As shown in Figure 4C the fill material 420 can substantially fill the recess 406 such that the top surface 408 of the substrate 402 and the top surface 422 of the fill material 420 collectively provide a substantially planar surface for subsequent deposition of a planarization film. As described above, the surface treatment 416 (e.g., the deposited SAM) creates a surface condition 316 for the top surface 411 of the hardmask 409 that directs the fill material 420 into the recess 406 without depositing the fill material 420 on the top surface 411 of the hardmask 409. Directing the fill material 420 into the recess 406 allows the fill material 420 to reduce and potentially eliminate at least a portion of the variation in topography present in the substrate 402 (e.g., the variation in topography shown in Figures 4A-4B the fill material 420 deposited in the recess 406 provides an improved (and potentially overall flat) surface for deposition of a planarization film in subsequent deposition steps, rather than depositing the planarization film on the various topographies of the substrate 402 shown in Figures 4A-4B .

[0074] In a particular example, where a SAM bonds to the surface of the substrate 402 (e.g., the top surface 411 of the hardmask 409), a solute / solvent of a particular fill material 420 can be used for spin-on deposition. For spin-on deposition, the particular fill material 420 can be deposited on the substrate 402 and then the substrate 402 can be spun to spread the particular fill material 420 across the surface of the substrate 402 (potentially uniformly). With the SAM attached to the top surface 411 of the hardmask 409, the top surface 411 of the hardmask 409 has a surface energy that inherently repels the particular fill material 420. After spin-coating the particular fill material 420, the particular fill material 420 fills the recess 406 creating an approximately planar surface without depositing on the top surface 411 of the hardmask 409. The particular fill material 420 (e.g., a particular polymer) can be selected based on the de-wetting properties of the selected surface treatment 416 (e.g., a SAM), or the particular surface treatment 416 (e.g., a particular SAM) can be selected based on the desired fill material 420 (e.g., a particular polymer).

[0075] As shown in Figure 4DAs shown, surface treatment 416 and hard mask 409 have been removed from semiconductor device 400. In some embodiments, surface treatment 416 and hard mask 409 are removed in one or more etching steps by any suitable combination of wet solvent stripping, wet etching, plasma etching, or UV / O2 treatment. This disclosure contemplates any suitable type of removal process for removing surface treatment 416 and hard mask 409.

[0076] Figure 4D The semiconductor device 400 is shown after the deposition of filler material 420 and the removal of surface treatment 416 and hard mask 409. The removal process for removing surface treatment 416 and hard mask 409 leaves filler material 420 in the recess 406 of substrate 402. In some embodiments, the etchant used in one or more etching steps for removing surface treatment 416 and hard mask 409 is selective for surface treatment 416 and / or hard mask 409 and does not etch (or only minimally etches) filler material 420. As a result, the recess 406 is filled with filler material 420, such that the top surface 408 of substrate 402 and the top surface 422 of filler material 420 together form an essentially flat surface.

[0077] In some embodiments, as Figure 4C As a result of the deposition process for depositing filler material 420, the recess 406 becomes slightly overfilled. This overfilling condition may manifest as a high point above the recess 406, but is dewetting from a surface with surface treatment 416 (e.g., the top surface 411 of hard mask 409). This minor overfilled area can be addressed in subsequent depositions (e.g., during the deposition of a planarization film, as described below). Figure 4E The material is absorbed in the cavity (as described) or may be removed by an etching step or CMP (if necessary). This heavy-duty deposition and removal process can be used to reduce or eliminate cases where the filler material 420 does not completely fill the recess 406.

[0078] exist Figure 4D In this process, both the top surface 408 of the substrate 402 and the top surface 422 of the filler material 420 have a surface condition similar to that of the surface condition 318 (e.g., wettable relative to the planarization film to be deposited in subsequent steps).

[0079] like Figure 4E As shown, planarization film 424 is deposited on substrate 402. Figure 4E Overall with Figure 3EAnalogously, where reference to the fill material 320, the planarization film 324, the top surface 326 is replaced with reference to the fill material 420, the planarization film 424, the top surface 426, respectively, along with other suitable analogous replacements of like elements. Thus, Figure 3E The above description of and its associated advantages are incorporated herein by reference without repetition.

[0080] In the case where the recesses 406 of the substrate 402 have been filled (or mostly filled or slightly overfilled) with the fill material 420, the various topographies of the substrate 402 present in Figure 4A and Figure 4B have been reduced or eliminated, and due to the presence of minimal z-height disparity, the second spin-on deposition step for depositing the planarization film 424 can more effectively planarize over the substrate 402 to a desired thickness level.

[0081] In the case where the substrate 402 is planarized, additional microfabrication steps can be performed. For example, after depositing the planarization film 424 with improved planarization properties, additional features of the semiconductor device 400 can be formed in layers above or below the planarization film 424. These features can include metal lines, vias, or other suitable features, to name a few examples. Due to the improved planarization properties of the planarization film 424, subsequent patterned features tend to have improved dimensional control and ultimately improved downstream yield.

[0082] Figures 5A-5E FIGS. 1-4 illustrate cross-sectional views of example semiconductor devices 100, 200, 300, 400, respectively, at various stages for depositing a planarization film in accordance with certain embodiments of the present disclosure. As described in greater detail below, Figures 5A-5E The example processes of FIGS. 1-4 include applying a surface treatment to a selected surface of a substrate of a semiconductor device and depositing a planarization film in a plurality of deposition steps. Figures 5A-5E The example processes of FIGS. 1-4, which incorporate the use of a surface treatment to modify the surface condition of one or more portions of a substrate, can provide improved capabilities for planarizing a film (e.g., spin-on carbon) deposited over an extended recessed area as part of an etch-back process.

[0083] As described in greater detail below with respect to FIGS. 5-8, Figure 5AAs shown, in the illustrated example, semiconductor device 500 includes a substrate 502, which may be part of the substrate of a larger device (e.g., a wafer or semiconductor wafer) undergoing microfabrication. Substrate 502 has an uneven topography including raised regions 504 and recessed regions 505 having recesses 506. While a specific number of raised regions 504 and recessed regions 505 / recesses 506 are illustrated, substrates contemplated in this disclosure (such as substrate 502) include any suitable number of raised regions 504 and recessed regions 505 / recesses 506. The raised regions 504 may also be referred to as structures.

[0084] Substrate 502 may include a top surface 508, which may also be referred to as the top surface 508 of the raised region 504 of substrate 502. The recessed region 505 / recess 506 may include surfaces 510a and 510b. As an example, surface 510a may be considered as a sidewall surface (e.g., Figure 5B As shown in the diagram, surface 510b can be considered as the bottom surface. Surfaces 510a and 510b can be considered as located below the top surface 508 of substrate 502.

[0085] Substrate 502 can be any suitable material, such as an organic hard mask, oxide, nitride, dielectric, barrier material, or conductive material. In a particular example, substrate 302 includes silicon, silicon dioxide, silicon nitride, and / or silicon oxide nitride.

[0086] A hard mask 512 has been deposited on substrate 502. In some embodiments, the hard mask 512 is spin-coated carbon or other organic material deposited using a spin coating technique. As an example, the hard mask 512 may include a resist layer, a spin-coated carbon layer, an amorphous carbon layer (whether or not deposited using a spin coating deposition process), a silicon nitride layer, a silicon dioxide layer, a metal-containing layer, or any other suitable type of hard mask. While this disclosure primarily describes the hard mask 512 as a specific material deposited using a particular technique, this disclosure contemplates any suitable material and any hard mask 512 deposited using any suitable technique. Furthermore, although described as a hard mask, the hard mask 512 may be a resist or other suitable type of layer.

[0087] like Figure 5B As shown, an etchback process has been performed on the hard mask 512, thereby removing the hard mask 512 above the top surface 508 of the raised region 504 of the substrate 502, from a portion of the surface 510a of the recessed region 505 (such that at least a portion of the hard mask 512 is located below the top surface 508), and from a portion 511a of the surface 510b of the recessed region 505. The etchback of the hard mask 512 is performed using any suitable combination of wet solvent stripping, wet etching, plasma etching, or UV / O2 treatment.

[0088] In some embodiments, after the hard mask 512 is etched back, the semiconductor device 500 may be washed (e.g., using a solvent to remove the oxide surface caused by the etch-back of the hard mask 512) to remove certain surface elements caused by the etch-back. In a particular example, the solvent used to wash the semiconductor device 500 is n-butyl acetate; however, this disclosure contemplates the use of any suitable type of solvent.

[0089] As can be seen at indicator 515, after the etchback is performed, a drop occurs in the hard mask 512. This drop means that the hard mask terminates earlier than expected and no longer has a flat (or generally flat) surface 513, which will cause problems in later manufacturing steps.

[0090] Figures 5C-5D The illustration shows the stages of a process for depositing a planarization film on a substrate 502, wherein a surface treatment is applied to selected surfaces of the substrate 502, and wherein recessed regions 505 / recesses 506 are filled (partially or completely) with a filler material. That is, a surface treatment is first applied to selected surfaces of the substrate 502 and the recessed regions 505 / recesses 506 of the substrate, and then the recessed regions 505 / recesses 506 are filled (partially or completely) with a filler material to provide, for example, a planarization film. Figure 5B The morphology shown in the figure is a flatter underlying morphology, rather than proceeding to deposit a planarization film on substrate 502.

[0091] In the illustrated example, such as Figure 5C As shown, surface treatment 516 is applied to a portion of the top surface 508 of the substrate 502 and the surface 510b of the recessed region 505. In some embodiments, the portion of the surface 510b of the recessed region 505 to which surface treatment 516 is applied includes the entire portion 511a; however, surface treatment 516 may be applied to different portions of the surface 510b of the recessed region 505 (e.g., less than portion 511a). In the illustrated example, surface treatment 516 is not applied to the surface 513 of the hard mask 512.

[0092] Surface treatment 516 generally corresponds to the above reference. Figures 4A-4E The surface treatment 416 is described, but surface treatment 516 can be adjusted to suit the reference. Figures 5A-5E The described process involves a specific substrate 502 and a filler material. Surface treatment 516 produces a surface condition 316, which is one of the following: the surface having surface condition 316 (e.g., top surface 508 and portion 511a of surface 510b) tends to hold certain filler materials (such as...) Figure 5Drepel or otherwise direct away from the surface having the surface condition 316. In a de-wetting state, the surface contact angle can be matched to the particular fill material (such as, Figure 5D

[0093] The surface 513 of the hard mask 512 in the recessed region 505 can have a surface condition similar to the surface condition 318, as described above, in which a surface having the surface condition 318 (e.g., the surface 513 of the hard mask 512) tends to bind to or even attract certain fill materials (such as, Figure 5D Figure 5D

[0094] In certain embodiments, the surface treatment 516 is a SAM that is deposited to produce the surface condition 316 for the surfaces on which the SAM is deposited. For example, to provide the surface condition 316 to selected surfaces of the substrate 502 (e.g., the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505), the surface treatment 516 can be applied to the surfaces of the substrate 502 that are targeted to have the surface condition 316. The surface treatment 516 produces a de-wetting surface condition with respect to a particular fill material (e.g., Figure 5D

[0095] In certain embodiments, applying the surface treatment 516 to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 includes depositing a SAM on the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505. As a particular example, the SAM can be a liquid phase SAM. In certain embodiments, the surface treatment 516 (e.g., the SAM) is specific to an oxide, a nitride, or other suitable material depending on the materials of the substrate 502 (at the exposed surfaces of the substrate 502) and the hard mask 512.

[0096] ​​​​While described as a monolayer, one skilled in the art will appreciate that full coverage of the surface treatment 516 can or can not be achieved and still aspects of the present disclosure can be reached. In other words, since solute / solvent de-wetting can occur without full monolayer alignment, perfect alignment of the SAM (or other suitable surface treatment) is not required. A given surface selective monolayer has terminal molecular groups that are designed to cause de-wetting of the spin-on material. SAMs are described in more detail below.

[0097] The surface treatment 516 can be applied in any suitable manner. In certain embodiments, the surface treatment 516 is deposited by a spin-on technique. For example, a particular surface treatment 516 (e.g., a SAM) can be deposited on selected surfaces of the substrate 502 (e.g., the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505). The applied surface treatment 516 can be selective to a particular underlying material such that the surface treatment 516 is applied to particular surfaces and not others. For example, the surface treatment 516 can be selective to the material of the substrate 502 such that the surface treatment 516 is deposited on the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 but not on the surface 513 of the hardmask 512.

[0098] As shown in FIG. 5B, the surface treatment 516 is applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505. The surface treatment 516 can be applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 by any suitable technique. In certain embodiments, the surface treatment 516 is applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 by a spin-on technique. For example, a particular surface treatment 516 (e.g., a SAM) can be applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505. The applied surface treatment 516 can be selective to a particular underlying material such that the surface treatment 516 is applied to particular surfaces and not others. For example, the surface treatment 516 can be selective to the material of the substrate 502 such that the surface treatment 516 is applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 but not to the surface 513 of the hardmask 512. Figure 5D As shown in FIG. 5B, the surface treatment 516 is applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505. The surface treatment 516 can be applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 by any suitable technique. In certain embodiments, the surface treatment 516 is applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 by a spin-on technique. For example, a particular surface treatment 516 (e.g., a SAM) can be applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505. The applied surface treatment 516 can be selective to a particular underlying material such that the surface treatment 516 is applied to particular surfaces and not others. For example, the surface treatment 516 can be selective to the material of the substrate 502 such that the surface treatment 516 is applied to the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 but not to the surface 513 of the hardmask 512.

[0099] The fill material 520 is generally similar to the fill material 320 and the fill material 420, the details of which are incorporated by reference.

[0100] Furthermore, in some embodiments, depending on the morphology of the substrate 502 (including the depth of the recessed region 505 and the selected filler material 520, and the associated deposition technique), one or more deposition steps may be performed until the desired fill level is achieved.

[0101] The filler material 520 may or may not include the same material as the hard mask 512. In some embodiments, a spin-coating deposition process is used to deposit the filler material 520. By way of example only, the filler material 520 may be an organic material, such as spin-coated carbon, deposited using a spin-coating deposition process.

[0102] like Figure 5D As shown, after depositing filler material 520, filler material 520 can fill at least a portion of the recessed region 505 and can have a substantially flat top surface 521. Surface treatment 516 produces a surface condition 316 for the top surface 508 of the substrate 502 and a portion 511a of the surface 510b of the recessed region 505, thereby guiding filler material 520 to the surface 513 of the hard mask 512 in the recessed region 505, without depositing filler material 520 on the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505. Guiding filler material 520 to the surface 513 of the hard mask 512 allows filler material 520 to reduce and potentially eliminate at least a portion of the drop in the hard mask 512 that could occur over extended regions (such as in the recessed region 505).

[0103] In certain embodiments, the fill material 520 accumulates over the surface 513 of the hardmask 512 to create a generally planar top surface 521. The fill material 520 deposited over the surface 513 of the hardmask 512 provides an improved (and potentially generally planar) surface for the deposition of a planarization film in a subsequent deposition step, rather than depositing the planarization film over the various topographies of the substrate 502 shown in

[0104] In certain embodiments, the fill material 520 accumulates over the surface 513 of the hardmask 512 to create a generally planar top surface 521. The fill material 520 deposited over the surface 513 of the hardmask 512 provides an improved (and potentially generally planar) surface for the deposition of a planarization film in a subsequent deposition step, rather than depositing the planarization film over the various topographies of the substrate 502 shown in Figures 5A-5B Figure 5B In certain embodiments, the fill material 520 accumulates over the surface 513 of the hardmask 512 to create a generally planar top surface 521. The fill material 520 deposited over the surface 513 of the hardmask 512 provides an improved (and potentially generally planar) surface for the deposition of a planarization film in a subsequent deposition step, rather than depositing the planarization film over the various topographies of the substrate 502 shown in

[0105] In certain embodiments, the fill material 520 accumulates over the surface 513 of the hardmask 512 to create a generally planar top surface 521. The fill material 520 deposited over the surface 513 of the hardmask 512 provides an improved (and potentially generally planar) surface for the deposition of a planarization film in a subsequent deposition step, rather than depositing the planarization film over the various topographies of the substrate 502 shown in

[0106] As shown in FIG. 5B, the fill material 520 can be deposited over the surface 510b of the recessed region 505 and the top surface 508 of the substrate 502. The fill material 520 can be deposited over the surface 510b of the recessed region 505 and the top surface 508 of the substrate 502 using any suitable deposition technique, such as, for example, spin-on deposition, atomic layer deposition, or chemical vapor deposition. In certain embodiments, the fill material 520 is deposited over the surface 510b of the recessed region 505 and the top surface 508 of the substrate 502 using spin-on deposition. Figure 5E ​As shown in FIG. 5B, the surface treatment 516 has been removed from the semiconductor device 400, and a planarization material 524 has been deposited. In certain embodiments, the surface treatment 516 is removed using one or more etching steps by any suitable combination of wet solvent lift-off, wet etching, plasma etching, or UV / O2 treatment. The present disclosure contemplates any suitable type of removal process for removing the surface treatment 516. The removal process for removing the surface treatment 516 leaves the fill material 520 over the surface 513 of the hard mask 512. In certain embodiments, the etchant used in the one or more etching steps to remove the surface treatment 516 is selective to the surface treatment 516 and does not etch (or only etches in trace amounts) the fill material 520. As a result, the top surface 521 of the fill material 520 retains its relatively planar nature.

[0107] After the surface treatment 516 is removed, both the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 are restored to a surface condition similar to the surface condition 318 (e.g., of the substrate 502 prior to the deposition of the fill material 520). That is, the top surface 508 of the substrate 502 and the portion 511a of the surface 510b of the recessed region 505 can be considered wettable with respect to the planarization film to be deposited (e.g., the planarization film 524). Figure 3D

[0108] As shown in FIG. 5C, a planarization film 524 is deposited on the substrate 502. The material of the planarization film 524 can be any suitable material. In certain embodiments, the material of the planarization film 524 is the same material as the material of the fill material 520 (which can also be the same material as the hard mask 512); however, the present disclosure contemplates a fill material 520 and a planarization film 524 comprising different materials. At least in part due to the improved planarity of the top surface 521 in FIG. 5B after the fill material 520 has been deposited, Figure 5E Figure 5D The top surface 526 of the planarization film 524 has improved planarity due to the improved planarity of the top surface 521 in FIG. 5B after the fill material 520 has been deposited.

[0109] The planarization film 524 can be deposited in any suitable manner. In certain embodiments, the planarization film 524 is deposited using a spin-on deposition process. For example, the planarization film 524 can comprise an organic material. As a particular example, the planarization film 524 can be spin-on carbon. The planarization film 524 can be deposited to a desired thickness suitable for the particular implementation.

[0110] ​​In the case where the substrate 502 is planarized, additional microfabrication steps can be performed. For example, after depositing a planarization film 524 having improved planarization properties, additional features of the semiconductor device 500 can be formed in layers above or below the planarization film 524. These features can include metal lines, vias, or other suitable features, to name a few examples. Due to the improved planarization properties of the planarization film 524, subsequent patterned features tend to have improved dimensional control and ultimately improved downstream yield.

[0111] Figures 6A-6B An example detail of an example self-assembled monolayer (SAM) 600 is illustrated in accordance with certain embodiments of the present disclosure. Reference is made to Figures 6A-6B The described embodiments are provided merely as examples. The present disclosure contemplates any suitable structure and material of a SAM. As described above, the surface treatment 416 and / or 516 can be implemented as a SAM, and the SAM 600 provides an example of such a SAM.

[0112] Figure 6A An example self-assembled monolayer (SAM) element 602 is illustrated attached to a substrate 604. The substrate 604 can be, for example, the substrate 302, the substrate 402, the hard mask 409, or the substrate 502.

[0113] The SAM element 602 includes three general functional groups 606: a head group 606a, a functional group 606b, and a tail group 606c. In selecting the makeup of the SAM element 602 (and, by extension, the SAM 600 including a plurality of SAM elements 602, as shown in Figure 6B In selecting the makeup of the SAM element 602 (and, by extension, the SAM 600 including a plurality of SAM elements 602, as shown in

[0114] The head group 606a, which can also be referred to as a coordinating group, is adapted to attach to the substrate 604 to bind or otherwise attach the SAM element 602 to the substrate 604. Thus, for the head group 606a, a material of the head group 606a can be selected that is capable of and suitable for attaching to the substrate 604.

[0115] Further, the selection of the material of the head group 606a, in conjunction with the selection of the material to which the SAM 600 is intended to attach, and the selection of the material to which the SAM 600 is not intended to attach, facilitates the attachment of the SAM 600 to particular layers and not other particular layers. For example, the head group 606a can be selected that is adapted to attach to the top surface 411 of the hard mask 409, but not to the surface 410 of the substrate 402 in the recess 406. As another example, the head group 606a can be selected that is adapted to attach to the top surface 508 of the raised regions 504 of the substrate 502, and to the portion 511a of the surface 510b of the recessed regions 505 of the substrate 502, but not to the surface 513 of the hard mask 512. This feature of the head group 606a allows for the selective deposition of the SAM 600.

[0116] In particular examples, the head group 606a can include a thiol-containing head group (e.g., octadecylthiol (ODT)) or a silicon-containing head group (e.g., octadecyltrichlorosilane (OTS) or octadecylsiloxane (ODS)). In certain embodiments, to attach to an organic-containing substrate (e.g., spin-on carbon or amorphous carbon), the head group 606a can include an olefin-containing molecule that can form a covalent bond with C-H terminated surface sites of the substrate layer. In certain embodiments, to attach to a silicon-containing substrate (e.g., Si, Si02, SiN, or SiON), the head group 606a can include silicon and can be, for example, OTS or ODS. In certain embodiments, to attach to a metal-containing substrate (e.g., copper, cobalt, ruthenium, or another suitable metal), the head group 606a can be a thiol-containing head group, such as ODT.

[0117] The functional group 606b (which can also be referred to as a terminal group) is designed to optimize the surface condition 316 (e.g., a dewetting surface condition) provided by the SAM 600.

[0118] The tail group 606c (which can also be referred to as a spacer) couples the head group 606a to the functional group 606b and provides a desired spacing between the head group 606a and the functional group 606b. Further, the length of the tail group 606c can be adjusted to tune the contact angle for a particular material (e.g., the fill material 320, 420, or 520). In certain embodiments, the tail group 606c is a molecular chain, such as an alkane chain. The tail group 606c can be an organic mesophase and can provide a well-defined thickness of the SAM 600, act as a physical barrier, and alter the electrical conductivity and the area optical properties (where appropriate).

[0119] The tail group 606c can be optimized for the fill material to be deposited (e.g., fill material 320, 420, or 520). For example, in cases where the fill material is to be deposited using a spin-on coating technique, the tail group 606c can be optimized for a spin-on solvent associated with the spin-on coating technique to be used. As a particular example, a carbon-containing or fluorine-containing tail group can be used. For organic spin-on polymers, the choice of solvent can be particularly important. For example, a low vapor pressure and high contact angle can be effective. As a particular example, toluene can be effective.

[0120] Figure 6B A SAM 600 formed from a plurality of SAM elements 602 attached to a surface of a substrate 604 is illustrated.

[0121] Figure 7 An example method 700 for forming a semiconductor device is illustrated in accordance with certain embodiments of the present disclosure. Embodiments of the method 700 can be applied to any of the embodiments described in the present disclosure, as well as other suitable embodiments. The method starts at step 702.

[0122] At step 704, a surface treatment is applied to a selected surface on a substrate having an uneven topography including structures defining recesses. For example, the substrate can be the substrate 302 including the structures 304 defining the recesses 306, and the selected surface can be the top surface 308 of the substrate 302. As another example, the substrate can be the substrate 402 including the structures 404 defining the recesses 406, and the selected surface can be the top surface 411 of the hardmask 409, which can be considered the top surface of the substrate 402. As yet another example, the substrate can be the substrate 502 including the raised regions 504 and the recessed regions 505, and the selected surface can be the top surface 508 of the substrate 502. With reference to the substrate 502 over a region of a particular wafer, the substrate 502 can include a plurality of raised regions 504 defining respective recesses 506. In certain embodiments, applying the surface treatment at step 704 includes depositing a SAM to the selected surface of the substrate.

[0123] At step 706, a fill material is deposited on the substrate, for example, by spin-on deposition. The surface treatment directs the fill material to the recesses and away from the selected surface to fill the recesses with the fill material without adhering to the selected surface.

[0124] For example, as described above with reference to Figures 3A-3EAs described, the fill material 320 can be deposited on the substrate 302, e.g., by spin-coating deposition, and a surface treatment that produces a surface condition 316 (e.g., a dewetted surface condition with respect to the fill material 320) directs the fill material 320 into the recess 306 and away from the top surface 308 of the substrate (to which the surface treatment producing the surface condition 316 has been applied) to fill the recess 306 without adhering to the top surface 308 of the substrate 302.

[0125] As another example, as described above with reference to Figures 4A-4E As described, the surface treatment 416 produces a condition similar to the surface condition 316 (e.g., a dewetted surface condition with respect to the fill material 420), and directs the fill material 420 into the recess 406 and away from the top surface 411 of the hard mask 409 (to which the surface treatment 416 has been applied) to fill the recess 406 without adhering to the top surface 411 of the hard mask 409.

[0126] In certain embodiments, such as described above with reference to Figures 5A-5E As described, the surface treatment 516 can be applied to the selected surface of the substrate 502 at step 704, a hard mask 512 can be deposited on the substrate 502, and the hard mask 512 can be etched to remove the hard mask 512 over the selected surface of the substrate 502 and from a portion of the recess 506 (of the recessed region 505), with a portion of the hard mask 512 remaining in the recess 506 (of the recessed region 505). Depositing the fill material 520 on the substrate 502 by spin-coating deposition can include depositing the fill material 520 on the portion of the hard mask 512 remaining in the recess 506 (of the recessed region 505).

[0127] At step 708, the surface treatment is removed from the selected surface of the substrate. The surface treatment can be removed by any suitable combination of wet solvent lift-off, wet etching, plasma etching, or UV / O2 treatment. For example, the surface treatment producing the surface condition 316 can be removed from the top surface 308 of the substrate 302, the surface treatment 416 (and possibly the hard mask 409) can be removed from the top surface 411 of the hard mask 409, or the surface treatment 516 can be removed from the top surface 508 of the substrate 502 and from the portion 511a of the surface 510b of the recess 506.

[0128] At step 710, a planarization film is deposited on the substrate, e.g., by spin-on deposition. The planarization film is deposited on selected surfaces of the substrate as well as on the top surface of the fill material. For example, the planarization film 324, 424, or 524 can be deposited on the substrate 302 (including on the top surface 308 of the substrate 302, as well as on the top surface 322 of the fill material 320 in the recess 306), the substrate 402 (including on the top surface 408 of the substrate 402, as well as on the top surface 422 of the fill material 420 in the recess 406), or the substrate 502 (including on the top surface 508 of the substrate 502, as well as on the top surface 521 of the fill material 520 in the recess 506), respectively.

[0129] After deposition of the planarization film with improved planarization properties, additional features of a semiconductor device can be formed in layers above or below the planarization film. These features can include metal lines, vias, or other suitable features, to name a few examples. Due to the improved planarization properties of the planarization film, subsequent patterned features tend to have improved critical dimension control and ultimately improved downstream yield.

[0130] At step 712, the method 700 ends.

[0131] Figure 8 An example method 800 for forming a semiconductor device is illustrated in accordance with certain embodiments of the present disclosure. Embodiments of the method 800 can be applied to any of the embodiments described in the present disclosure, as well as other suitable embodiments. The method starts at step 802.

[0132] At step 804, a substrate having an uneven topography including a structure defining a recess is received. In certain embodiments, the substrate is received in a tool designed for deposition of a surface treatment on selected surfaces of the substrate in subsequent steps. For example, the substrate can be the substrate 302 (including the structure 304 defining the recess 306), the substrate 402 (including the structure 404 defining the recess 406), or the substrate 502 (including the raised regions 504 and the recessed regions 505). With respect to the substrate 502 over a region of a particular wafer, the substrate 502 can include a plurality of raised regions 504 defining respective recessed regions 505 / recesses 506. In certain embodiments, a plurality of portions of the substrate include a hardmask such that the top surface of these portions of the substrate is a hardmask, as shown in FIG. 4B, where the hardmask 409 is on the substrate 402. Figure 4A

[0133] ​At step 806, a self-assembled monolayer (SAM) is deposited on the top surface of the structure of the substrate without depositing the SAM on surfaces located below the top surface of the structure of the substrate. For example, a surface treatment (e.g., a SAM) that provides the surface condition 316 can be deposited on the top surface 308 of the substrate 302; a surface treatment 416 (e.g., a SAM) can be deposited on the top surface 411 of the hard mask 409, which can be considered a top surface of the substrate 402; or a surface treatment 516 (e.g., a SAM) can be deposited on the top surface 508 of the substrate 502 and potentially on other surfaces of the substrate 502, such as the portion 511a of the surface 510b of the recessed region 505. In certain embodiments, the SAM provides a dewetted surface condition (e.g., the surface condition 316) for a particular fill material (e.g., the fill material 320, 420, or 520), such as the fill material to be deposited at step 808. In certain embodiments, the SAM includes a head group (e.g., the head group 606a) coupled to a substrate, a functional group (the functional group 606b), and a tail group (e.g., the tail group 606c) that couples the head group to the functional group such that the head group is spaced apart from the functional group.

[0134] At step 808, the particular fill material is deposited on the substrate, such as by spin-on deposition, such that the particular fill material fills the recess without adhering to the SAM.

[0135] For example, as described above with reference to Figures 3A-3E the fill material 320 can be deposited on the substrate 302 by spin-on deposition, and a surface treatment that produces the surface condition 316 (e.g., a dewetted surface condition with respect to the fill material 320) directs the fill material 320 to the recess 306 and away from the top surface 308 of the substrate (on which the surface treatment that produces the surface condition 316 has been applied) to fill the recess 306 without adhering to the surface treatment that produces the surface condition 316. As another example, as described above with reference to Figures 4A-4E the surface treatment 416 (e.g., a SAM) produces a condition similar to the surface condition 316 (e.g., a dewetted surface condition with respect to the fill material 420), and directs the fill material 420 to the recess 406 and away from the top surface 411 of the hard mask 409 (on which the surface treatment 416 has been applied) to fill the recess 406 without adhering to the surface treatment 416.

[0136] In certain embodiments, for example, as described above with reference to Figures 5A-5EAs described, the deposition of the SAM (surface treatment 516) on the top surface (surface 508) of the structure (raised region 504 of substrate 502) at step 806 can be preceded by the deposition of hard mask 512 on substrate 502 and the etching of hard mask 512 to remove hard mask 512 over the top surface (surface 508) of the structure (raised region 504 of substrate 502) and from a portion of recessed region 505 / recess 506, with a portion of hard mask 512 remaining in recessed region 505 / recess 506. The deposition of fill material 520 on substrate 502 by spin-on deposition such that fill material 520 fills recess 506 (of recessed region 505) without adhering to surface treatment 516 (e.g., SAM) can include the deposition of fill material 520 on the portion of hard mask 512 that remains in recess 506 (of recessed region 505).

[0137] At step 810, the SAM is removed. For example, the SAM can be removed by any suitable combination of wet solvent lift-off, wet etching, plasma etching, or UV / O2 treatment. For example, as referenced above with respect to Figures 3A-3E As described, the surface treatment (e.g., SAM) that produces surface condition 316 is removed from top surface 308 of substrate 302. As another example, as referenced above with respect to Figures 4A-4E As described, surface treatment 416 (e.g., SAM) is removed from top surface 411 of hard mask 409. In certain embodiments, step 810 includes removing hard mask 409. As another example, as referenced above with respect to Figures 5A-5E As described, surface treatment 516 (e.g., SAM) is removed from top surface 508 of substrate 502 and from portion 511a of surface 510b of recess 506 (of recessed region 505).

[0138] At step 812, a planarization film is deposited on the substrate, e.g., by spin-on deposition. The planarization film is deposited on the top surface of the structure and on the top surface of the particular fill material that fills the recess. For example, planarization film 324 can be deposited on substrate 302 (including on top surface 308 of substrate 302 and on top surface 322 of fill material 320 in recess 306), planarization film 424 can be deposited on substrate 402 (including on top surface 408 of substrate 402 and on top surface 422 of fill material 420 in recess 406), or planarization film 524 can be deposited on substrate 502 (including on top surface 508 of substrate 502 and on top surface 521 of fill material 520 in recess 506 (of recessed region 505)).

[0139] After depositing the planarization film with improved planarization properties, additional features of the semiconductor device can be formed in layers above or below the planarization film. These features can include metal lines, vias, or other suitable features, to name a few examples. Due to the improved planarization properties of the planarization film, subsequent patterned features tend to have improved critical dimension control and ultimately improved downstream yield.

[0140] At step 814, the method 800 ends.

[0141] Figure 9 An example method 900 for forming a semiconductor device is illustrated in accordance with certain embodiments of the present disclosure. Embodiments of the method 900 can be applied to any of the embodiments described in the present disclosure, as well as other suitable embodiments. In this particular example, the method 900 is described with reference to the semiconductor device 500 of Figures 5A-5E The method begins at step 902.

[0142] At step 904, the substrate 502 having an uneven topography including raised regions 504 and recessed regions 505 is received. For example, the substrate 502 can be received in a tool for depositing a hardmask in a subsequent step, such as a spin-coating tool.

[0143] At step 906, a hardmask 512 can be deposited on the substrate 502.

[0144] At step 908, the hardmask 512 is etched to remove the hardmask 512 over the top surface 508 of the raised regions 504 of the substrate 502 and from the portion 511a of the surface 510b of the recessed regions 505. A portion of the hardmask 512 remains on the portion 511b of the surface 510b of the recessed regions 505. In certain embodiments, the etching performed on the hardmask 512 at step 908, which can be referred to as a back-etch, also removes the hardmask 512 from a portion of the surface 510a of the recessed regions 505 such that at least a portion of the hardmask 512 is located below the top surface 508 of the substrate 502. In certain embodiments, the etching of the hardmask 512 is performed using any suitable combination of wet solvent stripping, wet etching, plasma etching, or UV / O2 treatment.

[0145] At step 910, a SAM (or other surface treatment 516) is deposited on the top surface 508 of the raised region 504 and on the portion 511a (or another suitable portion) of the surface 510b of the recessed region 505 without depositing the SAM (or other surface treatment 516) on the hardmask 512 that remains on the portion 511b of the surface 510b of the recessed region 505. The SAM (or other surface treatment 516) provides a dewetted surface condition (e.g., similar to the surface condition 316) for the fill material (such as the fill material 520).

[0146] At step 912, the fill material 520 is deposited on the substrate 502, e.g., by spin-on deposition, such that the fill material 520 fills the recessed region 505 between the raised region 504 and the SAM (or other surface treatment 516) on the portion 511a of the surface 510b of the recessed region 505 without adhering to the SAM. In certain embodiments, depositing the fill material 520 on the substrate 502 by spin-on deposition includes depositing the fill material 520 on the hardmask 512 that remains in the recessed region 505.

[0147] At step 914, the SAM (or other surface treatment 516) is removed in one or more removal steps. The present disclosure contemplates any suitable type of removal process for removing the surface treatment 516, including a wet solvent lift-off, a wet etch, a plasma etch, or any suitable combination of UV / O2 treatment. The removal process for removing the surface treatment 516 leaves the fill material 520 on top of the surface 513 of the hardmask 512. In certain embodiments, the etchant used in the one or more etch steps to remove the surface treatment 416 and the hardmask 409 is selective to the surface treatment 516 and does not etch (or only etches in a minor amount) the fill material 520. As a result, the top surface 521 of the fill material 520 retains its relatively flat characteristic.

[0148] At step 916, a planarization film 524 is deposited on the substrate 502, e.g., by spin-on deposition. The planarization film 524 can be deposited on the top surface 508 of the raised region 504 of the substrate 502 and on the top surface 521 of the fill material 520. At least in part due to the improved flatness of the top surface 521 in Figure 5D , the top surface 526 of the planarization film 524 has improved flatness. Details of the planarization film 524 are described above with reference to Figure 5E .

[0149] After depositing the planarization film 524 with improved planarization characteristics, additional features of the semiconductor device can be formed in layers above or below the planarization film. These features can include metal lines, vias, or other suitable features, to name a few examples. Due to the improved planarization characteristics of the planarization film, these features also tend to have improved characteristics, such as improved critical dimension control and ultimately improved downstream yield.

[0150] At step 918, the method 900 ends.

[0151] Embodiments of the present disclosure can provide one or more technical advantages. For example, certain embodiments reduce or eliminate a lack of planarization in planarization films deposited on substrates having a wide variety of topographies. By partially or completely filling recesses in the substrate with a fill material, variations in the substrate topography can be reduced or eliminated, resulting in a planarization film that is more thickness-controlled when deposited on the substrate. Furthermore, by applying a surface treatment to selected surfaces of the substrate (e.g., the top surface of the substrate) prior to depositing the fill material, the fill material is directed to the recesses. Embodiments of the present disclosure can provide some or all of these advantages.

[0152] While the present disclosure has been primarily described using a particular type of substrate, such as those similar to the substrate 102, the substrate 302, the substrate 402, and the substrate 502, the present disclosure contemplates applying similar principles and techniques to planarize the topography of any suitable type of substrate. As just one particular example, embodiments of the present disclosure can be applied to a three-dimensional structure, such as the substrate 202 of the semiconductor device 200.

[0153] In the preceding description, specific details have been set forth, such as a particular geometry of a processing system, and descriptions of various components and processes used therein. It should be understood, however, that techniques herein can be practiced in other embodiments that depart from these specific details, and that such details are for

[0154] Various techniques have been described as multiple discrete operations in a manner that is most helpful in understanding the illustrative embodiments. The order of description, unless otherwise specified, is not to be construed as implying a required order. Indeed, these operations need not be performed in the order presented. Operations described can be performed in a different order than the described embodiments. Various additional operations can be performed and / or described operations can be omitted in additional embodiments.

[0155] Throughout this disclosure, the terms "layer" and "film" can each include one or more layers or films deposited in one or more processing steps. As used herein, "substrate" or "target substrate" generally refers to an object that is processed according to the present disclosure. The substrate can include any material portion or structure of a device, particularly a semiconductor or other electronic device, and can be, for example, a base substrate structure such as a semiconductor wafer, reticle, or a layer such as a thin film on or overlying the base substrate structure. Thus, the substrate is not limited to any particular base structure, underlying or overlying layers that are patterned or unpatterned, but is contemplated to include any such layers or base structures, as well as any combination of layers and / or base structures. The description can refer to a particular type of substrate, but this is for illustrative purposes only.

[0156] Of course, the order of discussion of the different steps as described herein has been presented for clarity sake. In general, these steps can be performed in any suitable order. Additionally, although each of the different features, techniques, configurations, etc. herein can be discussed in relation to different places in the present disclosure, it is intended that each concept can be employed independently of one another or in combination with one another. Thus, the present disclosure can be implemented and viewed in many different ways.

[0157] Although the present disclosure has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments as well as other embodiments of the present disclosure will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.

Claims

1. A method for processing a substrate, the method comprising: Receive a substrate having an uneven topography, the uneven topography including a structure defining a recess; A hard mask is deposited on the substrate; The hard mask is etched to remove the hard mask above the top surface of these structures and to remove the hard mask from a portion of these recesses, with a portion of the hard mask remaining in these recesses; A self-assembled monolayer is deposited on the top surface of these structures on the substrate, rather than on the surface below the top surface of these structures on the substrate, and the self-assembled monolayer provides a dewetting surface condition for a specific filler material. The specific filler material is deposited on the substrate by spin coating, so that the specific filler material fills the recesses without adhering to the self-assembled monolayer; Remove the self-assembled monolayer; Remove the hard mask; as well as After the hard mask is removed, a planarization film is deposited on the substrate by spin coating deposition. The planarization film is deposited on the top surface of these structures and on the top surface of the specific filler material that fills these recesses.

2. The method according to claim 1, wherein, The hard mask is a spin-coated carbon hard mask.

3. The method according to claim 1, wherein, Depositing the specific filler material onto the substrate by spin coating such that the specific filler material fills these recesses without adhering to the self-assembled monolayer includes: depositing the specific filler material onto the portion of the hard mask that remains in these recesses.

4. The method according to claim 1, wherein, This self-assembled monolayer includes: Head group, which is coupled to the substrate; Functional groups; and The tail group is an organic substance that couples the head group to the functional group such that the head group is spaced apart from the functional group.

5. The method according to claim 1, wherein, The self-assembled monolayer comprises thiols or silicon.

6. The method according to claim 1, wherein, These recesses include at least one of trenches or holes defined by these structures of the uneven topography of the substrate.

7. A method for processing a substrate, the method comprising: A hard mask is deposited on the substrate, wherein the substrate has an uneven topography, the uneven topography including a structure defining a recess; The hard mask is etched to remove the hard mask above a selected surface of the substrate and to remove the hard mask from a portion of these recesses, with a portion of the hard mask remaining in these recesses; The surface treatment is applied to the selected surface of the substrate; The filler material is deposited on the substrate by spin coating deposition, and the surface treatment guides the filler material to these recesses and away from these selected surfaces so as to fill these recesses with the filler material without adhering to these selected surfaces; Remove the surface treatment from these selected surfaces of the substrate; Remove the hard mask; as well as After the hard mask is removed, a planarization film is deposited on the substrate by spin coating deposition on the selected surfaces and the top surface of the filler material.

8. The method according to claim 7, wherein, Depositing the filler material onto the substrate by spin coating includes depositing the filler material onto the portion of the hard mask that remains in these recesses.

9. The method according to claim 7, wherein, Applying this surface treatment involves depositing a self-assembled monolayer on these selected surfaces of the substrate.

10. The method according to claim 7, wherein, These recesses include at least one of trenches or holes defined by these structures of the uneven topography of the substrate.

11. A method for processing a substrate, the method comprising: The substrate having an uneven topography is received, the uneven topography including protruding regions and recessed regions; A hard mask is deposited on the substrate; The hard mask is etched to remove it above the top surface of the raised area and from a first portion of the surface of the recessed area, with a portion of the hard mask remaining on a second portion of the surface of the recessed area; The surface treatment is applied to the top surface of the raised area and the third portion of the surface of the recessed area, but not to the hard mask left on the second portion of the surface of the recessed area. This surface treatment provides a dewetting surface condition for the filling material. The filler material is deposited on the substrate by spin coating, such that the filler material fills the recessed region between the raised region and the surface treatment without adhering to the surface treatment, which is applied to the third portion of the surface of the recessed region. Remove the surface treatment; as well as A planarization film is deposited on the substrate by spin coating deposition, the planarization film being deposited on the top surface of the raised region and on the top surface of the filler material.

12. The method according to claim 11, wherein, The third portion of the surface of the recessed area includes all of the first portion of the recessed area.

13. The method according to claim 11, wherein, The hard mask is a spin-coated carbon hard mask.

14. The method according to claim 11, wherein, Depositing the filler material onto the substrate by spin coating includes depositing the filler material onto the portion of the second portion of the surface of the hard mask remaining in the recessed region.

15. The method according to claim 11, wherein, Applying the surface treatment to the top surface of the raised region and the third portion of the surface of the recessed region includes depositing a self-assembled monolayer on the top surface of the raised region and the third portion of the surface of the recessed region, the self-assembled monolayer providing the dewetting surface condition for the filler material.

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