Local oscillator drift estimation and compensation system and method in a cascaded sensor
By employing a shared LO input and output port MMIC design in the automotive radar system, and utilizing the processor to correct the phase shift difference of the sensor input and process the signal using FFT, the problem of LO drift in cascaded sensors is solved, thereby improving the accuracy of target detection and simplifying the system design.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NXP BV
- Filing Date
- 2021-09-02
- Publication Date
- 2026-04-21
AI Technical Summary
In automotive radar systems, existing technologies struggle to effectively compensate for local oscillator (LO) drift in cascaded sensors, leading to grating lobes in the angle response and affecting the accuracy of target detection.
The MMIC design employs a shared LO input and output port. The processor determines and corrects the phase shift difference between different sensor inputs, and the fast Fourier transform (FFT) is used to process the digital signal to achieve phase compensation of the LO signal.
It improves the angular resolution and target detection accuracy of the radar system, reduces angular errors, simplifies the design of the radar system, and reduces the impact of thermal changes on signal coherence.
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Figure CN114137479B_ABST
Abstract
Description
Technical Field
[0001] This disclosure generally relates to automotive radar systems, and more specifically, to local oscillator (LO) drift estimation and compensation in cascaded sensors within automotive radar systems. Background Technology
[0002] Radar systems are becoming increasingly common in the automotive industry, serving as sensors for applications such as parking assistance, adaptive cruise control speed adjustment, lane departure warning, collision warning and mitigation, and brake support. Radar systems perform detection and ranging by emitting electromagnetic waves (e.g., pulses) from a transmitting antenna and measuring the time taken to detect the reflected signal at a receiving sensor. The amount of time it takes for the reflected signal to reach an obstacle and be reflected back provides an indication of the obstacle's range from the radar system.
[0003] Frequency-modulated continuous wave (FMCW) radar systems transmit a series of pulses (detection signals) to obtain the time-resolved range distribution of the space surrounding the radar system. Each detection signal consists of a continuous electromagnetic signal that varies between an initial frequency and a final frequency over a period of time. The bandwidth of the detection signal is the difference between the initial and final frequencies. The detection signal is reflected from objects in the detection space surrounding the FMCW radar system. The reflected signal is detected by the receiver of the FMCW radar system. Summary of the Invention
[0004] A frequency-modulated continuous wave (FMCW) radar system may include an antenna array having (C = A + B - 1) antennas, a first integrated circuit (IC) device including A first sensor inputs, and a second IC device including B second sensor inputs. The first sensor inputs are coupled to the first A antennas of the antenna array, and the second sensor inputs are coupled to the last B antennas of the antenna array, such that a common input in the first sensor inputs and a common input in the second sensor inputs are both coupled to a common antenna. Each IC device can receive a reflected signal at each sensor input and mix the reflected signal with an associated baseband signal based on a local oscillator (LO) signal. Each LO signal may have a different phase shift. The LO signals may be based on a common LO signal.
[0005] The FMCW radar system may include a processor configured to receive the baseband signal, determine the difference between the phase shifts based on the common baseband signal, and correct at least one of a plurality of baseband signals based on the difference between the phase shifts.
[0006] In determining the difference between the phase shifts, the processor may be further configured to determine the delay time between the first common baseband signal and the second common baseband signal.
[0007] When correcting at least one of the plurality of baseband signals, the processor may be further configured to delay at least one of the first baseband signal and the second baseband signal by the delay time.
[0008] The IC device may be further configured to digitize the baseband signal, wherein outputting the baseband signal may include outputting a digitized signal.
[0009] The processor may be further configured to perform a Fast Fourier Transform (FFT) on the digitized baseband signal to obtain a transformed signal that includes a common transformed signal associated with the common sensor input.
[0010] In determining the difference between the phase shifts, the processor may be further configured to determine the complex phase shift between a common first transformed signal and a common second transformed signal in the frequency domain.
[0011] When correcting at least one of the multiple sets of baseband signals, the processor may be further configured to shift the phase of at least one of the multiple sets of transformed baseband signals based on the complex phase shift.
[0012] The first IC device may be further configured to generate the first LO signal, and the second IC device may be further configured to receive the second LO signal from the first IC device.
[0013] The antennas of the antenna array can be arranged in a line, with each antenna spaced λ / 2 or more from the next antenna, where λ is the wavelength of the carrier wave of the FMCW linear frequency modulated pulse of the FMCW radar system.
[0014] According to one embodiment, a frequency modulated continuous wave (FMCW) radar system includes:
[0015] An antenna array comprising C antennas, wherein (C = A + B - 1), and wherein A, B, and C are integers greater than one;
[0016] A first integrated circuit (IC) device, the first IC device including A first sensor inputs, each first sensor input coupled to the first A antennas of the antenna, the first IC device configured to receive an associated first reflected signal at each first sensor input, mix the first reflected signal with an associated first baseband signal based on a first local oscillator (LO) signal, and output the first baseband signal, wherein the first LO signal has a first phase shift; and
[0017] A second IC device includes B second sensor inputs, each second sensor input coupled to the latter B antennas of the antenna, such that a common input in the first sensor inputs and a common input in the second sensor inputs are coupled to a common antenna. The second IC device is configured to receive an associated second reflected signal at each second sensor input, mix the second reflected signal with an associated second baseband signal based on a second local oscillator (LO) signal, and output the second baseband signal, wherein the second LO signal has a second phase shift, wherein the first LO signal and the second LO signal are based on a common LO signal, and wherein the common first baseband signal is associated with a common first sensor input, and the common second baseband signal is associated with a common second sensor input.
[0018] In one or more embodiments, the FMCW radar system further includes:
[0019] A processor configured to receive a first baseband signal and a second baseband signal, determine a difference between a first phase shift and a second phase shift based on the common first baseband signal and the common second baseband signal, and correct at least one of the first baseband signal and the second baseband signal based on the difference between the first phase shift and the second phase shift.
[0020] In one or more embodiments, when determining the difference between the first phase shift and the second phase shift, the processor is further configured to determine the delay time between the first common baseband signal and the second common baseband signal.
[0021] In one or more embodiments, when correcting at least one of the first baseband signal and the second baseband signal, the processor is further configured to delay the at least one of the first baseband signal and the second baseband signal by the delay time.
[0022] In one or more embodiments,
[0023] The first IC device is further configured to digitize the first baseband signal, wherein outputting the first baseband signal includes outputting a first digitized signal comprising a common first digitized signal associated with the common first sensor input; and
[0024] The second IC device is further configured to digitize the second baseband signal, wherein outputting the second baseband signal includes outputting a second digitized signal that includes a common second digitized signal associated with the common second sensor input.
[0025] In one or more embodiments, the processor is further configured to perform a Fast Fourier Transform (FFT) on the first digitized baseband signal to obtain a first transformed signal including a common first transformed signal associated with the common first digitized signal, and to perform the FFT on the second digitized baseband signal to obtain a second transformed signal including a common second transformed signal associated with the common second digitized signal.
[0026] In one or more embodiments, when determining the difference between the first phase shift and the second phase shift, the processor is further configured to determine a complex phase shift between a common first transformed signal and a common second transformed signal in the frequency domain.
[0027] In one or more embodiments, when correcting at least one of the first baseband signal and the second baseband signal, the processor is further configured to shift the phase of at least one of the transformed first baseband signal and the transformed second baseband signal based on the complex phase shift.
[0028] In one or more embodiments,
[0029] The first IC device is further configured to generate the first LO signal; and
[0030] The second IC device is further configured to receive the second LO signal from the first IC device.
[0031] In one or more embodiments, the antennas of the antenna array are arranged in a line, with each antenna spaced apart from the next antenna by a distance of λ / 2 or less, where λ is the wavelength of the carrier wave of the FMCW linear frequency modulated pulse of the FMCW radar system.
[0032] According to another embodiment, a method for compensating for phase shift of a local oscillator (LO) in a cascaded integrated circuit (IC) device for a frequency modulated continuous wave (FMCW) radar system includes:
[0033] Provide an antenna array for the FMCW radar system, the antenna array comprising C antennas, where (C = A + B - 1), and where A, B, and C are integers greater than one;
[0034] The first sensor input of the first IC device is coupled to the first A antennas in the antenna;
[0035] Receive the associated first reflected signal at each first sensor input;
[0036] In the first IC device, the first reflected signal is mixed with an associated first baseband signal based on a first local oscillator (LO) signal, wherein the first LO signal has a first phase shift, and wherein the common first baseband signal is associated with a common first sensor input;
[0037] The first baseband signal is output from the first IC device;
[0038] The B second sensor inputs of the second IC device are coupled to the last B antennas in the antenna, such that the common input of the first sensor input and the common input of the second sensor input are both coupled to the common antenna;
[0039] Receive the associated second reflected signal at each second sensor input;
[0040] In the second IC device, the second reflected signal is mixed with an associated second baseband signal based on a second local oscillator (LO) signal, wherein the second LO signal has a second phase shift, wherein the first LO signal and the second LO signal are based on a common LO signal, and wherein the common second baseband signal is associated with the common second sensor input; and the second baseband signal is output from the second IC device.
[0041] In one or more embodiments, the method further includes:
[0042] The processor of the FMCW radar system receives the first baseband signal and the second baseband signal;
[0043] The processor determines the difference between the first phase shift and the second phase shift based on the common first baseband signal and the common second baseband signal; and
[0044] The processor corrects at least one of the first baseband signal and the second baseband signal based on the difference between the first phase shift and the second phase shift.
[0045] In one or more embodiments, when determining the difference between the first phase shift and the second phase shift, the method further includes:
[0046] The processor determines the delay time between the first common baseband signal and the second common baseband signal.
[0047] In one or more embodiments, when correcting at least one of the first baseband signal and the second baseband signal, the method further includes:
[0048] The processor delays at least one of the first baseband signal and the second baseband signal by the delay time.
[0049] In one or more embodiments, the method further includes:
[0050] The first baseband signal is digitized by the first IC device, wherein outputting the first baseband signal includes outputting a first digitized signal comprising a common first digitized signal associated with the common first sensor input; and
[0051] The second baseband signal is digitized by the second IC device, wherein outputting the second baseband signal includes outputting a second digitized signal that includes a common second digitized signal associated with the common second sensor input.
[0052] In one or more embodiments, the method further includes:
[0053] The processor performs a Fast Fourier Transform (FFT) on the first digitized baseband signal to obtain a first transformed signal including a common first transformed signal associated with the common first digitized signal; and
[0054] The processor performs the FFT on the second digitized baseband signal to obtain a second transformed signal that includes a common second transformed signal associated with the common second digitized signal.
[0055] In one or more embodiments, when determining the difference between the first phase shift and the second phase shift, the method further includes:
[0056] The processor determines the complex phase shift between the common first transformed signal and the common second transformed signal in the frequency domain.
[0057] In one or more embodiments, when correcting at least one of the first baseband signal and the second baseband signal, the method further includes:
[0058] The processor shifts the phase of at least one of the transformed first baseband signal and the transformed second baseband signal based on the complex phase shift.
[0059] In one or more embodiments, the method further includes:
[0060] The first LO signal is generated by the first IC device; and
[0061] The second IC device receives the second LO signal from the first IC device.
[0062] According to one embodiment, a frequency modulated continuous wave (FMCW) radar system includes:
[0063] A transmitter configured to provide a plurality of FMCW linear frequency modulated pulses;
[0064] as well as
[0065] Receiver, the receiver comprising:
[0066] An antenna array comprising C antennas, wherein (C = A + B - 1), and wherein A, B, and C are integers greater than one;
[0067] A first integrated circuit (IC) device, the first IC device including A first sensor inputs, each first sensor input coupled to the first A antennas in the antenna, the first IC device being configured to receive an associated first reflected signal associated with the FMCW linear frequency modulation pulse at each first sensor input, mix the first reflected signal with an associated first baseband signal based on a first local oscillator (LO) signal, and output the first baseband signal, wherein the first LO signal has a first phase shift;
[0068] as well as
[0069] A second IC device includes B second sensor inputs, each second sensor input coupled to the last B antennas of the antenna, such that a common input in the first sensor input and a common input in the second sensor input are coupled to a common antenna. The second IC device is configured to receive an associated second reflected signal associated with the FMCW linear frequency modulation pulse at each second sensor input, mix the second reflected signal with an associated second baseband signal based on a second local oscillator (LO) signal, and output the second baseband signal, wherein the second LO signal has a second phase shift, wherein the first LO signal and the second LO signal are based on a common LO signal, and wherein the common first baseband signal is associated with the common first sensor input, and the common second baseband signal is associated with the common second sensor input. Attached Figure Description
[0070] It should be understood that, for the sake of simplicity and clarity, the components shown in the figures are not necessarily drawn to scale. For example, some components are enlarged relative to other components. Embodiments illustrating the teachings of this disclosure are shown and described with reference to the accompanying drawings, in which:
[0071] Figure 1 This is a block diagram of a radar system according to an embodiment of the present disclosure;
[0072] Figure 2 This demonstrates various cascaded radar systems in the prior art;
[0073] Figure 3 and4 This is a block diagram of a radar system using existing technology;
[0074] Figure 5 This is a block diagram of a radar system according to an embodiment of the present disclosure;
[0075] Figure 6 This is a flowchart illustrating a method for estimating and compensating local oscillator (LO) drift in a cascaded sensor system of a radar system according to embodiments of the present disclosure; and
[0076] Figure 7 A car including a radar system is shown according to an embodiment of the present disclosure.
[0077] Using the same reference numerals in different figures to indicate similar or identical objects. Detailed Implementation
[0078] The following description, taken in conjunction with the accompanying drawings, is provided to aid in understanding the teachings disclosed herein. The following discussion will focus on specific embodiments and examples of the teachings. This focus is provided to aid in describing the teachings and should not be construed as limiting the scope or applicability of the teachings. However, other teachings may of course be used in this application.
[0079] In this ID, we propose a technique for estimating and compensating for the LO phase difference between the master and slave ICs in a cascaded system using an MMIC with shared LO input and output ports. After measurement, the system LO phase offset can be compensated for one of the two sets of IF signals so that the resulting 2×4RX signals are free of LO offset. This concept can be extended to any number of slave devices.
[0080] Figure 1 A radar system 110 is shown, configured to provide detection and ranging of an object 120 in a space 100 surrounding the radar system. The radar system 110 is a MIMO radar system, comprising multiple transmitting antennas and multiple receiving antennas. The radar system 110 is configured to transmit a series of coded detection signals on each transmitting antenna to receive reflected signals from the object 120 and determine the range to the object and the angle of incidence to the object. The angular resolution of the radar system 110 is directly related to the total antenna aperture, which is determined by the number of receiving antennas and their positioning relative to each other.
[0081] To avoid so-called grating lobes in the angular response (i.e., false target detection at certain angular positions), the receiving antennas of radar system 110 are typically located at a distance of λ / 2 or less, where λ is the wavelength of the carrier signal of the detected signal, that is, the wavelength associated with the intermediate frequency of the detected signal. A typical MIMO radar system may have an aperture in the range of 6 to 10λ, which, combined with the standard λ / w of the antenna placement, produces an antenna array of 12 to 20 receiving antennas. It will be understood that in practice, distances greater than λ / 2 can be used as needed or desired.
[0082] The detection signal from each receiving antenna is down-converted to an intermediate frequency (IF) baseband frequency by an analog-to-digital converter (ADC) and then converted into the digital domain. It is subsequently processed to determine the range, velocity, and angle of incidence information of the object 120. In a particular embodiment, the radar system 110 is implemented using one or more radio frequency (RF) integrated circuits (ICs) or monolithic microwave integrated circuits (MMICs). Here, a particular IC or MMIC may provide transmit (TX) capability with multiple transmit channels, receive (RX) capability with multiple receive channels, or transmit and receive (TX / RX) capability. By utilizing various ICs and MMICs, the designer of the radar system 110 can tailor the design as needed or desired.
[0083] Figure 2Various embodiments of cascaded radar systems 200 and 250, similar to radar system 100, are illustrated. Radar systems 200 and 140 are designed using a transmitting IC 202 and one or more receiving ICs 204. For example, the transmitting IC 202 may be configured to include two transmit channels and provide a local oscillator (LO) signal output, and the receiving IC 204 may be configured to include four receive channels and provide inputs of the LO signal from the transmitting IC. Radar system 200 has an antenna array 206 with six antennas. Antenna array 206 includes two transmit antennas to transmit detection signals from the two transmit channels of the transmitting IC 202 and four receive antennas to receive reflected signals from the four receive channels of the receiving IC 204. The receiving IC 204 receives the LO signal from the transmitting IC 202. Radar system 250 has an antenna array 256 with 13 antennas. Antenna array 256 includes a single transmit antenna to transmit a detection signal from one of the transmit channels of the transmitting IC 202 and includes 12 receive antennas. Here, four receiving antennas are connected to the first receiving IC 204A, four receiving antennas are connected to the second receiving IC 204B, and four receiving antennas are connected to the third receiving IC 204C. Receiving ICs 204A, 204B, and 204C each receive a LO signal from the transmitting IC 202. It should be understood that, as needed or desired, the transmitting IC 202 will include other connections and interfaces (not shown), such as crystal or clock inputs, one or more synchronization signals for synchronizing the operation of the transmitting IC with one or more receiving ICs 204, and other inputs or outputs. It should be understood that, as needed or desired, the receiving IC 204 will include other connections and interfaces (not shown), such as one or more RF signal outputs, one or more IF signal outputs, for example, where the receiving IC includes a down-converter for mixing the received signal from the receiving channel to the IF frequency; one or more data outputs, for example, where the receiving IC includes an ADC for digitizing the IF signal; one or more synchronization signals for synchronizing the operation of the receiving IC with the transmitting IC 202 and other receiving ICs (if present); and other inputs or outputs.
[0084] Figure 3A radar system 300 similar to radar system 100 is shown. Radar system 300 includes a first transmit / receive IC 310, a second transmit / receive IC 320, and a signal processing IC 340. Transmit / receive ICs 310 and 320 represent RF ICs or MMICs, and may have more different designations as needed or desired. Transmit / receive ICs 310 and 320 each include at least one transmit channel and at least four receive channels. The transmit channel of IC 310 is connected to a transmit antenna 312, and the four receive channels of IC 310 are connected to an antenna array 314 of four receive antennas. Specifically, the four receive antennas of antenna array 314 are designated RX(M.1), RX(M.2), RX(M.3), and RX(M.4) from left to right, and each antenna is located at a distance λ / 2 from the next antenna, as described above. Similarly, the transmit channel of IC 320 is connected to transmit antenna 322, and the four receive channels of IC 320 are connected to antenna array 324 with four receive antennas. Specifically, the four receive antennas of antenna array 324 are designated from left to right as RX(S.1), RX(S.2), RX(S.3), and RX(S.4), and each antenna is located at a distance of λ / 2 from the next antenna. Furthermore, antenna RX(S.4) is located at a distance of λ / 2 from antenna RX(S.1), such that the antennas of antenna arrays 314 and 324 are together configured as a single receive antenna array 330 with eight antennas.
[0085] IC 310 also includes a clock or crystal input, in which, in the illustrated example, the crystal is connected. IC 310 uses the crystal as an input to derive a LO signal. The LO signal derived from the crystal is used internally by IC 310 to generate a detection signal to be transmitted on transmit antenna 312, and is also used in down-converting the detected signal from receive antenna array 314 to a baseband frequency. The LO signal is also provided to the LO output (LO_OUT) of IC 310. In this respect, IC 310 may be referred to as the "master" IC. IC 320 includes a LO input (LO_IN) for receiving LO signals from IC 310. In this respect, IC 320 may be referred to as the "slave" IC. The LO signal from LO_IN is used internally by IC 320 to generate a detection signal to be transmitted on transmit antenna 322, and is also used in down-converting the detected signal from receive antenna array 324 to a baseband frequency. IC310 includes a chirp_start output, which is provided to the chirp_start input of IC 320 to synchronize the activation of the detection signal using IC 310 with the activation of the detection signal using IC 320. Details regarding the generation of the FMCW detection signal and the down-conversion of the detected signal are known in the art and will not be described further herein unless necessary to illustrate the present embodiment.
[0086] IC 310 additionally utilizes a crystal to derive a 40MHz clock, which is used by the ADC in the IC to digitize the down-converted detected signal from antenna array 314. IC 310 includes a 40MHz output connected to a 40MHz input of IC 320, which is used by the ADC in IC 320 to digitize the down-converted detected signal from antenna array 324, and to synchronize the digitization operations of the ADCs in ICs 310 and 320. ICs 310 and 320 each include a high-speed digital communication interface for transmitting the digitized detected signals from the respective antenna arrays 314 and 324 to processing IC 340 for processing. Examples of high-speed digital communication interfaces, as needed or desired, may include Mobile Industry Processor Interface (MIPI) Camera Serial Interface-2 (CSI-2), Low Voltage Differential Signaling (LVDS) interfaces, etc. Details of digitizing the detected signals and transmitting the digitized signals via the digital communication interface are known in the art and will not be described further herein unless necessary to illustrate the present embodiment. ICs 310 and 320 each include a low-speed digital communication interface connected to a processing IC 340, thereby enabling the processing IC 340 to communicate with ICs 310 and 320 to set operating parameters of ICs 310 and 320, monitor the operation of ICs 310 and 320, and modify the operating parameters of ICs 310 and 320 as needed or desired. Examples of the low-speed digital communication interface may include a Serial Peripheral Interface (SPI), etc. Details of managing and controlling the ICs via the low-speed digital communication interface are known in the art and will not be described further herein unless necessary to illustrate the current embodiment.
[0087] Processing IC 340 represents a digital signal processing device configured to extract object detection, range, velocity, and angle of incidence information from digitized signals received from ICs 310 and 320. Examples of processing IC 130 may include a microcontroller unit (MCU), a digital signal processor (DSP), a field-programmable gate array (FPGA) device, etc. Details of processing the digitized signals into object detection, range, velocity, and angle of incidence information are known in the art and will not be described further herein unless necessary to illustrate the current embodiment.
[0088] The inventors of this invention understand that in the design of radar systems utilizing multiple ICs or MMICs, the signals between the ICs or MMICs require high phase coherence. Specifically, the signal used for the downconversion detection signal (LO signal) should be in phase not only within each IC or MMIC but also between the various ICs or MMICs to reduce angular errors in determining the angle of incidence of the detected object. Therefore, the signal used for the downconversion detection signal (LO signal) should be in phase not only within each of ICs 310 and 320 but also between the ICs. In a particular embodiment, ICs 310 and 320 represent the same designated IC, for example, where each IC has the same type and part number, or where the ICs have different types but come from a common component family.
[0089] Here, the placement of ICs 310 and 320, and the interconnection between ICs 310 and 320, can be specified, for example, through design rules or design recommendations. Additionally, ICs 310 and 320 can be configured such that, if the specified placement and interconnection are followed, the ICs are designed to ensure that the LO signals are synchronized with each other when used internally by the ICs, for example, by providing an internal LO of known duration to one or the other IC. Here, the phase coherence of the signal detected from IC 310 will be understood as high; that is, within a specified tolerance, the coherence of the signal detected from IC 320 will be understood as high, and the coherence between the signal detected from IC 310 and the signal detected from IC 320 will also be understood as high. Therefore, the configuration shown by radar system 300 provides a simple and compact design.
[0090] However, even with this configuration, and even when following design rules or recommendations, the phase coherence of the LO signal may be insufficient. As a first issue, thermal variations between IC 310 and IC 320, and between the IC and the printed circuit board (PCB) or other boards on which the IC is mounted, can cause uncompensated decoherence in the LO signal used by each IC. Furthermore, it should be understood that radar system 300 may represent a radar system with more than one slave IC, wherein the LO_OUT output from IC 310 is provided to the LO_IN inputs of two or more slave ICs. Here, the additional slave IC can be understood as being placed to the right of IC 320. Additionally, the signal trace between the LO_OUT output of IC 310 and the LO_IN input of the additional slave IC will be understood as being longer than the signal trace between IC 310 and IC 320. Here, it will be seen that each additional slave IC has a longer trace length, and therefore the LO signal to each additional IC will be understood as being more out of phase with the LO signal used by IC 310.
[0091] Figure 4Radar system 400, similar to radar systems 100 and 300, is shown. Radar system 400 includes a first transmit / receive IC 410, a second transmit / receive IC 420, and a signal processing IC 440. Transmit / receive ICs 410 and 420 represent RF ICs or MMICs, which may have more different designations as needed or desired. Transmit / receive ICs 410 and 420 each include at least one transmit channel and at least four receive channels. The transmit channel of IC 410 is connected to a transmit antenna 412, and the four receive channels of IC 410 are connected to an antenna array 414 of four receive antennas. Specifically, the four receive antennas of antenna array 414 are designated RX(M.1), RX(M.2), RX(M.3), and RX(M.4) from left to right, and each antenna is located at a distance λ / 2 from the next antenna, as described above. Similarly, the transmit channel of IC 420 is connected to transmit antenna 422, and the four receive channels of IC 420 are connected to antenna array 424 with four receive antennas. Specifically, the four receive antennas of antenna array 424 are designated from left to right as RX(S.1), RX(S.2), RX(S.3), and RX(S.4), and each antenna is located at a distance of λ / 2 from the next antenna. Furthermore, antenna RX(S.4) is located at a distance of λ / 2 from antenna RX(S.1), such that the antennas of antenna arrays 414 and 424 are together configured as a single receive antenna array 430 with eight antennas.
[0092] IC 410 also includes a clock or crystal input, which, in the illustrated example, is connected to. IC 410 uses the crystal as an input to derive the LO signal. The LO signal derived from the crystal is provided to the LO output (LO_OUT) of IC 410. Therefore, IC 410 is the master IC here. IC 410 also includes a LO input (LO_IN) for receiving the LO signal. IC 410 does not use the internal LO signal, but instead uses the LO signal from the LO input to generate a detection signal to be transmitted on the transmit antenna 412, and utilizes the LO signal when down-converting the detected signal from the receive antenna array 414 to a baseband frequency. The LO signal is also provided to the LO input (LO_IN) of IC 420. Here, IC 420 is the slave IC. The LO signal from LO_IN is used internally by IC 420 to generate a detection signal to be transmitted on the transmit antenna 422, and is utilized when down-converting the detected signal from the receive antenna array 424 to a baseband frequency. IC 410 includes a chirp_start output, which is provided to the chirp_start input of IC 420 to synchronize the activation of the detection signal using IC 410 with the activation of the detection signal using IC 420.
[0093] IC 410 additionally utilizes a crystal to derive a 40MHz clock, which is used by the ADC in the IC to digitize the down-converted detected signal from antenna array 414. IC 410 includes a 40MHz output connected to a 40MHz input of IC 420, which is used by the ADC in IC 420 to digitize the down-converted detected signal from antenna array 424, and to synchronize the digitization operations of the ADCs in ICs 410 and 420. ICs 410 and 420 each include a high-speed digital communication interface for transmitting the digitized detected signals from the respective antenna arrays 414 and 424 to processing IC 440 for processing. ICs 410 and 420 each include a low-speed digital communication interface connected to processing IC 440, whereby processing IC 440 communicates with ICs 410 and 420 to set operating parameters of ICs 410 and 420, monitor the operation of ICs 410 and 420, and modify the operating parameters of ICs 410 and 420 as needed or desired. Processing IC 440 represents a digital signal processing device configured to extract object detection, range, velocity, and angle of incidence information from digitized signals detected from ICs 410 and 420.
[0094] It should be noted here that both ICs 410 and 420 use a common LO signal from the LO output of IC 410 via their respective LO inputs. In this way, the LO signals received by both ICs 410 and 420 have a common phase shift because the length of the signal trace between the LO output (LO_OUT) and LO input (LO_IN) of IC 410 is the same as the length of the signal trace between the LO output (LO_OUT) and LO input (LO_IN) of IC 420. Therefore, the two signal traces will experience a common thermal environment, such that any drift in the LO signal experienced by the LO input of IC 410 will be the same as the drift in the LO signal experienced by the LO input of IC 420. Here, ICs 410 and 420 can be simplified because the need for internal compensation for LO signal phase changes can be reduced or eliminated. However, the trade-off for this advantage is that IC 410 has an additional output pin to accommodate the LO output (LO_OUT). Additionally, in the case where radar system 400 represents a radar system with more than one slave IC, it is necessary to ensure that all LO signal traces between the LO output (LO_OUT) and various LO inputs (LO_IN) of IC 410 are the same length as the longest trace. This results in a larger portion of the PCB or other circuit board where the IC is mounted for LO signal trace routing. Furthermore, it may be necessary to route the signal trace of the nearest IC via a detour to ensure that the length of the signal trace to the nearest IC is the same as the length of the signal trace to the farthest IC.
[0095] Figure 5Radar system 500, similar to radar systems 100, 300, and 400, is shown. Radar system 500 includes a first transmit / receive IC 510, a second transmit / receive IC 520, and a signal processing IC 540. Transmit / receive ICs 510 and 520 represent RFICs or MMICs, and may have more different designations as needed or desired. Transmit / receive ICs 510 and 520 each include at least one transmit channel and at least four receive channels. The transmit channel of IC 510 is connected to a transmit antenna 512, three of the four receive channels of IC 510 are connected to an antenna array 514 of three receive antennas, and a fourth receive channel of IC 510 is connected to an antenna 516. Specifically, the three receiving antennas of antenna array 514 are designated RX(M.1), RX(M.2), and RX(M.3) from left to right, and antenna 516 is designated RX(M.4) / (S.1), with each antenna located at a distance of λ / 2 from the next antenna, as described above. Similarly, the transmit channel of IC 320 is connected to transmit antenna 322, the first of the four receive channels of IC 320 is connected to antenna 516, and three of the four receive channels of IC 320 are connected to antenna array 324, which consists of three receiving antennas. Specifically, the three receiving antennas of antenna array 524 are designated RX(S.2), RX(S.3), and RX(S.4) from left to right, with each antenna located at a distance of λ / 2 from the next antenna. Furthermore, antenna RX(S.1) is located at a distance of λ / 2 from antenna RX(S.2), such that the antennas of antenna arrays 514, 516, and 524 are together configured as a single receiving antenna array 530 with seven antennas.
[0096] IC 510 also includes a clock or crystal input, in which, in the illustrated example, the crystal is connected. IC 510 uses the crystal as an input to derive a LO signal. The LO signal derived from the crystal is used internally by IC 510 to generate a detection signal to be transmitted on transmit antenna 512, and is also used in downconverting the detected signal from receive antenna array 514 to a baseband frequency. The LO signal is also provided to the LO output (LO_OUT) of IC 510. In this respect, IC 510 may be referred to as the "master" IC. IC 520 includes a LO input (LO_IN) for receiving LO signals from IC 510. In this respect, IC 520 may be referred to as the "slave" IC. The LO signal from LO_IN is used internally by IC 520 to generate a detection signal to be transmitted on transmit antenna 522, and is also used in downconverting the detected signal from receive antenna array 524 to a baseband frequency. IC510 includes a chirp_start output, which is provided to the chirp_start input of IC520 to synchronize the activation of the detection signal using IC510 with the activation of the detection signal using IC520.
[0097] IC 510 additionally utilizes a crystal to derive a 40MHz clock, which is used by the ADC in the IC to digitize the down-converted detected signal from antenna array 514. IC 510 includes a 40MHz output connected to the 40MHz input of IC 520, which is used by the ADC in IC 520 to digitize the down-converted detected signal from antenna array 524, and to synchronize the digitization operations of the ADCs in ICs 510 and 520. ICs 510 and 520 each include a high-speed digital communication interface for transmitting the digitized detected signals from the respective antenna arrays 514 and 524 to processing IC 540 for processing. ICs 510 and 520 each include a low-speed digital communication interface connected to processing IC 540, whereby processing IC 540 communicates with ICs 510 and 520 to set operating parameters of ICs 510 and 520, monitor the operation of ICs 510 and 520, and modify the operating parameters of ICs 510 and 520 as needed or desired. Processing IC 540 represents a digital signal processing device configured to extract object detection, range, velocity, and angle of incidence information from digitally detected signals from ICs 510 and 520.
[0098] In certain embodiments, ICs 510 and 520 represent the same designated IC, for example, where each IC has the same type and part number, or where the ICs have different types but come from a common component family. Thus, similar to radar system 300, the placement of ICs 510 and 520, as well as the interconnection between ICs 510 and 520, can be specified, for example, by design rules or design recommendations. Here, the fact that antenna 516 is connected to both receive channel RX(M.4) and receive channel RX(S.1) allows IC 540 to receive two sets of four digitally detected signals: a first set from IC 510 (i.e., RX(M.1)-RX(M.4)) and a second set from IC 520 (i.e., RX(S.1)-RX(S.4)). However, since the reflected signal received by the receive channel RX(M.4) in IC 510 is also the reflected signal received by the receive channel RX(S.1) in IC 520, as experienced by IC 540, any phase difference between the digitally detected signal from RX(M.4) and the digitally detected signal from RX(S.1) will not be interpreted as representing the actual phase difference in the reflected signals from those channels, but will instead be interpreted as representing an estimate of the phase difference between the LO signal in IC 510 and the LO signal in IC 520.
[0099] Here, IC 540 is used to detect the phase difference between the digitally detected signal from RX(M.4) and the digitally detected signal from RX(S.1), and to compensate for the phase difference in the digital domain, thereby aligning the digitally detected signals from ICs 510 and 520. In a particular embodiment, IC 540 is used to perform time-domain correlation of the IF signals from RX(M.4) and RX(S.1) to generate a time offset between the signals, and to use the time offset to correct the set of values as needed. In another embodiment, IC 540 is used to perform a Fast Fourier Transform (FFT) on the IF signals received from ICs 510 and 520. The FFT will produce the expected frequency peaks associated with objects in the detection field. The frequencies of the peaks from all received channels RX(M.1)-RX(M.4) and RX(S.1)-RX(S.4) will be the same. Furthermore, the phase offset between receive channels RX(M.1) and RX(M.4) will each be expected to have a phase offset indicating the angle of incidence of the detected object, and so will the phase offset between receive channels RX(S.1) and RX(S.4). However, since the reflected signal of each object is the same when received by receive channel RX(M.4) and receive channel RX(S.1), the phase offset between receive channels RX(M.4) and RX(S.1) for each object (i.e., each frequency peak) represents the phase offset in the LO signal in the corresponding ICs 510 and 540. Here, IC540 uses the phase offset between receive channels RX(M.4) and RX(S.1) to correct the set of values as needed.
[0100] In a particular embodiment, radar system 500 is used to set a correction value (i.e., the time offset of the time-domain IF signal or the phase offset of the frequency-domain signal) during initial operation, for example, during a calibration phase in the operation of radar system 500. The correction value can then be used for subsequent signal processing by IC 540. In a variation, radar system 500 may, for example, detect a temperature difference between ICs 510 and 520 during a normal operation phase in the operation of radar system 500, and may recalculate the correction value if the temperature difference exceeds a threshold. In another variation, radar system 500 may set the correction value periodically. For example, IC 540 may be configured to recalculate the correction value at a predetermined rate, for example, every second, every 500 milliseconds, or at another predetermined rate as needed or desired. This embodiment offers the advantage of reducing the additional processing required to calculate the correction value when signal processing resources of IC 540 are scarce. In another embodiment, radar system 500 is used to continuously calculate the correction value. Here, given the ample signal processing resources of IC 540, the additional processing required for continuously calculating correction values may not place too much burden on the IC.
[0101] It should be understood that the LO signal phase offset between multiple ICs can be estimated and corrected as needed or desired. For example, in the case of a radar system comprising three ICs, each with four receive channels, a single antenna shared between the first and second ICs can provide an estimate of the LO phase offset between them, and a single antenna shared between the second and third ICs can provide an estimate of the LO phase offset between them. Similarly, the LO phase offset between additional ICs can be estimated and corrected as needed or desired. It should be noted that the theoretical virtual aperture radar systems 300 and 400 will be equivalent to an equivalent SIMO radar system with 16 (i.e., 2 (transmit antennas) × 8 (receive antennas) = 16) antennas. In contrast, the theoretical virtual aperture radar system 500 will be equivalent to an equivalent SIMO radar system with 14 (i.e., 2 (transmit antennas) × 7 (receive antennas) = 14) antennas. Therefore, the theoretical angular resolution of radar systems 300 and 400 is greater than that of radar system 500. However, in practice, a more accurate measurement of the phase difference of the LO signals between IC 510 and 520, when provided by the radar system 500, can be achieved without any resolution loss due to the smaller theoretical virtual aperture offset.
[0102] Figure 6 This diagram illustrates a method for estimating and compensating for local oscillator (LO) drift in a cascaded radar system, beginning at box 600. In box 602, a single antenna is connected to the receiver inputs of two receiver ICs. For example, in the case where each receiver IC includes four receiver channels, an array of seven antennas can be specified with a spacing of λ / 2 or less. Here, three of the receiver channels on each receiver IC can be connected to the associated antenna. The fourth receiver channel of each receiver IC can be connected to a shared antenna. Typically, the middle antenna of the seven-antenna array will be the shared antenna.
[0103] In block 604, reflected FMCW linear frequency modulated pulses are received on a shared antenna. Here, the cascaded radar system may include one or more transmit channels on one or more individual transmitting ICs, or on one or both of a first receiver IC and a second receiver IC. The transmit channels may transmit coded FMCW linear frequency modulated pulses that can be reflected from an object in the detection space of the radar system. The reflected FMCW linear frequency modulated pulses can be detected by the shared antenna.
[0104] In block 606, the FMCW linear frequency modulated pulse received by the first receiver IC is mixed with the first LO signal to obtain a first IF signal, and the first IF signal is digitized. For example, the first receiver IC may generate the first LO signal, or it may receive the first LO signal from another external source. The resulting IF signal will have a phase shift related to the phase shift of the first LO signal. The first IF signal can be digitized using an ADC.
[0105] In block 608, the FMCW linear frequency modulated pulse received by the second receiver IC is mixed with the second LO signal to obtain a second IF signal, and the second IF signal is digitized. For example, the second receiver IC may generate the second LO signal, or it may receive the second LO signal from another external source. The resulting IF signal will have a phase shift related to the phase shift of the second LO signal. The first LO signal and the second LO signal may be based on a common LO signal, for example, where one of the receiver ICs generates the common LO signal and provides the common LO signal to the other receiver IC. The second IF signal can be digitized using an ADC.
[0106] In block 610, a first digitized IF signal and a second digitized IF signal are received. For example, a digital signal processing IC may receive the digitized IF signals from a first receiver IC and a second receiver IC.
[0107] In block 612, the phase difference between the first digitized IF signal and the second digitized IF signal is determined. For example, a digital signal processing IC can determine the phase difference in the time domain or frequency domain as needed or desired.
[0108] In block 614, the phase difference is corrected in the receiver output of one of the first ICs and the second IC, and in block 616, the method ends.
[0109] Figure 7 A vehicle 700 is illustrated, comprising one or more radar systems 710. Vehicle 700 represents any type of vehicle that utilizes a radar system to detect objects and provide range, speed, and angle of incidence information related to those objects. Examples of vehicle 700 may include automobiles, autonomous vehicles, trucks, vans, motorcycles, multi-purpose vehicles, boats, ships, drones, aircraft, emergency service vehicles, etc. Radar system 710 may communicate as needed or desired with automatic braking systems, adaptive cruise control systems, collision avoidance systems, or other systems of vehicle 700 to influence the operation of the vehicle. Radar system 710 may be similar to the radar systems described herein and may operate in accordance with the teachings disclosed herein.
[0110] While only a few exemplary embodiments have been described in detail herein, those skilled in the art will readily recognize that numerous modifications to the exemplary embodiments are possible without substantially departing from the novel teachings and advantages of the embodiments of this disclosure. Therefore, all such modifications are intended to be included within the scope of the embodiments of this disclosure as defined in the appended claims. In the claims, the means-plus-function clause is intended to cover structures described herein as performing the listed functions, and not only structural equivalents but also equivalent structures.
[0111] The subject matter disclosed above should be considered illustrative rather than restrictive, and the appended claims are intended to cover all such modifications, enhancements, and other embodiments falling within the scope of this invention. Therefore, to the fullest extent permitted by law, the scope of this invention is determined by the broadest permissible interpretation of the following claims and their equivalents, and should not be construed as limited by the foregoing detailed description.
Claims
1. A frequency modulated continuous wave (FMCW) radar system, characterized by, include: An antenna array comprising C antennas, where C = A + B - 1, and where A, B, and C are integers greater than one; A first integrated circuit (IC) device, the first IC device including A first sensor inputs, each first sensor input coupled to the first A antennas in the antenna, the first IC device being configured to receive an associated first reflected signal at each first sensor input, mix the first reflected signal with an associated first baseband signal based on a first local oscillator (LO) signal, and output the first baseband signal, wherein the first LO signal has a first phase shift; A second IC device includes B second sensor inputs, each second sensor input coupled to the last B antennas of the antenna, such that a common input in the first sensor inputs and a common input in the second sensor inputs are coupled to a common antenna. The second IC device is configured to receive an associated second reflected signal at each second sensor input, mix the second reflected signal with an associated second baseband signal based on a second local oscillator (LO) signal, and output the second baseband signal, wherein the second LO signal has a second phase shift, wherein the first LO signal and the second LO signal are based on a common LO signal, and wherein the common first baseband signal is associated with a common first sensor input, and the common second baseband signal is associated with a common second sensor input. as well as A processor configured to receive a first baseband signal and a second baseband signal, determine a difference between a first phase shift and a second phase shift based on the common first baseband signal and the common second baseband signal, and correct at least one of the first baseband signal and the second baseband signal based on the difference between the first phase shift and the second phase shift.
2. The FMCW radar system of claim 1, wherein, In determining the difference between the first phase shift and the second phase shift, the processor is further configured to determine the delay time between the common first baseband signal and the common second baseband signal.
3. The FMCW radar system of claim 2, wherein, When correcting at least one of the first baseband signal and the second baseband signal, the processor is further configured to delay at least one of the first baseband signal and the second baseband signal by the delay time.
4. A method for compensating for local oscillator (LO) phase shift in a cascaded integrated circuit (IC) device of a frequency modulated continuous wave (FMCW) radar system, the method comprising: The method includes: Provide an antenna array for the FMCW radar system, the antenna array comprising C antennas, where C = A + B - 1, and where A, B, and C are integers greater than one; The first sensor input of the first IC device is coupled to the first A antennas in the antenna; Receive the associated first reflected signal at each first sensor input; In the first IC device, the first reflected signal is mixed with an associated first baseband signal based on a first local oscillator (LO) signal, wherein the first LO signal has a first phase shift, and wherein the common first baseband signal is associated with a common first sensor input; The first baseband signal is output from the first IC device; The B second sensor inputs of the second IC device are coupled to the last B antennas in the antenna, such that the common input in the first sensor input and the common input in the second sensor input are both coupled to the common antenna; Receive the associated second reflected signal at each second sensor input; In the second IC device, the second reflected signal is mixed with an associated second baseband signal based on a second local oscillator (LO) signal, wherein the second LO signal has a second phase shift, wherein the first LO signal and the second LO signal are based on a common LO signal, and wherein the common second baseband signal is associated with a common second sensor input; The second baseband signal is output from the second IC device; and The processor of the FMCW radar system receives the first baseband signal and the second baseband signal; The processor determines the difference between the first phase shift and the second phase shift based on the common first baseband signal and the common second baseband signal; and The processor corrects at least one of the first baseband signal and the second baseband signal based on the difference between the first phase shift and the second phase shift.
5. The method of claim 4, wherein, In determining the difference between the first phase shift and the second phase shift, the method further includes: The processor determines the delay time between the first common baseband signal and the second common baseband signal.
6. The method of claim 5, wherein, When correcting at least one of the first baseband signal and the second baseband signal, the method further includes: The processor delays at least one of the first baseband signal and the second baseband signal by the delay time.
7. The method of claim 4, wherein, In addition, including: The first LO signal is generated by the first IC device; as well as The second IC device receives the second LO signal from the first IC device.
8. A frequency modulated continuous wave (FMCW) radar system, characterized by, include: A transmitter configured to provide a plurality of FMCW linear frequency modulated pulses; Receiver, the receiver comprising: An antenna array comprising C antennas, where C = A + B - 1, and where A, B, and C are integers greater than one; A first integrated circuit (IC) device, the first IC device including A first sensor inputs, each first sensor input coupled to the first A antennas of the antenna, the first IC device being configured to receive a first reflected signal associated with the FMCW linear frequency modulation pulse at each first sensor input, mix the first reflected signal with an associated first baseband signal based on a first local oscillator (LO) signal, and output the first baseband signal, wherein the first LO signal has a first phase shift; and A second IC device, comprising B second sensor inputs, each second sensor input coupled to the last B antennas of the antenna, such that a common input in the first sensor inputs and a common input in the second sensor inputs are coupled to a common antenna, the second IC device being configured to receive, at each second sensor input, an associated second reflected signal associated with the FMCW linear frequency modulated pulse, mix the second reflected signal with an associated second baseband signal based on a second local oscillator (LO) signal, and output the second baseband signal, wherein the second LO signal has a second phase shift, wherein the first LO signal and the second LO signal are based on a common LO signal, and wherein the common first baseband signal is associated with a common first sensor input, and the common second baseband signal is associated with a common second sensor input; and A processor configured to receive a first baseband signal and a second baseband signal, determine a difference between a first phase shift and a second phase shift based on the common first baseband signal and the common second baseband signal, and correct at least one of the first baseband signal and the second baseband signal based on the difference between the first phase shift and the second phase shift.
Citation Information
Patent Citations
Kadar device
CN1536372A
Apparatus comprising a phase-locked loop
US20190131981A1