A control system and method based on PCIE card

Abstract

The present invention discloses a control system and method based on a PCIE card. The method comprises: providing a shielding cover unit, comprising a shielding cover and a high-stable crystal, a temperature sensor, and a fan disposed therein; the temperature sensor collecting temperature data of the high-stable crystal; providing an FPGA, which is plugged into a computer host via a PCIE interface; connecting the FPGA to the fan, the high-stable crystal, and the temperature sensor, respectively; collecting temperature data from the temperature sensor and transmitting the temperature data to the computer host; and receiving instructions from the computer host to control the input of the high-stable crystal and the speed of the fan; and providing a frequency meter, which collects frequency data of the high-stable crystal and is plugged into the computer host via a GPIB interface card on the computer host to transmit the frequency data of the high-stable crystal to the computer host. By understanding the relationship between the input control of the high-stable crystal and the optimal frequency output, the high-stable crystal of the PCIE card can be more effectively controlled, thereby improving timing accuracy.

Description

Technical Field

[0001] The present invention belongs to the field of communication technology, and mainly relates to a control system and method based on a PCIE (peripheral component interconnect express) card. Background Art

[0002] High-stability crystals are key components in timing systems, and the stability of their output frequency is a crucial indicator of the system's ability to achieve high-precision timing. However, in practice, ambient temperature significantly impacts the stability of a high-stability crystal's frequency output. At certain temperatures, the output frequency of a high-stability crystal varies significantly with input control. In these cases, simply fine-tuning the input can cause significant fluctuations in the output frequency, making it difficult to achieve ideal frequency characteristics within this temperature range. At other temperatures, the output frequency of a high-stability crystal varies less. Adjusting the input results in minimal changes in the output frequency, or the output frequency exhibits a relatively regular variation with the input control. Within this temperature range, high-stability crystals are easily controlled, and their output characteristics are highly predictable. We all hope to ensure that high-stability crystals operate within these ambient temperatures to achieve optimal frequency output characteristics and control methods.

[0003] PCIE cards are typically specialized devices that plug into a PCIE slot on a computer motherboard. In addition to the PCIE slot, motherboards also contain other electronic components, particularly the motherboard's processor. The motherboard's power supply is a source of both heat and interference. PCIE cards operate in the relatively enclosed environment of the host chassis. As a timing system, the high-stability crystals on the card are also affected by the host chassis's relatively closed temperature environment. To improve the timing accuracy of PCIE cards, it's necessary to adjust the ambient temperature of the PCIE card to achieve optimal frequency characteristics. Summary of the Invention

[0004] The present invention aims to provide a control system based on a PCIE card. This card is inserted into a PCIE slot on a host computer and communicates with the computer. A host computer controls the input of the PCIE card's high-stability crystal, ensuring that the crystal outputs optimal frequency characteristics. Furthermore, the computer's processor collects and plots data on the relationship between the PCIE card's operating frequency and ambient temperature. This allows for understanding the relationship between high-stability crystal input control and optimal frequency output, enabling more efficient control of the PCIE card's high-stability crystal and improving timing accuracy.

[0005] Specifically, the technical solution of the present invention includes:

[0006] A control system based on a PCIE card is provided with a shielding cover unit, wherein the shielding cover unit includes a shielding cover and a high-stability crystal, a temperature sensor and a fan arranged in the shielding cover, and the temperature sensor collects temperature data of the high-stability crystal;

[0007] Set up the FPGA, which is plugged into the computer host through the PCIE interface. The FPGA is connected to the fan, high-stability crystal, and temperature sensor respectively. The FPGA collects temperature data from the temperature sensor and transmits the temperature data to the computer host. The FPGA receives instructions from the computer host to control the control voltage of the high-stability crystal and the speed of the fan.

[0008] A frequency meter is also provided, which collects frequency data of the high-stable crystal and is connected to the computer host via a GPIB interface card on the computer host to transmit the frequency data of the high-stable crystal to the computer host.

[0009] Optionally, a driver and a host computer are set in the computer host; the driver encapsulates the hardware information, data read and write operation functions and interrupt operation functions of the PCIE interface; the host computer receives temperature data sent from the FPGA and frequency data sent from the frequency meter, and uses mathematical methods to draw a temperature and frequency curve; the host computer sends a high-stability crystal voltage control signal and a fan speed control signal to the FPGA, and controls the control voltage of the high-stability crystal and the speed of the fan through the FPGA.

[0010] Optionally, the shielding cover consists of a temperature control zone, a transition zone and a working zone that are connected in sequence; the length of the temperature control zone is smaller than the length of the working zone, and the width and length of the transition zone are both smaller than the width and length of the working zone; a fan is set in the temperature control zone, and a high-stability crystal and temperature sensor are set in the working zone.

[0011] Optionally, a plurality of ventilation holes are provided on the side lower wall of the working area.

[0012] Optionally, a heat insulating layer is attached to the inner wall of the shielding cover.

[0013] A control method based on a PCIE card, setting a control system based on a PCIE card, wherein the control system based on the PCIE card is the control system based on the PCIE card described in the present invention;

[0014] S1: The frequency meter and temperature sensor measure the output frequency data and temperature data of the high-stability crystal respectively, and send the data to the computer host through the PCIE interface after the PCIE card interrupts communication;

[0015] S2: The computer host uses the collected temperature data as the horizontal axis and the output frequency data as the vertical axis to obtain a relationship curve between the output frequency and the temperature, and obtains a linear curve. The frequency range corresponding to the linear curve is the optimal output frequency range, and the temperature range corresponding to the linear curve is the optimal operating temperature range;

[0016] S3: The FPGA reads the actual temperature value of the temperature sensor and compares it with the optimal operating temperature range. If the actual temperature value is lower than the optimal operating temperature range, the FPGA sends a control signal to turn off the fan or reduce the fan speed. If the actual temperature value is higher than the optimal operating temperature range, the FPGA sends a control signal to increase the fan speed.

[0017] S4: After the high-stability crystal reaches the optimal operating temperature, the control voltage is adjusted to obtain the optimal output frequency of the high-stability crystal; the FPGA continuously adjusts the control voltage of the high-stable crystal so that the output frequency curve of the high-stable crystal is a straight line, and the corresponding relationship between the control voltage and output frequency of the high-stable crystal is obtained. The optimal output frequency range obtained by S2 can then be used to obtain the optimal control voltage range.

[0018] Optionally, a driver and a host computer are set in the computer host; the driver encapsulates the hardware information, data read and write operation functions and interrupt operation functions of the PCIE interface; the host computer receives temperature data sent from the FPGA and frequency data sent from the frequency meter, and uses mathematical methods to draw a temperature and frequency curve; the host computer sends a high-stability crystal voltage control signal and a fan speed control signal to the FPGA, and controls the control voltage of the high-stability crystal and the speed of the fan through the FPGA.

[0019] Optionally, in S2, if a linear curve cannot be obtained, the computer host simulates a linear curve using the least squares method or interpolation method based on the relationship curve between the output frequency and temperature to obtain the optimal output frequency range and the optimal operating temperature range.

[0020] Optionally, the method for controlling the PCIE card to interrupt communication in S1 includes:

[0021] S1.1: FPGA waits for the temperature acquisition instruction from the host computer. If the acquisition instruction is yes, it enters S1.2, otherwise it continues to wait;

[0022] S1.2: FPGA collects temperature data and writes it into the buffer;

[0023] S1.3: Check whether the amount of data stored in the buffer reaches the set threshold. If not, repeat S1.2 until the amount of data stored in the buffer reaches the set threshold, then proceed to S1.4.

[0024] S1.4: When the amount of data stored in the buffer reaches the set threshold, the buffer displays a threshold-reaching flag, the FPGA specifies a storage address, and the PCIE card interrupts communication.

[0025] S1.5: After receiving the communication interruption signal from the PCIE card, the host computer reads the data at the storage address in S1.4;

[0026] S1.6: After the host computer has finished processing the read data, it sends a data acquisition termination signal to the FPGA; otherwise, it executes S1.1.

[0027] Beneficial effects:

[0028] The control system and method based on the PCIE card proposed in the present invention can easily obtain the optimal working environment temperature range of the high-stability crystal, which is of great significance for achieving rapid locking of the high-stability crystal, improving its frequency accuracy, and thus improving the timing accuracy of the entire system. When determining the corresponding relationship between the frequency output and the temperature and using the host computer to draw the relationship curve, the resources of the computer host CPU are fully utilized for operation. The computer host processor has a strong computing power, which makes the relationship curve very easy and fast, thereby improving data processing efficiency. By adopting the technical solution of the present invention, the processor resources of the computer host are fully utilized, so that the PCIE card itself does not need to add additional processor resources. The FPGA cooperates with the computer host to complete the related business, thereby achieving the improvement of the accuracy of the PCIE card. While realizing the function, not only the design cost of the PCIE card is reduced, but also the card can be made smaller because the processor is omitted. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following detailed description, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0030] Figure 1 This is a schematic diagram of the structure of a control system based on a PCIE card of the present invention;

[0031] Figure 2 It is a structural schematic diagram of the shielding cover unit of the present invention;

[0032] The symbols in the figure represent:

[0033] 1-shielding cover, 101-temperature control area, 102-transition area, 103-working area, 104-ventilation hole, 105-insulation layer, 2-high-stability crystal, 3-fan. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be further described in detail below with reference to the embodiments. Obviously, the embodiments described are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention. The implementation of the technical solution is further described in detail below with reference to the accompanying drawings.

[0035] The present invention provides a frequency control system and method for a high-stability crystal, a key component of a PCIE card timing system, which finds a region where its operating frequency is relatively stable with temperature changes, simplifies crystal control, and improves the stability of its frequency output, thereby improving the timing accuracy of the entire card.

[0036] Specific, combined Figure 1 and 2 The PCIE card-based control system of the present invention includes a shielding cover unit comprising a shielding cover 1 and a high-stable crystal 2, a temperature sensor, and a fan 3 disposed therein. The temperature sensor collects temperature data of the high-stable crystal 2. An FPGA is provided, which is plugged into a computer host via a PCIE interface. The FPGA is connected to the fan 3, the high-stable crystal 2, and the temperature sensor, respectively. The FPGA collects temperature data from the temperature sensor and transmits the temperature data to the computer host. The FPGA receives instructions from the computer host to control the input of the high-stable crystal 2 and the speed of the fan 3. A frequency meter is also provided, which collects frequency data of the high-stable crystal 2 and transmits the frequency data of the high-stable crystal 2 to the computer host via a GPIB interface card plugged into the computer host. To achieve temperature changes in the high-stable crystal environment, a shielding cover system is introduced to artificially create a relatively closed environment. The FPGA is also used to output signals of different frequencies and pulse widths to change the fan speed, making it convenient to adjust and control the working environment temperature of the high-stable crystal and easily achieving temperature changes. Therefore, it is easy to obtain the optimal operating environment temperature range of the high-stability crystal, which is of great significance for achieving rapid locking of the high-stability crystal, improving its frequency accuracy, and thus improving the timing accuracy of the entire system. Because FPGA can easily output adjustment signals of different frequencies and pulse widths, the range of fan speed adjustment is very wide. It is easy to find the optimal operating temperature range of the high-stability crystal, and the feasibility is good. By adopting the technical solution of the present invention, the processor resources of the computer host are fully utilized, so that the PCIE card itself does not need to add additional processor resources. The FPGA cooperates with the computer host to complete the relevant business, and the accuracy of the PCIE card can be improved. While realizing the function, not only the design cost of the PCIE card is reduced, but also the card can be made smaller because the processor is omitted. In the implementation method, PCIE interrupt is used for processing, which has better real-time performance.

[0037] In an embodiment of the present disclosure, a computer host connected to a PCIE interface includes a driver and a host computer; the driver encapsulates the hardware information, data read and write operation functions, and interrupt operation functions of the PCIE interface; the host computer receives temperature data from the FPGA and frequency information from the frequency meter, and uses mathematical methods to draw a temperature and frequency curve; the host computer sends a high-stability crystal input control signal and a fan speed control signal to the FPGA, and controls the input of the high-stability crystal and the speed of the fan through the FPGA. When determining the corresponding relationship between the frequency output and the temperature and using the host computer to draw the relationship curve, the computer host CPU resources are fully utilized. The computer host processor has powerful computing power, making the relationship curve easy and fast, thereby improving data processing efficiency. The FPGA, as the core component of the PCIE card, mainly completes the control of the temperature sensor and is responsible for controlling the temperature sensor to collect the ambient temperature of the high-stability crystal and read the data. In addition, the FPGA also controls the input of the high-stability crystal so that the high-stability crystal outputs the optimal frequency characteristics. Third, the FPGA also controls the fan speed by outputting signals of varying frequencies and pulse widths. The FPGA uses these signals to slow down or speed up the fan. Fourth, the FPGA's built-in PCIE interface module connects to the computer via the motherboard's PCIE slot, enabling communication with the host computer via the PCIE interface. High-stability crystals are key components in the PCIE card's timing function. They can achieve optimal frequency output under controlled input conditions. Furthermore, even without a reference source, they can simulate a reference source and output high-precision signals, achieving timekeeping. For example, a common voltage-controlled oscillator (VCO) uses these high-stability crystals to change the crystal's frequency output by varying the crystal's input voltage. The fan can be controlled by the FPGA, achieving different speeds based on the FPGA's output signals of varying frequencies and pulse widths, thereby driving air flow within the shielded enclosure. When the FPGA adjusts the fan speed by outputting signals of varying frequencies and pulse widths, accelerating air flow within the shielded enclosure, the hot air within the enclosure flows out through the micropores more quickly, dissipating more heat and reducing the temperature within the enclosure. The PCIE interface is the communication interface between the FPGA and the host computer. A PCIE card is inserted into the host computer's PCIE slot. The PCIE slot provides power to the PCIE card and an interface for data communication with the FPGA on the PCIE card. The driver is the middle layer connecting the PCIE interface to the host computer interface. It encapsulates PCIE interface hardware information, data read and write operations, interrupt operations, and other functions. The host computer acts as the data communication interface with the FPGA on the PCIE card.On the one hand, it can receive the temperature information sent by the FPGA through the PCIE and the frequency information transmitted from the GPIB interface card through the GPIB interface, plot it into a curve, and analyze it to find the situation where the frequency changes relatively smoothly with temperature and the frequency output is approximately linear. On the other hand, it can send a control signal to the FPGA through the PCIE interface, and use the FPGA to control the input end of the high-stability crystal, thereby changing the output frequency of the high-stability crystal. This enables the host computer to indirectly control the high-stability crystal. The GPIB interface card and frequency meter are used as test equipment. Their function is to measure the frequency output of the high-stability crystal. The test frequency results are sent to the host computer through the GPIB interface by the GPIB interface card installed on the computer host.

[0038] In the embodiment of the present disclosure, the shielding cover 1 is sequentially connected to a temperature control zone 101, a transition zone 102, and a working zone 103. The length of the temperature control zone 101 is shorter than that of the working zone 103, and the width and length of the transition zone 102 are both shorter than those of the working zone 103. The temperature control zone 101 is provided with a fan 3, and the working zone 103 is provided with a high-stability crystal 2 and a temperature sensor. The shielding cover 1 of this invention is provided with different lengths and widths to form several partitions. The temperature control zone 101 is mainly used to place the fan 3. Since the space of the shielding cover 1 itself is not large, the area occupied by the fan 3 can be small, and a certain amount of air flow is sufficient. In order to facilitate the temperature control of the high-stability crystal 2, the working zone where the high-stability crystal 2 is located is relatively large. On the one hand, it can achieve the temperature control of the ambient temperature itself, and on the other hand, it can achieve temperature isolation, so that the airflow from the fan 3 quickly cools the temperature without affecting the temperature of the area where the fan 3 is located, thereby ensuring the working environment temperature of the fan 3. The relatively isolated space makes it more convenient for the temperature sensor to collect temperature data of the high-stability crystal 2.

[0039] In the embodiment of the present disclosure, a plurality of ventilation holes 104 are provided on the lower side of the working area 103. The ventilation holes 104 are provided on the lower side of the shielding cover 1 to achieve air convection with the computer chassis environment. The reason for providing the holes on the lower side of the shielding cover 1 is that hot air is relatively light, which reduces heat dissipation. The auxiliary fan 3 can influence air convection by varying the speed of the fan, thereby reducing the difficulty of adjusting the ambient temperature inside the shielding cover.

[0040] In the embodiment of the present disclosure, a heat insulating layer 105 is attached to the inner wall of the shielding cover 1. The structure of the shielding cover 1 is as follows: Figure 2 As shown, the fan 3 and the high-stability crystal 2 are covered in a closed space. In order to ensure the heat shielding effect, an insulating layer 105 is coated on the inner layer of the shielding cover 1, which can greatly slow down the rapid dissipation of heat through the metal shielding cover, keep the closed space of the shielding cover 1 relatively insulated, and assist the fan 3 in regulating the ambient temperature of the shielding cover 1 when it rotates.

[0041] A control method based on a PCIE card, providing a control system based on a PCIE card, wherein the control system based on the PCIE card is the control system based on the PCIE card disclosed in the present invention;

[0042] S1: The frequency meter and temperature sensor measure the output frequency data and temperature data of the high-stability crystal respectively, and send the data to the computer host through the PCIE interface after the PCIE card interrupts communication;

[0043] S2: The computer host uses the collected temperature data as the horizontal axis and the output frequency data as the vertical axis to obtain a relationship curve between the output frequency and temperature, and obtains a linear curve. The output frequency range corresponding to the linear curve is the optimal output frequency range, and the temperature range corresponding to the linear curve is the optimal operating temperature range;

[0044] S3: The FPGA reads the actual temperature value of the temperature sensor and compares it with the optimal operating temperature range. If the actual temperature value is lower than the optimal operating temperature range, the FPGA sends a control signal to turn off the fan or reduce the fan speed. If the actual temperature value is higher than the optimal operating temperature range, the FPGA sends a control signal to increase the fan speed.

[0045] S4: After the high-stability crystal reaches the optimal operating temperature, the control voltage is adjusted to obtain the optimal output frequency of the high-stability crystal; the FPGA continuously adjusts the control voltage of the high-stable crystal so that the output frequency curve of the high-stable crystal is a straight line, and the corresponding relationship between the control voltage and output frequency of the high-stable crystal is obtained. The optimal output frequency range obtained by S2 can then be used to obtain the optimal control voltage range.

[0046] In an embodiment of the present disclosure, a computer host connected to a PCIE interface includes a driver and a host computer; the driver encapsulates the hardware information, data read and write operation functions, and interrupt operation functions of the PCIE interface; the host computer receives temperature data from the FPGA and frequency information from the frequency meter, and uses mathematical methods to draw a temperature and frequency curve; the host computer sends a high-stability crystal input control signal and a fan speed control signal to the FPGA, and controls the input of the high-stability crystal and the speed of the fan through the FPGA.

[0047] In an embodiment of the present disclosure, in S2, if a linear curve cannot be obtained, the computer host simulates a linear curve using the least squares method or interpolation method based on the relationship curve between the output frequency and temperature to obtain the optimal output frequency range and the optimal operating temperature range.

[0048] In an embodiment of the present disclosure, the control method for interrupting communication of the PCIE card in S1 includes:

[0049] S1.1: FPGA waits for the temperature acquisition instruction from the host computer. If the acquisition instruction is yes, it enters S1.2, otherwise it continues to wait;

[0050] S1.2: FPGA collects temperature data and writes it into the buffer to prevent data loss and avoid conflicts between writing and reading data. Take FIFO (First In First Out) as the buffer as an example.

[0051] S1.3: Check whether the amount of data stored in the buffer reaches the set threshold. If not, repeat S1.2 until the amount of data stored in the buffer reaches the set threshold, then proceed to S1.4.

[0052] S1.4: When the amount of data stored in the buffer reaches the set threshold, the buffer displays a threshold value reached flag, the FPGA specifies a storage address, and the PCIE card interrupts communication. For example, when the amount of data stored in the FIFO buffer reaches the set threshold, the FIFO will display a "full status" flag. At this time, the FPGA specifies a storage address and assigns the "full status" flag to the PCIE interrupt signal at this address, triggering a PCIE interrupt.

[0053] S1.5: After receiving the communication interruption signal from the PCIE card, the host computer reads the data at the storage address in S1.4;

[0054] S1.6: After the host computer has finished processing the read data, it sends a data acquisition termination signal to the FPGA; otherwise, it executes S1.1.

[0055] The present invention proposes a PCIE card-based control system and method that controls fan speed by outputting different operating frequencies via an FPGA. Combined with a shield in the system, this system regulates the ambient temperature of the high-stability crystal and finds the optimal operating curve for how the high-stability crystal frequency output changes with temperature. This allows for rapid locking of the high-stability crystal and improves the system's timing accuracy. During data transmission, PCIE interrupt transmission is used, ensuring reliable and real-time data transmission. The temperature-frequency relationship curve for the entire system fully leverages the powerful processor computing power of the host computer, enabling rapid identification of the optimal operating curve while also reducing system costs.

[0056] The preferred embodiments of the present disclosure are described in detail above in conjunction with the accompanying drawings. However, the present disclosure is not limited to the specific details of the above embodiments. Within the technical concept of the present disclosure, various simple modifications can be made to the technical solutions of the present disclosure, and these simple modifications all fall within the scope of protection of the present disclosure.

[0057] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any appropriate manner without contradiction. In order to avoid unnecessary repetition, the present disclosure will not further describe various possible combinations.

[0058] In addition, the various embodiments of the present disclosure may be arbitrarily combined, and as long as they do not violate the concept of the present disclosure, they should also be regarded as the contents disclosed by the present disclosure.

Claims

1. A control method based on PCIE card, characterized in that: A control system based on a PCIE card is provided. A shielding cover unit is provided in the control system based on the PCIE card. The shielding cover unit includes a shielding cover (1) and a high-stable crystal (2), a temperature sensor and a fan (3) provided in the shielding cover (1). The temperature sensor collects temperature data of the high-stable crystal (2). An FPGA is provided. The FPGA is plugged into a computer host through a PCIE interface. The FPGA is connected to the fan (3), the high-stable crystal (2) and the temperature sensor respectively. The FPGA collects temperature data from the temperature sensor and transmits the temperature data to the computer host. The FPGA receives instructions from the computer host to control the control voltage of the high-stable crystal (2) and the speed of the fan (3). A frequency meter is also provided. The frequency meter collects frequency data of the high-stable crystal (2) and is plugged into the computer host through a GPIB interface card on the computer host to transmit the frequency data of the high-stable crystal (2) to the computer host. Control methods include: S1: The frequency meter and temperature sensor measure the output frequency data and temperature data of the high-stability crystal respectively, and send the data to the computer host through the PCIE interface after the PCIE card interrupts communication; S2: The computer host uses the collected temperature data as the horizontal axis and the output frequency data as the vertical axis to obtain a relationship curve between the output frequency and the temperature, and obtains a linear curve. The frequency range corresponding to the linear curve is the optimal output frequency range, and the temperature range corresponding to the linear curve is the optimal operating temperature range; S3: The FPGA reads the actual temperature value of the temperature sensor and compares it with the optimal operating temperature range. If the actual temperature value is lower than the optimal operating temperature range, the FPGA sends a control signal to turn off the fan or reduce the fan speed. If the actual temperature value is higher than the optimal operating temperature range, the FPGA sends a control signal to increase the fan speed. S4: After the high-stability crystal reaches the optimal operating temperature, the control voltage is adjusted to obtain the optimal output frequency of the high-stability crystal; the FPGA continuously adjusts the control voltage of the high-stable crystal so that the output frequency curve of the high-stable crystal is a straight line, and the corresponding relationship between the control voltage and output frequency of the high-stable crystal is obtained. The optimal output frequency range obtained by S2 can then be used to obtain the optimal control voltage range.

2. The PCIE card-based control method according to claim 1, wherein: The host computer is provided with a driver and a host computer; The driver encapsulates the hardware information, data read and write operation functions and interrupt operation functions of the PCIE interface; The host computer receives temperature data from the FPGA and frequency data from the frequency meter, and uses mathematical methods to draw temperature and frequency curves; the host computer sends high-stability crystal voltage control signals and fan speed control signals to the FPGA, and controls the control voltage of the high-stability crystal and the speed of the fan through the FPGA.

3. The PCIE card-based control method according to claim 1 or 2, characterized in that: In the above-mentioned S2, if a linear curve cannot be obtained, the computer host simulates a linear curve using the least square method or interpolation method according to the relationship curve between the output frequency and temperature to obtain the optimal output frequency range and the optimal operating temperature range.

4. The PCIE card-based control method according to claim 1 or 2, wherein: The control method for interrupting communication of the PCIE card in S1 includes: S1.1: FPGA waits for the temperature acquisition instruction from the host computer. If the acquisition instruction is yes, it enters S1.2, otherwise it continues to wait; S1.2: FPGA collects temperature data and writes it into the buffer; S1.3: Check whether the amount of data stored in the buffer reaches the set threshold. If not, repeat S1.2 until the amount of data stored in the buffer reaches the set threshold, then proceed to S1.

4. S1.4: When the amount of data stored in the buffer reaches the set threshold, the buffer displays a threshold-reaching flag, the FPGA specifies a storage address, and the PCIE card interrupts communication. S1.5: After receiving the communication interruption signal from the PCIE card, the host computer reads the data at the storage address in S1.4; S1.6: After the host computer has finished processing the read data, it sends a data acquisition termination signal to the FPGA; otherwise, it executes S1.

1.

5. The PCIE card-based control method according to claim 1 or 2, characterized in that: The shielding cover (1) is composed of a temperature control area (101), a transition area (102) and a working area (103) which are connected in sequence; The length of the temperature control zone (101) is smaller than the length of the working zone (103), and the width and length of the transition zone (102) are both smaller than the width and length of the working zone (103); A fan (3) is provided in the temperature control area (101), and a high-stability crystal (2) and a temperature sensor are provided in the working area (103).

6. The PCIE card-based control method according to claim 5, characterized in that: A plurality of ventilation holes (104) are provided on the side lower wall of the working area (103).

7. The PCIE card-based control method according to claim 5, characterized in that: A heat insulating layer (105) is attached to the inner wall of the shielding cover (1).

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