Control circuit of power converter

Abstract

A control circuit for a power converter includes a sensing circuit, a ramp signal generator, an error amplifier, a comparator, and a pulse width modulation (PWM) circuit. The sensing circuit is coupled to a first output circuit to provide a current sensing signal. The ramp signal generator is coupled to the sensing circuit and receives the current sensing signal to provide a ramp signal. The error amplifier receives a reference voltage and the output feedback voltage of the power converter to provide an error amplification signal. The comparator is coupled to the ramp signal generator and the error amplifier and receives both the ramp signal and the error amplification signal to provide a control signal. The PWM circuit is coupled between the comparator and the first output circuit, receives the control signal, and provides a PWM signal to control the first output circuit. The ramp signal generator adjusts the slope of the ramp signal based on the current sensing signal. This invention avoids ringing of the power converter's output voltage after unloading / unloading, thereby improving the stability of the system output.

Description

Technical Field

[0001] This invention relates to power converters, and more particularly to a control circuit for a power converter. Background Technology

[0002] In traditional power conversion circuits, the output capacitor is connected in series between the output terminal and the ground terminal. The power conversion circuit uses the capacitance value of the output capacitor and its equivalent series resistor (ESR) for feedback control. When a capacitor with low parasitic resistance (such as a ceramic capacitor) is used as the output capacitor, the feedback control of the power conversion circuit is only affected by the output capacitor, resulting in a phase difference between the output voltage ripple and the pulse width modulation signal, thus affecting the stability of the system.

[0003] For example, such as Figure 1 As shown, when the equivalent series resistance of the output capacitor (hereinafter referred to as the output resistance) is small, the output voltage VOUT of the power conversion circuit will oscillate up and down multiple times after unloading / unloading, resulting in a ringing phenomenon that deviates from the reference voltage VEAP. Consequently, the inductor current IL of the power conversion circuit also becomes unstable, which seriously affects the stability of the system. Summary of the Invention

[0004] In view of this, the present invention proposes a control circuit for a power converter to effectively solve the above-mentioned problems encountered in the prior art.

[0005] This invention provides a control circuit for a power converter, including a sensing circuit, a ramp signal generator, an error amplifier, a comparator, and a pulse width modulation (PWM) circuit. The sensing circuit is coupled to a first output circuit to provide a current sensing signal. The ramp signal generator is coupled to the sensing circuit and receives the current sensing signal to provide a ramp signal. The error amplifier receives a reference voltage and the output feedback voltage of the power converter to provide an error amplification signal. The comparator is coupled to the ramp signal generator and the error amplifier and provides a control signal based on the ramp signal and a compensation signal. The PWM circuit is coupled between the comparator and the first output circuit, receives the control signal, and provides a PWM signal to control the first output circuit. The ramp signal generator adjusts the slope of the ramp signal based on the current sensing signal.

[0006] In one embodiment, the ramp signal generator generates the falling portion of the ramp signal based on a preset current and a current sensing signal.

[0007] In one embodiment, the sensing circuit includes a current mirror. The current mirror generates a current sensing signal based on the inductor current in the first output circuit, and the current sensing signal has a proportional relationship with the inductor current.

[0008] In one embodiment, the ramp signal generator includes a capacitor and a current source. One end of the capacitor is coupled between the sensing circuit and the comparator, and the other end is coupled to ground. One end of the current source is coupled between the sensing circuit and the comparator, and the other end is coupled to ground.

[0009] In one embodiment, the ramp signal generator further includes a switch and a voltage source. One end of the switch is coupled to a capacitor and a current source, and the other end is coupled to a voltage source. The voltage source is coupled between the switch and ground. The switch is selectively turned on by a control signal.

[0010] In one embodiment, the larger the current sensing signal, the gentler the slope of the adjusted ramp signal.

[0011] In one embodiment, the control circuit is further coupled to a second output circuit. The sensing circuit includes a current mirror. The current mirror generates a current sensing signal based on a first inductor current in the first output circuit and a second inductor current in the second output circuit, and the current sensing signal has a proportional relationship with the first inductor current and the second inductor current.

[0012] Compared to existing technologies, the control circuit of the power converter proposed in this invention adjusts the descent slope of the ramp signal based on the output current (inductor current) of the power converter it senses. Therefore, even when the output resistance is small, the control circuit of the power converter of this invention can effectively prevent the output voltage of the power converter from ringing after unloading / unloading, so that the output current of the power converter remains stable, thus effectively improving the stability of the system output.

[0013] The advantages and spirit of the present invention can be further understood through the following detailed description of the invention and the accompanying drawings. Attached Figure Description

[0014] Figure 1 This is a waveform diagram of the transient response of a traditional RCOT power conversion circuit with low output resistance.

[0015] Figure 2 This is a schematic diagram of the control circuit of the power converter in a specific embodiment of the present invention.

[0016] Figure 3 and Figure 4 These are different embodiments of the control circuit of the present invention applied to single-phase and two-phase power converters.

[0017] Figure 5 This is a waveform diagram of the transient response of the power converter of the present invention when the output resistance is small.

[0018] Explanation of key component symbols:

[0019] 2, 3, 4: Control circuit

[0020] 20, 30, 40: Error amplifiers

[0021] 21, 31, 41: Compensation circuits

[0022] 22, 32, 42: Ramp signal generator

[0023] 23, 33, 43: Comparators

[0024] 24, 34, 44: Pulse Width Modulation Circuit

[0025] 25, 35, 45: Sensing circuit

[0026] OS: Output Stage

[0027] R1~R2: Voltage divider resistors

[0028] ROUT: Output resistance

[0029] COUT: Output capacitor

[0030] M1~M2: Switches

[0031] L: Output inductance

[0032] D1~D2: Drivers

[0033] VIN: Input voltage

[0034] VOUT: Output voltage

[0035] VFB: Output Feedback Voltage

[0036] VEAP: Reference voltage

[0037] ERR: Error Amplification Signal

[0038] RAMP: Ramp signal

[0039] COMP: Compensation signal

[0040] TRIG: Control signal

[0041] PWM: Pulse Width Modulation Signal

[0042] IL: Inductor current

[0043] IL*K: Current sensing signal

[0044] ISEN: Current indication signal

[0045] GND: Ground terminal

[0046] t0~t2: Time

[0047] CSP / CSN: Sensing signal

[0048] IOUT: Output current

[0049] R: Resistance

[0050] C: Capacitor

[0051] SW: Switch

[0052] VB: Voltage Source

[0053] INO: Current Source

[0054] 350: Amplifier

[0055] 351-353: Current mirror

[0056] 1:1 ratio

[0057] 1:K: Proportion

[0058] OS1~OS2: Output Stage

[0059] CSP1 / CSN1, CSP2 / CSN2: Sensing signals

[0060] PWM1~PWM2: Pulse Width Modulation Signals

[0061] 450, 452: Amplifiers

[0062] 451, 453-455: Current mirror

[0063] IL1~IL2: Inductor current Detailed Implementation

[0064] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Elements / components referred to by the same or similar reference numerals in the drawings and embodiments are used to represent the same or similar parts.

[0065] According to a specific embodiment of the present invention, a control circuit for a power converter is provided. In this embodiment, the control circuit can be applied to a single-phase or multi-phase power converter, depending on the actual requirements.

[0066] Please refer to Figure 2 . Figure 2 This is a schematic diagram of the control circuit of the power converter in this embodiment. Figure 2As shown, control circuit 2 is applied to a single-phase power converter with a single output circuit OS. Control circuit 2 is coupled to output circuit OS. Voltage divider resistors R1 and R2 are connected in series between output circuit OS and ground GND. Output capacitor COUT and output resistor ROUT are also connected in series between output circuit OS and ground GND.

[0067] The output circuit OS includes drivers D1-D2, switches M1-M2, and output inductor L. Driver D1 is coupled between control circuit 2 and the control terminal of switch M1. Driver D2 is coupled between control circuit 2 and the control terminal of switch M2. Switches M1 and M2 are connected in series between the input voltage VIN and the ground terminal GND. One end of the output inductor L is coupled between switches M1 and M2, and the other end of the output inductor L is coupled to the output resistor ROUT and the voltage divider resistor R1.

[0068] Control circuit 2 includes an error amplifier 20, a compensation circuit 21, a ramp signal generator 22, a comparator 23, a pulse width modulation circuit 24, and a sensing circuit 25. One input of the error amplifier 20 is coupled between voltage divider resistors R1 and R2, and its other input is coupled to a reference voltage VEAP. The output of the error amplifier 20 is coupled to the compensation circuit 21. The compensation circuit 21 is coupled to one input of the comparator 23. The other input of the comparator 23 is coupled to the ramp signal generator 22. The output of the comparator 23 is coupled to both the pulse width modulation circuit 24 and the ramp signal generator 22. The sensing circuit 25 is coupled between the ramp signal generator 22 and the output circuit OS.

[0069] The two input terminals of error amplifier 20 receive the reference voltage VEAP and the output feedback voltage VFB of the power converter, respectively, to provide the error amplification signal ERR, which is transmitted to compensation circuit 21. Compensation circuit 21 is coupled to error amplifier 20 and comparator 23, and receives the error amplification signal ERR to provide the compensation signal COMP. The output feedback voltage VFB received at one input terminal of error amplifier 20 is the voltage between voltage divider resistors R1 and R2, i.e., the voltage divider of the power converter's output voltage VOUT, but is not limited to this.

[0070] The sensing circuit 25 receives the current indication signal ISEN from the output circuit OS and provides the current sensing signal IL*K to the ramp signal generator 22 accordingly. In practical applications, the current indication signal ISEN is related to the inductor current IL of the output inductor L in the output circuit OS, and the current sensing signal IL*K has a proportional relationship with the inductor current IL. For example, the current sensing signal IL*K is K times the inductor current IL, but it is not limited to this.

[0071] When the ramp signal generator 22 receives the current sensing signal IL*K, it changes the ramp signal RAMP to the comparator 23 according to the current sensing signal IL*K. In practical applications, the ramp signal generator 22 adjusts the slope of the generated ramp signal RAMP according to the current sensing signal IL*K. For example, the ramp signal generator 22 can reduce the slope of the falling portion of the ramp signal RAMP according to the current sensing signal IL*K. Therefore, the larger the current sensing signal IL*K, the smaller the slope of the falling portion of the ramp signal RAMP, resulting in a slower descent speed of the ramp signal RAMP.

[0072] When the two input terminals of comparator 23 receive the ramp signal RAMP and the compensation signal COMP respectively, comparator 23 will compare the ramp signal RAMP and the compensation signal COMP and generate a control signal TRIG according to the comparison result to the pulse width modulation circuit 24 and the ramp signal generator 22.

[0073] When the pulse width modulation circuit 24 receives the control signal TRIG, it generates a pulse width modulation signal (PWM) and sends it to the output circuit OS to control its operation. Specifically, when drivers D1 and D2 in the output circuit OS receive the PWM signal, they control the switches M1 and M2 to open or close according to the PWM signal, thereby generating an inductor current IL in the output inductor L and producing an output voltage VOUT.

[0074] Next, please refer to Figure 3 . Figure 3 This is an example of the control circuit of the present invention applied to a single-phase power converter.

[0075] like Figure 3 As shown, control circuit 3 is applied to a single-phase power converter with a single output circuit OS. Control circuit 3 is coupled to output circuit OS. Voltage divider resistors R1 and R2 are connected in series between output circuit OS and ground GND. Output resistor ROUT and output capacitor COUT are also connected in series between output circuit OS and ground GND.

[0076] The control circuit 3 includes an error amplifier 30, a compensation circuit 31, a ramp signal generator 32, a comparator 33, a pulse width modulation circuit 34, and a sensing circuit 35. One input of the error amplifier 30 is coupled between voltage divider resistors R1 and R2, and its other input is coupled to a reference voltage VEAP. The error amplifier 30 can be a trans-impedance amplifier, and its output error signal is in the form of a current. The compensation circuit 31 is coupled to the output of the error amplifier 30 and one input of the comparator 33. The other input of the comparator 33 is coupled to the ramp signal generator 32, and its output is coupled to both the pulse width modulation circuit 34 and the ramp signal generator 32. The ramp signal generator 32 is coupled to the sensing circuit 35. The pulse width modulation circuit 34 is coupled to the output circuit OS. The sensing circuit 35 is coupled to the output circuit OS.

[0077] The compensation circuit 31 includes a resistor R and a capacitor C, receives the error output signal ERR from the error amplifier 30, provides zero and pole compensation required for cyclic control, and generates a voltage compensation signal COMP, but is not limited thereto.

[0078] The sensing circuit 35 includes an amplifier 350 and current mirrors 351-353. It receives a current indication signal related to the output current IOUT of the output circuit OS. In this embodiment, the current indication signal is a set of voltage-form sensing signals CSP / CSN. The two input terminals of the amplifier 350 receive the sensing signals CSP / CSN and output a comparison result to control the current mirror 351, which has a 1:1 ratio, to generate an inductor current IL to the current mirror 352. Then, the current mirror 352, which has a 1:K ratio, generates a current sensing signal IL*K based on the inductor current IL to the current mirror 353, and the current mirror 353, which has a 1:1 ratio, outputs the current sensing signal IL*K to the ramp signal generator 32. In other words, the current sensing signal IL*K provided by the sensing circuit 35 has a proportional relationship with the inductor current IL in the output circuit OS, for example, 1:K, but is not limited to this.

[0079] The ramp signal generator 32 includes a voltage source VB, a switch SW, a capacitor C, and a current source INO. The voltage source VB is coupled between the switch SW and ground GND. The capacitor C is coupled between the switch SW and ground GND. The current source INO is coupled between the switch SW and ground GND. The sensing circuit 35 is coupled between the switch SW and capacitor C, and between the switch SW and current source INO. The other input of the comparator 33 is also coupled between the switch SW and capacitor C, and between the switch SW and current source INO.

[0080] When the ramp signal generator 32 receives the control signal TRIG output by the comparator 33, the switch SW in the ramp signal generator 32 briefly turns on in response to the rising edge of the control signal TRIG, thereby pulling the ramp signal RAMP to the peak voltage VB. When the switch SW turns off, the preset current provided by the current source INO draws current from the capacitor C, and the current sensing signal IL*K provided by the sensing circuit 35 sinks current into the capacitor C, thereby generating the falling part of the ramp signal RAMP, which is provided to the other input terminal of the comparator 33.

[0081] It should be noted that when the external load increases and the current sensing signal IL*K becomes larger, the slope of the falling portion of the ramp signal RAMP received at the other input terminal of comparator 33 becomes smaller, that is, the falling slope of the adjusted ramp signal RAMP becomes gentler.

[0082] Next, please refer to Figure 4 . Figure 4 This is an embodiment of the control circuit of the present invention applied to a two-phase power converter.

[0083] like Figure 4 As shown, control circuit 4 is applied to a two-phase power converter with two output circuits OS1 and OS2. Control circuit 4 is coupled to output circuits OS1 to OS2 respectively. Voltage divider resistors R1 and R2 are connected in series between output circuits OS1 to OS2 and ground terminal GND. Output resistor ROUT and output capacitor COUT are also connected in series between output circuits OS1 to OS2 and ground terminal GND.

[0084] The control circuit 4 includes an error amplifier 40, a compensation circuit 41, a ramp signal generator 42, a comparator 43, a pulse width modulation circuit 44, and a sensing circuit 45. These components are the same as those in the control circuit 3 and will not be described again here.

[0085] In this embodiment, the pulse width modulation circuit 44 generates pulse width modulation signals PWM1 to PWM2 respectively to the output circuits OS1 to OS2 according to the control signal TRIG, so as to control the operation of the output circuits OS1 to OS2 respectively. The sensing circuit 45 includes amplifiers 450 and 452 and current mirrors 451, 453 to 455.

[0086] Amplifier 450 receives sensing signals CSP1 / CSN1 related to the output current of output circuit OS1 at its two input terminals and outputs a comparison result to control current mirror 451 with a 1:1 ratio to generate inductor current IL1 of output circuit OS1 to current mirror 452. Similarly, amplifier 452 receives sensing signals CSP2 / CSN2 related to the output current of output circuit OS2 at its two input terminals and outputs a comparison result to control current mirror 453 with a 1:1 ratio to generate inductor current IL2 of output circuit OS2 to current mirror 452.

[0087] When current mirror 454 receives the sum of inductor currents IL1 and IL2, resulting in an inductor current IL, the current mirror 454, with a 1:K ratio, generates a current sensing signal IL*K based on the summed inductor current IL and sends it to current mirror 455. Then, the current mirror 455, with a 1:1 ratio, outputs the current sensing signal IL*K to the ramp signal generator 42. In other words, the current sensing signal IL*K provided by the sensing circuit 45 has a proportional relationship with the sum of the inductor currents IL of each phase output circuit OS1 to OS2, for example, 1:K, but not limited to this.

[0088] In practical applications, the control circuit of the present invention can also be further applied to multi-phase power converters, and is not limited to the aforementioned single-phase and two-phase power converters.

[0089] Next, please refer to Figure 5 . Figure 5 This is a transient response waveform diagram of the power converter of the present invention when the output resistance is relatively small. Assume that the power converter of the present invention is similar to... Figure 1 Traditional power converters in this system have the same output resistance value and the same set value for their compensation circuits.

[0090] Compared to Figure 1 In traditional power converters, the output voltage VOUT experiences multiple ringing phenomena around the reference voltage VEAP after the start of loading at time t1 and the start of unloading at time t2, causing the inductor current IL to become unstable. Figure 5At time t1, the inductor current IL increases with load withdrawal, causing the slope of the ramp signal RAMP to decrease more gradually. This delays the intersection of the compensation signal COMP and the ramp signal RAMP, and consequently delays the generation time of the pulse width modulation (PWM) signal. Consequently, the output voltage VOUT rises more slowly, and the compensation signal COMP falls more slowly. This results in the intersection point of the compensation signal COMP and the ramp signal RAMP being shifted upwards during heavy-load steady-state operation. In other words, at the start of load withdrawal at time t1, the slope of the ramp signal RAMP is adjusted according to the inductor current IL, causing the compensation signal COMP to rise accordingly and maintain a higher new value. Similarly, at the start of unloading at time t2, the slope of the ramp signal RAMP returns to its original value, causing the compensation signal COMP to decrease back to its original value. Therefore, the output voltage VOUT of the power converter of this invention can gradually rise / fall after load withdrawal / unloading to approach the ideal reference voltage VEAP, thus effectively avoiding the aforementioned ringing phenomenon, maintaining a stable inductor current IL, and improving the stability of the system output.

[0091] Compared to existing technologies, the control circuit of the power converter proposed in this invention adjusts the descent slope of the ramp signal based on the output current (inductor current) of the power converter it senses. Therefore, even when the output voltage is low, the control circuit of the power converter of this invention can effectively prevent the output voltage of the power converter from ringing after unloading / unloading, so that the output current of the power converter remains stable, thus effectively improving the stability of the system output.

Claims

1. A control circuit for a power converter, coupled to a first output circuit, characterized in that, The above control circuit includes: A sensing circuit, coupled to the first output circuit described above, provides a current sensing signal; A ramp signal generator is coupled to the above-mentioned sensing circuit and receives the above-mentioned current sensing signal to provide a ramp signal. An error amplifier receives a reference voltage and an output feedback voltage from the aforementioned power converter to provide an error amplification signal; A comparator, coupled to the ramp signal generator and the error amplifier respectively, provides a control signal based on the ramp signal and the amplified error signal; and A pulse width modulation (PWM) circuit, coupled between the comparator and the first output circuit, receives the control signal and provides a PWM signal to control the first output circuit. The ramp signal generator adjusts the slope of the ramp signal according to the current sensing signal. The ramp signal generator includes a current source, a switch and a voltage source. One end of the current source is coupled between the sensing circuit and the comparator. One end of the switch is coupled to the current source and the other end is coupled to the voltage source. The voltage source is coupled between the switch and a ground terminal. The switch is selectively turned on by the control signal.

2. The control circuit as described in claim 1, characterized in that, The aforementioned ramp signal generator generates the descending portion of the aforementioned ramp signal based on a preset current and the aforementioned current sensing signal.

3. The control circuit as described in claim 1, characterized in that, The aforementioned sensing circuit includes a current mirror, which generates the current sensing signal based on an inductor current in the first output circuit, and the current sensing signal and the inductor current have a proportional relationship.

4. The control circuit as described in claim 1, characterized in that, The aforementioned ramp signal generator includes a capacitor, one end of which is coupled between the aforementioned sensing circuit and the aforementioned comparator, and the other end of which is coupled to a ground terminal. The other end of the aforementioned current source is coupled to the aforementioned ground terminal.

5. The control circuit as described in claim 1, characterized in that, The larger the current sensing signal, the gentler the slope of the adjusted ramp signal.

6. The control circuit as described in claim 1, characterized in that, It is also coupled to a second output circuit. The sensing circuit includes a current mirror. The current mirror generates the current sensing signal based on a first inductor current in the first output circuit and a second inductor current in the second output circuit. The current sensing signal has a proportional relationship with the first inductor current and the second inductor current.

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