electronic devices

Abstract

The present disclosure provides an electronic device including a first conductive element, a second conductive element, a substrate, and a conductive member. The first conductive element has a first region. The substrate has a through-hole. The through-hole is disposed between the first conductive element and the second conductive element. The conductive member electrically connects the first conductive element to the second conductive element via the through-hole. The through-hole is partially surrounded by the first region.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to an electronic device, and more particularly, to an electronic device including a conductive element. Background Art

[0002] As the application of electronic devices continues to expand, display technology is also advancing rapidly. As the use of electronic devices and user habits and needs evolve, the requirements for the structure and quality of electronic devices are becoming increasingly stringent, leading to various challenges facing electronic devices. Therefore, the research and development of electronic devices requires continuous updates and adjustments. Summary of the Invention

[0003] The present disclosure is directed to an electronic device having good electrical quality or display quality.

[0004] According to an embodiment of the present disclosure, an electronic device includes a first conductive element, a second conductive element, a substrate, and a conductive member. The first conductive element has a first region. The substrate has a through-hole. The through-hole is disposed between the first conductive element and the second conductive element. The conductive member electrically connects the first conductive element to the second conductive element via the through-hole. The through-hole is partially surrounded by the first region.

[0005] In summary, in the electronic device of one embodiment of the present disclosure, since the through hole is partially surrounded by the first area of the first conductive element, in the step of forming the conductive part, the conductive part is only filled into part of the through hole. The side wall of the conductive part in the through hole is separated from the side wall of the through hole by a space. The side wall of the conductive part does not contact the side wall of the through hole. In this way, in the above-mentioned step of forming the conductive part, the air bubbles generated can be released through the space. Thereby, the risk of bubbles being generated in the conductive part, which may cause poor contact between the conductive part and the second conductive element and electrical abnormalities, can be avoided. Therefore, the electrical connection reliability of the electronic device can be improved, so that the electronic device has good electrical quality or display quality. In addition, the through hole allows the electronic components to be arranged on the back side of the substrate to reduce the peripheral usage of the electronic device, thereby achieving the technical requirements of a narrow frame and having good display quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 A schematic top view of an electronic device according to an embodiment of the present disclosure;

[0007] Figure 2 for Figure 1 A schematic cross-sectional view of the electronic device along the section line AA';

[0008] Figure 3A is an enlarged top view of a first conductive element and a through hole of an electronic device according to an embodiment of the present disclosure;

[0009] Figure 3B for Figure 3A A schematic cross-sectional view of the electronic device along the section line BB';

[0010] Figure 4A This is an enlarged top view of a first conductive element and a through hole of an electronic device according to another embodiment of the present disclosure;

[0011] Figure 4B for Figure 4A A schematic cross-sectional view of the electronic device along the section line CC';

[0012] Figure 5 A schematic cross-sectional view of an electronic device according to another embodiment of the present disclosure;

[0013] Figure 6 A schematic cross-sectional view of an electronic device according to another embodiment of the present disclosure;

[0014] Figure 7 is a cross-sectional schematic diagram of an electronic device according to another embodiment of the present disclosure;

[0015] Figure 8 FIG1 is a cross-sectional diagram of an electronic device according to another embodiment of the present disclosure. DETAILED DESCRIPTION

[0016] The present disclosure will be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, for ease of understanding and for the sake of simplicity, many of the drawings in this disclosure depict only portions of electronic devices, and certain components in the drawings are not drawn to scale. Furthermore, the number and dimensions of components in the drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0017] Certain words are used throughout the present disclosure and in the claims that follow to refer to specific components. It will be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that have the same function but different names. In the following description and claims, words such as "include", "contain", and "have" are open-ended words and should be interpreted as meaning "including but not limited to..." Therefore, when the terms "include", "contain", and / or "have" are used in the description of the present disclosure, they specify the presence of corresponding features, regions, steps, operations, and / or components, but do not exclude the presence of one or more corresponding features, regions, steps, operations, and / or components.

[0018] Directional terms used herein, such as "up," "down," "front," "back," "left," "right," etc., are used only with reference to the directions in the accompanying drawings. Therefore, the directional terms used are for illustrative purposes only and are not intended to limit the present disclosure. In the accompanying drawings, each figure illustrates the general characteristics of the methods, structures, and / or materials used in particular embodiments. However, these figures should not be construed as defining or limiting the scope or nature of the embodiments. For example, the relative sizes, thicknesses, and positions of various layers, regions, and / or structures may be reduced or exaggerated for clarity.

[0019] In the present disclosure, the length and width may be measured using an optical microscope, and the thickness may be measured using a cross-sectional image from an electron microscope, but the present invention is not limited thereto.

[0020] The terms "approximately," "equal to," "equal," or "same," "substantially," or "approximately" are generally interpreted as meaning within a range of 20% of a given value, or within a range of 10%, 5%, 3%, 2%, 1% or 0.5% of a given value.

[0021] In the present disclosure, a structure (or layer, component, substrate) described as being located on top of another structure (or layer, element, substrate) may refer to the two structures being adjacent and directly connected, or may refer to the two structures being adjacent but not directly connected. Indirect connection means that there is at least one intermediate structure (or intermediate layer, intermediate component, intermediate substrate, intermediate spacer) between the two structures, the lower surface of one structure being adjacent to or directly connected to the upper surface of the intermediate structure, and the upper surface of the other structure being adjacent to or directly connected to the lower surface of the intermediate structure. The intermediate structure may be composed of a single or multiple layer of physical or non-physical structure, without limitation. In the present disclosure, when a structure is disposed "on" another structure, it may refer to the structure being "directly" on the other structure, or it may refer to the structure being "indirectly" on the other structure, i.e., at least one structure is interposed between the structure and the other structure.

[0022] The terms "first," "second," etc., within this disclosure may be used herein to describe various elements, components, regions, layers, and / or parts, but these elements, components, regions, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, the "first element," "component," "region," "layer," or "part" discussed below is used to distinguish it from the "second element," "component," "region," "layer," or "part," and is not used to limit the order or specific elements, components, regions, layers, and / or parts. Moreover, the "first" element referred to in a description paragraph may be renamed the "second" element in the claims.

[0023] The electronic device may have a display function, wherein the electronic device of the embodiment of the present disclosure may include a display device, an antenna device, a sensing device, a splicing device or a transparent display device, but is not limited thereto. The electronic device may be a rollable, stretchable, bendable or flexible electronic device. The electronic device may, for example, include liquid crystal, light emitting diode (LED) or other suitable materials and their materials may be arbitrarily arranged and combined or other suitable display media, or a combination of the foregoing; the light emitting diode may, for example, include an organic light emitting diode (OLED), a millimeter / sub-millimeter light emitting diode (mini LED), a micro LED or a quantum dot light emitting diode (QD, which may be, for example, QLED, QDLED), but is not limited thereto. The antenna device may, for example, be a liquid crystal antenna, but is not limited thereto. The splicing device may, for example, be a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that the electronic device may be any combination of the foregoing, but is not limited thereto. Furthermore, the electronic device may have a rectangular, circular, polygonal shape, a curved edge, or other suitable shape. The electronic device may include peripheral systems such as a drive system, a control system, a light source system, a shelf system, etc. to support the display device, antenna device, or splicing device. The following description of this disclosure will be based on an electronic device with a display function, but the disclosure is not limited thereto.

[0024] In the present disclosure, the various embodiments described below may be mixed and matched without departing from the spirit and scope of the present disclosure. For example, some features of one embodiment may be combined with some features of another embodiment to form another embodiment.

[0025] Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0026] Figure 1 This is a top view of an electronic device according to an embodiment of the present disclosure. For the sake of clarity and convenience of description, Figure 1 Several elements are omitted from illustration. Figure 2 for Figure 1 The cross-sectional view of the electronic device along the section line AA' is shown in FIG. 1 for clarity and convenience of description. Figure 2 Some components are omitted. Figure 1 and Figure 2The electronic device 10 of the disclosed embodiment includes a substrate 100, a first conductive element 160, a second conductive element 220, and a conductive element CD. The substrate 100 has at least one or more through-holes TH1. The first conductive element 160 is disposed on the substrate 100. In some embodiments, the electronic device 10 further includes an electronic component 300 disposed below the circuit substrate 200, and the circuit substrate 200 is disposed below the substrate 100. The circuit substrate 200 has a second conductive element 220. The second conductive element 220 is disposed between the electronic component 300 and the substrate 100. The second conductive element 220 is, for example, a pad or an interconnect layer (e.g., a patterned conductive layer) of the circuit substrate 200, but is not limited thereto. In the normal direction (or Z-axis) of the substrate 100, the through-hole TH1 is disposed between the first conductive element 160 and the second conductive element 220. At least a portion of the conductive element CD is disposed in the corresponding through-hole TH1, and the conductive element CD electrically connects the first conductive element 160 to the second conductive element 220 via the through-hole TH1. In some embodiments, the electronic device 10 further includes a plurality of light-emitting diodes 400R, 400G, and 400B. Under the above configuration, the electronic device 10 can form a conductive path through the conductive element CD and the second conductive element 220, and then electrically connect the electronic component 300 to the first conductive element 160 and the plurality of light-emitting diodes 400R, 400G, and 400B on the substrate 100 through the second conductive element 220. In this way, the plurality of light-emitting diodes 400R, 400G, and 400B can be driven to produce an image pattern. Furthermore, the conductive element CD disposed in the through hole TH1 of the substrate 100 can achieve good electrical quality with the electronic component 300, thereby improving the electrical quality of the electronic device 10. Furthermore, the through hole TH1 allows the electronic component 300 to be disposed under the substrate 100 (e.g., on the back side of the substrate 100), thereby reducing the peripheral usage of the electronic device 10, thereby achieving the technical requirements of a narrow bezel and providing good display quality.

[0027] Please continue to refer to Figure 1 and Figure 2 , the electronic device 10 is, for example, a light emitting diode display device. Figure 1 As shown, in the normal direction (or Z axis) of the substrate 100, a plurality of pixels PX1, PX2, PX3, and PX4 can be disposed on the substrate 100. In the embodiment disclosed herein, each pixel can include a plurality of light-emitting diodes (e.g., light-emitting diode 400R, light-emitting diode 400G, and light-emitting diode 400B), and the number of light-emitting diodes is not limited. For example, Figure 1The four pixels PX1, PX2, PX3, and PX4 shown can be arranged in an array on the X-axis and the Y-axis (the X-axis is perpendicular to the Y-axis and the Z-axis, and the Y-axis is perpendicular to the X-axis and the Z-axis, but not limited thereto), but are not limited thereto. Figure 1 The number of pixels and the arrangement pattern shown are for illustration only. The actual number of pixels can be dozens, tens of thousands, or millions or more, but is not limited thereto.

[0028] The substrate 100 of the electronic device 10 is, for example, an active array substrate, including a base 110 and a circuit element layer 120 disposed on the base 110. The base 110 includes a rigid substrate, a flexible substrate, or a combination thereof. For example, the base 110 includes glass, quartz, sapphire, acrylic resin (acrylic resin), polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), other suitable transparent materials, or a combination thereof, but is not limited thereto. In some embodiments, the shape of the substrate 100 on the normal (i.e., the Z-axis) may be rectangular, polygonal, circular, or irregular, which is not particularly limited in the embodiments disclosed herein.

[0029] The circuit element layer 120 includes, for example, at least one or more circuit elements ( Figure 1 and Figure 2 Not shown, as Figure 6 The circuit element TFT1 shown in the figure is a stacked structure of a buffer layer and multiple insulating layers, but is not limited to this. In some embodiments, the circuit element layer 120 is, for example, an active array layer composed of multiple thin film transistors, but is not limited to this. The detailed structure of the circuit element layer 120 will be described later. Figure 6 is described in .

[0030] Multiple LEDs may be provided in each pixel. For example, in pixel PX1, LEDs 400R, 400G, and 400B are provided on circuit element layer 120, but this is not limited to this. In some embodiments, the multiple LEDs may include red LEDs, green LEDs, blue LEDs, white LEDs, yellow LEDs, or LEDs of other colors, depending on design requirements. In some embodiments, each LED includes electrodes and a crystal. Taking LED 400R as an example, LED 400R includes electrode 401R, electrode 402R, and crystal 420R. Crystal 420R, for example, includes a first-type semiconductor layer (e.g., an N-type doped semiconductor layer), a second-type semiconductor layer (e.g., a P-type doped semiconductor layer), and a light-emitting layer located between the first and second semiconductor layers. In other words, crystal 420R may be a PN LED, but this is not limited to this. In this embodiment, LEDs 400R, 400G, and 400B are, for example, flip-chip LEDs, but this is not limited to this. In other embodiments, the light emitting diodes 400R, 400G, and 400B include vertical LEDs or face-mounted LEDs, or other suitable types of LED packages.

[0031] A plurality of light-emitting diodes 400R, 400G, and 400B are electrically connected to the circuit element layer 120 of the substrate 100. For example, a plurality of first pads 151 and a plurality of second pads 152 are provided on the circuit element layer 120. One of the plurality of light-emitting diodes is provided corresponding to the first pad 151 and the adjacent second pad 152. For example, the electrode 401R of the light-emitting diode 400R can be electrically connected to the first pad 151, and the electrode 402R can be electrically connected to the second pad 152, but is not limited thereto. In other embodiments, the electrode 401R can be electrically connected to the second pad 152, and the electrode 402R can be electrically connected to the first pad 151. Thereby, the first pad 151 and the second pad 152 can be respectively used as pads connected to the positive or negative pole of the light-emitting diode 400R. In one embodiment of the present disclosure Figure 2In the embodiment, the light-emitting diodes 400R, 400G, and 400B are, for example, flip chips, but are not limited thereto. In other embodiments, the light-emitting diodes 400R, 400G, and 400B may be face-up chips or other suitable structures. For example, the light-emitting diodes 400R, 400G, and 400B may be electrically connected to the first pad 151 and the second pad 152 by wire bonding. In addition, in other embodiments, the light-emitting diode 400R may also be electrically connected to the circuit element (e.g., thin film transistor) or circuit layer in the circuit element layer 120 through a transfer layer including a conductive circuit and an insulating layer, so that the electrode 401R or the electrode 402R is respectively electrically connected to the circuit element (e.g., thin film transistor) or circuit layer in the circuit element layer 120 through a conductive circuit, but are not limited thereto.

[0032] In some embodiments, the electronic device 10 may optionally include a first test pad 191 and a plurality of second test pads 192. The first test pad 191 and the plurality of second test pads 192 may be respectively disposed adjacent to one side of a pixel (e.g., pixel PX1), but are not limited thereto. The first test pad 191 and the plurality of second test pads 192 may be electrically connected to the circuit element layer 120, but are not limited thereto. The first test pad 191 may be connected in series to the plurality of first pads 151. The plurality of second test pads 192 may be respectively electrically connected to the plurality of second pads 152. In some embodiments, the first test pad 191 and the plurality of second test pads 192 may be used as test electrodes for detecting the electrical quality of the plurality of light-emitting diodes 400R, 400G, and 400B in the pixel PX1. In this embodiment, the plurality of light-emitting diodes 400R, 400G, and 400B in the pixel PX1 may be used as sub-pixels, and the combination of the plurality of pixels PX1, PX2, PX3, and PX4 may be used to generate an image pattern. In some embodiments, the number of the LEDs in the pixel PX1 may be three or more, and the colors included may include red, blue, green, white, yellow, or other suitable colors, but is not limited thereto.

[0033] The materials of the first test pad 191 , the second test pad 192 , the first pad 151 , and the second pad 152 may include, but are not limited to, molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), hafnium (Hf), nickel (Ni), chromium (Cr), cobalt (Co), zirconium (Zr), tungsten (W), aluminum (Al), copper (Cu), silver (Ag), gold (Au), other suitable metals, or alloys or combinations thereof. The materials of the first test pad 191, the second test pad 192, the first pad 151, and the second pad 152 may further include transparent conductive materials or non-transparent conductive materials, such as indium tin oxide, indium zinc oxide, indium oxide, zinc oxide, tin oxide, metal materials (such as aluminum, molybdenum, copper, silver, etc.), other suitable materials, or combinations thereof, but are not limited thereto.

[0034] The substrate 100 further includes an insulating layer 140 disposed on the circuit element layer 120. The insulating layer 140, for example, includes a plurality of openings (not shown). A first pad 151 and an adjacent second pad 152 are disposed in the openings, and each of the light-emitting diodes 400R, 400G, and 400B can be electrically connected to the first pad 151 and the second pad 152 in the openings, respectively, but the present invention is not limited thereto. The material of the insulating layer 140 can be a single-layer or multi-layer structure, and can, for example, include an organic material (such as silicon nitride), an inorganic material, or a combination thereof, but the present invention is not limited thereto. In some embodiments, the insulating layer 140 is, for example, epoxy resin, but the present invention is not limited thereto.

[0035] In some embodiments, the circuit substrate 200 is disposed beneath the substrate 100 and is located on two opposing surfaces (e.g., the lower surface S1 and the upper surface S2) of the substrate 100, along with the plurality of LEDs 400R, 400G, and 400B. For example, the circuit substrate 200 is disposed on the lower surface S1 of the substrate 100. The plurality of LEDs 400R, 400G, and 400B are disposed on the upper surface S2 of the substrate 100. The circuit substrate 200 is, for example, a printed circuit board (PCB). In other embodiments, the circuit substrate 200 may comprise, but is not limited to, a chip on film (COF).

[0036] The circuit substrate 200 is, for example, a circuit board including multiple insulating layers and interconnect layers (e.g., patterned conductive layers). For example, the circuit substrate 200 of one embodiment of the present disclosure may be a printed circuit board (PCB) or a redistribution layer (RDL), but is not limited thereto. In other embodiments, the circuit substrate 200 may be an interposer. In some embodiments, the circuit substrate 200 includes multiple insulating layers 210 stacked in a normal direction (i.e., the Z-axis) of the substrate 100 and second conductive elements 220 disposed within the multiple insulating layers 210. In some embodiments, the insulating layer 210 may be made of a material including, but not limited to, prepreg, a photoimageable dielectric (PID), a photosensitive polymer (e.g., benzocyclobutene), an Ajinomoto build-up film, resin coated copper foil (RCC), flame-resistant fiberglass (FR4), a fiberglass resin composite material, a combination thereof, or other suitable materials.

[0037] The second conductive element 220 may be, for example, pads 222, 223 or an internal interconnect layer 221 (e.g., a patterned conductive layer) of the circuit substrate 200. For example, the internal interconnect layer 221 of the second conductive element 220 may be multiple layers, alternately stacked with the insulating layer 210. The internal interconnect layers 221 may be electrically connected to each other via a plurality of conductive vias extending through the insulating layer 210. In other embodiments, the second conductive element 220 further includes pads 222 disposed on the upper surface S4 of the insulating layer 210 and pads 223 located on the lower surface S3 of the insulating layer 210 (e.g., lower surface S3 is disposed opposite to upper surface S4). The materials of the internal interconnect layer 221, pads 222, or pads 223 of the second conductive element 220 may be similar to those of the first test pad 191, the second test pad 192, the first pad 151, and the second pad 152, and therefore are not further described herein.

[0038] The electronic component 300 is disposed below the circuit substrate 200 and is located between the electronic component 300 and the substrate 100 in the normal direction (or Z-axis) of the substrate 100. The electronic component 300 is, for example, a chip and includes a plurality of pads 340. The electronic component 300 is electrically connected to the pads 223 of the circuit substrate 200 via the pads 340 to provide driving signals for the light-emitting diodes 400R, 400G, and 400B, but the present invention is not limited thereto.

[0039] In some embodiments, an adhesive layer AD may be selectively disposed between the substrate 100 and the circuit substrate 200 in the normal direction (or Z-axis) of the substrate 100. Furthermore, a portion of the adhesive layer AD may be located between the substrate 100 and the second conductive element 220. The adhesive layer AD may include a light-curing adhesive, a heat-curing adhesive, or other suitable adhesive materials.

[0040] The substrate 100 has a plurality of through holes TH1. For example, a through hole TH1 may be disposed adjacent to a pixel PX1 (or any other pixel), or between any two adjacent pixels (e.g., pixel PX1 and pixel PX2), but the present invention is not limited thereto. In other embodiments, a through hole TH1 may be disposed between any two adjacent light-emitting diodes, but the present invention is not limited thereto. The through hole TH1 extends through the substrate 110 and the circuit element layer 120.

[0041] The circuit substrate 200 has a through hole TH2. The through hole TH1 of the substrate 100 can be arranged to overlap the through hole TH2 of the circuit substrate 200, but is not limited to this. In other embodiments, the through hole TH1 can partially overlap the through hole TH2, that is, the through hole TH1 can be misaligned with the through hole TH2, but is not limited to this. The second conductive element 220 located on the lower surface S3 of the base 210 is electrically connected to the electronic component 300. In some embodiments, a portion of the second conductive element 220 on the upper surface S4 of the base 210 can be located outside the through hole TH2 and between the upper surface S4 of the circuit substrate 200 and the lower surface S1 of the substrate 100. Figure 2 As shown, at least a portion of the second conductive element 220 may overlap the through hole TH1 in the normal direction (Z-axis) of the substrate 100 , but the present invention is not limited thereto.

[0042] It is worth noting that the circuit element layer 120 of the electronic device 10 may include a first conductive element 160, a first test pad 191, a second test pad 192, a first pad 151, or a second pad 152. For example, in the present embodiment, the first conductive element 160, the first test pad 191, the second test pad 192, the first pad 151, or the second pad 152 are disposed on the topmost insulating layer (e.g., the top surface S2) of the circuit element layer 120 of the substrate 100. In other embodiments, the first conductive element 160, the first test pad 191, the second test pad 192, the first pad 151, and / or the second pad 152 may be selectively exposed from the topmost insulating layer in the circuit element layer (e.g., an opening in the insulating layer at least partially overlaps the first conductive element 160, the first test pad 191, the second test pad 192, the first pad 151, or the second pad 152). It should be noted that the top surfaces of the first conductive element 160, the first test pad 191, the second test pad 192, the first pad 151, or the second pad 152 may be exposed by the insulating layer to electrically connect to other components. The arrangement of the first conductive element 160, the first test pad 191, the second test pad 192, the first pad 151, or the second pad 152 may be adjusted according to the design and is not limited to the structural relationship shown in the above description or the accompanying drawings. In some embodiments, the first conductive element 160 and the first test pad 191, the second test pad 192, the first pad 151, or the second pad 152 may be formed from the same layer of conductive material through patterning. In some embodiments, the first conductive element 160, the first test pad 191, the second test pad 192, the first pad 151, or the second pad 152 may be a conductive layer or an interconnect layer (e.g., a patterned conductive layer) formed in the circuit element layer 120, disposed on the top surface S2, but the present invention is not limited thereto. Alternatively, the first conductive element 160 and the first test pad 191, the second test pad 192, the first pad 151, or the second pad 152 can be formed on the upper surface S2 after patterning using different conductive materials, but the present invention is not limited thereto. The first conductive element 160 can be electrically connected to the first test pad 191, the second test pad 192, the first pad 151, or the second pad 152, but the present invention is not limited thereto.

[0043] like Figure 1 and Figure 2As shown, the through hole TH1 is partially surrounded by the first conductive element 160. In the disclosed embodiments, partially surrounding is defined as surrounding the through hole TH1 but not forming a continuous, closed loop (e.g., including, but not limited to, a circular or square loop). In some embodiments, a gap GP is provided adjacent to the first conductive element 160 and the through hole TH1. In some embodiments, a conductive element CD may at least partially fill the through hole TH1 and electrically connect the first conductive element 160 to the second conductive element 220 via the through hole TH1. The conductive element CD may be made of, but not limited to, a conductive material, silver paste, copper paste, conductive solder, or other suitable materials. In this manner, the conductive element CD of the electronic device 10 may be electrically connected to the second conductive element 220 and the electronic component 300 via the through hole TH1. In this configuration, a driving signal from the electronic component 300 may pass through the conductive path formed by the conductive element CD and the second conductive element 220 to provide the driving signal to the first conductive element 160 and the plurality of light-emitting diodes 400R, 400G, and 400B. Thus, when the electronic device 10 is used in the display device field, since the driving signal of the electronic component 300 can be transmitted from one side of the substrate 100 to the multiple light-emitting diodes 400R, 400G, and 400B on the other side through the conductive member CD in the through hole TH1, the electronic component 300 can be disposed below the substrate 100 (for example, on the back side of the substrate 100), thereby reducing the peripheral usage of the electronic device 10 and thereby achieving the technical requirements of a narrow bezel. In addition, the conductive member CD disposed in the through hole TH1 of the substrate 100 can achieve good electrical quality with the electronic component 300. As a result, the electronic device 10 has good electrical quality or display quality.

[0044] Figure 3A FIG1 is an enlarged top view of a first conductive element and a through hole of an electronic device according to an embodiment of the present disclosure. For the sake of clarity and convenience of description, Figure 3A Several elements are omitted from illustration. Figure 3B for Figure 3A Schematic cross-sectional view of the electronic device along the section line BB', for the sake of clarity and convenience of description, Figure 3B Several components are omitted from illustration. The first conductive element 160 has a first region 161. The first region 161 is, for example, the portion of the first conductive element 160 covered by other conductive material. The through hole TH1 is partially surrounded by the first region 161 of the first conductive element 160. For example, the first region 161 may be C-shaped along the Z-axis, with a gap GP adjacent to the through hole TH1 and the first conductive element 160. In other words, the first conductive element 160 does not overlap the substrate 100 at the gap GP.

[0045] It is worth noting that the conductive member CD may partially fill the through hole TH1 or completely fill the through hole TH1, but this is not limited to this. For example, during the process of filling the conductive member CD into the through hole TH1, a space SP may be separated between the sidewall CD1 of the conductive member CD in the through hole TH1 and the sidewall 100S of the through hole TH1. Specifically, the conductive member CD may be deposited in the through hole TH1 by, for example, micro inkjet printing (MJP), chemical vapor deposition (CVD), physical vapor deposition (PVD), or electroplating. A portion of the conductive member CD may be disposed on and directly contact the first region 161, thereby partially surrounding the through hole TH1. In this configuration, the conductive member CD has a sidewall CD1 in the through hole TH1. The through hole TH1 has a sidewall 100S, and a space SP exists between the sidewall 100S and the sidewall CD1 of the conductive member CD. That is, during the step of filling the conductive member CD, the sidewalls CD1 of the conductive member CD may partially not contact the sidewalls 100S of the through-hole TH1 and / or the sidewalls ADS of the adhesive layer AD. This allows air bubbles generated during the fabrication process of placing the conductive member CD in the through-hole TH1 to be released through the space SP. This prevents the risk of bubbles forming in the conductive member CD, which could lead to poor contact between the conductive member CD and the second conductive element 220 and electrical anomalies. In some embodiments, the placement of the conductive member CD can be continued, gradually filling the through-hole TH1 with the conductive member CD, releasing air bubbles through the space SP, and gradually filling the through-hole TH1 with the conductive member CD, or partially overflowing the through-hole TH1. This configuration improves the electrical connection reliability of the electronic device 10, resulting in excellent electrical quality or display quality.

[0046] Please refer again Figure 1 The electronic device 10 further includes a plurality of conductive elements with different patterns. For example, a first conductive element 160A disposed adjacent to the pixel PX3 is located on one side of the through hole TH1, partially surrounding the through hole TH1. In the normal direction of the substrate 100 (i.e., the Z-axis), the first conductive element 160A may have a rectangular, elliptical, symmetrical, or irregular pattern disposed adjacent to the through hole TH1. In this manner, the first conductive element 160A can provide similar superior technical effects as the aforementioned embodiment.

[0047] In some embodiments, the electronic device 10 has a first conductive element 160B disposed between the pixel PX3 and the pixel PX4. The first conductive element 160B can also be disposed between the light emitting diodes of two adjacent pixels. Figure 1The illustration is limited. Two first conductive elements 160B are disposed on one side and the other opposite side of the through hole TH1, respectively. In other words, the through hole TH1 is located between the two opposing first conductive elements 160B, partially surrounding the through hole TH1. In the normal direction of the substrate 100 (i.e., the Z-axis), the first conductive elements 160B may have a rectangular, elliptical, symmetrical, or irregular pattern. In this manner, the first conductive elements 160B can provide similar superior technical effects as the aforementioned embodiments.

[0048] In some embodiments, the electronic device 10 has first conductive elements 160C and 160C' disposed adjacent to the pixel PX4. The first conductive elements 160C and 160C' are respectively disposed on the four sides of the through hole TH1, so that the through hole TH1 is partially surrounded. For example, two first conductive elements 160C are respectively disposed on opposite sides of the through hole TH1. Two first conductive elements 160C' are respectively disposed on the other opposite sides of the through hole TH1. In this way, the through hole TH1 is disposed between the two first conductive elements 160C or between the two first conductive elements 160C'. In the normal direction of the substrate 100 (i.e., the Z-axis), the first conductive elements 160C and the first conductive elements 160C' are, for example, rectangular, elliptical, symmetrical, or irregular patterns. In some embodiments, the first conductive elements 160C and the first conductive elements 160C' are discontinuous patterns, and a gap GP exists between the first conductive elements 160C and the first conductive elements 160C. Therefore, the through hole TH1 is partially surrounded by the first conductive element 160C and the first conductive element 160C′. In this way, the first conductive element 160C and the first conductive element 160C′ can provide similar excellent technical effects as the above embodiment.

[0049] The following examples are provided for illustration purposes only. It should be noted that the following examples share the same component numbers and some of the details as the previous examples, with the same numbers used to represent the same or similar components, and descriptions of the same technical details omitted. For the omitted details, please refer to the previous examples, and the following examples will not be repeated.

[0050] Figure 4A FIG1 is an enlarged top view of a first conductive element and a through hole of an electronic device according to another embodiment of the present disclosure. For the sake of clarity and convenience of description, Figure 4A Several elements are omitted from illustration. Figure 4B for Figure 4A Schematic cross-sectional view of the electronic device along the section line CC', for the sake of clarity and convenience of description, Figure 4B The electronic device 10A of this embodiment is substantially similar to Figure 3ASince the electronic device 10 of the present invention is described above, the same or similar components between the two embodiments will not be reiterated here. This embodiment differs from the electronic device 10 primarily in that the first conductive element 160D further includes a second region 162. The second region 162 is, for example, a portion of the first conductive element 160 covered by other non-conductive material. In some embodiments, the first conductive element 160D is disposed around the through hole TH1, with a portion of the through hole TH1 partially surrounded by the first region 161, and another portion of the through hole TH1 partially surrounded by the second region 162. The first region 161 may be connected to the second region 162. In this manner, the first conductive element 160D may continuously surround the through hole TH1, but this is not a limitation.

[0051] The electronic device 10A further includes an insulating element IL1. The insulating element IL1 is correspondingly disposed on the second region 162. In some embodiments, the insulating element IL1 overlaps the second region 162 in the normal direction (i.e., the Z-axis) of the substrate 100, but this is not limited to this. The insulating element IL1 can be formed directly on the second region 162, or by first forming an insulating material on the first conductive element 160 and then forming the insulating element IL1 on the second region 162 through a patterning process, but this is not limited to this.

[0052] Under the above configuration, during the fabrication process of placing the conductive element CD in the through hole TH1, a portion of the conductive element CD can directly contact the first region 161 and fill a portion of the through hole TH1. The through hole TH1 has a sidewall 100S, with a space SP between the sidewall 100S and the sidewall CD1 of the conductive element CD. In other words, the conductive element CD is separated from the second region 162 by the space SP. Alternatively, the conductive element CD is separated from the insulating element IL1 by the space SP. The sidewall CD1 of the conductive element CD does not contact the sidewall 100S. In other embodiments, after the step of filling the through hole TH1 with the conductive element CD is completed, the conductive element CD can completely fill the through hole TH1, but this is not limited to this. In this way, air bubbles generated during the fabrication process of placing the conductive element CD can be released through the space SP. This can reduce the risk of poor contact between the conductive element CD and the second conductive element 220, which can lead to electrical anomalies. Consequently, the electrical connection reliability of the electronic device 10A can be improved, resulting in excellent electrical quality or display quality. In addition, the electronic device 10A can also achieve excellent technical effects similar to those of the above-mentioned embodiment.

[0053] Figure 5 This is a cross-sectional diagram of an electronic device according to another embodiment of the present disclosure. For the sake of clarity and convenience of description, Figure 5 Some components are omitted. The electronic device 10B of this embodiment is substantially similar to Figure 3BThe electronic device 10 of the present invention is provided, so the same and similar components in the two embodiments will not be repeated here. The main difference between this embodiment and the electronic device 10 is that at least part of the conductive element CD filled in the through hole TH1 is formed by stacking multiple layers of conductive materials. For example, the conductive element CD is provided in the manufacturing process of the through hole TH1, and the conductive element CD can be provided with a plurality of conductive layers stacked in the through hole TH1 through a plurality of deposition processes or electroplating processes performed in sequence. In more detail, a first conductive layer CDA can be provided in the through hole TH1 first. Then, in the through hole TH1, a second conductive layer CDB is provided on the first conductive layer CDA. The volume of the second conductive layer CDB may be smaller than that of the first conductive layer CDA. Afterwards, a third conductive layer CDC is successively provided on the second conductive layer CDB, and the volume of the third conductive layer CDC may be smaller than that of the second conductive layer CDB to form a stepped conductive element CD. The topmost conductive layer of the conductive element CD directly contacts the first region 161 and partially fills the through hole TH1. In Figure 5 In the figure, the dotted lines between the first conductive layer CDA and the second conductive layer CDB, or between the second conductive layer CDB and the third conductive layer CDC, represent a layered stacking structure. However, after the fabrication process of the conductive element CD is completed, the first conductive layer CDA, the second conductive layer CDB, the third conductive layer CDC, and the other conductive layers can be stacked together to form an integrally formed conductive element CD, but this is not limited to the present invention. In this manner, the conductive element CD can have a stepped sidewall CD1'.

[0054] Under the above-described configuration, a space SP exists between the stepped sidewall CD1' and the sidewall 100S of the through-hole TH1. That is, the sidewall CD1' of the conductive element CD does not contact the sidewall 100S. Thus, during the manufacturing process of setting the conductive element CD, air bubbles generated can be released through the space SP. Furthermore, the conductive element CD, which is a stack of multiple layers of conductive material formed through multiple sequential deposition or electroplating processes, can reduce the generation of air bubbles or facilitate the release of air bubbles from the space SP. This can reduce the problem of poor contact between the conductive element CD and the second conductive element 220, leading to electrical anomalies. Therefore, the electrical connection reliability of the electronic device 10B can be improved, resulting in good electrical quality or display quality. Furthermore, the electronic device 10B can also achieve excellent technical effects similar to those of the above-described embodiments.

[0055] Figure 6 This is a cross-sectional diagram of an electronic device according to another embodiment of the present disclosure. For the sake of clarity and convenience of description, Figure 6 The electronic device 10C of this embodiment is generally similar to Figure 2 Therefore, the same and similar components in the two embodiments will not be repeated here. Figure 2 and Figure 6, Figure 6 The structure of the circuit element layer 120 is briefly shown. For example, the circuit element layer 120 includes a plurality of circuit elements TFT1 and a plurality of insulating layers. Figure 6 The electronic device 10C shown is simply used to illustrate the manufacturing process.

[0056] First, a substrate 110 is provided.

[0057] Next, a circuit element layer 120 is disposed on the substrate 110. The circuit element layer 120, for example, includes a gate insulating layer 121, an insulating layer 122, and an insulating layer 123, which are sequentially disposed on the substrate 110 along the Z-axis. The circuit element TFT1 is disposed within the gate insulating layer 121, the insulating layer 122, and the insulating layer 123, but is not limited thereto. In some embodiments, the circuit element layer 120 may optionally include a buffer layer (not shown), and the buffer layer may be disposed between the substrate 110 and the gate insulating layer 121, but is not limited thereto. The gate insulating layer 121, the insulating layer 122, and the insulating layer 123 may be a single layer or a multilayer structure, but is not limited thereto.

[0058] The process of providing the circuit element layer 120 also includes forming a circuit element TFT1. Circuit element TFT1 is, for example, a thin film transistor (TFT). Circuit element TFT1 includes a gate electrode G, a semiconductor layer SE, a source electrode S, and a drain electrode D. In some embodiments, the process of forming circuit element TFT1 includes providing a semiconductor layer SE on the substrate 110 or a buffer layer. Next, a doping process is performed on the semiconductor layer SE to form a source region SA or a drain region DA. Next, a gate insulating layer 121 is formed on the semiconductor layer SE. Next, a gate electrode G is formed on the gate insulating layer 121. The semiconductor layer SE also includes a channel region CH located between the source region SA and the drain region DA. The channel region CH overlaps the gate electrode G in the normal direction of the substrate 100. Next, an insulating layer 122 is formed on the gate electrode G. Next, a plurality of through holes are formed in the gate insulating layer 121 and the insulating layer 122 to form the source electrode S and the drain electrode D in the plurality of through holes. The source electrode S is electrically connected to the source region SA, and the drain electrode D is electrically connected to the drain region DA, but the present invention is not limited thereto. In some embodiments, the configurations of the source electrode S, drain electrode D, drain region DA, and / or source region SA may be interchangeable, depending on design requirements. Portions of the source electrode S and drain electrode D are located on the insulating layer 122. Then, an insulating layer 123 is formed on the insulating layer 122, covering the source electrode S and drain electrode D. Thus, the configuration of the circuit element TFT1 is completed. The materials of the gate electrode G, source electrode S, and drain electrode D may include tantalum (Ta), niobium (Nb), hafnium (Hf), nickel (Ni), chromium (Cr), cobalt (Co), zirconium (Zr), tungsten (W), aluminum (Al), silver (Ag), gold (Au), or other suitable metals, or alloys or combinations thereof, but the present invention is not limited thereto. The material of the semiconductor layer SE is, for example, but not limited to, low-temperature polysilicon (LTPS) or low-temperature polysilicon oxide (LTPO). In other embodiments, the material of the semiconductor layer SE may include, but not limited to, amorphous silicon (a-Si). In this embodiment, the circuit element TFT1 is, for example, but not limited to, a top-gate thin-film transistor. In other embodiments, the circuit element TFT1 may also be a bottom-gate or double-gate thin-film transistor.

[0059] Next, a conductive via is formed in the insulating layer 123 and a first pad 151 and a second pad 152 are formed on the upper surface of the insulating layer 123. The first pad 151 or the second pad 152 can be electrically connected to the circuit element TFT1, and the first conductive element 160 can be electrically connected to the circuit element TFT1, but the present invention is not limited thereto.

[0060] Next, an insulating layer 140 is formed on the insulating layer 123. The insulating layer 140 may be patterned to form a plurality of openings, and the first pads 151 and the second pads 152 may be located in the openings.

[0061] In this embodiment, during the step of forming the first pad 151 and the second pad 152, the first conductive element 160 may be formed on the upper surface of the insulating layer 123, but the present invention is not limited thereto. The first conductive element 160 may also be provided after the through hole TH1 is subsequently formed. In some embodiments, the circuit element TFT1 in the circuit element layer 120 may be electrically connected to the first conductive element 160, but the present invention is not limited thereto.

[0062] Next, an adhesive layer AD is disposed on the lower surface S1 of the substrate 110 .

[0063] Then, the lower surface S1 of the substrate 100 is bonded to the upper surface S4 of the circuit substrate 200 via the adhesive layer AD. The circuit substrate 200 includes a through-hole TH2 and a second conductive element 220. Portions of the second conductive element 220 are disposed on the upper surface S4 and lower surface S3 of the circuit substrate 200, with another portion of the second conductive element 220 disposed within the through-hole TH2. The electrode 340 of the electronic component 300 is electrically connected to the second conductive element 220 located on the lower surface S3. In this configuration, the second conductive element 220 is disposed between the electronic component 300 and the substrate 100.

[0064] Then, a drilling process is performed on the substrate 100 to form a through hole TH1. The drilling process may include, but is not limited to, a laser drilling process or a mechanical drilling process. The through hole TH1 penetrates the circuit element layer 120 and the substrate 110. The through hole TH1 corresponds to the through hole TH2, but is not limited thereto. In some embodiments, the through hole TH1 may overlap a portion of the second conductive element 220 located on the upper surface S4, but is not limited thereto.

[0065] Next, a conductive member CD is formed. The conductive member CD directly contacts the first region 161 of the first conductive element 160 and fills a portion of the through hole TH1 to contact the second conductive element 220. A space SP separates the sidewall CD1 of the conductive member CD from the sidewall 100S of the through hole TH1. In other embodiments, after the step of filling the through hole TH1 with the conductive member CD is completed, the conductive member CD may completely fill the through hole TH1, but this is not limited to this embodiment.

[0066] Then, light-emitting diodes 400R, 400G, and 400B are disposed in the openings of the insulating layer 140. The light-emitting diodes 400R, 400G, and 400B are electrically connected to the corresponding first pads 151 and second pads 152, respectively. The light-emitting diodes 400R, 400G, and 400B may include millimeter / sub-millimeter light-emitting diodes (mini LEDs), micro LEDs (micro LEDs), or quantum dot light-emitting diodes (QDs). In other embodiments, the light-emitting diodes 400R, 400G, and 400B may include organic light-emitting diodes (OLEDs), but are not limited thereto.

[0067] Next, a protective layer 180 is formed on the insulating layer 140, covering the LEDs 400R, 400G, and 400B. The protective layer 180 may have optical or protective functions, but is not limited thereto. For example, the protective layer 180 may have optical focusing, scattering, or lens functions, but is not limited thereto. The protective layer 180 protects the LEDs 400R, 400G, and 400B and reduces damage to the LEDs 400R, 400G, and 400B from external moisture or oxygen. This essentially completes the manufacturing process of the electronic device 10C.

[0068] It should be noted that the steps of disposing the light-emitting diodes 400R, 400G, and 400B can be performed before the step of drilling the through-holes TH1 or before the step of forming the conductive members CD, but the present invention is not limited thereto. The manufacturing process sequence described above in the disclosed embodiment is intended to illustrate the relationship between the methods and structures of forming the various components of the electronic device 10C and is not intended to limit the manufacturing sequence of the electronic device 10C.

[0069] With the above arrangement, air bubbles generated during the fabrication process of the conductive element CD can be released through the space SP. This reduces the risk of electrical anomalies caused by poor contact between the conductive element CD and the second conductive element 220. Consequently, the electronic device 10C can achieve improved electrical connection reliability, resulting in superior electrical and display quality. Furthermore, the electronic device 10C can achieve similar superior technical effects as the aforementioned embodiments.

[0070] Figure 7 FIG2 is a cross-sectional diagram of an electronic device according to another embodiment of the present disclosure. For the sake of clarity and convenience of description, Figure 7 Some components are omitted. The electronic device 10D of this embodiment is substantially similar to Figure 6The electronic device 10C of the present embodiment is shown in FIG. Therefore, identical and similar components between the two embodiments will not be reiterated here. This embodiment differs from the electronic device 10C primarily in that the first conductive element 160D of the electronic device 10D has a first region 161 and a second region 162. A portion of the through hole TH1 is partially surrounded by the first region 161, while another portion of the through hole TH1 is partially surrounded by the second region 162. The first region 161 is connected to the second region 162.

[0071] The insulating element IL1 is correspondingly disposed on the second region 162. In some embodiments, the insulating element IL1 overlaps the second region 162 in the normal direction (i.e., the Z-axis) of the substrate 100, but is not limited thereto. In some embodiments, the insulating element IL1 may be formed by first disposing the material of the insulating layer 140 on the second region 162 during the step of forming the insulating layer 140, and then patterning the insulating layer 140 material into the insulating element IL1 in a subsequent patterning step. In other embodiments, the insulating element IL1 may be formed directly on the second region 162 by deposition or other suitable means, before or after the step of forming the insulating layer 140, but is not limited thereto.

[0072] Portions of the conductive member CD can directly contact the first region 161 and fill a portion of the through-hole TH1. The conductive member CD is separated from the second region 162 by a space SP. Alternatively, the conductive member CD is separated from the insulating element IL1 by a space SP. The sidewall CD1 of the conductive member CD does not contact the sidewall 100S. In other embodiments, after the step of filling the through-hole TH1 with the conductive member CD is completed, the conductive member CD can completely fill the through-hole TH1, but this is not limited to this. In this way, the problem of poor contact between the conductive member CD and the second conductive element 220 and electrical abnormalities can be reduced. Therefore, the electrical connection reliability of the electronic device 10D can be improved, and good electrical quality or display quality can be achieved. In addition, the electronic device 10D can also achieve excellent technical effects similar to those of the above-mentioned embodiments.

[0073] Furthermore, the protective layer 180A of the electronic device 10D continuously covers the insulating layer 140 and covers the LEDs 400R, 400G, and 400B. Thus, the protective layer 180A can protect the LEDs 400R, 400G, and 400B and reduce damage to the LEDs 400R, 400G, and 400B from external moisture or oxygen.

[0074] Figure 8 FIG1 is a cross-sectional diagram of an electronic device according to another embodiment of the present disclosure. For the sake of clarity and convenience of description, Figure 8 Some components are omitted. The electronic device 10E of this embodiment is generally similar to Figure 6Therefore, the same and similar components between the two embodiments will not be repeated here. This embodiment differs from the electronic device 10C primarily in that the circuit element TFT2 in the circuit element layer 120E of the substrate 100E is, for example, a bottom-gate indium gallium zinc oxide (IGZO) thin-film transistor. Furthermore, the light-emitting diodes 400R', 400G', and 400B' are, for example, vertical LEDs.

[0075] Specifically, the substrate 100E includes a base 110 and a circuit element layer 120E disposed on the base 110. The circuit element layer 120E includes a gate insulating layer 121E, an insulating layer 122E, and an insulating layer 123E, which are sequentially disposed on the base 110 along the Z axis. The circuit element TFT2 is disposed within the gate insulating layer 121E, the insulating layer 122E, and the insulating layer 123E, but is not limited thereto. In some embodiments, the circuit element layer 120E may optionally include a buffer layer (not shown), and the buffer layer may be disposed between the base 110 and the gate insulating layer 121E, but is not limited thereto. The gate insulating layer 121E, the insulating layer 122E, and the insulating layer 123E may be a single layer or a multilayer structure, but is not limited thereto.

[0076] The circuit element TFT2 includes a gate electrode G, a semiconductor layer SE, a source electrode S, and a drain electrode D. In some embodiments, the formation process of the circuit element TFT2 includes disposing the gate electrode G on the substrate 110 or the buffer layer. Then, a gate insulating layer 121E is formed on the gate electrode G. Then, a semiconductor layer SE is formed on the gate insulating layer 121E, overlapping the gate electrode G. Then, a source electrode S and a drain electrode D are formed on the gate insulating layer 121E. The source electrode S and the drain electrode D are electrically connected to the semiconductor layer SE, respectively. Then, an insulating layer 122E is formed on the semiconductor layer SE, the source electrode S, and the drain electrode D. Then, an insulating layer 123E is formed on the insulating layer 122E. At this point, the arrangement of the circuit element TFT2 is substantially completed. The material of the semiconductor layer SE includes, for example, indium gallium zinc oxide (IGZO), but is not limited thereto. In other embodiments, the material of the semiconductor layer SE may include, but is not limited to, amorphous silicon, polycrystalline silicon, or germanium; compound semiconductors, which may include gallium nitride (GaN), silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; and alloy semiconductors, which may include SiGe alloys, GaAsP alloys, AlInAs alloys, AlGaAs alloys, GaInAs alloys, GaInP alloys, GaInAsP alloys, or combinations thereof. The material of the semiconductor layer SE may also include, but is not limited to, metal oxides, such as indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZTO); or organic semiconductors including polycyclic aromatic compounds, or combinations thereof. In some embodiments, the semiconductor layer SE may be doped with p-type or n-type dopants. In this embodiment, the circuit element TFT2 is, for example, a bottom-gate thin-film transistor, but is not limited thereto. In other embodiments, the circuit element TFT2 may also be a top-gate or dual-gate thin-film transistor.

[0077] Next, conductive vias are formed in the insulating layer 122E and the insulating layer 123E, and a first pad 151E is formed on the upper surface of the insulating layer 123E. The first pad 151E can be electrically connected to the circuit element TFT2.

[0078] Then, an insulating layer 140 is formed on the insulating layer 123E. The insulating layer 140 may be patterned to form a plurality of openings, and the first pads 151E may be located in the openings.

[0079] Next, LEDs 400R', 400G', and 400B' are respectively disposed on the first pad 151E in the opening. The bottom electrodes of LEDs 400R', 400G', and 400B' are electrically connected to the first pad 151E. In this embodiment, LEDs 400R', 400G', and 400B' are vertical LEDs.

[0080] Then, an insulating layer 142 is disposed on the insulating layer 140. The insulating layer 142 covers portions of the LEDs 400R', 400G', and 400B' and exposes the top electrodes of the LEDs 400R', 400G', and 400B'. In some embodiments, the insulating layer 142 comprises an insulating material or an encapsulating material, but is not limited thereto.

[0081] Next, second pads 152E are disposed on the insulating layer 142. The second pads 152E are electrically connected to the upper electrodes of the LEDs 400R', 400G', and 400B', respectively, thus completing the electrical connection of the LEDs 400R', 400G', and 400B' to the circuit element layer 120E.

[0082] Next, a protective layer 180 is disposed on the insulating layer 142, covering the LEDs 400R', 400G', and 400B'. The protective layer 180 may have optical or protective functions, but is not limited thereto. For example, the protective layer 180 may have optical focusing, scattering, or lens functions, but is not limited thereto. The protective layer 180 protects the LEDs 400R', 400G', and 400B' and reduces damage to the LEDs 400R', 400G', and 400B' from external moisture or oxygen.

[0083] In this embodiment, because the electronic device 10E includes the through hole TH1 and the first conductive element, and the through hole TH1 is partially surrounded by the first region of the first conductive element 160, air bubbles generated during the fabrication process of installing the conductive element CD can be released through the space SP. This reduces the risk of poor contact between the conductive element CD and the second conductive element 220, leading to electrical anomalies. Consequently, the electronic device 10E can achieve improved electrical connection reliability, resulting in superior electrical and display quality. Furthermore, the electronic device 10E can achieve similar superior technical effects as the aforementioned embodiments.

[0084] It should be noted that the various components in the above embodiments can be mixed and matched as long as they do not violate the spirit of the invention disclosed herein. Figure 7 The electronic device 10D shown can also be used with Figure 8 As another example, Figure 8 The electronic device 10E shown can also be used with Figure 5 The through hole TH1, the first conductive element 160 and the conductive member CD are shown. Figure 8 The electronic device 10E shown can also be used Figure 7 The above examples are intended to illustrate various combinations and relationships of the various components shown in the embodiments of the present disclosure, and are not intended to limit the number of structural combinations of the embodiments of the present disclosure.

[0085] In summary, in the electronic device of one embodiment of the present disclosure, since the through hole is partially surrounded by the first area of the first conductive element, in the step of forming the conductive part, the conductive part is only filled into part of the through hole. The side wall of the conductive part in the through hole is separated from the side wall of the through hole by a space. The side wall of the conductive part does not contact the side wall of the through hole. In this way, in the above-mentioned step of forming the conductive part, the air bubbles generated can be released through the space. Thereby, the risk of bubbles being generated in the conductive part, which may cause poor contact between the conductive part and the second conductive element and electrical abnormality, can be avoided. Therefore, the electrical connection reliability of the electronic device can be improved, so that the electronic device has good electrical quality or display quality. In addition, the conductive part of the electronic device can achieve good electrical quality with the electronic component through the through hole. In addition, the through hole provided in the substrate allows the electronic component to be provided on the back side of the substrate to reduce the peripheral usage rate of the electronic device, thereby achieving the technical requirements of a narrow frame and having good display quality.

[0086] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. An electronic device, characterized in that: include: The first conductive element has a first region and a second region; a second conductive element; The substrate has a through hole, and the through hole is arranged between the first conductive element and the second conductive element; an insulating element disposed on the second region and not disposed on the first region; as well as a conductive member, wherein the conductive member electrically connects the first conductive element to the second conductive element through the through hole, wherein the through hole is partially surrounded by the first region, wherein the second conductive element and the substrate are separated from each other, The conductive member includes a portion and another portion, wherein the portion is disposed on the first region, the other portion is connected to the portion and disposed in the through hole, and in a cross section, the oblique sidewall of the other portion is separated from the sidewall of the through hole.

2. The electronic device according to claim 1, wherein: The conductive element directly contacts the first region.

3. The electronic device according to claim 1, wherein: The inclined side wall of the conductive element is separated from the second region by a space.

4. The electronic device according to claim 1, wherein: The conductive element is formed by stacking multiple layers of conductive materials.

5. The electronic device according to claim 1, wherein: Also included is a circuit element electrically connected to the first conductive element.

6. The electronic device according to claim 1, wherein: The device further includes a circuit substrate having the second conductive element.

7. The electronic device according to claim 6, wherein: The device further comprises an electronic component, wherein the electronic component is arranged under the circuit substrate, and the second conductive element is arranged between the electronic component and the substrate.

8. The electronic device according to claim 1, wherein: The electronic device is a light emitting diode display device.

9. The electronic device according to claim 1, wherein: The invention also includes an adhesive layer, wherein the adhesive layer is located between the substrate and the second conductive element, and the adhesive layer contacts the second conductive element.

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