Method and system for audio decoder segment latency measurement

Abstract

The application discloses a method and system suitable for segment delay measurement of an audio decoder, comprising the following steps: writing periodic waveform data with a preset size into a DAC unit in response to a first excitation signal, and carrying out digital-to-analog conversion on the periodic waveform data through the DAC unit; inputting an audio signal obtained through the digital-to-analog conversion into an ADC unit through an audio line, and carrying out analog-to-digital conversion on the audio signal through the ADC unit; transmitting data obtained through the analog-to-digital conversion to the DAC unit, so as to enter the next cycle of digital-to-analog conversion; determining at least two of a first time, a second time, a third time and a fourth time; and determining at least one of a first complete path delay, a DAC delay, a decoding software delay and an ADC delay according to the at least two of the first time, the second time, the third time and the fourth time. The application can measure the segment delay of audio decoding.

Description

Technical Field

[0001] This invention relates to the field of audio technology, and in particular to a method and system for segmented delay measurement of audio decoders. Background Technology

[0002] The primary function of an audio decoder is to read digital audio signals and decode the encoded digital audio signals to output analog audio signals. Currently, the common method for measuring the delay of an audio decoder involves inputting the audio signal into an ADC (Analog-to-Digital Converter) unit, decoding it through an AUDIO (Audio) decoder unit, and then outputting it through a DAC (Digital-to-Analog Converter) unit. The delay of the entire AUDIO decoder unit is then obtained by measuring the input waveform of the ADC unit and the output waveform of the DAC unit using an oscilloscope. This testing method has the following drawbacks:

[0003] 1) The test method has high requirements for the input audio. If a continuous sine wave test is used, the output waveform may be periodically repeated with the input waveform, which may cause the phase judgment to be deviated, resulting in a time error in the delay test. If a non-periodic signal test is used, waveform capture will become very difficult, and the oscilloscope will have a high probability of missing the waveform.

[0004] 2) This method can only capture the total delay from input to output, and cannot perform segmented measurements on the ADC unit, AUDIO decoder unit, and DAC unit separately. Summary of the Invention

[0005] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, this invention proposes a method and system suitable for segmented delay measurement of audio decoders, capable of measuring the segmented delay of audio decoding.

[0006] In a first aspect, a method for segmented delay measurement of an audio decoder according to an embodiment of the present invention includes the following steps:

[0007] In response to the first excitation signal, periodic waveform data of a preset size is written into the DAC unit, and the periodic waveform data is converted from digital to analog through the DAC unit;

[0008] The audio signal obtained from the digital-to-analog conversion is input to the ADC unit through an audio line, and the ADC unit performs analog-to-digital conversion on the audio signal.

[0009] The data obtained from the analog-to-digital conversion is transmitted to the DAC unit to enter the digital-to-analog conversion of the next cycle;

[0010] At least two of the first time point, second time point, third time point, and fourth time point are determined respectively. The first time point is used to characterize the time when the periodic waveform data begins to be written, the second time point is used to characterize the time when the periodic waveform data writing ends, the third time point is used to characterize the time when the DAC unit begins to output audio signals, and the fourth time point is used to characterize the time when the DAC unit begins to output audio signals during the digital-to-analog conversion of the next cycle.

[0011] Based on at least two of the first time point, the second time point, the third time point, and the fourth time point, determine at least one of the first complete path delay, DAC delay, decoding software delay, and ADC delay.

[0012] The method for segmented delay measurement of an audio decoder according to embodiments of the present invention has at least the following beneficial effects:

[0013] Compared with the prior art, this embodiment determines at least one of the first complete path delay, DAC delay, decoding software delay and ADC delay based on at least two of the first time, the second time, the third time and the fourth time, which can realize segmented delay measurement of audio decoding.

[0014] According to some embodiments of the present invention, writing periodic waveform data of a preset size into the DAC unit includes the following steps:

[0015] The periodic waveform data is written into an intermediate buffer;

[0016] The periodic waveform data is transferred from the intermediate buffer to the FIFO of the DAC unit via DMA.

[0017] According to some embodiments of the present invention, the first complete path delay is equal to the time difference between the fourth time and the third time, the DAC delay is equal to the time difference between the third time and the first time, the decoding software delay is equal to the time difference between the second time and the first time, and the ADC delay is equal to the time difference between the first complete path delay, the DAC delay, and the decoding software delay.

[0018] According to some embodiments of the present invention, the method for segmented delay measurement of an audio decoder further includes:

[0019] In response to the second excitation signal, the periodic waveform data is written into the DAC unit, and the periodic waveform data is converted from digital to analog through the DAC unit;

[0020] The audio signal obtained from the digital-to-analog conversion is input to the ADC unit through an audio line, and the ADC unit performs analog-to-digital conversion on the audio signal.

[0021] The data obtained from the analog-to-digital conversion is transmitted to the decoder unit to be measured, and after decoding by the decoder unit, it is transmitted to the DAC unit to enter the next cycle of digital-to-analog conversion;

[0022] The fifth time and the sixth time are determined respectively. The fifth time is used to characterize the time when the DAC unit starts to output an audio signal, and the sixth time is used to characterize the time when the DAC unit starts to output an audio signal during the digital-to-analog conversion of the next cycle.

[0023] The delay of the second complete path is determined based on the fifth and sixth time points.

[0024] According to some embodiments of the present invention, when the first complete path delay is determined, the decoding delay of the decoder unit is determined based on the first complete path delay and the second complete path delay.

[0025] Secondly, according to embodiments of the present invention, a method for segmented delay measurement of an audio decoder includes the following steps:

[0026] Obtain the first complete path delay of the first measurement loopback path, the first measurement loopback path including an ADC unit and a DAC unit, the output terminal of the ADC unit is connected to the input terminal of the DAC unit, and the output terminal of the DAC unit is connected to the ADC unit through an audio cable;

[0027] A second measurement loop path is established, which includes the first measurement loop path and the decoder unit to be measured. The input terminal of the decoder unit is connected to the output terminal of the ADC unit, and the output terminal of the decoder unit is connected to the input terminal of the DAC unit.

[0028] The periodic waveform data is written to the DAC unit, and the periodic waveform data is converted from digital to analog by the DAC unit and then output to the ADC unit.

[0029] The second complete path delay is determined based on the moment when the DAC unit begins to output audio signals in two adjacent cycles;

[0030] The decoding delay of the decoder unit is determined based on the first complete path delay and the second complete path delay.

[0031] The method for segmented delay measurement of an audio decoder according to embodiments of the present invention has at least the following beneficial effects:

[0032] Compared with the prior art, the present invention determines the decoding delay of the decoder unit based on the first complete path delay and the second complete path delay, which can realize segmented delay measurement of audio decoding and obtain more accurate decoding delay data.

[0033] Thirdly, a system for segmented delay measurement of an audio decoder according to embodiments of the present invention includes:

[0034] The first measurement loop path includes an ADC unit and a DAC unit. The output terminal of the ADC unit is connected to the input terminal of the DAC unit, and the output terminal of the DAC unit is connected to the ADC unit via an audio cable. The DAC unit is provided with a data write interface.

[0035] The method for segmented delay measurement of an audio decoder according to embodiments of the present invention has at least the following beneficial effects:

[0036] Compared with the prior art, the embodiments of the present invention write data to the DAC unit through the data writing interface, which can determine the first complete path delay of the first measurement loop path, thereby realizing segmented delay measurement of audio decoding.

[0037] According to some embodiments of the present invention, a system suitable for segmented delay measurement of an audio decoder further includes a second measurement loop path, the second measurement loop path including the first measurement loop path and the decoder unit to be measured, the input terminal of the decoder unit being connected to the output terminal of the ADC unit, and the output terminal of the decoder unit being connected to the input terminal of the DAC unit.

[0038] Fourthly, an electronic device according to an embodiment of the present invention includes a processor, the processor being configured to perform the method described in the first aspect for segmented delay measurement of an audio decoder.

[0039] Fifthly, according to an embodiment of the present invention, a computer-readable storage medium stores a computer program that, when executed by a processor, implements the method described above for segmented delay measurement of an audio decoder.

[0040] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0041] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0042] Figure 1This is one of the flowcharts of a method for segmented delay measurement of an audio decoder according to an embodiment of the present invention;

[0043] Figure 2 This is a schematic diagram of the first measurement loop path of the method for segmented delay measurement of an audio decoder according to an embodiment of the present invention;

[0044] Figure 3 This is a diagram of the internal architecture of a SOC for a method of segmented delay measurement of an audio decoder according to an embodiment of the present invention.

[0045] Figure 4 This is the second flowchart of the method for segmented delay measurement of an audio decoder according to an embodiment of the present invention;

[0046] Figure 5 This is a signal waveform diagram of a method for segmented delay measurement of an audio decoder according to an embodiment of the present invention;

[0047] Figure 6 for Figure 5 The image shows an enlarged waveform of the signal.

[0048] Figure 7 This is the third step in the flowchart of the method for segmented delay measurement of an audio decoder according to an embodiment of the present invention. Detailed Implementation

[0049] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0050] In the description of this invention, "several" means one or more, "multiple" means two or more, "greater than," "less than," "exceeding," etc. are understood to exclude the stated number, and "above," "below," "within," etc. are understood to include the stated number. If "first," "second," etc. are used in the description, they are only for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance or implicitly indicating the number of indicated technical features or the order of the indicated technical features.

[0051] In the description of this invention, unless otherwise explicitly defined, terms such as "settings," "built-in," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0052] In the description of this invention, the consecutive numbers of the method steps are for ease of review and understanding. Considering the overall technical solution of this invention and the logical relationship between each step, adjusting the implementation order of the steps will not affect the technical effect achieved by the technical solution of this invention.

[0053] Example 1

[0054] Please refer to Figure 1 This embodiment discloses a method for segmented delay measurement of an audio decoder, including steps S100 to S500. To achieve segmented delay measurement of audio decoding, this embodiment constructs a first measurement loopback path based on an ADC+DAC decoding mode. Please refer to... Figure 2 The first measurement loop path includes an ADC unit 110 and a DAC unit 120. The output terminal of the ADC unit 110 is connected to the input terminal of the DAC unit 120, and the output terminal of the DAC unit 120 is connected to the input terminal of the ADC unit 110 via an audio cable 130, thus forming a measurement loop path. The details of each step in this embodiment are as follows:

[0055] S110. In response to the first excitation signal, periodic waveform data of a preset size is written into the DAC unit 120, and the periodic waveform data is converted from digital to analog through the DAC unit 120.

[0056] S120. The audio signal obtained by digital-to-analog conversion is input to the ADC unit 110 through the audio line 130, and the ADC unit 110 performs analog-to-digital conversion on the audio signal.

[0057] S130: The data obtained from the analog-to-digital conversion is transmitted to the DAC unit 120 to enter the digital-to-analog conversion of the next cycle;

[0058] S140. Determine at least two of the first time, second time, third time and fourth time respectively. The first time is used to characterize the time when the periodic waveform data begins to be written, the second time is used to characterize the time when the periodic waveform data is written to end, the third time is used to characterize the time when the DAC unit 120 begins to output audio signal, and the fourth time is used to characterize the time when the DAC unit 120 begins to output audio signal during the digital-to-analog conversion process of the next cycle.

[0059] S150. Based on at least two of the first time point, the second time point, the third time point, and the fourth time point, determine at least one of the first complete path delay, the DAC delay, the decoding software delay, and the ADC delay.

[0060] The first excitation signal can be a trigger signal from a physical button or a trigger command issued by the testing software. The start time of the measurement can be freely controlled via the first excitation signal, and a complete loop path is formed between the ADC unit 110 and the DAC unit 120 in this embodiment, allowing for repeated generation of the measurement signal excitation, resulting in stable and reliable measurement. Compared with existing technologies, this embodiment determines at least one of the first complete path delay, DAC delay, decoding software delay, and ADC delay based on at least two of the first, second, third, and fourth times, enabling segmented delay measurement of audio decoding.

[0061] To facilitate understanding of the technical solution of this embodiment, a specific example is provided below to describe the method of this embodiment in detail. It is worth understanding that the following description is merely illustrative and is not intended to limit the specific scope of the invention.

[0062] Please refer to Figure 3 This embodiment utilizes a System-on-Chip (SOC) to construct the first measurement loopback path. The SOC integrates an ADC unit 110 and a DAC unit 120, and supports Direct Memory Access (DMA) mode. DMA mode is a data exchange mode that directly accesses and retrieves data from an intermediate buffer without going through the SOC's MCU. Data transfer between the ADC unit 110 and DAC unit 120 via DMA mode significantly reduces the MCU's resource consumption. This embodiment configures test software on a computer and establishes a communication connection between the computer and the SOC. The test software writes a frame of periodic sine wave data into the DAC unit 120 to provide initial audio data. It is worth noting that other waveform data, such as cosine wave data, can be used for the periodic waveform data, and the data size of the periodic waveform data can be adaptively adjusted according to actual measurement needs.

[0063] Specifically, the SOC has a built-in intermediate buffer and DMA controller, and the DAC unit 120 has a built-in FIFO (First Input First Output) and D / A (Digital-to-Analog) converter. In DMA mode, when the first excitation signal is triggered by the button, the test software writes a frame of periodic sine wave data into the SOC's intermediate buffer. The DMA controller then uses DMA to transfer the data from the intermediate buffer to the FIFO of the DAC unit 120, and performs digital-to-analog conversion through the D / A converter. That is, step S110, which writes periodic waveform data of a preset size into the DAC unit 120, includes the following steps:

[0064] S111. Write the periodic waveform data into the intermediate buffer;

[0065] S112. Periodic waveform data is transferred from the intermediate buffer to the FIFO of the DAC unit 120 via DMA.

[0066] DMA transfer can be triggered by a timer and an external terminal. Each DMA channel is unidirectional. During data read / write operations, two DMA channels need to be allocated, such as channel ADDA_BUF1 and channel ADD_BUF2. The two DMA channels transfer data in a ping-pong manner. It should be noted that, under the same sampling rate and sampling precision, the period for the ADC to acquire one frame of data is the same as the period for the DAC to play one frame of data. While the DAC unit 120 plays the first frame of audio data sent by the ADC unit 110, the ADC unit 110 simultaneously acquires the second frame of audio data, thus forming a cyclic ping-pong decoding mechanism until audio decoding is complete. For example, the DMA controller moves a frame of data from channel ADDA_BUF1 to the FIFO of DAC unit 120. During the transfer, the D / A converter synchronously performs digital-to-analog conversion on the data in the FIFO of DAC unit 120 and transmits the audio signal obtained from the digital-to-analog conversion to ADC unit 110 through the audio line. The A / D converter in ADC unit 110 converts the audio signal and buffers it in the FIFO of ADC unit 110. The DMA controller then moves the data in the FIFO of ADC unit 110 to channel ADDA_BUF2 via DMA. When all the data in channel ADDA_BUF1 has been transferred to DAC unit 120, all the data in the FIFO of ADC unit 110 has also been transferred to channel ADDA_BUF2. At this time, DAC unit 120 will move sequentially to channel ADDA_BUF2 to facilitate the data transfer of the next cycle, while ADC unit 110 will synchronously move sequentially to channel ADDA_BUF1. This cycle repeats to form a ping-pong operation.

[0067] Theoretically, the decoding delay of this type of ADC+DAC based decoder is the period during which the ADC unit 110 acquires one frame of data. Since the period during which the ADC unit 110 acquires one frame of data is the same as the period during which the DAC plays one frame of data, under the same sampling rate and sampling precision, the decoding delay of this type of decoder can also be the period during which the DAC plays one frame of data. However, in practice, there may be a small difference between the period during which the ADC unit 110 acquires one frame of data and the period during which the DAC plays one frame of data; therefore, the larger of the two is generally taken as the decoding period.

[0068] In actual measurements, an oscilloscope can be used to capture waveforms on a GPIO pin of the SOC and on audio line 130 to determine at least two of the first, second, third, and fourth time points. For example, please refer to... Figure 4 The button triggers the generation of the first excitation signal. Upon receiving the first excitation signal, a frame of periodic sine wave data is written into the FIFO of DAC unit 120 (the specific writing process has been described in detail above and will not be repeated here). The DMA automatic transfer DAC interrupt is initiated, and simultaneously, the level of one GPIO pin of the SOC is pulled high to determine the first moment. It should be noted that the DMA automatic transfer DAC interrupt is used to generate an interrupt signal when the DMA controller completes or is about to complete transferring a frame of periodic sine wave data to DAC unit 120. After receiving the DMA automatic transfer DAC interrupt signal, the level of the SOC's GPIO pin is detected. If the level of the SOC's GPIO pin is high, the level of the GPIO pin is pulled low. Thus, the first and second moments can be determined by capturing the signal waveform on the SOC's GPIO pin. For example, please refer to... Figure 5 and Figure 6 , Figure 5 The diagram shows the complete GPIO signal waveform (i.e., signal waveform Sig1) on a GPIO pin of the SOC and the complete audio signal waveform (i.e., signal waveform Sig2) on audio line 130. Figure 6 To Figure 5 The waveform of the GPIO signal after amplification (i.e., signal waveform Sig1a) and the waveform of the audio signal after amplification (i.e., signal waveform Sig2a). Figure 6 The time T1 shown represents the first time point, and the time T2 represents the second time point. At time T1, the button is pressed, and the writing of a frame of periodic sine wave data begins, initiating the DMA automatic transfer DAC interrupt, and the level on the GPIO pin is pulled high. At time T2, the DMA automatic transfer DAC interrupt signal is received, and the level on the GPIO pin is pulled low.

[0069] The periodic sine wave data, after being converted from digital to analog by the DAC unit 120, is output as a corresponding audio signal through the audio line 130. Since the ADC unit 110, DAC unit 120, and audio line 130 form a relatively closed first measurement loop path, theoretically, the periodic sine wave data can generate an oscillation signal within this loop, thus repeatedly transferring it between the ADC unit 110 and DAC unit 120. In reality, due to resistive losses in the audio line 130, the oscillation signal continuously attenuates until it reaches zero. However, the oscillation period remains constant; therefore, the third and fourth moments can be determined by capturing the signal waveform on the audio line 130. Figure 6 In the diagram, time T3 is the moment when the DAC unit 120 starts outputting audio signals after writing periodic sine wave data, i.e., the third time; time T4 is the moment when the periodic sine wave data passes through the DAC unit 120, audio line 130 and ADC unit 110 in sequence and then enters the DAC unit 120 again, and the DAC unit 120 starts outputting the second audio signal, i.e., the fourth time.

[0070] In this embodiment, the first complete path delay is used to characterize the time taken for periodic sine wave data to pass through the DAC unit 120, audio line 130, and ADC unit 110 sequentially, and then be transported back to the DAC unit 120. The first complete path delay is equal to the time difference between the fourth time point and the third time point, i.e., t1 = T3 - T4, where t1 represents the first complete path delay; the DAC delay is equal to the time difference between the third time point and the first time point, i.e., t2 = T3 - T1, where t2 is the DAC delay; the decoding software delay is equal to the time difference between the second time point and the first time point, i.e., t3 = T2 - T1, where t3 is the decoding software delay (DAC data transport cycle); the ADC delay is equal to the time difference between the first complete path delay, the DAC delay, and the decoding software delay, i.e., t4 = t1 - t2 - t3, where t4 is the ADC delay.

[0071] Traditional methods measure delay by capturing the ADC input and DAC output signals, which only allows for overall delay measurement. This embodiment, however, measures the audio signal waveforms from the SOC's GPIO pins and audio line 130 to determine at least two of the first, second, third, and fourth time points, enabling segmented delay testing. This facilitates obtaining more detailed and accurate performance data, providing precise data support for subsequent decoder unit 210 analysis or other functional analyses. Secondly, this embodiment generates the first excitation signal via a button trigger, allowing for flexible control of the test timing. Traditional methods typically rely on capturing the first waveform of the ADC input signal, making it difficult to control the test timing. Furthermore, the first measurement loop path in this embodiment has a simple structure, high integration, and high stability and reliability, which improves measurement efficiency.

[0072] The first complete path delay, DAC delay, and ADC delay obtained through the above methods and steps are all indicator data based on the hardware attributes of the first measurement loopback path. These data will not change due to variations in the decoding model. Therefore, the measured first complete path delay, DAC delay, and ADC delay data can be used to measure the delay of various decoding models. It should be noted that the decoding model involved in this embodiment can be a software-implemented decoding model, or a decoding model combining software and hardware. For example, currently popular wireless headphones, depending on actual analysis needs, may have a decoding model including a wireless receiving part and a software decoding part, or a hardware decoding part, or only a software decoding part.

[0073] Please refer to Figure 7 A second measurement loop is constructed based on the first measurement loop to measure the decoder unit 210. The second measurement loop includes the first measurement loop and the decoder unit 210 to be measured. The input of the decoder unit 210 is connected to the output of the ADC unit 110, and the output of the decoder unit 210 is connected to the input of the DAC unit 120. Therefore, the method suitable for segmented delay measurement of audio decoders also includes:

[0074] S161. In response to the second excitation signal, periodic waveform data is written into the DAC unit 120, and the periodic waveform data is converted from digital to analog through the DAC unit 120.

[0075] S162. The audio signal obtained by digital-to-analog conversion is input to the ADC unit 110 through the audio line 130, and the ADC unit 110 performs analog-to-digital conversion on the audio signal.

[0076] S163. The data obtained from the analog-to-digital conversion is transmitted to the decoder unit 210 to be measured, and after decoding by the decoder unit 210, it is transmitted to the DAC unit 120 to enter the next cycle of digital-to-analog conversion.

[0077] S164. Determine the fifth time and the sixth time respectively. The fifth time is used to characterize the time when the DAC unit 120 starts to output audio signals, and the sixth time is used to characterize the time when the DAC unit 120 starts to output audio signals during the digital-to-analog conversion process of the next cycle.

[0078] S165. Determine the delay of the second complete path based on the fifth and sixth time points.

[0079] Similar to the measurement process of the first measurement loop path, the second excitation signal in this embodiment can also be a trigger signal from a physical button or a trigger command issued by the test software. The test software writes periodic waveform data to the DAC unit 120 to provide the initial audio signal. Since the ADC unit 110, decoder unit 210, DAC unit 120, and audio line 130 form a relatively closed second measurement loop path, the audio signal can form an oscillation signal in the second measurement loop path. Therefore, the fifth and sixth moments can be determined by capturing the audio signal waveform on the audio line 130. The second complete path delay is equal to the time difference between the sixth and fifth moments. It is worth understanding that the difference between the first and second measurement loop paths lies in the decoder unit 210 to be measured. As mentioned above, the first complete path delay is a hardware attribute indicator and will not change with the decoding model. Therefore, given the first complete path delay, the decoding delay of the decoder unit 210 is determined based on the first and second complete path delays. Compared with traditional methods, this embodiment measures the first complete path delay and the second complete path delay based on hardware attributes, which can measure the decoding delay of the decoder unit 210 more accurately and improve measurement accuracy.

[0080] Example 2

[0081] Please refer to Figure 4 and Figure 7 The method for segmented delay measurement of an audio decoder in this embodiment includes the following steps:

[0082] S210. Obtain the first complete path delay of the first measurement loop path. The first measurement loop path includes an ADC unit 110 and a DAC unit 120. The output terminal of the ADC unit 110 is connected to the input terminal of the DAC unit 120. The output terminal of the DAC unit 120 is connected to the ADC unit 110 through an audio cable 130.

[0083] S220. Establish a second measurement loop path, which includes a first measurement loop path and a decoder unit 210 to be measured. The input terminal of the decoder unit 210 is connected to the output terminal of the ADC unit 110, and the output terminal of the decoder unit 210 is connected to the input terminal of the DAC unit 120.

[0084] S230: Write periodic waveform data to DAC unit 120, and output the periodic waveform data to ADC unit 110 after digital-to-analog conversion through DAC unit 120.

[0085] S240. Determine the second complete path delay based on the time when the DAC unit 120 starts outputting the audio signal in two adjacent cycles. It should be noted that the periodic waveform data is output as an audio signal after being converted from digital to analog by the DAC unit 120. Moreover, based on the closed-loop characteristics of the second measurement loop path, the periodic waveform data can form an oscillation signal with an unchanged period in the second measurement loop path. Therefore, based on the time when the DAC unit 120 starts outputting the audio signal in two adjacent cycles, the time taken for the periodic waveform data to be transmitted once in the second measurement loop path can be determined, that is, the second complete path delay.

[0086] S250. Determine the decoding delay of decoder unit 210 based on the first complete path delay and the second complete path delay.

[0087] Compared with existing technologies, this embodiment of the invention determines the decoding delay of the decoder unit 210 based on the first complete path delay and the second complete path delay, enabling segmented delay measurement of audio decoding and obtaining more accurate decoding delay data. It should be noted that in practical applications, for the first measurement loop path with unchanged hardware properties, the first complete path delay data is usually a fixed indicator. Therefore, the first complete path delay only needs to be measured once and can be reused in measuring different decoder units 210. It is understood that, to avoid redundancy, the measurement process of the first complete path delay and any content not covered in this embodiment can be referred to in Embodiment 1.

[0088] Example 3

[0089] Please refer to Figure 4 The system for segmented delay measurement of audio decoders in this embodiment includes:

[0090] The first measurement loop path includes an ADC unit 110 and a DAC unit 120. The output of the ADC unit 110 is connected to the input of the DAC unit 120. The output of the DAC unit 120 is connected to the ADC unit 110 via an audio cable 130. The DAC unit 120 is provided with a data writing interface.

[0091] Compared with the prior art, the embodiments of the present invention write data to the DAC unit 120 through the data writing interface, which can determine the first complete path delay of the first measurement loopback path, thereby realizing segmented delay measurement of audio decoding. The method of segmented delay measurement can be referred to Embodiment 1 or Embodiment 2, and will not be described again in this embodiment.

[0092] Please refer to Figure 5The system for segmented delay measurement of audio decoders in this embodiment further includes a second measurement loop path. The second measurement loop path includes a first measurement loop path and the decoder unit 210 to be measured. The input terminal of the decoder unit 210 is connected to the output terminal of the ADC unit 110, and the output terminal of the decoder unit 210 is connected to the input terminal of the DAC unit 120. Compared with the prior art, this embodiment of the invention can measure the first complete path delay and the second complete path delay based on hardware attributes. Based on the first complete path delay and the second complete path delay, the decoding delay of the decoder unit 210 is determined, enabling segmented delay measurement of audio decoding and obtaining more accurate decoding delay data.

[0093] Example 4

[0094] This embodiment discloses an electronic device, including a processor, which is used to execute the method for segmented delay measurement of an audio decoder as described in Embodiment 1 above. To avoid redundancy, the method for segmented delay measurement of an audio decoder and its beneficial effects can be found in Embodiment 1, and will not be repeated here.

[0095] Example 5

[0096] This embodiment discloses a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the method for segmented delay measurement of an audio decoder as described in Embodiment 1. To avoid redundancy, the method for segmented delay measurement of an audio decoder and its beneficial effects can be found in Embodiment 1, and will not be repeated here.

[0097] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention.

Claims

1. A method for segmented delay measurement of an audio decoder, characterized in that, Including the following steps: In response to the first excitation signal, periodic waveform data of a preset size is written into the DAC unit, and the periodic waveform data is converted from digital to analog through the DAC unit; The audio signal obtained from the digital-to-analog conversion is input to the ADC unit through an audio line, and the ADC unit performs analog-to-digital conversion on the audio signal. The data obtained from the analog-to-digital conversion is transmitted to the DAC unit to enter the digital-to-analog conversion of the next cycle; At least two of the first time point, second time point, third time point, and fourth time point are determined respectively. The first time point is used to characterize the time when the periodic waveform data begins to be written, the second time point is used to characterize the time when the periodic waveform data writing ends, the third time point is used to characterize the time when the DAC unit begins to output audio signals, and the fourth time point is used to characterize the time when the DAC unit begins to output audio signals during the digital-to-analog conversion of the next cycle. The delay of the first complete path is equal to the time difference between the fourth time and the third time; the delay of the DAC is equal to the time difference between the third time and the first time; the delay of the decoding software is equal to the time difference between the second time and the first time; and the delay of the ADC is equal to the time difference between the delay of the first complete path, the delay of the DAC, and the delay of the decoding software.

2. The method for segmented delay measurement of an audio decoder according to claim 1, characterized in that, The step of writing periodic waveform data of a preset size into the DAC unit includes the following steps: The periodic waveform data is written into an intermediate buffer; The periodic waveform data is transferred from the intermediate buffer to the FIFO of the DAC unit via DMA.

3. The method for segmented delay measurement of an audio decoder according to claim 1 or 2, characterized in that, Also includes: In response to the second excitation signal, the periodic waveform data is written into the DAC unit, and the periodic waveform data is converted from digital to analog through the DAC unit; The audio signal obtained from the digital-to-analog conversion is input to the ADC unit through an audio line, and the ADC unit performs analog-to-digital conversion on the audio signal. The data obtained from the analog-to-digital conversion is transmitted to the decoder unit to be measured, and after decoding by the decoder unit, it is transmitted to the DAC unit to enter the next cycle of digital-to-analog conversion; The fifth time and the sixth time are determined respectively. The fifth time is used to characterize the time when the DAC unit starts to output an audio signal, and the sixth time is used to characterize the time when the DAC unit starts to output an audio signal during the digital-to-analog conversion of the next cycle. The delay of the second complete path is determined based on the fifth and sixth time points.

4. The method for segmented delay measurement of an audio decoder according to claim 3, characterized in that, Given the first complete path delay, the decoding delay of the decoder unit is determined based on the first complete path delay and the second complete path delay.

5. A method for segmented delay measurement of an audio decoder, characterized in that, Including the following steps: The first complete path delay of the first measurement loop path is obtained. The first measurement loop path includes an ADC unit and a DAC unit. The output terminal of the ADC unit is connected to the input terminal of the DAC unit. The output terminal of the DAC unit is connected to the ADC unit through an audio line. The first complete path delay is equal to the time difference between the fourth time and the third time. The third time is used to characterize the time when the DAC unit starts to output an audio signal. The fourth time is used to characterize the time when the DAC unit starts to output an audio signal during the digital-to-analog conversion process of the next cycle. A second measurement loop path is established, which includes the first measurement loop path and the decoder unit to be measured. The input terminal of the decoder unit is connected to the output terminal of the ADC unit, and the output terminal of the decoder unit is connected to the input terminal of the DAC unit. Periodic waveform data is written to the DAC unit, and the periodic waveform data is converted from digital to analog by the DAC unit and then output to the ADC unit. The second complete path delay is determined based on the moment when the DAC unit begins to output audio signals in two adjacent cycles; The decoding delay of the decoder unit is determined based on the first complete path delay and the second complete path delay.

6. An electronic device, comprising a processor, characterized in that, The processor is used to execute the method for segmented delay measurement of an audio decoder as described in any one of claims 1 to 4.

7. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the method for segmented delay measurement of an audio decoder as described in any one of claims 1 to 4.

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