Co-simulation method and application in chip simulation verification

Abstract

The present invention discloses a collaborative simulation method and application in chip simulation verification, and relates to the field of chip development technology. The method comprises the steps of: constructing a collaborative simulation project database; obtaining current simulation project information, comparing the function module code to be verified contained in the current simulation project and the test stimulus signal applied to each function module with the information of the existing simulation project in the collaborative simulation project database, and generating a change list document; according to the change list document, selecting reusable information from the simulation verification information of the existing simulation project; wherein, the code compilation files with the same function module code are reused, and the simulation result files with the same function module code and corresponding test stimulus signal are reused. The present invention reuses the same part of simulation resources in different simulation projects according to the characteristics of the test code in the simulation project and the test stimulus applied, which significantly improves the simulation efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of chip development, and in particular to a collaborative simulation method and application in chip simulation verification. Background Art

[0002] The design process of a chip (IC) is usually divided into two parts, including the front-end design (also known as logic design) stage and the back-end design (also known as physical design) stage. In the front-end design stage, the chip design company designs the chip architecture and divides the module functions according to the chip requirements proposed by the customer, and then uses the hardware description language (such as Verilog, etc.) to describe and implement the module functions in code, that is, the actual hardware circuit functions are described in HDL language to form RTL (Resistor transistor logic, register transfer level) code; then, the RTL is simulated and verified to verify the correctness of the designed code (functional simulation, also known as pre-simulation). Currently, it is mainly to apply stimulus to the completed RTL (i.e. simulate external input signals) to obtain the results of its operation (whether it meets the expected value or preset value) to determine whether the RTL code can run correctly. Then, logic synthesis is performed (constraints, unit delays and other information are added), and the netlist after logic synthesis is simulated (also known as post-simulation). The simulators used for pre-simulation and post-simulation are the same, and the test stimulus added is also the same. The difference is that the files required for simulation are not exactly the same, the functions are different, the waveforms are different, etc.

[0003] Design and simulation verification is an iterative process until the verification results show full compliance with the specifications. Simulation verification is one of the indispensable and most time-consuming parts of chip design. With the continuous development of process technology and application fields, the complexity of chips continues to increase. Correspondingly, the complexity of simulation verification work is also increasing. The time spent on simulation verification work is increasingly becoming a bottleneck in the chip R&D cycle. How to systematically conduct simulation verification work to avoid repeated and invalid verification work has become an important research direction for optimizing chip verification work and shortening the chip R&D cycle.

[0004] In actual chip design work, for different simulation projects, a same RTL code may need to apply different test stimuli to simulate in different test scenarios. During debugging, it is found that for the test stimuli constructed in different test scenarios, most of the contents of many test stimuli are the same. During debugging, it is usually only necessary to modify individual or part of the parameters to adjust the test stimuli to adapt to different test scenarios. However, in the current simulation verification process, simulation projects are often independent of each other, and the test cases of different simulation projects are also independent of each other. There is no collaboration and shared resources between simulation projects. When verifying different simulation projects, the change of test stimuli often requires recompiling the entire verification platform. Considering that the changes in test stimuli for different test cases may be small - for example, the test stimuli for some different simulation cases only change one or two stimulus signals. In this case, the RTL code to be compiled in the simulation remains unchanged, and most of the stimulus signals are exactly the same. When using the existing simulation verification process for simulation, there will undoubtedly be repeated compilation and repeated running of files, resulting in a great waste of simulation time and computing resources, and reducing simulation efficiency.

[0005] In summary, one of the technical issues that needs to be solved urgently is to make full use of the characteristics of test codes and test stimuli in simulation verification work and reduce or avoid duplication of work in the simulation process to improve the existing simulation efficiency. Summary of the invention

[0006] The purpose of the present invention is to overcome the shortcomings of the prior art and provide a collaborative simulation method and application in chip simulation verification. The collaborative simulation method provided by the present invention reuses the same part of simulation resources in different simulation projects according to the characteristics of the test code in the simulation project and the test stimulus applied to the test code, and significantly improves the simulation efficiency through the reuse of simulation resources.

[0007] To achieve the above objectives, the present invention provides the following technical solutions:

[0008] A collaborative simulation method in chip simulation verification comprises the steps of:

[0009] Building a collaborative simulation project database, wherein the collaborative simulation project database includes simulation verification information of one or more existing simulation projects;

[0010] Acquire the current simulation project information, compare the function module code to be verified and the test stimulus signal applied to each function module contained in the current simulation project with the information of the aforementioned existing simulation project, and generate a change list document; the change list document records the modification information of the function module code and the test stimulus signal modification information of the current simulation project;

[0011] According to the aforementioned change list document, reusable information is selected from the simulation verification information of the aforementioned existing simulation project; wherein, code compilation files with the same functional module code are reused, and simulation result files with the same functional module code and corresponding test stimulus signals are reused.

[0012] Furthermore, the functional module is a design under test (DUT).

[0013] Furthermore, the existing simulation projects in the collaborative simulation project database include historical simulation projects that have completed verification in the computer terminal where the current simulation project is located, as well as historical simulation projects that have completed verification in other computer terminals and ongoing simulation projects.

[0014] Furthermore, the simulation verification information of the existing simulation project includes the functional module code information included in the simulation project, the test stimulus signal applied to each functional module, the code compilation file of each functional module and the simulation result file after the test stimulus is applied to each functional module code.

[0015] Further, for any existing simulation project in the collaborative simulation project database, the simulation result file of the existing simulation project includes simulation result information of all functional modules at different times, and the simulation result file is divided into different simulation result modules according to the functional modules according to the functional module information contained in the existing simulation project, and the functional modules and the simulation result modules are set correspondingly, and the simulation result modules are simulation results of the corresponding functional modules at different time periods of the simulation verification process;

[0016] When selecting reusable information, configure the reusable functional module and the reusable time period information of the functional module, and obtain the simulation result module of the functional module in the reusable time period according to the configured reusable time period for reusing.

[0017] Furthermore, when reusing simulation result files with the same functional module codes and corresponding test excitation signals, a simulation result multiplexing mode is configured according to information about changes in the functional module codes and their corresponding test excitation signals over time, and the simulation result multiplexing mode includes a time multiplexing mode and a space multiplexing mode; for a current simulation project containing multiple functional modules, different functional modules respectively adopt a time multiplexing mode and a space multiplexing mode, thereby forming a mixed multiplexing mode.

[0018] Further, for any functional module in the current simulation project, its code and test stimulus signal are compared with the existing simulation project;

[0019] When it is determined that the code of the functional module has not changed relative to the existing simulation project before a certain time point T and the test stimulus signal before T has not changed, a time multiplexing mode is configured for the functional module to reuse the simulation result module of the corresponding functional module before T in the aforementioned existing simulation project; when it is determined that the code of the functional module has not changed relative to the existing simulation project and the applied test stimulus signal has not changed, a space multiplexing mode is configured for the functional module to reuse the simulation result module of the corresponding functional module in the aforementioned existing simulation project in the entire simulation verification process.

[0020] Further, the method further includes the following steps: after selecting the reusable information, performing collaborative simulation verification on the current simulation project based on the reusable information, the steps are as follows:

[0021] Compilation steps: compile the function module code files, recompile the changed code files and simulation testbench files, and reuse the code compilation files of the existing simulation project for the unchanged code files;

[0022] Simulation step: After the file is compiled, enter the simulation step. Perform a new simulation on the functional modules with newly compiled files whose codes have been changed. Reuse the simulation result modules of the existing projects for the functional modules whose codes have not been changed and the applied test stimulus signals have not been changed. Perform a new simulation on the functional modules whose test stimulus signals have been changed or which have signal interactions with the newly simulated functional modules.

[0023] The present invention also provides a collaborative simulation device for chip simulation verification, comprising the following structure:

[0024] A change list generation module is used to obtain the current simulation project information, compare the function module code to be verified contained in the current simulation project and the test stimulus signal applied to each function module with the information of the existing simulation project in the collaborative simulation project database, and generate a change list document; the change list document records the modification information of the function module code and the test stimulus signal modification information of the current simulation project; the collaborative simulation project database includes simulation verification information of one or more existing simulation projects;

[0025] A reuse information processing module is used to select reusable information from the simulation verification information of the aforementioned existing simulation project according to the aforementioned change list document; wherein, code compilation files with the same functional module code are reused, and simulation result files with the same functional module code and corresponding test stimulus signals are reused.

[0026] The present invention also provides a collaborative simulation system for chip simulation verification, comprising:

[0027] A collaborative simulation platform, used to construct a collaborative simulation project database, wherein the collaborative simulation project database includes simulation verification information of one or more existing simulation projects;

[0028] A simulation verification user terminal that is communicatively connected to a collaborative simulation platform is used to obtain information about a current simulation project on the user terminal, and to generate a change list document after comparing the function module code to be verified contained in the current simulation project and the test stimulus signal applied to each function module with the information of the aforementioned existing simulation project; the change list document contains modification information about the function module code and the test stimulus signal modification information of the current simulation project; and, based on the aforementioned change list document, reusable information is selected from the simulation verification information of the aforementioned existing simulation project; wherein, code compilation files with the same function module code are reused, and simulation result files with the same function module code and corresponding test stimulus signal are reused.

[0029] Due to the adoption of the above technical scheme, the present invention has the following advantages and positive effects compared with the prior art, as an example: the collaborative simulation method provided by the present invention reuses the simulation resources of the same part in different simulation projects according to the characteristics of the test code in the simulation project and the test stimulus applied to the test code, and significantly improves the simulation efficiency through the reuse of simulation resources. The reuse may include spatial multiplexing, temporal multiplexing and mixed multiplexing, and the reused information may come from the previous simulation project of this computer or the ongoing and previous simulation project of other computers. Furthermore, the simulation result file is divided in time and space to form different simulation result modules, and the separated simulation result modules are extracted and reused separately. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A flowchart of a collaborative simulation method in chip simulation verification provided by an embodiment of the present invention.

[0031] Figure 2 This is a time multiplexing mode provided by an embodiment of the present invention.

[0032] Figure 3 This is a spatial multiplexing mode provided in an embodiment of the present invention.

[0033] Figure 4 A hybrid multiplexing mode provided in an embodiment of the present invention.

[0034] Figure 5 A schematic diagram of information processing for collaborative simulation verification using reusable information provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The collaborative simulation method and application in chip simulation verification disclosed in the present invention are further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the technical features or combinations of technical features described in the following embodiments should not be considered isolated, and they can be combined with each other to achieve better technical effects. In the drawings of the following embodiments, the same reference numerals appearing in each drawing represent the same features or components, which can be applied to different embodiments. Therefore, once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0036] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the invention. Any modification of the structure, change of the proportion relationship or adjustment of the size should fall within the scope of the technical content disclosed by the invention without affecting the effects and purposes that can be achieved by the invention. The scope of the preferred embodiments of the present invention includes other implementations, in which the functions can be performed in a substantially simultaneous manner or in a reverse order according to the functions involved, which should be understood by those skilled in the art of the technical field to which the embodiments of the present invention belong.

[0037] Techniques, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the techniques, methods, and devices should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0038] Example

[0039] See also Figure 1 As shown, a collaborative simulation method in chip simulation verification provided by the present invention comprises the following steps.

[0040] S100, constructing a collaborative simulation project database, wherein the collaborative simulation project database includes simulation verification information of one or more existing simulation projects.

[0041] In this embodiment, the existing simulation projects in the collaborative simulation project database include historical simulation projects that have completed verification in the computer terminal where the current simulation project is located, as well as historical simulation projects and ongoing simulation projects that have completed verification in other computer terminals. In this way, simulation projects on the same computer at different times, or simulation projects on different computers, can establish connections through the collaborative simulation project database, so that different simulation projects can collaborate and share resources. Specifically, the collaborative simulation project database can be set up based on a collaborative simulation platform, and each computer terminal in a network is connected to the collaborative simulation platform as a user terminal, and can access the aforementioned collaborative simulation platform and obtain simulation project information in the collaborative simulation project database.

[0042] One simulation project corresponds to one simulation, and one simulation project may include simulation verification of multiple functional modules (modules, or functional blocks). In this embodiment, the functional module is the design under test (DUT). Taking the previous simulation as an example, at this time, the design under test (DUT) is an RTL model (or RTL module) written in RTL (Resistor transistor logic, register transfer level) code. It is called RTL code because it uses the Verilog language to describe the hardware circuit in the Resistances Transistors Logic (register transfer level logic). The RTL code using the Verilog language needs to be compiled before simulation to convert it into a language that can be recognized by the computer.

[0043] During simulation verification, a code platform for verification work (including all components required for verification work) is provided through TB ​​(i.e., testbench). TB contains verification code mainly used to build a verification environment. The verification environment applies stimulus signals to drive the design under test (DUT) (such as the aforementioned RTL model) to work, and collects and compares the signals output by the DUT.

[0044] It should be noted that, corresponding to the simulation verification at different stages, such as the pre-simulation stage, the post-simulation stage and the static simulation stage, the DUT to be tested may be other types of models, such as a gate-level netlist, which may also be used as the DUT to be tested in the present invention.

[0045] The simulation verification information of the existing simulation project may specifically include the functional module code information included in the simulation project, the test stimulus signal applied to each functional module, the code compilation file of each functional module, and the simulation result file after the test stimulus is applied to each functional module code.

[0046] S200, obtaining the current simulation project information, comparing the function module codes to be verified and the test stimulus signals applied to each function module contained in the current simulation project with the information of the aforementioned existing simulation project, and generating a modification list document. The modification list document records the modification information of the function module codes and the test stimulus signal modification information of the current simulation project.

[0047] The modification list document is used for reuse analysis, that is, analyzing which time periods and which functional modules can be reused. Taking the RTL module as an example, the modification list document includes whether the RTL code of the current simulation project has been modified and whether the test stimulus signal has been modified.

[0048] In specific implementation, the configuration information of each RTL module can be read for statistics, and combined with the modification date information of the test file in DV (Design Verification) to obtain a document that lists which files have been modified as the modification list document. The test file is a component in TB, which records the specific information of the DUT tested during simulation verification, determines when to test which DUT, and what test stimulus is applied to the tested DUT. The modification list document list can be shared by all computers in a network. When performing reuse analysis, the modification date of the file can be compared, and the corresponding simulation result information of the unmodified part can be reused.

[0049] S300, according to the aforementioned change list document, select reusable information from the simulation verification information of the aforementioned existing simulation project; wherein, the code compilation files with the same functional module code are reused, and the simulation result files with the same functional module code and corresponding test stimulus signals are reused.

[0050] Taking into account that in the existing simulation result files, the simulation result files of the simulation project include all simulation result information of all functional modules involved in the simulation at different times, this embodiment requires that the compiled files and the existing simulation result files can be split. After splitting according to functional modules, the simulation result information of any module at any time node can be extracted and packaged according to actual needs to provide it to other simulation projects for reuse.

[0051] Specifically, for any existing simulation project in the collaborative simulation project database, the simulation result file of the existing simulation project includes simulation result information of all functional modules at different times. The simulation result file is divided into different simulation result modules according to the functional modules according to the functional module information contained in the existing simulation project. The functional modules and the simulation result modules are arranged correspondingly, and the simulation result modules are the simulation results of the corresponding functional modules in different time periods of the simulation verification process.

[0052] When selecting reusable information, the reusable functional module and the reusable time period information of the functional module are configured, and the simulation result module of the functional module in the reusable time period is obtained according to the configured reusable time period for reusing.

[0053] In this embodiment, when the simulation result files with the same function module codes and corresponding test stimulus signals are reused, the simulation result reuse mode can be configured according to the change information of the function module codes and the corresponding test stimulus signals over time, and the simulation result reuse mode includes a time reuse mode and a space reuse mode. For the current simulation project including multiple function modules, different function modules respectively adopt the time reuse mode and the space reuse mode, thereby forming a mixed reuse mode.

[0054] Specifically, for any functional module in the current simulation project, its code and test stimulus signal are compared with those of the existing simulation project. When it is determined that the code of the functional module before a certain time point T has not changed relative to the existing simulation project and the test stimulus signal before T has not changed, a time multiplexing mode is configured for the functional module, and the simulation result module of the corresponding functional module before T in the aforementioned existing simulation project is reused. When it is determined that the code of the functional module has not changed relative to the existing simulation project and the applied test stimulus signal has not changed, a space multiplexing mode is configured for the functional module, and the simulation result module of the corresponding functional module in the aforementioned existing simulation project in the entire simulation verification process is reused.

[0055] For multiple functional modules in the current simulation project, the code and test stimulus signal of each functional module are compared with the existing simulation project. The spatial multiplexing mode is configured for the functional modules whose codes have not changed and the applied stimulus has not changed. The time multiplexing mode is configured for the functional modules whose codes have not changed and the test stimulus signal before a certain time point T has not changed, thereby forming a mixed multiplexing mode of time and space.

[0056] Let's take the RTL module as an example. Figures 2 to 4 Describe the above simulation result reuse mode in detail.

[0057] See also Figure 2 As shown, it indicates the reuse of simulation results in time. For the same RTL module in the current simulation project and the existing simulation project, the RTL code of the RTL module before time T has not changed, and the test stimulus signal applied before time T is also the same, so the simulation result module of the RTL module of the existing simulation project before time T can be directly reused (indicated by the diagonal line part).

[0058] See also Figure 3As shown, it indicates the reuse of simulation result space. For the same RTL module 2 in the current simulation project and the existing simulation project ( Figure 3 Module 2 in the RTL module 2), the code and test stimulus signal of the RTL module 2 are the same as those of the existing simulation project during the entire simulation verification period. Therefore, the RTL module 2 of the current simulation project does not need to be simulated, and the corresponding simulation result module in the existing simulation project can be reused.

[0059] See also Figure 4 As shown in Figure 2, it is a mixed reuse of simulation results. Figure 2 and 3 , for multiple RTL modules in a simulation project, that is, RTL module 1 ( Figure 4 module 1) can only reuse the simulation results before time T, while RTL module 2 ( Figure 4 Module 2) in the above example can be reused all the time. Hybrid reuse is probably the most common reuse method, and its reuse can be extended to more modules.

[0060] In this embodiment, after step S300, the following step is further included: after selecting the reusable information in step S300, performing collaborative simulation verification on the current simulation project based on the reusable information, which may specifically include a compilation step and a simulation step.

[0061] Compilation steps: compile the functional module code files, recompile the changed code files and simulation testbench files, and reuse the code compilation files of the existing simulation project for the unchanged code files.

[0062] Simulation step: After the file is compiled, enter the simulation step. Perform a new simulation on the functional modules with newly compiled files whose codes have been changed. Reuse the simulation result modules of the existing projects for the functional modules whose codes have not been changed and the applied test stimulus signals have not been changed. Perform a new simulation on the functional modules whose test stimulus signals have been changed or which have signal interactions with the newly simulated functional modules.

[0063] Combination Figure 5 As shown in the figure, a complete simulation verification process of the current simulation project is illustrated. Figure 5The blank area is the non-reusable part, and the underlined area is the reusable part. The period before time T0 is the compilation stage. In this stage, the RTL code that has not been modified does not need to be compiled. The code compilation file of the existing simulation project can be directly reused. Only the modified RTL code and simulation testbench need to be compiled. After the compilation is completed, it enters the simulation stage. In the simulation stage, the newly compiled RTL needs to be newly simulated, the applied test stimulus signal needs to be changed, the functional modules for which the newly simulated functional modules have signal interaction need to be newly simulated, and the others can directly reuse the simulation result modules corresponding to the existing simulation project. Figure 5 For example, between time T0 and T1, the applied test stimulus signal has not changed. Except for the newly compiled RTL that needs to be re-simulated, the simulation results of the existing project can be directly reused. After T1, some RTL modules may need to be re-simulated due to changes in the test stimulus signal - for example, the test stimulus signal input to a certain RTL module after T1 is different from the test stimulus signal recorded in the simulation result module of the existing simulation project, resulting in changes in the subsequent behavior of the RTL module, and the RTL module needs to be re-simulated; or, the newly simulated RTL module needs to be re-simulated because of signal interaction with other RTL modules - for example, the signal input to a certain RTL module after T1 changes, then the subsequent behavior of this RTL module will also change, and the existing simulation result module can no longer be reused, and it needs to be re-simulated. Because the RTL modules in the simulation project are not isolated, signal interactions will occur between the RTL modules during the simulation.

[0064] The above-mentioned technical solution provided by the present invention links different projects together across space and time through a collaborative simulation method, so that the simulation results of simulation projects performed at different times on the same computer or simulation projects performed simultaneously on different computers can be reused with each other, the same files do not need to be compiled repeatedly, the simulation processes corresponding to the same RTL code and the same stimulus do not need to be simulated repeatedly, and repeated compilation and simulation files are avoided, which can significantly improve the simulation efficiency.

[0065] Another embodiment of the present invention further provides a collaborative simulation device for chip simulation verification.

[0066] The device comprises a modification list generating module and a reuse information processing module.

[0067] The modification list generation module is used to obtain the current simulation project information, compare the function module code to be verified contained in the current simulation project and the test stimulus signal applied to each function module with the information of the existing simulation project in the collaborative simulation project database, and then generate a modification list document. The modification list document records the modification information of the function module code and the test stimulus signal modification information of the current simulation project. The collaborative simulation project database includes simulation verification information of one or more existing simulation projects.

[0068] The reuse information processing module is used to select reusable information from the simulation verification information of the aforementioned existing simulation project according to the aforementioned change list document; wherein, the code compilation files with the same functional module code are reused, and the simulation result files with the same functional module code and corresponding test stimulus signals are reused.

[0069] In this embodiment, for any existing simulation project in the collaborative simulation project database, the simulation result file of the existing simulation project includes simulation result information of all functional modules at different times. According to the functional module information contained in the existing simulation project, the simulation result file is divided into different simulation result modules according to the functional modules. The functional modules and the simulation result modules are set correspondingly, and the simulation result modules are the simulation results of the corresponding functional modules in different time periods of the simulation verification process.

[0070] At this time, the multiplexing information processing module is configured to: when selecting reusable information, configure the reusable functional module and the reusable time period information of the functional module, and obtain the simulation result module of the functional module in the reusable time period according to the configured reusable time period for reusing.

[0071] In this embodiment, when the simulation result files with the same function module codes and corresponding test stimulus signals are reused, the simulation result reuse mode can be configured according to the change information of the function module codes and the corresponding test stimulus signals over time, and the simulation result reuse mode includes a time multiplexing mode and a space multiplexing mode. For the current simulation project including multiple function modules, different function modules respectively adopt the time multiplexing mode and the space multiplexing mode, thereby forming a mixed multiplexing mode.

[0072] In specific implementation, the code and test excitation signal of any functional module in the current simulation project can be compared with those of the existing simulation project; when it is determined that the code of the functional module before a certain time point T of the existing simulation project has not changed and the test excitation signal before T has not changed, a time multiplexing mode is configured for the functional module, and the simulation result module of the corresponding functional module before T in the aforementioned existing simulation project is reused; when it is determined that the code of the functional module has not changed and the applied test excitation signal has not changed relative to the existing simulation project, a space multiplexing mode is configured for the functional module, and the simulation result module of the corresponding functional module in the aforementioned existing simulation project in the entire simulation verification process is reused.

[0073] For other technical features, please refer to the previous embodiments and will not be described in detail here.

[0074] The present invention also provides a collaborative simulation system for chip simulation verification, including the following structure.

[0075] The collaborative simulation platform is used to construct a collaborative simulation project database, wherein the collaborative simulation project database includes simulation verification information of one or more existing simulation projects.

[0076] A simulation verification user terminal that is communicatively connected to the collaborative simulation platform is used to obtain the current simulation project information on the user terminal, and after comparing the function module code to be verified contained in the current simulation project and the test excitation signal applied to each function module with the information of the aforementioned existing simulation project, generate a change list document, wherein the change list document records the modification information of the function module code and the test excitation signal modification information of the current simulation project; and, according to the aforementioned change list document, select reusable information from the simulation verification information of the aforementioned existing simulation project; wherein, code compilation files with the same function module code are reused, and simulation result files with the same function module code and corresponding test excitation signal are reused.

[0077] For other technical features, please refer to the previous embodiments and will not be described in detail here.

[0078] In the above description, the disclosure of the present invention is not intended to limit itself to these aspects. Rather, within the scope of the target protection of the present disclosure, the components can be selectively and operatively combined in any number. In addition, terms such as "include", "encompass" and "have" should be interpreted as inclusive or open by default, rather than exclusive or closed, unless they are explicitly defined to the contrary. All technical, scientific or other terms are consistent with the meanings understood by those skilled in the art, unless they are defined to the contrary. Common terms found in dictionaries should not be interpreted too idealistically or too impractically in the context of relevant technical documents, unless the present disclosure explicitly defines them as such. Any changes and modifications made by a person of ordinary skill in the field of the present invention based on the above disclosure belong to the scope of protection of the claims.

Claims

1. A collaborative simulation method in chip simulation verification, characterized in that Includes steps: Building a collaborative simulation project database, wherein the collaborative simulation project database includes simulation verification information of one or more existing simulation projects; Acquire the current simulation project information, compare the function module code to be verified and the test stimulus signal applied to each function module contained in the current simulation project with the information of the aforementioned existing simulation project, and generate a change list document; the change list document records the modification information of the function module code and the test stimulus signal modification information of the current simulation project; According to the aforementioned change list document, reusable information is selected from the simulation verification information of the aforementioned existing simulation project; wherein, code compilation files with the same function module code are reused, and simulation result files with the same function module code and corresponding test stimulus signals are reused; Among them, for any existing simulation project in the collaborative simulation project database, the simulation result file of the existing simulation project includes simulation result information of all functional modules at different times, and the simulation result file is divided into different simulation result modules according to the functional module information contained in the existing simulation project, and the functional module and the simulation result module are set correspondingly, and the simulation result module is the simulation result of the corresponding functional module in different time periods of the simulation verification process; when selecting reusable information, the reusable functional module and the reusable time period information of the functional module are configured, and the simulation result module of the functional module in the reusable time period is obtained according to the configured reusable time period for reuse; Furthermore, when reusing simulation result files with the same functional module codes and corresponding test excitation signals, a simulation result multiplexing mode is configured according to information about changes in the functional module codes and their corresponding test excitation signals over time, and the simulation result multiplexing mode includes a time multiplexing mode and a space multiplexing mode; for a current simulation project containing multiple functional modules, different functional modules respectively adopt a time multiplexing mode and a space multiplexing mode, thereby forming a mixed multiplexing mode.

2. The method according to claim 1, characterized in that: The functional module is the DUT designed to be tested.

3. The method according to claim 1, characterized in that: The existing simulation projects in the collaborative simulation project database include historical simulation projects that have completed verification in the computer terminal where the current simulation project is located, as well as historical simulation projects that have completed verification in other computer terminals and ongoing simulation projects.

4. The method according to claim 3, characterized in that: The simulation verification information of the existing simulation project includes the function module code information included in the simulation project, the test stimulus signal applied to each function module, the code compilation file of each function module and the simulation result file after the test stimulus is applied to the code of each function module.

5. The method according to claim 1, characterized in that: For any functional module in the current simulation project, compare its code and test stimulus signal with the existing simulation project; When it is determined that the code of the functional module has not changed relative to the existing simulation project before a certain time point T and the test stimulus signal before T has not changed, a time multiplexing mode is configured for the functional module to reuse the simulation result module of the corresponding functional module before T in the aforementioned existing simulation project; when it is determined that the code of the functional module has not changed relative to the existing simulation project and the applied test stimulus signal has not changed, a space multiplexing mode is configured for the functional module to reuse the simulation result module of the corresponding functional module in the aforementioned existing simulation project in the entire simulation verification process.

6. The method according to claim 5, characterized in that The method further includes the following steps: after selecting the reusable information, performing collaborative simulation verification on the current simulation project based on the reusable information. The steps are as follows: Compilation steps: compile the function module code files, recompile the changed code files and simulation testbench files, and reuse the code compilation files of the existing simulation project for the unchanged code files; Simulation step: After the file is compiled, enter the simulation step. Perform a new simulation on the functional modules with newly compiled files whose codes have been changed. Reuse the simulation result modules of the existing projects for the functional modules whose codes have not been changed and the applied test stimulus signals have not been changed. Perform a new simulation on the functional modules whose test stimulus signals have been changed or which have signal interactions with the newly simulated functional modules.

7. A collaborative simulation device for chip simulation verification, characterized in that include: A change list generation module is used to obtain the current simulation project information, compare the function module code to be verified contained in the current simulation project and the test stimulus signal applied to each function module with the information of the existing simulation project in the collaborative simulation project database, and generate a change list document; the change list document records the modification information of the function module code and the test stimulus signal modification information of the current simulation project; the collaborative simulation project database includes simulation verification information of one or more existing simulation projects; A reuse information processing module is used to select reusable information from the simulation verification information of the existing simulation project according to the aforementioned change list document; wherein the code compilation files with the same function module code are reused, and the simulation result files with the same function module code and corresponding test stimulus signals are reused; Among them, for any existing simulation project in the collaborative simulation project database, the simulation result file of the existing simulation project includes simulation result information of all functional modules at different times, and the simulation result file is divided into different simulation result modules according to the functional module information contained in the existing simulation project, and the functional module and the simulation result module are set correspondingly, and the simulation result module is the simulation result of the corresponding functional module in different time periods of the simulation verification process; when selecting reusable information, the reusable functional module and the reusable time period information of the functional module are configured, and the simulation result module of the functional module in the reusable time period is obtained according to the configured reusable time period for reuse; Furthermore, when reusing simulation result files with the same functional module codes and corresponding test excitation signals, a simulation result multiplexing mode is configured according to information about changes in the functional module codes and their corresponding test excitation signals over time, and the simulation result multiplexing mode includes a time multiplexing mode and a space multiplexing mode; for a current simulation project containing multiple functional modules, different functional modules respectively adopt a time multiplexing mode and a space multiplexing mode, thereby forming a mixed multiplexing mode.

8. A collaborative simulation system for chip simulation verification, characterized in that include: A collaborative simulation platform, used to construct a collaborative simulation project database, wherein the collaborative simulation project database includes simulation verification information of one or more existing simulation projects; A simulation verification user terminal connected to the collaborative simulation platform for communication is used to obtain the current simulation project information on the user terminal, and generate a change list document after comparing the function module code to be verified contained in the current simulation project and the test stimulus signal applied to each function module with the information of the aforementioned existing simulation project; the change list document records the modification information of the function module code and the test stimulus signal modification information of the current simulation project; And, according to the aforementioned change list document, reusable information is selected from the simulation verification information of the aforementioned existing simulation project; wherein, the code compilation files with the same functional module codes are reused, and the simulation result files with the same functional module codes and corresponding test stimulus signals are reused; Among them, for any existing simulation project in the collaborative simulation project database, the simulation result file of the existing simulation project includes simulation result information of all functional modules at different times, and the simulation result file is divided into different simulation result modules according to the functional module information contained in the existing simulation project, and the functional module and the simulation result module are set correspondingly, and the simulation result module is the simulation result of the corresponding functional module in different time periods of the simulation verification process; when selecting reusable information, the reusable functional module and the reusable time period information of the functional module are configured, and the simulation result module of the functional module in the reusable time period is obtained according to the configured reusable time period for reuse; Furthermore, when reusing simulation result files with the same functional module codes and corresponding test excitation signals, a simulation result multiplexing mode is configured according to information about changes in the functional module codes and their corresponding test excitation signals over time, and the simulation result multiplexing mode includes a time multiplexing mode and a space multiplexing mode; for a current simulation project containing multiple functional modules, different functional modules respectively adopt a time multiplexing mode and a space multiplexing mode, thereby forming a mixed multiplexing mode.

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