Method, device and terminal for obtaining cpu power data

Abstract

The application provides a method, device and terminal for obtaining CPU power data. The method comprises the following steps: calling a corresponding CPU power model according to an actual architecture of a CPU in an offline mode during running of a terminal with a multi-core CPU, wherein a plurality of CPU power model files are stored in the terminal in advance; and obtaining power data of the CPU in real time according to the CPU power model. The application can obtain CPU power data in real time on processors with different architectures.

Description

Technical Field

[0001] This invention relates to the field of power management technology, and in particular to a method, apparatus and terminal for acquiring CPU power data. Background Technology

[0002] Power management of multi-core processors is a key technology for terminal battery life, and processor power consumption has become a critical indicator affecting terminal battery life. As the main power-consuming component inside the terminal, the CPU (Central Processing Unit) requires real-time power consumption data for dynamic power management.

[0003] In existing power management methods for processors, the processor power data model used to obtain CPU power data can only be applied to a single processor architecture. Furthermore, the accuracy of the obtained power data is related to the specific upper-layer application scenario, and it relies on hardware resources. It has coarse granularity, poor real-time performance, and is not conducive to real-time scheduling of the system. Summary of the Invention

[0004] The method, apparatus, and terminal for acquiring CPU power data provided by this invention can acquire CPU power data in real time on processors with different architectures.

[0005] In a first aspect, the present invention provides a method for obtaining CPU power data, the method comprising:

[0006] During the operation of a terminal with a multi-core CPU, the corresponding CPU power model is invoked offline according to the actual CPU architecture. The terminal has multiple CPU power model files pre-stored.

[0007] Based on the CPU power model, CPU power data is acquired in real time.

[0008] Optionally, before calling the corresponding CPU power model offline according to the actual CPU architecture during operation on a terminal with a multi-core CPU, the method further includes:

[0009] Select a CPU from the list of commonly used CPU architectures;

[0010] Acquire performance events and corresponding CPU power data according to a predetermined cycle;

[0011] Using the number of performance events as input and the corresponding CPU power data as output, a radial basis function (RBF) neural network model is constructed as a CPU power model. The RBF neural network model is trained by setting and optimizing its parameters.

[0012] Store the trained CPU power model as a file;

[0013] Repeat the above steps until the CPU power models for all CPUs in the CPU architecture list are stored in the file.

[0014] Optionally, the performance events include at least: instruction execution events, access to the first-level data cache events, access to the first-level instruction cache events, and branch prediction events.

[0015] Optionally, the three key parameters of the RBF neural network model—the center and variance of the basis functions, and the connection weights between the hidden layer and the output layer—are respectively tuned using the k-means clustering algorithm, the K-nearest neighbor classification method, and the particle swarm optimization method.

[0016] In a second aspect, the present invention provides an apparatus for acquiring CPU power data, the apparatus comprising:

[0017] The calling unit is used to call the corresponding CPU power model offline according to the actual CPU architecture during the operation of a terminal with a multi-core CPU. The terminal has multiple CPU power model files pre-stored.

[0018] The first acquisition unit is configured to acquire CPU power data in real time based on the CPU power model. Optionally, the device further includes:

[0019] The selection unit is used to select a CPU from a list of commonly used CPU architectures;

[0020] The second acquisition unit is used to acquire performance events and corresponding CPU power data according to a predetermined period.

[0021] The model building and training unit is used to construct a radial basis function (RBF) neural network model as a CPU power model by taking the number of performance events as input and the corresponding CPU power data as output. The RBF neural network model is trained by setting and tuning its parameters.

[0022] The storage unit is used to store the trained CPU power model as a file.

[0023] Optionally, the performance events include at least: instruction execution events, access to the first-level data cache events, access to the first-level instruction cache events, and branch prediction events.

[0024] Optionally, the three key parameters of the RBF neural network model—the center and variance of the basis functions, and the connection weights between the hidden layer and the output layer—are respectively tuned using the k-means clustering algorithm, the K-nearest neighbor classification method, and the particle swarm optimization method.

[0025] Thirdly, the present invention provides a terminal, the terminal comprising:

[0026] At least one processor; and

[0027] A memory communicatively connected to the at least one processor; wherein,

[0028] The memory stores instructions that can be executed by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform the method described above for acquiring CPU power data.

[0029] Fourthly, the present invention provides a chip, the chip comprising:

[0030] At least one processor; and

[0031] A memory communicatively connected to the at least one processor; wherein,

[0032] The memory stores instructions that can be executed by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform the method described above for acquiring CPU power data.

[0033] Fifthly, the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions that, when executed by a processor, implement the above-described method for obtaining CPU power data.

[0034] The method, apparatus, and terminal for obtaining CPU power data provided in this embodiment of the invention have multiple CPU power model files pre-stored in the terminal with a multi-core CPU. During the operation of the terminal, the corresponding CPU power model can be called offline according to the actual CPU architecture to obtain CPU power data with granularity at the second level in real time. It can adapt to different architectures and different series of processors at the same time, and is not affected by the specific scenario of the upper layer, with high real-time performance. Attached Figure Description

[0035] Figure 1 This is a flowchart of a method for obtaining CPU power data according to an embodiment of the present invention;

[0036] Figure 2 This is a flowchart of a method for obtaining CPU power data according to another embodiment of the present invention;

[0037] Figure 3 This is a schematic diagram of a device for acquiring CPU power data according to an embodiment of the present invention;

[0038] Figure 4 This is a schematic diagram of a device for acquiring CPU power data according to another embodiment of the present invention. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] This invention provides a method for obtaining CPU power data, which is applied to a terminal, such as... Figure 1 As shown, the method includes:

[0041] S11. During the operation of a terminal with a multi-core CPU, the corresponding CPU power model is called offline according to the actual CPU architecture, wherein multiple CPU power model files are pre-stored in the terminal.

[0042] S12. Based on the CPU power model, obtain the CPU power data in real time.

[0043] The method for obtaining CPU power data provided in this embodiment of the invention has multiple CPU power model files pre-stored in the terminal with a multi-core CPU. During the operation of the terminal, the corresponding CPU power model can be called offline according to the actual CPU architecture to obtain CPU power data with granularity at the second level in real time. It can adapt to different architectures and different series of processors at the same time, and is not affected by the specific scenario of the upper layer, with high real-time performance.

[0044] The method for obtaining CPU power data according to the present invention will be described in detail below with reference to specific embodiments.

[0045] like Figure 2 As shown, the method for obtaining CPU power data provided in this embodiment includes:

[0046] S21. Select a CPU from the list of commonly used CPU architectures (such as Cortex-A55).

[0047] S22. Obtain performance events and corresponding CPU power data according to a predetermined cycle.

[0048] Preferably, performance events and corresponding CPU power data can be acquired at 500ms intervals to obtain CPU power data with a granularity at the second level.

[0049] Specifically, performance events can be obtained using the perf tools. Among these, the four performance events most correlated with power consumption are selected: instruction execution events, L1 data cache access events, L1 instruction cache access events, and branch prediction events.

[0050] Specifically, CPU power data can be obtained through a precision current source.

[0051] S23. Using the number of performance events as input and the corresponding CPU power data as output, construct an RBF (Radial Basis Function) neural network model as the CPU power model, and complete the training of the RBF neural network model by setting and optimizing the parameters (including the number of hidden layer nodes, etc.).

[0052] The three key parameters of the RBF neural network model—the center and variance of the basis functions, and the connection weights between the hidden layers and the output layer—were tuned using K-means clustering, KNN (K-Nearest Neighbors) classification, and PSO (Particle Swarm Optimization) methods, respectively; the fitness function for PSO was the root mean square error function.

[0053] S24. Store the trained CPU power model as a file for offline selection and optimization.

[0054] S25. Determine whether the CPU power model construction for all architectures in the list has been completed. If yes, proceed to steps S26-S27; otherwise, return to step S21, select another CPU architecture, and proceed to steps S22-S25.

[0055] S26. During the operation of a terminal with a multi-core CPU, the corresponding CPU power model is called offline from multiple stored CPU power model files according to the actual CPU architecture.

[0056] S27. Based on the CPU power model, obtain the CPU power data in real time.

[0057] The method for obtaining CPU power data provided in this invention allows users or OEMs to use a pre-set script on the terminal. The entire process does not require connecting to hardware instruments for measurement. By establishing a mapping model between the number of hardware events recorded by the performance counters of different CPU architectures and power data, the actual power of the CPU can be accurately estimated without being affected by the specific upper-layer scenario. It is compatible with various common CPU architectures, and has high real-time performance and fine granularity.

[0058] This invention also provides a device for acquiring CPU power data, the device being located in a terminal, such as... Figure 3 As shown, the device includes:

[0059] Calling unit 11 is used to call the corresponding CPU power model offline according to the actual CPU architecture during the operation of a terminal with a multi-core CPU, wherein the terminal has multiple CPU power model files pre-stored.

[0060] The first acquisition unit 12 is used to acquire CPU power data in real time according to the CPU power model.

[0061] The device for acquiring CPU power data provided in this embodiment of the invention has multiple CPU power model files pre-stored in the terminal with a multi-core CPU. During the operation of the terminal, the corresponding CPU power model can be called offline according to the actual CPU architecture to acquire CPU power data with granularity at the second level in real time. It can adapt to different architectures and different series of processors at the same time, and is not affected by the specific scenario of the upper layer, with high real-time performance.

[0062] Furthermore, such as Figure 4 As shown, the device further includes:

[0063] Selection unit 13 is used to select a CPU from a list of commonly used CPU architectures;

[0064] The second acquisition unit 14 is used to acquire performance events and corresponding CPU power data according to a predetermined period.

[0065] The model building and training unit 15 is used to construct a radial basis function (RBF) neural network model as a CPU power model by taking the number of performance events as input and the corresponding CPU power data as output, and to complete the training of the RBF neural network model by setting and optimizing the parameters of the RBF neural network model.

[0066] Storage unit 16 is used to store the trained CPU power model as a file.

[0067] Optionally, the performance events include at least: instruction execution events, access to the first-level data cache events, access to the first-level instruction cache events, and branch prediction events.

[0068] Optionally, the three key parameters of the RBF neural network model—the center and variance of the basis functions, and the connection weights between the hidden layer and the output layer—are respectively tuned using the k-means clustering algorithm, the K-nearest neighbor classification method, and the particle swarm optimization method.

[0069] The apparatus in this embodiment can be used to execute the technical solutions of the above method embodiments. Its implementation principle and technical effects are similar, and will not be repeated here.

[0070] This invention also provides a terminal, the terminal comprising:

[0071] At least one processor; and

[0072] A memory communicatively connected to the at least one processor; wherein,

[0073] The memory stores instructions that can be executed by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform the method described above for acquiring CPU power data.

[0074] This invention also provides a chip, the chip comprising:

[0075] At least one processor; and

[0076] A memory communicatively connected to the at least one processor; wherein,

[0077] The memory stores instructions that can be executed by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform the method described above for acquiring CPU power data.

[0078] This invention also provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, which, when executed by a processor, implement the above-described method for obtaining CPU power data.

[0079] Those skilled in the art will understand that all or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0080] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method of obtaining CPU power data, characterized by, The method comprises: During the running of a terminal with a multi-core CPU, a corresponding CPU power model is called offline according to the actual architecture of the CPU, wherein a plurality of CPU power model files are pre-stored in the terminal; Power data of the CPU is acquired in real time according to the CPU power model; Before the calling of the corresponding CPU power model offline according to the actual architecture of the CPU during the running of the terminal with the multi-core CPU, the method further comprises: selecting a CPU from a list of commonly used CPU architectures; acquiring performance events and corresponding CPU power data at a predetermined period; constructing a radial basis function (RBF) neural network model as a CPU power model by taking the number of performance events as input and corresponding CPU power data as output, and completing the training of the RBF neural network model through parameter setting and optimization of the RBF neural network model; storing the trained CPU power model in a file; repeating the above operations until the CPU power models corresponding to all CPUs in the list of CPU architectures are stored in files.

2. The method of claim 1, wherein, The performance events at least include instruction execution events, access to level one data cache events, access to level one instruction cache events, and branch prediction events.

3. The method according to claim 1 or 2, characterized in that, The three key parameters of the RBF neural network model, i.e., the center of the basis function, the variance, and the connection weight between the hidden layer and the output layer, are respectively optimized using a k-means clustering algorithm method, a K-nearest neighbor classification method, and a particle swarm optimization method.

4. An apparatus for obtaining CPU power data, characterized by The device comprises: a calling unit configured to call a corresponding CPU power model offline according to the actual architecture of the CPU during the running of a terminal with a multi-core CPU, wherein a plurality of CPU power model files are pre-stored in the terminal; a first acquiring unit configured to acquire power data of the CPU in real time according to the CPU power model; The device further comprises: a selecting unit configured to select a CPU from a list of commonly used CPU architectures; a second acquiring unit configured to acquire performance events and corresponding CPU power data at a predetermined period; a model construction and training unit configured to construct a radial basis function (RBF) neural network model as a CPU power model by taking the number of performance events as input and corresponding CPU power data as output, and complete the training of the RBF neural network model through parameter setting and optimization of the RBF neural network model; a storage unit configured to store the trained CPU power model in a file.

5. The apparatus of claim 4, wherein, The performance events at least include instruction execution events, access to level one data cache events, access to level one instruction cache events, and branch prediction events.

6. The apparatus of claim 4 or 5, wherein, The three key parameters of the RBF neural network model, i.e., the center of the basis function, the variance, and the connection weight between the hidden layer and the output layer, are respectively optimized using a k-means clustering algorithm method, a K-nearest neighbor classification method, and a particle swarm optimization method.

7. A terminal, characterized by comprising: The terminal comprises: at least one processor; and a memory connected with the at least one processor in communication; wherein The memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1 to 3.

8. A chip, characterized by The chip comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein The memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1 to 3.

9. A computer readable storage medium, wherein, The computer readable storage medium stores computer instructions, the computer instructions being executed by a processor to implement the method of any one of claims 1 to 3.

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