Bayesian optimization based multi-octave power amplifier design method

Abstract

The application discloses a multi-octave power amplifier design method based on Bayesian optimization, constructs a new acquisition function, and uses a Bayesian optimization algorithm to design a multi-octave power amplifier. Through data training, model fitting, prediction point classification, and sampling processes, a set of optimal parameters are obtained as power amplifier coefficients. The application of the method enables the PA to obtain considerable performance in a relatively short optimization time. In the range of 0.6-2.8 GHz, the output power of the power amplifier is greater than 40.3 dBm, the PAE is greater than 62%, and the gain is greater than 10.3 dB. The acquisition function CG-GPUCB is applied to the optimization of the PA circuit for the first time as an acquisition function of the Bayesian optimization algorithm, and the long optimization time is overcome. In a relatively short optimization time, the designed PA has a wider bandwidth under the conditions that the output power, power additional efficiency, gain and the like meet the index requirements.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of radio frequency power amplifier design, and particularly relates to a design method of a multi-octave power amplifier based on a Bayesian optimization algorithm. BACKGROUND

[0002] At present, wireless communication technology is developing towards wide frequency band and multi-carrier. As a key module and main energy-consuming element of a wireless communication system, it is increasingly important to improve the performance of a radio frequency power amplifier. For example, a power amplifier for an indoor wideband wireless communication system is required to have a wide bandwidth, and also to achieve considerable indicators in output power, efficiency, gain, etc. In order to meet the demand of a new communication system for the bandwidth of a power amplifier, researchers have proposed many design methods. For example, a continuous mode power amplifier and a harmonic-tuned power amplifier.

[0003] By applying these technologies, a multi-octave power amplifier has also been successfully designed. However, the structure of the power amplifier designed by using the above method is relatively complex, and a complex structure will make the subsequent optimization process very difficult. Therefore, it is very important to select a suitable optimization method for successfully designing a high-performance wideband power amplifier. At present, automatic circuit optimization processors are widely used in optimization design, such as Advance Design System (ADS). It is undeniable that the optimization effect of the automatic optimizer is satisfactory when optimizing passive circuits such as filters and antennas. However, the optimization time required by the ADS optimizer when optimizing active circuits such as power amplifier circuits is very long, and the optimization result is difficult to achieve the expected effect. SUMMARY

[0004] In view of the deficiencies of the prior art, the application proposes a new acquisition function, i.e., a Bayesian optimization algorithm composed of cluster analysis guided-Gaussian process upper confidence bound (CG-GPUCB), to optimize a power amplifier circuit. On the basis of the original Bayesian optimization algorithm, the acquisition function is improved, so that the optimization time is further shortened, the optimization efficiency is improved, and the bandwidth of the designed power amplifier is obviously improved.

[0005] The design method of the multi-octave power amplifier based on the Bayesian optimization specifically comprises the following steps:

[0006] Step one, obtaining the optimal impedance matching region of the transistor

[0007] In a specific input power and frequency band range, the optimal impedance matching region corresponding to the transistor meeting the performance requirements of output power, power-added efficiency, etc. is obtained.

[0008] Step two, build a bias network, stable network, and impedance matching network constitute the initial power amplifier circuit.

[0009] At a certain frequency, the bias network is designed by 1 / 4 wavelength transmission line, the stable network is built to ensure the normal work of the transistor, and the appropriate impedance matching circuit is designed according to the optimal impedance matching point.

[0010] Step three, the Bayesian optimization algorithm constituted by the CG-UCB as the acquisition function is applied to optimize the initial power amplifier circuit obtained in step two.

[0011] s3.1 obtain training data

[0012] The parameters of the microstrip line in the initial power amplifier circuit are used as the initial input parameters. Sampling is performed near the initial input parameters, a plurality of groups of input parameters are obtained, the plurality of groups of input parameters are sent into ADS, the target function is set, and the target values corresponding to the plurality of groups of input parameters are obtained through simulation. The input parameters and the corresponding target values constitute the training data.

[0013] s3.2 model training

[0014] The probability agent model is used to train and predict the training data obtained in s3.1, the posterior mean and the posterior variance corresponding to each prediction point are calculated, so that the circuit model is fitted.

[0015] As a preferred, the probability agent model is a Gaussian process regression model.

[0016] s3.3 classify and sample the prediction points

[0017] The prediction points obtained in s3.2 are classified by a clustering analysis algorithm, sampling is performed in the optimal prediction set obtained after classification, the input parameters and the prediction values corresponding to the sampling points are obtained. The input parameters corresponding to the sampling points are imported into ADS for circuit simulation, and the actual output values corresponding to the sampling points are obtained. The input parameters and the actual output values corresponding to the sampling points are used to form new training data, which are sent into MATLAB to update the probability agent model.

[0018] s3.4 repeat steps s3.1-s3.3 until the iteration process is completed, and the optimized circuit parameters of the power amplifier are obtained.

[0019] The present application has the following beneficial effects:

[0020] 1. The optimization algorithm constituted by the new acquisition function has further improved the optimization efficiency.

[0021] 2. The effective bandwidth of the power amplifier designed by the method is wider, and the output power, power added efficiency and gain thereof meet the requirements in a multiple frequency range. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 A transistor optimal load impedance matching region map for the embodiment;

[0023] Figure 2 An initial topology map of the power amplifier designed for the embodiment;

[0024] Figure 3 A process optimization diagram of the method for the embodiment;

[0025] Figure 4 Different power amplifier diagrams obtained for the embodiment;

[0026] Figure 5 A comparison diagram of actual test data of different power amplifiers obtained for the embodiment; DETAILED DESCRIPTION

[0027] The application will be further explained in conjunction with the accompanying drawings;

[0028] The multiple frequency power amplifier design based on Bayesian optimization specifically includes the following steps:

[0029] Step 1. Obtain a transistor optimal impedance matching region

[0030] Under the conditions of bias V gs =-2.7V, V ds =28V and input power of 30dBm, the transistor satisfies the output impedance region map of output power greater than 40dBm, power added efficiency greater than 60% and gain greater than 10dB in the frequency range of 0.6GHz-3.0GHz, as shown in Figure 1 .

[0031] Step 2. Build a bias network, a stabilization network and a matching network to form an initial power amplifier circuit.

[0032] In order to realize radio frequency throttling, the bias circuit adopts a 1 / 4 wavelength impedance transformation line, and the center frequency taken is 1.8GHz. Since the transistor cannot be continuously stabilized in the working frequency band, a stabilization network needs to be built. A stabilization network composed of a resistance and a capacitance in parallel is added to the PA, so that the network only has attenuation effect on the low frequency band, and has little effect on the high frequency band. According to the optimal impedance point obtained by traction, a step impedance transformation structure is adopted to design an initial impedance matching network. The bias circuit, the stabilization network and the impedance matching circuit are combined to obtain the initial topology structure of the power amplifier, as shown in Figure 2 .

[0033] Step 3: Optimize the initial PA circuit using a Bayesian optimization algorithm based on CG-CGUCB.

[0034] 3.1 Obtain training data.

[0035] like Figure 3 As shown, the initial values ​​of the microstrip lines in the power amplifier (PA) are used as initial parameters. Then, the Latin hypercube sampling method is used in MATLAB to sample near the initial points to obtain a test set. Fifty sets of data, i.e., 50 sets of microstrip line length and width values, are randomly selected from the test set and imported into ADS. Simulations are then used to obtain the fundamental output power P of power amplifiers with different parameters in the frequency range of 0.6 GHz–3.0 GHz. out The root mean square Y1 and the root mean square Y2 of power-added efficiency (PAE) are obtained. 50 sets of input parameters X and their corresponding objective functions Y are imported into MATLAB as training data.

[0036]

[0037]

[0038]

[0039] Where n is the number of frequency points and f represents the frequency.

[0040] 3.2 Model Training

[0041] The relationship between the objective function Y and the input parameters X is as follows:

[0042]

[0043] It can be viewed as a black-box function. Here, w represents the weight vector, and the superscript T indicates transpose.

[0044] Using Bayes' theorem, the posterior mean and posterior variance are obtained through model training, thereby enabling model prediction.

[0045]

[0046] D 1:t Representing the training data, P(f(x)|D 1:t P(D) represents the posterior probability. 1:t |f(x)) represents the likelihood function, P(f(x)) represents the prior probability, and P(D) represents the probability function. 1:t ) represents the probability of a training data point.

[0047] In this embodiment, Gaussian process regression model is selected as the probability surrogate model. In the prediction of Gaussian process regression model, the key step is to calculate the posterior mean and the posterior variance.

[0048] 3.3 Classification and sampling of the prediction points

[0049] a. The prediction set points obtained in 3.2 are divided into k classes on the μ-σ plane by using the k-means clustering algorithm.

[0050] b. The class in which the point with the largest σ-axis intercept corresponding to the center of each class of data points is located is taken as the best cluster C i *.

[0051] c. Sampling is performed in the best cluster, and the simulation of the sampled points is performed in the ADS. The improved acquisition function CG-GPUCB of this method is shown in formula (6):

[0052]

[0053]

[0054] wherein X t+1 represents the sampling point, μ t (x) represents the mean of the prediction data point, σ t (x) represents the variance of the prediction data point, and β t represents the weighting coefficient.

[0055] 3.4 Repeating 3.1-3.3, after 20 iterations, the circuit parameters of the power amplifier optimized by this method are obtained.

[0056] Step four, the initial power amplifier obtained in step two is respectively optimized by ADS and the Bayesian optimization algorithm composed of EI*PI.

[0057] 4.1 The initial power amplifier circuit is optimized by using the ADS automatic optimization processor. The corresponding working frequency band is set to 0.6-3.0 GHz. The optimization target is that the fundamental output power is greater than 40 dBm and the power added efficiency is greater than 60%.

[0058] 4.2 The initial power amplifier circuit is optimized by using the Bayesian optimization algorithm composed of EI*PI as the acquisition function. In the optimization process, the acquisition function in step 3.3 is changed to EI*PI, and the classification process of the prediction set is omitted. The sampling range of this acquisition function is all the prediction set. The remaining steps are consistent with step three.

[0059] Step five, physical testing and comparative analysis

[0060] The power amplifier is obtained by processing on Rogers RO4350 substrate, and the power amplifier is shown in Fig. Figure 4 (a), (b), (c) and (d) are respectively an initial power amplifier without optimization, a power amplifier designed by using an ADS automatic optimization method, a power amplifier designed by using a Bayesian optimization algorithm with EI*PI as a collection function, and a power amplifier designed by using the method.

[0061] The fundamental output power, power added efficiency and gain of the processed power amplifiers are respectively tested, and the test results are shown in Figs. Figure 5 (a), (b) and (c). Figure 5 It can be known that, compared with the power amplifier designed by using the initial parameters, the optimized power amplifier has obvious improvement in the fundamental output power, power added efficiency and gain. Specifically, the initial power amplifier circuit has an output power of more than 38.8 dBm, a power added efficiency of more than 50.1%, and a gain of more than 8.8 dB in the frequency band of 0.6 GHz-1.8 GHz. The power amplifier processed by using the ADS automatic optimization method has an output power of more than 40.2 dBm, a power added efficiency of more than 60%, and a gain of more than 10.2 dB in the bandwidth of 1.5 GHz. However, the optimization time required by the method is long, and the optimization efficiency is low. As shown in Table 1, the optimization time of the power amplifier designed by using the Bayesian optimization algorithm is obviously shortened compared with the ADS automatic optimization.

[0062]

[0063] Table 1

[0064] Compared with the power amplifier designed by using another Bayesian optimization algorithm with another collection function, the power amplifier designed by using the method has an effective bandwidth widened by 800 MHz, and the optimization time is obviously shortened, which proves that the method is effective for the optimization of the power amplifier circuit, and has good performance.

[0065] The above only describes the preferred embodiments of the present application, and it should be noted that, for those skilled in the art, some improvements and refinements can be made without departing from the concept of the present application, and these improvements and refinements should also be considered as being within the protection scope of the present application.

Claims

1. A multi-octave power amplifier design method based on Bayesian optimization, characterized in that: The method comprises the following steps: The method comprises the following steps: Step one, obtaining training data The parameters of the microstrip line in the initial power amplifier circuit are used as the initial input parameters; sampling is performed near the initial input parameters to obtain multiple sets of input parameters, the multiple sets of input parameters are input into the Advance Design System, a target function is set, and the target values corresponding to the multiple sets of input parameters are obtained through simulation; and the input parameters and the corresponding target values are combined to form training data; The design method of the initial power amplifier circuit comprises the following steps: s1, obtaining the optimal impedance matching region of the transistor Within the required input power and frequency band range, the optimal impedance matching region of the transistor corresponding to the output power and power added efficiency performance requirements is obtained; s2, building a bias network, a stable network, and a matching network to form an initial power amplifier circuit Under the required frequency, a bias network composed of a 1 / 4 wavelength transmission line is designed, a stable network is built, and a matching circuit is designed according to the optimal impedance matching point; Step two, model training The training data in step one are trained using a probabilistic surrogate model to obtain a prediction point corresponding to each set of input parameters; the posterior mean and the posterior variance corresponding to each prediction point are calculated to fit the circuit model; Step three, classifying and sampling the prediction points The prediction points obtained in step two are classified by a clustering analysis algorithm, sampling is performed in the optimal prediction set obtained after classification to obtain input parameters and prediction values corresponding to the sampling points; the input parameters corresponding to the sampling points are input into ADS for circuit simulation to obtain actual output values corresponding to the sampling points; and the input parameters and the actual output values corresponding to the sampling points are combined to form new training data which is input into MATLAB to update the probabilistic surrogate model; Step four, repeating steps one to three until the iteration process is completed to obtain the optimized circuit parameters of the power amplifier.

2. The Bayesian optimization based multi-octave power amplifier design method of claim 1, wherein: The probabilistic surrogate model is a Gaussian process regression model.

3. The Bayesian optimization based multi-octave power amplifier design method of claim 1, wherein: The clustering analysis algorithm is a k-means clustering algorithm, which divides the prediction points into k classes in the mean-variance plane, and the class with the largest intercept of the variance axis of the centroid of the prediction points in each class is regarded as the optimal prediction set.

4. The Bayesian optimization based multi-octave power amplifier design method of claim 1, wherein: The method designs a multi-octave power amplifier with a bandwidth of 0.6-2.8 GHz.

5. The multi-octave power amplifier design method based on Bayesian optimization according to claim 1, wherein: The condition for obtaining the optimal impedance matching region is set as: the input frequency is 0.6-3.0 GHz, the bias condition is Vgs=-2.7v and Vds=28v, and the input power is 30dBm.

6. The multi-octave power amplifier design method based on Bayesian optimization of any one of claims 1-5, wherein: The transistor used in the power amplifier is a 10 W GaN HEMT transistor.

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