A chip power supply circuit test structure, test method and test system

Abstract

The present invention provides a chip power supply circuit test structure and test method, and a test system, wherein the test structure includes an adapter board, a power load board, and a control board. The adapter board is plug-connected to the power supply circuit of the chip to be tested. The power load board is plug-connected to the adapter board, and the power supply circuit of the chip to be tested transmits the test signal to the power load board through the adapter board; a power device and an acquisition circuit are provided on the power load board. The control board is electrically connected to the power load board, and a drive control circuit and a receiving and processing circuit are provided on the control board. The drive control circuit is used to generate a drive control signal, and the drive control signal is used to control the power load board to work according to the test signal. The receiving and processing circuit is electrically connected to the acquisition circuit to receive the test signal collected by the acquisition circuit and process the signal. The test load power and dynamic current extraction performance are improved, and the volume of the test tool is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a chip power supply circuit test structure, a test method and a test system. Background Art

[0002] With the development of science and technology, the market has higher and higher performance requirements for processor chips, and as a result, the number of transistors integrated in the processor is getting larger and larger, and the clock frequency is getting higher and higher, resulting in increasing power consumption of the processor and faster dynamic current switching rate. The power supply circuit testing tools for processor chips currently on the market can only test the power supply current characteristics of conventional low-power processor chips, and only meet the test scenarios for low-power processor chips. For the test scenarios of the power supply circuit characteristics of high-performance processor chips, the test tools currently on the market all test the power supply circuit characteristics through pad and lead welding. However, due to their poor dynamic current extraction performance, large size, and low power density, the existing test tools are far from meeting the requirements for testing the power supply circuit characteristics of high-performance processor chips. Summary of the invention

[0003] The present invention provides a chip power supply circuit test structure, a test method and a test system to effectively improve the test load power and dynamic current extraction performance, so that the test requirements for the power supply circuit characteristics of high-power processor chips can be met, while greatly reducing the size of the test tool.

[0004] In the first aspect, the present invention provides a chip power supply circuit test structure, which includes an adapter board, a power load board and a control board. Among them, the adapter board is plug-connected with the power supply circuit of the chip to be tested. The power load board is plug-connected with the adapter board, and the power supply circuit of the chip to be tested transmits the test signal to the power load board through the adapter board; the power load board is provided with a power device composed of MOS tubes to simulate the chip power consumption scenario, and a collection circuit for collecting the test signal. The control board is electrically connected to the power load board, and a drive control circuit and a receiving processing circuit are provided on the control board. The drive control circuit is used to generate a drive control signal, and the drive control signal is used to control the power load board to work according to the test signal. The receiving processing circuit is electrically connected to the collection circuit to receive the test signal collected by the collection circuit and process the test signal.

[0005] In the above scheme, by adopting the design idea of ​​combining the power load board, the control board and the adapter board into a system, it can be flexibly configured to meet the requirements of testing the power supply circuits of different chips to test the power supply circuit characteristics of high-power chips, and can evaluate the power supply scheme of high-power chips, thereby ensuring that the power supply scheme meets the power supply requirements of the chip with high power consumption and high dynamic current switching rate. Thereby effectively improving the test load power and dynamic current extraction performance, so that it meets the power supply circuit characteristic test requirements for high-power processor chips. In addition, the power supply circuit of the chip to be tested is plugged into the adapter board, and the power load board is plugged into the adapter board, without the need to use the lead and pad welding method in the existing test tools, thereby greatly reducing the size of the test tools.

[0006] In a specific embodiment, the signal to be tested includes the power supply voltage of the power supply circuit of the chip to be tested. The acquisition circuit is used to collect the power supply voltage on the power load board and transmit the power supply voltage to the receiving and processing circuit. The receiving and processing circuit includes: a peak-to-peak value calculation circuit and a judgment circuit; wherein the peak-to-peak value calculation circuit is used to calculate the peak-to-peak value of the power supply voltage according to the received power supply voltage; and the judgment circuit is used to judge whether the peak-to-peak value of the power supply voltage is less than a set threshold. Through this test structure, it is convenient to detect whether the peak-to-peak value of the power supply voltage output by the power supply circuit of the chip to be tested is less than the set threshold, thereby verifying whether the power supply voltage output by the power supply circuit of the chip to be tested meets the design requirements.

[0007] In a specific embodiment, the signal to be tested also includes a power management protocol interface signal of the power supply circuit of the chip to be tested. A power supply unit and a voltage regulator are provided in the power supply circuit of the chip to be tested, wherein the voltage regulator is used to generate a power management protocol interface signal to adjust the power supply voltage output by the power supply unit. The acquisition circuit is also used to acquire the power management protocol interface signal and feed back the power management protocol interface signal to the receiving and processing circuit. The judgment circuit is also used to judge whether the way in which the power management protocol interface signal adjusts the power supply unit achieves the set effect based on the power management protocol interface signal and the power supply voltage. The quality of different serial power management protocol interfaces can be verified by simply changing the program code of the control board, and the signal quality test of the power management protocol interface of the processor chip can be realized, which is convenient for flexible configuration and further improves the function of the test tool.

[0008] In a specific embodiment, the adapter board is provided with a first interface socket and a second interface socket formed by ball grid array packaging, grid array packaging or pin grid array packaging; wherein the first interface socket is plug-connected with the power supply circuit of the chip to be tested, and the second interface socket is plug-connected with the power load board. The adapter board and the power supply circuit of the chip to be tested and the power load board are connected through a universal interface socket, which is convenient for plug-in and replacement.

[0009] In a specific embodiment, the test structure also includes a heat sink thermally connected to the power load board. A temperature sampling sensor for collecting the temperature of the power load board is also provided on the power load board. A temperature regulating circuit is also provided on the control board. The temperature regulating circuit is electrically connected to the temperature sampling sensor and the heat sink to monitor the temperature of the power load board and adjust the heat sink according to the temperature of the power load board. By integrating the design concept of the heat sink, the heat dissipation capacity of the test structure is improved, and its power density and heat dissipation capacity are greatly enhanced.

[0010] In a specific embodiment, the temperature regulating circuit is also electrically connected to the power device so as to shut off the current supplying the power device when the temperature of the power load board reaches the temperature protection threshold, thereby preventing the test tool from being damaged due to overheating.

[0011] In a specific implementation, the radiator is a radiator fan and / or a water-cooled radiator, and the heat dissipation capacity is greatly improved by integrating the design concept of fan heat dissipation and water-cooled heat dissipation.

[0012] In a specific implementation, a FPGA / MCU controller is provided on the control board, and the drive control circuit and the receiving processing circuit are integrated in the FPGA / MCU controller, so as to facilitate the integration of different types of control and computing circuits on the control board.

[0013] In a specific implementation, the temperature regulation circuit is also integrated into the FPGA / MCU controller to improve the integration of circuit devices on the control board.

[0014] In a specific implementation, the MOS tube is a power MOS tube, so as to simulate the power consumption scenario of the chip more realistically.

[0015] In the second aspect, the present invention also provides a chip power supply circuit test system, which includes: a power supply circuit of a chip to be tested, a test structure of any of the above-mentioned chip power supply circuits, and a host computer. The control board is connected to the host computer in communication to transmit the signal to be tested to the host computer. By adopting the design idea of ​​combining the power load board, the control board, and the adapter board into a system, it can be flexibly configured to meet the requirements of testing the power supply circuits of different chips to test the power supply circuit characteristics of high-power chips, and can evaluate the power supply scheme of high-power chips, thereby ensuring that the power supply scheme meets the power supply requirements of high power consumption and high dynamic current switching rate of the chip. Thereby effectively improving the test load power and dynamic current extraction performance, so that it meets the power supply circuit characteristic test requirements for high-power processor chips. And the power supply circuit of the chip to be tested is plugged into the adapter board, and the power load board is plugged into the adapter board, without the need to use the lead and pad welding method in the existing test tool, thereby greatly reducing the volume of the test tool.

[0016] In a specific implementation, a USB controller is provided on the control board, and a USB interface of the USB controller is communicatively connected with a host computer, so as to realize information exchange between the host computer and the control board.

[0017] In the third aspect, the present invention also provides a chip power supply circuit testing method based on any one of the above-mentioned chip power supply circuit testing structures, and the chip power supply circuit testing method includes: the power supply circuit of the chip to be tested transmits the test signal to the power load board; the driving control circuit generates a driving control signal to control the power load board to work according to the test signal; the acquisition circuit acquires the test signal and transmits the acquired test signal to the receiving and processing circuit; the receiving and processing circuit receives the test signal acquired by the acquisition circuit and processes the test signal.

[0018] In the above scheme, by adopting the design idea of ​​combining the power load board, the control board and the adapter board into a system, it can be flexibly configured to meet the requirements of testing the power supply circuits of different chips to test the power supply circuit characteristics of high-power chips, and can evaluate the power supply scheme of high-power chips, thereby ensuring that the power supply scheme meets the power supply requirements of the chip with high power consumption and high dynamic current switching rate. Thereby effectively improving the test load power and dynamic current extraction performance, so that it meets the power supply circuit characteristic test requirements for high-power processor chips. In addition, the power supply circuit of the chip to be tested is plugged into the adapter board, and the power load board is plugged into the adapter board, without the need to use the lead and pad welding method in the existing test tools, thereby greatly reducing the size of the test tools.

[0019] In a specific embodiment, the signal to be tested includes the power supply voltage of the power supply circuit of the chip to be tested. The receiving and processing circuit includes a peak-to-peak value calculation circuit and a judgment circuit. The power supply circuit of the chip to be tested transmits the signal to be tested to the power load board, including: the power supply circuit of the chip to be tested outputs the power supply voltage to the power load board. The acquisition circuit acquires the signal to be tested, and transmits the acquired signal to be tested to the receiving and processing circuit, including: the acquisition circuit acquires the power supply voltage on the power load board, and transmits the power supply voltage to the receiving and processing circuit. The receiving and processing circuit receives the signal to be tested acquired by the acquisition circuit, and processes the signal to be tested, including: the peak-to-peak value calculation circuit calculates the peak-to-peak value of the power supply voltage according to the received power supply voltage; the judgment circuit is used to judge whether the peak-to-peak value is less than the set threshold. Through this test structure, it is convenient to detect whether the peak-to-peak value of the power supply voltage output by the power supply circuit of the chip to be tested is less than the set threshold, so as to verify whether the power supply voltage output by the power supply circuit of the chip to be tested meets the design requirements.

[0020] In a specific embodiment, the signal to be tested also includes a power management protocol interface signal of the power supply circuit of the chip to be tested; and a power supply unit and a voltage regulator are provided in the power supply circuit of the chip to be tested, wherein the voltage regulator is used to generate a power management protocol interface signal to adjust the power supply voltage output by the power supply unit. The power supply circuit of the chip to be tested transmits the signal to be tested to the power load board, and further includes: the power supply circuit of the chip to be tested transmits the power management protocol interface signal to the power load board. The acquisition circuit acquires the signal to be tested, and transmits the acquired signal to be tested to the receiving and processing circuit, and further includes: the acquisition circuit acquires the power management protocol interface signal, and feeds back the power management protocol interface signal to the receiving and processing circuit. The receiving and processing circuit receives the signal to be tested acquired by the acquisition circuit, and processes the signal to be tested, and further includes: the judgment circuit also judges whether the way the power management protocol interface signal adjusts the power supply unit according to the power management protocol interface signal and the power supply voltage achieves the set effect. The quality verification of different serial power management protocol interfaces can be performed by simply changing the program code of the control board, and the signal quality test of the power management protocol interface of the processor chip can be realized, which is convenient for flexible configuration and further improves the function of the test tool.

[0021] In a specific embodiment, the chip power supply circuit test structure also includes a heat sink thermally connected to the power load board; the power load board is also provided with a temperature sampling sensor for collecting the temperature of the power load board; the control board is also provided with a temperature regulating circuit; the temperature regulating circuit is electrically connected to the temperature sampling sensor and the heat sink. The test method also includes: while the drive control circuit generates a drive control signal to control the power load board to work according to the signal to be tested, the temperature regulating circuit monitors the temperature of the power load board and adjusts the heat sink according to the temperature of the power load board. By integrating the design concept of the heat sink, the heat dissipation capacity of the test structure is improved, and its power density and heat dissipation capacity are greatly enhanced. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of a chip power supply circuit test structure provided by an embodiment of the present invention;

[0023] Figure 2 A schematic diagram of another chip power supply circuit test structure provided by an embodiment of the present invention;

[0024] Figure 3 A flowchart of a chip power supply circuit testing method provided by an embodiment of the present invention.

[0025] Reference numerals:

[0026] 10-Power supply circuit of the chip under test 20-Adapter board 30-Power load board

[0027] 40-control board 50-radiator 60-host computer DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] In order to facilitate understanding of the chip power supply circuit test structure provided by the embodiment of the present invention, the application scenario of the chip power supply circuit test structure provided by the embodiment of the present invention is first described below. The chip power supply circuit test structure is used in the process of testing the power supply circuit of the chip. The chip power supply circuit test structure is described in detail below with reference to the accompanying drawings.

[0030] refer to Figure 1 , the chip power supply circuit test structure provided by the embodiment of the present invention includes an adapter board 20, a power load board 30 and a control board 40. Among them, the adapter board 20 is plug-connected with the power supply circuit 10 of the chip to be tested. The power load board 30 is plug-connected with the adapter board 20, and the power supply circuit 10 of the chip to be tested transmits the test signal to the power load board 30 through the adapter board 20; the power load board 30 is provided with a power device composed of MOS tubes to simulate the chip power consumption scenario, and a collection circuit for collecting the test signal. The control board 40 is electrically connected to the power load board 30, and the control board 40 is provided with a drive control circuit and a receiving processing circuit. The drive control circuit is used to generate a drive control signal, and the drive control signal is used to control the power load board 30 to work according to the test signal. The receiving processing circuit is electrically connected to the collection circuit to receive the test signal collected by the collection circuit and process the test signal.

[0031] In the above scheme, by adopting the design idea of ​​combining the power load board 30, the control board 40, and the adapter board 20 into a system, it can be flexibly configured to meet the requirements of testing the power supply circuits of different chips to test the power supply circuit characteristics of high-power chips, and can evaluate the power supply scheme of high-power chips, thereby ensuring that the power supply scheme meets the power supply requirements of the chip with high power consumption and high dynamic current switching rate. Thereby effectively improving the test load power and dynamic current extraction performance, so that it meets the power supply circuit characteristic test requirements for high-power processor chips. In addition, the power supply circuit 10 of the chip to be tested is plugged into the adapter board 20, and the power load board 30 is plugged into the adapter board 20, without the need to use the lead and pad welding method in the existing test tool, thereby greatly reducing the volume of the test tool. The above structures are described in detail below in conjunction with the accompanying drawings.

[0032] refer to Figure 1 , wherein the chip power supply circuit can provide electrical energy for the normal operation of chips such as but not limited to processor chips, so as to provide test signals such as power supply voltage, power supply circuit, etc. to the power load board 30 through the adapter board 20. The chip power supply circuit mainly includes a power supply unit for generating a power supply voltage, and a voltage transmission path and a current transmission path formed by wiring and vias. Of course, a voltage regulator for adjusting the power supply voltage of the power supply unit can also be provided on the chip power supply circuit. The voltage regulator adjusts the power supply voltage output by the power supply unit by generating a power management protocol interface signal, thereby adjusting the power supply voltage output by the chip power supply circuit to different voltage values. The chip power supply circuit can be a power supply circuit on the mainboard of the server, or it can be a separate power module circuit. The chip power supply circuit includes a circuit structure formed by specific electronic devices, and also includes a circuit board carrying these electronic devices.

[0033] When setting the adapter board 20 and the power load board 30, the power load board 30 serves as a carrier of the power device, and a power device composed of a MOS tube is integrated thereon to simulate the power consumption scenario of the chip. The MOS tube is used as a high-power consumption component to replace the power consumption scenario of chips such as processor chips. An acquisition circuit for collecting the signal to be tested can also be integrated on the power load board 30, and the acquisition circuit can be specifically set according to different signals to be tested. For example, when the signal to be tested is the power supply current and power supply voltage of the chip, the acquisition circuit may include a resistance circuit for collecting the current flowing through the power device. The resistance circuit can be composed of precision resistors or other types of resistance devices. The acquisition circuit can also include a voltage acquisition circuit for collecting the power supply voltage on the power load board 30. Of course, when the signal to be tested is other types of signals, the acquisition circuit can be adjusted accordingly to collect the corresponding signal. Reference Figure 1 The adapter board 20 is a circuit adapter structure, which is mainly used to transmit the test signal of the power supply circuit 10 of the chip to be tested to the power load board 30, so that the power output by the chip power supply circuit can be transmitted to the power load board 30 through the adapter board 20. When determining the type of MOS tube, the MOS tube can be a power MOS tube to simulate the power consumption scenario of the chip more realistically. Of course, other types of MOS tubes besides power MOS tubes can also be used.

[0034] When connecting the chip power supply circuit, the adapter board 20 and the power load board 30, the adapter board 20 and the chip power supply circuit are plug-connected, and the power load board 30 and the adapter board 20 are also plug-connected, so that signal transmission is performed between the chip power supply circuit and the power load board 30, and there is no need to use the lead and pad welding method in the existing test tool, so that the volume of the test tool can be greatly reduced. When specifically implementing the plug-in connection between the chip power supply circuit and the adapter board 20, a first interface socket and a second interface socket formed by ball grid array packaging, grid array packaging or pin grid array packaging can be provided on the adapter board 20, that is, the two interface sockets can be specifically formed by any type of interface sockets formed by ball grid array packaging, grid array packaging or pin grid array packaging. Afterwards, the adapter board 20 is plug-connected with the chip power supply circuit 10 to be tested through the first interface socket, that is, an interface socket that can be plugged and matched with the first interface socket is also provided on the chip power supply circuit to be tested, so as to realize the plug-in connection between the adapter board 20 and the chip power supply circuit 10 to be tested. The adapter board 20 is plug-connected with the power load board 30 through the second interface socket, that is, the power load board 30 is also provided with an interface socket that can be plugged and matched with the second interface socket to realize the plug-in connection between the adapter board 20 and the power load board 30. The adapter board 20, the power supply circuit 10 of the chip to be tested, and the power load board 30 are connected through a universal interface socket, which is convenient for plug-in and replacement. It should be understood that in addition to the above-mentioned method, other methods can also be used to realize the plug-in connection between the adapter board 20 and the chip power supply circuit and the power load board 30.

[0035] When setting the control board 40, refer to Figure 1, the control board 40 serves as the control center of the entire device, and is electrically connected to the power load board 30, and the control board 40 can also be indirectly electrically connected to the chip power supply circuit through the power load board 30 and the adapter board 20. A drive control circuit and a receiving processing circuit are arranged on the control board 40. The drive control circuit is used to generate a drive control signal, which can control the power load board 30 to work according to the signal to be tested, so as to simulate the power consumption scenario of chips such as processor chips and other types of chips to work according to the application environment of the signal to be tested. The receiving processing circuit is electrically connected to the acquisition circuit to receive the signal to be tested collected by the acquisition circuit and process the signal to be tested. In the specific setting, an FPGA or MCU controller can be arranged on the control board 40, and the drive control circuit and the receiving processing circuit are integrated in the FPGA or MCU controller, so as to integrate different types of control and calculation circuits on the control board 40. That is, the FPGA or MCU controller is used to generate a driving control signal for adjusting the power load board 30 to control the power load board 30 to work according to the signal to be tested, so as to simulate the power consumption scenario of chips such as processor chips and other types of chips to work according to the application environment of the signal to be tested. The FPGA or MCU controller is also used to receive the test signal from the power supply circuit 10 of the chip to be tested collected by the acquisition circuit from the power load board 30, and process the collected test signal as test data. The FPGA or MCU controller can also output these test data and the processing results formed by the processing to the external host computer 60 for display. Of course, other electronic devices can also be set on the control board 40. For example, refer to Figure 1 A controller that is in communication with the host computer 60 may be provided on the control board 40. Specifically, the controller may be a USB controller. The USB interface of the USB controller is in communication with the host computer 60 to facilitate information exchange between the host computer 60 and the control board 40. Unit circuits such as an A / D converter (analog-to-digital converter), a D / A converter (digital-to-analog converter), and an operational amplifier may also be provided on the control board 40.

[0036] Below, for different types of signals to be tested, their specific structures are further described respectively. For example, the signal to be tested may include the power supply voltage of the power supply circuit 10 of the chip to be tested. At this time, the power supply circuit 10 of the chip to be tested supplies power to the power load board 30 with a constant power supply voltage value, and collects the size change of the power supply voltage actually output to the power load board 30 through the acquisition circuit, and transmits it to the receiving and processing circuit of the control board to verify whether the ripple characteristics of the power supply voltage output by the power supply circuit 10 of the chip to be tested meet the design requirements. Specifically, the receiving and processing circuit may include a peak-to-peak value calculation circuit and a judgment circuit. The peak-to-peak value calculation circuit can calculate the peak-to-peak value of the power supply voltage according to the power supply voltage received from the acquisition circuit. The judgment circuit judges whether the peak-to-peak value of the power supply voltage is less than the set threshold. If the peak-to-peak value of the power supply voltage is less than the set threshold, it means that the ripple characteristics of the power supply voltage output by the power supply circuit 10 of the chip to be tested can meet the design requirements. Otherwise, the ripple characteristics of the power supply voltage output by the power supply circuit 10 of the chip to be tested cannot meet the design requirements.

[0037] In addition, the acquisition circuit can also include the resistance circuit shown above to collect the current size flowing through the power device. And the resistance circuit is also electrically connected to the receiving processing circuit to feed back the current size data flowing through the power device to the receiving processing circuit. After the receiving processing circuit receives the current size data flowing through the power device collected from the acquisition circuit, the receiving processing circuit can process the received current size data flowing through the power device to form the driving voltage reference value of the power device. By testing the power supply voltage and power supply current of the chip power supply circuit 10 to be tested, the driving voltage reference value of the chip is obtained. In addition, the control board 40 can also simultaneously collect the current size data flowing through the power device collected by the acquisition circuit to test the change of the power supply current flowing through the power load board 30, and can also transmit the data of the power supply current flowing through the power load board 30 to the host computer 60, which is displayed by the host computer 60.

[0038] Furthermore, the signal to be tested may further include a power management protocol interface signal of the power supply circuit 10 of the chip to be tested, so as to test the quality of the power management protocol interface signal using the test structure shown above. As mentioned above, a power supply unit and a voltage regulator are provided in the power supply circuit 10 of the chip to be tested, wherein the voltage regulator can generate a power management protocol interface signal to adjust the power supply voltage output by the power supply unit. At this time, the signal to be tested transmitted by the power supply circuit 10 of the chip to be tested to the power load board 30 also includes a power management protocol interface signal. The acquisition circuit also acquires the power management protocol interface signal and feeds back the power management protocol interface signal to the receiving and processing circuit. The judgment circuit can also be enabled to judge whether the way the power management protocol interface signal adjusts the power supply unit achieves the set effect based on the power management protocol interface signal and the power supply voltage. For example, it is detected whether the power supply voltage changes according to the power supply voltage value indicated in the voltage management protocol interface signal, and the change delay, etc. The above setting method can verify the quality of different serial power management protocol interfaces simply by changing the program code of the control board 40, and realize the signal quality test of the power management protocol interface of the processor chip, which is convenient for flexible configuration and further improves the function of the test tool.

[0039] In addition, refer to Figure 2 , a heat sink 50 connected to the power load board 30 can also be provided on the power load board 30, and the power load board 30 is cooled by the heat sink 50, so that the heat generated by the power load board 30 during the test process can be quickly exported to the air, thereby reducing the temperature of the power load board 30. The heat dissipation capacity of the heat sink 50 can cover the TDP index (the power dissipation allowed under the heat dissipation design conditions) of the processor chip. Specifically, the heat sink 50 can be a heat sink 50 fan, or a water-cooled heat sink 50, and the heat sink 50 fan and the water-cooled heat sink 50 can also be integrated at the same time, so as to integrate the design ideas of fan heat dissipation and water-cooled heat dissipation, so that the heat dissipation capacity is greatly improved. A temperature regulating circuit can also be further provided on the control board 40, so that the temperature regulating circuit is electrically connected to the heat sink 50 to adjust the heat sink 50. The temperature regulating circuit can also be integrated in the FPGA or MCU controller to improve the integration of circuit devices on the control board 40. The temperature regulating circuit can adopt different control methods according to different types of heat sinks 50. For example, when the radiator 50 uses the radiator 50 fan as an air cooling mode, the temperature control circuit can control the motor speed of the radiator 50 fan. According to different expected temperatures, different motor speeds correspond to different motor speeds, so that the heat dissipation capacity changes with the change of temperature, while achieving the purpose of energy saving and noise control.

[0040] At this time, a temperature sampling sensor for collecting the temperature of the power load board 30 can also be provided on the power load board 30 to collect the temperature on the power load board 30 in real time. The temperature regulating circuit can also be electrically connected to the temperature sampling sensor. After collecting the temperature of the power load board 30, the temperature sampling sensor can transmit it to the control board 40 in real time to realize the temperature monitoring of the power load board 30. The temperature regulating circuit can adjust the radiator 50 according to the temperature of the power load board 30. For example, when the temperature regulating circuit is integrated into the FPGA or MCU controller, the FPGA or MCU controller processes the temperature information after receiving it to adjust the speed of the radiator 50 fan or the flow rate and flow rate of the water-cooled medium of the water-cooled radiator 50. Through the design concept of integrating the radiator 50, the heat dissipation capacity of the test structure is improved, and its power density and heat dissipation capacity are greatly enhanced.

[0041] In addition, the temperature regulating circuit can be electrically connected to the power device so that when the temperature of the power load board 30 reaches the temperature protection threshold, the current supplied to the power device is turned off to prevent the test tool from being damaged due to overheating. For example, when the temperature regulating circuit is integrated into an FPGA or MCU controller, when the temperature of the power load board 30 reaches the temperature protection threshold, the FPGA or MCU controller can turn off the current supplied to the power device on the power load board 30 to protect the test tool from being damaged due to overheating.

[0042] By adopting the design concept of combining the power load board 30, the control board 40, and the adapter board 20 into a system, it can be flexibly configured to meet the requirements of testing the power supply circuits of different chips to test the power supply circuit characteristics of high-power chips, and can evaluate the power supply scheme of high-power chips, thereby ensuring that the power supply scheme meets the power supply requirements of the chip with high power consumption and high dynamic current switching rate. Thereby effectively improving the test load power and dynamic current extraction performance, so that it meets the power supply circuit characteristic test requirements for high-power processor chips. In addition, the power supply circuit 10 of the chip to be tested is plugged into the adapter board 20, and the power load board 30 is plugged into the adapter board 20, without the need to use the lead and pad welding method in the existing test tool, thereby greatly reducing the volume of the test tool.

[0043] In addition, the embodiment of the present invention also provides a chip power supply circuit testing system, referring to Figure 1, the test system includes: a power supply circuit 10 of the chip to be tested, any one of the above chip power supply circuit test structures, and a host computer 60. The control board 40 is connected to the host computer 60 in communication to transmit the test signal to the host computer 60. By adopting the design idea of ​​combining the power load board 30, the control board 40, and the adapter board 20 into a system, it can be flexibly configured to meet the requirements of testing the power supply circuits of different chips to test the power supply circuit characteristics of high-power chips, and can evaluate the power supply scheme of high-power chips, thereby ensuring that the power supply scheme meets the power supply requirements of the chip with high power consumption and high dynamic current switching rate. Thereby effectively improving the test load power and dynamic current extraction performance, so that it meets the power supply circuit characteristic test requirements for high-power processor chips. And the power supply circuit 10 of the chip to be tested is plugged into the adapter board 20, and the power load board 30 is plugged into the adapter board 20, without the need to use the lead and pad welding method in the existing test tool, thereby greatly reducing the volume of the test tool.

[0044] When the communication connection between the control board 40 and the host computer 60 is specifically implemented, a USB controller may be provided on the control board 40, and a USB interface of the USB controller may be communicatively connected with the host computer 60, so as to realize information exchange between the host computer 60 and the control board 40. Of course, other methods may also be used to realize information exchange between the control board 40 and the host computer 60.

[0045] For the specific setting method and working method of the chip power supply circuit test structure, please refer to the above description of the test structure part, which will not be repeated here.

[0046] In addition, an embodiment of the present invention further provides a chip power supply circuit testing method based on any one of the above chip power supply circuit testing structures, referring to Figure 1 and Figure 3 , the chip power supply circuit testing method includes:

[0047] S10: The chip power supply circuit 10 to be tested transmits a signal to be tested to the power load board 30;

[0048] S20: the driving control circuit generates a driving control signal to control the power load board 30 to work according to the signal to be tested;

[0049] S30: the acquisition circuit acquires the signal to be tested, and transmits the acquired signal to be tested to the receiving and processing circuit;

[0050] S40: The receiving and processing circuit receives the signal to be tested collected by the collecting circuit, and processes the signal to be tested.

[0051] In the above scheme, by adopting the design idea of ​​combining the power load board 30, the control board 40, and the adapter board 20 into a system, it can be flexibly configured to meet the requirements of testing the power supply circuits of different chips to test the power supply circuit characteristics of high-power chips, and can evaluate the power supply scheme of high-power chips, thereby ensuring that the power supply scheme meets the power supply requirements of high power consumption and high dynamic current switching rate of the chip. Thereby effectively improving the test load power and dynamic current extraction performance, so that it meets the power supply circuit characteristic test requirements for high-power processor chips. In addition, the power supply circuit 10 of the chip to be tested is plugged into the adapter board 20, and the power load board 30 is plugged into the adapter board 20, without the need to use the lead and pad welding method in the existing test tool, thereby greatly reducing the volume of the test tool. The following is a detailed introduction to each step in conjunction with the test structure shown above.

[0052] The signal to be tested may include the power supply voltage of the power supply circuit 10 of the chip to be tested. As described above in the test structure part, the receiving processing circuit may include a peak-to-peak value calculation circuit and a judgment circuit. At this time, the signal to be tested transmitted by the power supply circuit 10 of the chip to be tested to the power load board 30 includes the power supply voltage, that is, the power supply circuit 10 of the chip to be tested outputs the power supply voltage to the power load board 30. The acquisition circuit acquires the signal to be tested and transmits the acquired signal to the receiving processing circuit specifically as follows: the acquisition circuit acquires the power supply voltage on the power load board 30 and transmits the power supply voltage to the receiving processing circuit. The receiving processing circuit receives the signal to be tested acquired by the acquisition circuit and processes the signal to be tested specifically as follows: the peak-to-peak value calculation circuit calculates the peak-to-peak value of the power supply voltage according to the received power supply voltage; the judgment circuit is used to judge whether the peak-to-peak value is less than the set threshold. Through this test structure, it is convenient to detect whether the peak-to-peak value of the power supply voltage output by the power supply circuit 10 of the chip to be tested is less than the set threshold, thereby verifying whether the power supply voltage output by the power supply circuit 10 of the chip to be tested meets the design requirements. The specific test method refers to the above description of the test structure part, which will not be repeated here.

[0053] In addition, the signal to be tested may also include a power management protocol interface signal of the chip to be tested. At this time, as described in the test structure part shown above, a power supply unit and a voltage regulator are provided in the power supply circuit 10 of the chip to be tested, and the voltage regulator can generate a power management protocol interface signal to adjust the power supply voltage output by the power supply unit. The power supply circuit 10 of the chip to be tested transmits the signal to be tested to the power load board 30, and also includes: the power supply circuit 10 of the chip to be tested transmits the power management protocol interface signal to the power load board 30. The acquisition circuit acquires the signal to be tested, and transmits the acquired signal to be tested to the receiving and processing circuit, and may further include: the acquisition circuit acquires the power management protocol interface signal, and feeds back the power management protocol interface signal to the receiving and processing circuit. The receiving and processing circuit receives the signal to be tested acquired by the acquisition circuit, and processes the signal to be tested, and may further include: the judgment circuit also judges whether the way the power management protocol interface signal adjusts the power supply unit according to the power management protocol interface signal and the power supply voltage achieves the set effect. The specific operation method refers to the aforementioned description of the test structure part, which will not be repeated here. The above test method can verify the quality of different serial power management protocol interfaces by simply changing the program code of the control board 40, and realize the signal quality test of the power management protocol interface of the processor chip, which is convenient for flexible configuration and further improves the function of the test tool.

[0054] Furthermore, as described in the previous test structure section, reference Figure 2 , the chip power supply circuit test structure may further include a heat sink 50 thermally connected to the power load board 30, the power load board 30 may also be provided with a temperature sampling sensor for collecting the temperature of the power load board 30, the control board 40 may also be provided with a temperature regulating circuit, and the temperature regulating circuit is electrically connected to the temperature sampling sensor and the heat sink 50. While the drive control circuit generates a drive control signal to control the power load board 30 to work according to the signal to be tested, the temperature regulating circuit can also monitor the temperature of the power load board 30 and adjust the heat sink 50 according to the temperature of the power load board 30. By integrating the design concept of the heat sink 50, the heat dissipation capacity of the test structure is improved, and its power density and heat dissipation capacity are greatly enhanced. For specific details about the settings and working methods of the heat sink 50, the temperature sampling sensor and the temperature regulating circuit, refer to the description of the aforementioned test structure part, which will not be repeated here.

[0055] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A chip power supply circuit test structure, characterized in that: include: An adapter board plugged into and connected to the power supply circuit of the chip to be tested; A power load board plugged and connected to the adapter board, through which the power supply circuit of the chip to be tested transmits the signal to be tested to the power load board; the power load board is provided with a power device composed of MOS tubes to simulate the power consumption scenario of the chip, and a collection circuit for collecting the signal to be tested; A control board electrically connected to the power load board, wherein a drive control circuit and a receiving processing circuit are provided on the control board; wherein the drive control circuit is used to generate a drive control signal for controlling the power load board to work according to the signal to be measured; the receiving processing circuit is electrically connected to the acquisition circuit to receive the signal to be measured acquired by the acquisition circuit and process the signal to be measured; and a controller for communication connection with a host computer is provided on the control board; The receiving and processing circuit includes: a judgment circuit; the signal to be tested includes a power management protocol interface signal of the power supply circuit of the chip to be tested; The power supply circuit of the chip under test is provided with a power supply unit and a voltage regulator, and the voltage regulator is used to generate the power management protocol interface signal to adjust the power supply voltage output by the power supply unit; The acquisition circuit is also used to acquire the power management protocol interface signal and feed back the power management protocol interface signal to the receiving and processing circuit; The judgment circuit is also used to judge whether the way in which the power management protocol interface signal regulates the power supply unit achieves a set effect based on the power management protocol interface signal and the power supply voltage.

2. The chip power supply circuit test structure according to claim 1, characterized in that: The signal to be tested also includes a power supply voltage of a power supply circuit of the chip to be tested; The acquisition circuit is used to acquire the power supply voltage on the power load board and transmit the power supply voltage to the receiving and processing circuit; The receiving processing circuit also includes: a peak-to-peak value calculation circuit; Wherein, the peak-to-peak value calculation circuit is used to calculate the peak-to-peak value of the power supply voltage according to the received power supply voltage; The judgment circuit is also used to judge whether the peak-to-peak value is less than a set threshold.

3. The chip power supply circuit test structure according to claim 1, characterized in that: The adapter board is provided with a first interface socket and a second interface socket formed by ball grid array packaging, grid array packaging or pin grid array packaging; The first interface socket is plug-connected to the power supply circuit of the chip under test, and the second interface socket is plug-connected to the power load board.

4. The chip power supply circuit test structure according to claim 1, characterized in that: Also includes: A heat sink thermally connected to the power load board; The power load board is also provided with a temperature sampling sensor for collecting the temperature of the power load board; The control board is also provided with a temperature regulating circuit; the temperature regulating circuit is electrically connected to the temperature sampling sensor and the heat sink to monitor the temperature of the power load board and regulate the heat sink according to the temperature of the power load board.

5. The chip power supply circuit test structure as claimed in claim 4, characterized in that: The temperature regulating circuit is also electrically connected to the power device so as to shut off the current supplying power to the power device when the temperature of the power load board reaches a temperature protection threshold.

6. The chip power supply circuit test structure according to claim 4, characterized in that: The radiator is a radiator fan and / or a water-cooled radiator.

7. The chip power supply circuit test structure according to claim 1, characterized in that: The control board is provided with an FPGA / MCU controller, and the drive control circuit and the receiving processing circuit are both integrated in the FPGA / MCU controller.

8. The chip power supply circuit test structure according to claim 1, characterized in that: The MOS tube is a power MOS tube.

9. A chip power supply circuit testing system, characterized in that: include: Power supply circuit of the chip under test; The test structure of the chip power supply circuit according to any one of claims 1 to 8; The control board is communicatively connected with the host computer to transmit the signal to be tested to the host computer.

10. A chip power supply circuit testing method based on the chip power supply circuit testing structure according to any one of claims 1 to 8, characterized in that: include: The power supply circuit of the chip under test transmits the signal under test to the power load board; The drive control circuit generates a drive control signal to control the power load board to work according to the signal to be measured; The acquisition circuit acquires the signal to be tested, and transmits the acquired signal to be tested to the receiving and processing circuit; The receiving and processing circuit receives the signal to be tested collected by the collecting circuit, and processes the signal to be tested.

11. The chip power supply circuit testing method according to claim 10, characterized in that: The signal to be tested includes the power supply voltage of the power supply circuit of the chip to be tested; the receiving processing circuit includes a peak-to-peak value calculation circuit and a judgment circuit; The power supply circuit of the chip under test transmitting the signal under test to the power load board comprises: the power supply circuit of the chip under test outputting a power supply voltage to the power load board; The acquisition circuit acquires the signal to be tested and transmits the acquired signal to be tested to the receiving and processing circuit, including: the acquisition circuit acquires the power supply voltage on the power load board and transmits the power supply voltage to the receiving and processing circuit; The receiving and processing circuit receives the signal to be tested collected by the collecting circuit, and processes the signal to be tested, including: The peak-to-peak value calculation circuit calculates the peak-to-peak value of the power supply voltage according to the received power supply voltage; The judgment circuit is used to judge whether the peak-to-peak value is less than a set threshold.

12. The chip power supply circuit testing method according to claim 11, characterized in that: The signal to be tested also includes a power management protocol interface signal of the power supply circuit of the chip to be tested; and a power supply unit and a voltage regulator are provided in the power supply circuit of the chip to be tested, and the voltage regulator is used to generate the power management protocol interface signal to adjust the power supply voltage output by the power supply unit; The power supply circuit of the chip under test transmitting the signal under test to the power load board also includes: the power supply circuit of the chip under test transmitting the power management protocol interface signal to the power load board; The acquisition circuit acquires the signal to be tested and transmits the acquired signal to be tested to the receiving and processing circuit, and further includes: the acquisition circuit acquires the power management protocol interface signal and feeds back the power management protocol interface signal to the receiving and processing circuit; The receiving and processing circuit receives the signal to be tested collected by the collection circuit, and processes the signal to be tested, further comprising: The judgment circuit also judges whether the way in which the power management protocol interface signal regulates the power supply unit achieves a set effect based on the power management protocol interface signal and the power supply voltage.

13. The chip power supply circuit testing method according to claim 10, characterized in that: The chip power supply circuit test structure also includes a heat sink thermally connected to the power load board; the power load board is also provided with a temperature sampling sensor for collecting the temperature of the power load board; the control board is also provided with a temperature regulating circuit; the temperature regulating circuit is electrically connected to the temperature sampling sensor and the heat sink; the test method also includes: While the drive control circuit generates a drive control signal to control the power load board to work according to the signal to be measured, the temperature adjustment circuit monitors the temperature of the power load board and adjusts the heat sink according to the temperature of the power load board.

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