Semiconductor device manufacturing method and semiconductor device

Abstract

The present application relates to a method for preparing a semiconductor device and a semiconductor device. The method for preparing the semiconductor device comprises: forming an epitaxial layer on the surface of a substrate, forming a first oxide layer on the side of the epitaxial layer facing away from the substrate; forming a doped region in the epitaxial layer; performing pre-diffusion in a high-temperature furnace, the pre-diffusion temperature being 950°C-1050°C; removing part of the first oxide layer and organic matter remaining on the surface of the first oxide layer by means of acid bleaching; performing re-diffusion in a high-temperature furnace, the re-diffusion temperature being 800°C-900°C, and forming a sacrificial layer on the side of the first oxide layer facing away from the substrate; removing the sacrificial layer, part of the first oxide layer and organic matter remaining on the surface of the first oxide layer by means of acid bleaching. The present application grows a relatively loose sacrificial layer under low temperature conditions and removes the sacrificial layer and part of the first oxide layer, so that the produced semiconductor device has a smaller leakage characteristic.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and in particular to a method for preparing a semiconductor device and a semiconductor device. Background Art

[0002] Currently, with the increasing popularity of electronic products in daily life and the reduction in device size and increase in density in electronic products, saving power consumption has become one of the main challenges.

[0003] During the fabrication of semiconductor devices, the semiconductor substrate needs to be doped to form an N-type or P-type semiconductor. During the preparation of the source and drain regions, after the doped regions are formed by methods such as ion implantation, a dense oxide layer is typically formed through methods such as high-temperature diffusion. This also allows impurities to diffuse into the oxide layer, making it difficult to remove the impurities. This increases the leakage current of the semiconductor device, thereby increasing the power consumption of the electronic device and hindering energy conservation. Furthermore, during the oxide layer removal step, each oxide layer needs to be peeled off step by step, making the semiconductor device fabrication process cumbersome. Summary of the Invention

[0004] The present application aims to provide a method for preparing a semiconductor device and a semiconductor device, so as to solve the problems of leakage and complicated process of the semiconductor device.

[0005] In a first aspect, an embodiment of the present application provides a method for manufacturing a semiconductor device, comprising: forming an epitaxial layer on a surface of a substrate, and forming a first oxide layer on a side of the epitaxial layer facing away from the substrate;

[0006] forming a doped region in the epitaxial layer;

[0007] Pre-diffusion is carried out in a high temperature furnace at a temperature of 950°C-1050°C;

[0008] Removing part of the first oxide layer and organic matter remaining on the surface of the first oxide layer by acid bleaching;

[0009] Re-diffusion is performed in a high-temperature furnace at a temperature of 800°C-900°C to form a sacrificial layer on the side of the first oxide layer facing away from the substrate;

[0010] The sacrificial layer, part of the first oxide layer and organic matter remaining on the surface of the first oxide layer are removed by acid bleaching.

[0011] The step of performing pre-diffusion in a high-temperature furnace at a pre-diffusion temperature of 950° C.-1050° C. further includes: introducing nitrogen and oxygen into the high-temperature furnace, with a nitrogen flow rate of 10 SLM-15 SLM and an oxygen flow rate of 0.5 SLM-1.5 SLM.

[0012] The pre-diffusion is carried out in a high temperature furnace, wherein the pre-diffusion temperature is 950° C. to 1050° C. and the pre-diffusion time is 30 min to 90 min.

[0013] The step of performing redistribution in a high temperature furnace at a redistribution temperature of 800° C.-900° C. further includes: introducing hydrogen and oxygen into the high temperature furnace, with the ratio of the flow rate of hydrogen to the flow rate of oxygen being 1.5-1.8.

[0014] The re-diffusion is carried out in a high temperature furnace, wherein the re-diffusion temperature is 800° C. to 900° C. and the re-diffusion time is 20 min to 40 min.

[0015] The difference between the thickness of the epitaxial layer in the doped region formed by ion implantation and the thickness of the epitaxial layer in the doped region formed by coating is 0.25um-0.5um.

[0016] The step of forming a doped region in the epitaxial layer further includes: forming a groove in the first oxide layer by etching, and forming a doped region in the groove of the substrate by coating.

[0017] Hydrofluoric acid or deionized water is used to remove part of the first oxide layer and organic matter remaining on the surface of the first oxide layer, and hydrofluoric acid or deionized water is used to remove part of the first oxide layer and organic matter remaining on the surface of the first oxide layer.

[0018] After removing the sacrificial layer, part of the first oxide layer and the organic matter remaining on the surface of the first oxide layer by acid bleaching, the method further includes: growing a metal layer in a vacuum environment with a vacuum degree of E-3Pa and a temperature of 350°C-400°C.

[0019] In a second aspect, an embodiment of the present application further provides a semiconductor device manufactured using the semiconductor device manufacturing method, the semiconductor device comprising: a substrate; an epitaxial layer formed on one side of the substrate; a first oxide layer formed on a side of the epitaxial layer facing away from the substrate; and

[0020] A doped region is formed in the epitaxial layer.

[0021] According to an embodiment of the present application, a method for preparing a semiconductor device and a semiconductor device are provided. In the method for preparing a semiconductor device, pre-diffusion is performed under high temperature conditions (950°C-1050°C), a portion of the first oxide layer and its surface impurities are removed by acid bleaching, a relatively loose sacrificial layer is grown under low temperature conditions (800°C-900°C), and the sacrificial layer is removed and a portion of the first oxide layer and its surface impurities are stripped by acid bleaching, thereby preventing impurities from diffusing into the first oxide layer under high temperature conditions, thereby achieving the purpose of removing impurities on the surface of the semiconductor device, thereby solving the problem of semiconductor device leakage and reducing the power consumption of the electronic device. In addition, the second acid bleaching not only removes the sacrificial layer but also strips a portion of the first oxide layer and its surface impurities, saving process steps in the preparation of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The features, advantages, and technical effects of exemplary embodiments of the present application will be described below with reference to the accompanying drawings. In the drawings, identical components are denoted by the same reference numerals. The drawings are not drawn to scale and are intended only to illustrate relative positions. Layer thicknesses in certain locations are exaggerated for ease of understanding, and the layer thicknesses depicted in the drawings do not necessarily represent actual layer thickness proportions.

[0023] Figure 1 A flow chart showing a method for preparing a semiconductor device provided by the present application;

[0024] FIG2( a ) is a schematic diagram showing a state of growth of a first oxide layer in a method for manufacturing a semiconductor device provided by the present application;

[0025] FIG2( b ) is a schematic diagram showing a state of a first oxide layer after a single photolithography step in a method for manufacturing a semiconductor device provided by the present application;

[0026] FIG2( c ) is a schematic diagram showing a state after pre-diffusion of a method for preparing a semiconductor device provided by the present application;

[0027] FIG2( d ) is a schematic diagram showing a state after a single acid bleaching step in a method for preparing a semiconductor device provided by the present application;

[0028] FIG2( e ) is a schematic diagram showing a state after re-diffusion in a method for manufacturing a semiconductor device provided by the present application;

[0029] FIG2( f ) is a schematic diagram showing a state after secondary acid bleaching in a method for preparing a semiconductor device provided by the present application;

[0030] FIG2( g ) is a schematic diagram showing a state of push-in of a layer doping region in a method for manufacturing a semiconductor device provided by the present application;

[0031] Figure 3A cross-sectional view of a semiconductor device provided by the present application is shown.

[0032] Description of reference numerals:

[0033] 1. Substrate; 2. Epitaxial layer; 3. Doped region; 4. Metal layer; 5. First oxide layer; 6. Sacrificial layer; 7. Second oxide layer; 8. Potential barrier; 9. Trench. DETAILED DESCRIPTION

[0034] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In the detailed description below, many specific details are set forth in order to provide a comprehensive understanding of the present application. However, it will be apparent to those skilled in the art that the present application can be implemented without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples of the present application. In the accompanying drawings and the following description, at least some of the well-known structures and techniques are not shown in order to avoid unnecessary ambiguity in the present application; and, for clarity, the sizes of regional structures may be exaggerated. In addition, the features, structures, or characteristics described below may be combined in any suitable manner in one or more embodiments.

[0035] The directional words that appear in the following description refer to the directions shown in the figures and do not limit the specific structure of this application. In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "installation" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0036] Semiconductor devices are electronic devices with conductivity between that of good conductors and insulators, which use the special electrical properties of semiconductor materials to perform specific functions.

[0037] As modern power control circuits continue to increase their energy-saving requirements, the switching performance requirements for power rectifier diodes in the circuits are also increasing. Schottky barrier diodes are widely used in low-voltage circuits. Schottky barrier diodes are a majority carrier device that operates by using a metal-semiconductor barrier contact. Compared with ordinary PN structure diodes, this diode has the characteristics of low forward voltage drop and high switching speed.

[0038] The following takes the Schottky barrier diode as an example to illustrate its preparation method and layered structure.

[0039] First embodiment

[0040] Figure 1 A flow chart of a method for preparing a semiconductor device provided in the present application is shown.

[0041] See Figure 1 As shown, an embodiment of the present application provides a method for preparing a semiconductor device, comprising the following steps:

[0042] S001, forming an epitaxial layer 2 on the surface of the substrate 1, and forming a first oxide layer 5 on the side of the epitaxial layer 2 facing away from the substrate 1;

[0043] S002, forming a doped region 3 in the epitaxial layer 2;

[0044] S003. Pre-diffusion is carried out in a high temperature furnace at a temperature of 950°C-1050°C;

[0045] S004, removing part of the first oxide layer 5 and organic matter remaining on the surface of the first oxide layer 5 by acid bleaching;

[0046] S005, performing re-diffusion in a high-temperature furnace at a re-diffusion temperature of 800° C.-900° C., forming a sacrificial layer 6 on the side of the first oxide layer 5 facing away from the substrate 1;

[0047] S006 , removing the sacrificial layer 6 , a portion of the first oxide layer 5 , and organic matter remaining on the surface of the first oxide layer 5 by acid bleaching.

[0048] The method for preparing a semiconductor device comprises pre-diffusion under high temperature conditions (950°C-1050°C), removing a portion of the first oxide layer 5 and impurities on its surface by acid bleaching, growing a relatively loose sacrificial layer 6 under low temperature conditions (800°C-900°C), removing the sacrificial layer 6 and stripping a portion of the first oxide layer 5 and impurities on its surface by acid bleaching, preventing impurities from diffusing into the first oxide layer 5 under high temperature conditions, and achieving the purpose of removing impurities on the surface of the semiconductor device, thereby solving the problem of semiconductor device leakage and reducing the power consumption of the electronic device. In addition, the second acid bleaching not only removes the sacrificial layer 6 but also strips a portion of the first oxide layer 5 and impurities on its surface, thus saving process steps in preparing the semiconductor device.

[0049] Before step S001, cleaning is required. A mixed solution of sulfuric acid and hydrogen peroxide is formed in a ratio of 4:1. The substrate 1 is heated in the mixed solution at a temperature of 110°C-120°C for 10min-20min, and then immersed in a pure water tank for quick drain (QDR) for 10min. During this period, it is necessary to undergo process setting requirements such as spraying, quick drain, overflow and bubbling. After flushing, it is transferred to a diluted hydrofluoric acid tank for acid bleaching for 30s-180s. Hydrofluoric acid and water are mixed in a ratio of 1:50 or 1:100, and then QDR flushing is performed for 10min. After flushing, it enters a centrifugal dryer for drying. The process conditions are 500RPM-200RPM, drying time 8min-10min, hot nitrogen 8L / min-15L / min, during which low-speed spinning, spraying 5L / min-10L / min, high-speed spinning, and hot nitrogen drying are performed.

[0050] FIG2( a ) is a schematic diagram showing the state of the first oxide layer 5 growing in a method for manufacturing a semiconductor device provided by the present application; FIG2( b ) is a schematic diagram showing the state of the first oxide layer 5 after one photolithography step in a method for manufacturing a semiconductor device provided by the present application.

[0051] Please refer to Figure 2 (a) - Figure 2 (b). Before step S001, the field oxidation process is carried out in a high-temperature furnace tube at 1000℃-1100℃ to perform hydrogen-oxygen synthesis oxidation. The ratio of hydrogen flow rate to oxygen flow rate is 1.5-1.8, forming an epitaxial layer 2 on the surface of the substrate 1, and forming a first oxide layer 5 on the side of the epitaxial layer 2 facing away from the substrate 1.

[0052] Epitaxial layer 2, grown on the wafer, ensures wafer thickness and forms the primary region of the fabricated device. The wafer primarily serves as a support layer. During wafer processing, a certain thickness is required to ensure wafer flatness and maintain resistance to deformation after high-temperature diffusion, thereby minimizing lithographic contrast.

[0053] Specifically, the thickness of the epitaxial layer 2 needs to be adjusted according to different processes. For example, the ion implantation process and the CSD source coating process have different concentrations. The concentration of the ion implantation process is relatively low, so the epitaxial layer 2 is appropriately thinner. The concentration of the CSD source coating process is higher, so the thickness of the epitaxial layer 2 needs to be increased to ensure that the voltage parameters of the products made by the two processes are consistent.

[0054] Specifically, the product voltage is 28V-220V, and the thickness of the epitaxial layer 2 is 3.25μm-19μm. Due to the different withstand voltages of different products, the thickness of the epitaxial layer 2 also varies. For products below 100V, the difference in thickness between the epitaxial layer 2 formed by ion implantation and the epitaxial layer 2 formed by coating is 0.25μm-0.5μm.

[0055] The product's withstand voltage is positively correlated with the thickness of the first oxide layer 5. The thicker the first oxide layer 5, the higher the withstand voltage. In this application, the CSD source coating process consumes more than 3000Å ​​of the first oxide layer 5 during acid bleaching, so the loss of the first oxide layer 5 must be taken into account during the design. Therefore, the thickness of the first oxide layer 5 ranges from 1.1um to 2.2um, and the process time is 120min to 660min.

[0056] After step S001, the side of the first oxide layer 5 facing away from the substrate 1 undergoes a photolithography process: the photolithography process includes o-aminophenol (OAP) vapor priming, glue coating, front-side drying, exposure, development, trimming, performing a photolithography metrology process to perform post-development inspection (ADI) of the patterned photoresist layer, back-side drying, etching, and performing an etching metrology process to perform post-etching inspection (AEI) of the transferred pattern.

[0057] After the photolithography process, the process further includes: forming grooves in the first oxide layer 5 by etching, and forming doped regions 3 in the grooves of the substrate 1 by coating.

[0058] The coating is achieved using a coating machine, which can be domestically produced, requiring minimal investment and achieving the same product yield as the ion implantation process. Specifically, the coating utilizes a CSD latex source, which can be produced by domestic manufacturers, further expanding domestic semiconductor supply demand. The CSD latex source is supplied by a local chemical reagent research institute. The film thickness of the CSD latex source is controlled at 5000ű500Å, and the concentration range is 20Ω / mouth to 35Ω / mouth, depending on the product.

[0059] Semiconductor devices are fabricated using a liquid-source spin-coating diffusion doping process (CSD). This doping process offers low cost and high yield, and can achieve the same surface concentration and junction depth as ion implantation doping. Furthermore, Schottky diodes produced using this CSD process and ion implantation have essentially the same electrical parameters, yield, and process repeatability as conventional ion implantation. Furthermore, the CSD process maintains the same upstream and downstream process flows. Conventional ion implantation processes form guard ring structures, requiring high-beam implanters. These equipment are expensive to purchase, complex to maintain, and require a high level of maintenance personnel and spare parts. However, the CSD process achieves low cost and high reliability.

[0060] More specifically, the CSD latex source is a B30 liquid source with a boron dopant, and a spin coating method is used to cover the first oxide layer 5 with a layer of B30 liquid source with a boron dopant, wherein the high speed of the coating machine is set to 1800RPM-3000RPM, the low speed is set to 500RPM-1000RPM, the front and rear hot plate temperatures are set to 100°C, the cold plate temperature is set to 40°C, the content of the drop source is 1.6ml-3ml, the low speed rotation is 6s-15s, and the high speed rotation is 60s-100s. The film thickness of the CSD latex source after film formation is controlled at 4500Å-5500Å, and the environmental control requirements are a temperature of 23°C±2°C and a humidity of 45%±5%.

[0061] In addition, the doping region 3 can be formed by ion implantation, but the ion implantation machine has the following prominent technical barriers: high production cost. Therefore, in this embodiment, the active region is preferably prepared by a coating machine.

[0062] It should be noted that this application has been applied to 6-inch wafer manufacturing, especially to the manufacturing of Schottky product series 25V-205V and switching tube series, etc. The preparation process of the semiconductor device of this application can generate great economic benefits. The cumulative production volume in 2021 reached 250,000 pieces, and the product yield can reach 98.9%.

[0063] FIG2( c ) is a schematic diagram showing a state after pre-diffusion of a method for manufacturing a semiconductor device provided by the present application.

[0064] Please refer to FIG. 2 ( c ), in step S002 , specifically including: introducing nitrogen and oxygen into the high-temperature furnace, with a nitrogen flow rate of 10 SLM-15 SLM, an oxygen flow rate of 0.5 SLM-1.5 SLM, and a pre-diffusion time of 30 min-90 min.

[0065] Specifically, high-temperature diffusion is carried out at a temperature of 950°C-1050°C in the high-temperature furnace tube, the flow rate of nitrogen introduced into the high-temperature furnace tube is 10SLM-15SLM, and the flow rate of oxygen introduced into the high-temperature furnace tube is 0.5SLM-1.5SLM. The pre-diffusion time is set according to product characteristics and process requirements. The process time is 30min-90min. Further, the process time can be set to 60min.

[0066] FIG2( d ) is a schematic diagram showing a state after one acid bleaching step in a method for preparing a semiconductor device provided by the present application.

[0067] Please refer to FIG. 2 ( d ). In the step S003 , in the first acid bleaching step, hydrofluoric acid is used to remove a portion of the first oxide layer 5 and organic matter remaining on the surface of the first oxide layer 5 .

[0068] After the coating source is pre-diffused, an acid bleaching operation is performed. The acid bleaching solution is prepared by using a ratio of hydrofluoric acid to water of 1:20 or 1:50. The acid bleaching time is 5 minutes to 15 minutes, specifically 10 minutes. After the acid bleaching, the film thickness of the first oxide layer 5 is retained at 9000Å to 9500Å. The film then enters the QDR for flushing for 10 minutes. After flushing, the film enters the centrifugal dryer for drying. The process conditions of the centrifugal dryer are 500RPM-2000RPM, the drying time is 8 minutes to 10 minutes, specifically 9 minutes, and the hot nitrogen content introduced is 8L / min-15L / min. During this period, the film undergoes process steps such as low-speed drying, spraying, high-speed drying, and hot nitrogen drying.

[0069] FIG2( e ) is a schematic diagram showing a state after re-diffusion in a method for manufacturing a semiconductor device provided by the present application.

[0070] Referring to FIG. 2( e ), step S004 specifically includes introducing hydrogen and oxygen into the high-temperature furnace, with the hydrogen flow rate to oxygen flow rate ratio being 1.5-1.8. The re-diffusion time is 20-40 minutes. The thickness of the sacrificial layer 6 is 150-300 Å.

[0071] Specifically, low-temperature hydrogen-oxygen synthesis oxidation is carried out in a high-temperature furnace at a temperature of 800°C-900°C, wherein the content ratio of hydrogen to oxygen is 1.5-1.8 and the process time is 20min-40min. In this way, a relatively loose sacrificial layer 6 can be grown under low-temperature conditions, and the thickness of the sacrificial layer 6 is specifically 150Å-300Å.

[0072] FIG2( f ) is a schematic diagram showing a state after secondary acid bleaching in a method for preparing a semiconductor device provided by the present application.

[0073] Please refer to FIG. 2( f ), in step S005 , the sacrificial layer 6 and a portion of the first oxide layer 5 are removed using deionized water.

[0074] Specifically, the sacrificial layer 6 is rinsed away using deionized water with a volume fraction of 2%-5%. While removing the sacrificial layer 6, organic matter such as mask impurities grown on the substrate 1 and the first oxide layer 5 are also completely stripped off, thereby achieving the purpose of removing surface impurities and making the semiconductor device have smaller leakage characteristics.

[0075] It should be noted that the sacrificial layer 6 refers to an oxide layer that is grown and then removed. The function of the sacrificial layer 6 is to completely remove impurities on the surface of the substrate 1, reduce the leakage risk of the semiconductor device, and improve the performance of the semiconductor device.

[0076] FIG2( g ) is a schematic diagram showing a push-in state of the layer doping region 3 in a method for manufacturing a semiconductor device provided by the present application.

[0077] Please refer to FIG2 (g). After the step S005, a step of pushing the doped region 3 is also included. The P+ push-junction is used as an example for explanation. The actual effect of this process is that after the P+ push-junction forms a certain junction depth, a second oxide layer 7 of 4000Å-8000Å is grown in the P+ doped region 3 to protect the semiconductor device. First, a high-temperature push-through is performed in a high-temperature furnace at 1050°C-1100°C. Nitrogen and oxygen are introduced into the furnace during the push-through process, with nitrogen flow rates ranging from 10 SLM to 15 SLM and oxygen flow rates from 0.6 SLM to 1.5 SLM. The push-through process time setting varies depending on the product, ranging from 60 min to 180 min, and specifically 90 min. After the P+ push-through is completed, the oxidation process continues. The temperature in the high-temperature furnace is first lowered to the required oxidation temperature, i.e., 1000°C-1050°C. Hydrogen-oxygen synthesis oxidation is then performed, with the hydrogen and oxygen content ranges from 1.5 to 1.8. The hydrogen-oxygen synthesis oxidation process takes 40 min to 120 min, specifically 80 min. The thickness of the grown second oxide layer 7 ranges from 4000 Å to 8000 Å. After the P+ push-through, the semiconductor device also undergoes lead hole lithography, lead hole etching, cleaning, sputtering, alloying, cleaning, front evaporation, lithography, and etching.

[0078] Following the aforementioned steps, the semiconductor device undergoes a vacuum alloying process. This process is performed at a vacuum level of E-3 Pa, a temperature of 350°C-400°C, and a processing time of 20-60 minutes. The primary function of this vacuum alloying process is to establish a good ohmic contact with the metal layer 4 on the surface of the semiconductor device, thereby reducing the product's forward voltage (Vf). Following this vacuum alloying step, the semiconductor device undergoes thinning, cleaning, backside evaporation, and mid-test scribing before being inspected and stored.

[0079] It should be noted that the above-mentioned high-temperature furnaces are all atmospheric pressure diffusion furnace tubes. Atmospheric pressure diffusion furnace tubes are one of the important process equipment in the front process of semiconductor production lines. They are used for diffusion, oxidation, annealing, alloying and sintering processes in industries such as large-scale integrated circuits, discrete devices, power electronics, optoelectronic devices and optical fibers.

[0080] The process steps not described in detail in the flow are all conventional process steps, such as lead hole lithography, lead hole etching, cleaning, sputtering, alloying, front evaporation, lithography, etching, diffusion, oxidation, annealing, alloying and sintering, etc. The above process steps have been disclosed as prior art and will not be described in detail in this application.

[0081] Second embodiment

[0082] This embodiment provides a semiconductor device fabricated using the aforementioned semiconductor device fabrication method. The semiconductor device comprises: a substrate 1, an epitaxial layer 2, a metal layer 4, a first oxide layer 5, and a second oxide layer 7. Epitaxial layer 2 is formed on one side of substrate 1. The first oxide layer 5 is provided on the side of epitaxial layer 2 facing away from substrate 1. The second oxide layer 7 is provided on the side of the first oxide layer 5 facing away from substrate 1. The metal layer 4 is provided on the side of the second oxide layer 7 facing away from substrate 1. A potential barrier 8 is formed between the metal layer 4 and epitaxial layer 2. Epitaxial layer 2 also has a trench, within which a doped region 3 is located.

[0083] For semiconductor devices formed using the ion implantation process, the substrate 1 thickness is 620 μm, the epitaxial layer 2 thickness is 5.25 μm, and the initial thickness of the first oxide layer 5 is 8,500 Å. For semiconductor devices formed using the CSD coating process, the substrate 1 thickness is 620 μm, the epitaxial layer 2 thickness is 5.6 μm, and the initial thickness of the first oxide layer 5 is 11,000 Å to 13,000 Å. Device manufacturing occurs on the epitaxial layer 2, and the thickness of the epitaxial layer 2 is selected based on experiments to meet product characteristics. The thickness of the first oxide layer 5 produced using the ion implantation process differs from that produced using the CSD coating process. The CSD coating process selects a thickness that meets product design requirements based on the subsequent acid bleaching loss and voltage withstand technical requirements.

[0084] Because there are a large number of electrons in the semiconductor and only a very small number of free electrons in the metal layer 4, electrons diffuse from the high-concentration epitaxial layer 2 to the low-concentration metal layer 4. Obviously, there are no holes in the metal layer 4, and therefore no diffusion movement of holes from the metal layer 4 to the epitaxial layer 2. As electrons continue to diffuse from the epitaxial layer 2 to the noble metal layer 4, the surface electron concentration of the epitaxial layer 2 gradually decreases, and the surface electrical neutrality is destroyed, thus forming a potential barrier 8, whose electric field direction is from the metal layer 4 to the epitaxial layer 2. However, under the action of this electric field, electrons in the metal layer 4 will also drift from the metal layer 4 to the epitaxial layer 2, thereby weakening the electric field formed by the diffusion movement. When a space charge region of a certain width is established, the electron drift movement caused by the electric field and the electron diffusion movement caused by the difference in concentration reach a relative balance, forming a Schottky barrier 8.

[0085] The epitaxial layer 2 may include an N-type epitaxial layer 2 or a P-type epitaxial layer 2. Accordingly, a P+ doping region 3 is provided on the N-type epitaxial layer 2, and an N+ doping region 3 is provided on the P-type epitaxial layer 2. The metal layer 4 is a front metal layer 4, i.e., a positive electrode, and includes titanium / nickel / silver arranged from bottom to top.

[0086] It should be noted that the semiconductor device in this embodiment may also include other layer structures, such as a cathode, etc., which will not be described in detail here.

[0087] The technical solution of the present application can be widely used in the preparation of various semiconductor devices, such as Schottky barrier diodes (SBD), fast recovery diodes (FRD), transient voltage suppressors (TVS), switch diodes, rectifier diodes, light source transistors, thyristor rectifier elements, small signal transistors and other discrete device categories, all of which are applicable to the above solution.

[0088] It should be readily understood that “on,” “above,” and “over” in this application should be interpreted in the broadest manner, such that “on” means not only “directly on something,” but also includes “on something” with intervening features or layers therebetween, and “above” or “over” includes not only the meaning of “above” or “over,” but also includes “above” or “over” with no intervening features or layers therebetween (i.e., directly on something).

[0089] As used herein, the term "layer" may refer to a portion of material comprising an area having a certain thickness. A layer may extend over the entire underlying structure or overlying structure, or may have an extent smaller than that of the underlying or overlying structure. Furthermore, a layer may be a region of a continuous structure, whether homogeneous or inhomogeneous, whose thickness is less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of the continuous structure, or between any pair of lateral planes at the top and bottom surfaces. A layer may extend laterally, vertically, and / or along a tapered surface. A semiconductor device may be a layer, may include one or more layers therein, and / or may have one or more layers located above, above, and / or below it. A layer may include multiple layers. For example, an interconnect layer may include one or more conductors and contact layers (in which contacts, interconnects, and / or vias are formed) and one or more dielectric layers.

[0090] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for preparing a semiconductor device, characterized in that: include: forming an epitaxial layer on a surface of a substrate, and forming a first oxide layer on a side of the epitaxial layer facing away from the substrate; forming a doped region in the epitaxial layer; Pre-diffusion is carried out in a high temperature furnace at a temperature of 950°C-1050°C; Removing part of the first oxide layer and organic matter remaining on the surface of the first oxide layer by acid bleaching; Re-diffusion is performed in a high-temperature furnace at a temperature of 800°C to 900°C for a time of 20 minutes to 40 minutes to form a sacrificial layer on the side of the first oxide layer facing away from the substrate; Removing the sacrificial layer, part of the first oxide layer, and organic matter remaining on the surface of the first oxide layer by acid bleaching; The step of performing redistribution in the high-temperature furnace at a redistribution temperature of 800° C.-900° C. further includes: introducing hydrogen and oxygen into the high-temperature furnace, with the ratio of the flow rate of hydrogen to the flow rate of oxygen being 1.5-1.

8.

2. The method for preparing a semiconductor device according to claim 1, wherein: The step of performing pre-diffusion in the high-temperature furnace at a pre-diffusion temperature of 950° C.-1050° C. further includes: introducing nitrogen and oxygen into the high-temperature furnace, with a nitrogen flow rate of 10 SLM-15 SLM and an oxygen flow rate of 0.5 SLM-1.5 SLM.

3. The method for preparing a semiconductor device according to claim 1 or 2, wherein: The pre-diffusion is carried out in the high-temperature furnace at a temperature of 950° C. to 1050° C. and a time of 30 min to 90 min.

4. The method for preparing a semiconductor device according to claim 1, wherein: The difference between the thickness of the epitaxial layer in the doped region formed by ion implantation and the thickness of the epitaxial layer in the doped region formed by coating is 0.25um-0.5um.

5. The method for preparing a semiconductor device according to claim 1, wherein: The step of forming a doped region in the epitaxial layer further includes: forming a groove in the first oxide layer by etching, and forming a doped region in the groove of the substrate by coating.

6. The method for preparing a semiconductor device according to claim 1, wherein: Hydrofluoric acid or deionized water is used to remove part of the first oxide layer and organic matter remaining on the surface of the first oxide layer, and hydrofluoric acid or deionized water is used to remove part of the first oxide layer and organic matter remaining on the surface of the first oxide layer.

7. The method for preparing a semiconductor device according to claim 1, wherein: After the step of removing the sacrificial layer, part of the first oxide layer and the organic matter remaining on the surface of the first oxide layer by acid bleaching, the method further includes: growing a metal layer in a vacuum environment with a vacuum degree of E-3Pa and a temperature of 350°C-400°C.

8. A semiconductor device manufactured by the method for manufacturing a semiconductor device according to any one of claims 1 to 7, characterized in that: The semiconductor device comprises: substrate; an epitaxial layer formed on one side of the substrate; A first oxide layer is formed on a side of the epitaxial layer facing away from the substrate; and A doped region is formed in the epitaxial layer.

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