Terminal structure and manufacturing method thereof, and semiconductor device

Abstract

The present invention provides a terminal structure and a manufacturing method thereof, and a semiconductor device, wherein the terminal structure is located in a terminal region of a substrate, wherein the substrate further includes a cell region, and the terminal region surrounds the cell region; the terminal structure includes: a VLD voltage divider ring, formed at one end of the terminal region close to the cell region and extending in a direction away from the other end of the cell region, wherein the VLD voltage divider ring includes a plurality of connected doping rings; a trench stop ring, formed at the other end of the terminal region away from the cell region, wherein the trench stop ring and the VLD voltage divider ring are spaced apart by the substrate, and the depth of the trench stop ring is greater than or equal to the depth of the doping ring closest to the trench stop ring. The technical solution of the present invention can reduce the width of the terminal region while preventing the depletion region from being depleted to the scribe path to form a leakage channel.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a terminal structure and a manufacturing method thereof, and a semiconductor device. Background Art

[0002] Among the termination technologies of semiconductor devices, the Variation of Lateral Doping (VLD) termination technology is widely used due to its high termination efficiency. Generally, the termination will use a cutoff ring at the tail to prevent the depletion region from being depleted.

[0003] See also Figure 1 The terminal structure of the semiconductor device is formed in a terminal region A1 in an N-type substrate 11. The N-type substrate 11 also includes a cell region (not shown) surrounded by the terminal region A1. A gate structure 14 is formed in a transition region A2 between the cell region and the terminal region A1. The periphery of the terminal region A1 is a scribe line (not shown). A P-type VLD voltage divider ring 12 is formed in the terminal region A1. The VLD voltage divider ring 12 extends from the transition region A2 toward an end of the terminal region A1 away from the cell region. A P-type cutoff ring 13 is formed at an end of the terminal region A1 away from the cell region to prevent the depletion region 15 formed by the N-type substrate 11 and the P-type VLD voltage divider ring 12 from being depleted. However, since the cut-off ring 13 is formed by ion implantation together with the body region of the cell region (not shown), the junction depth of the cut-off ring 13 is much shallower than the depth of the portion of the VLD voltage divider ring 12 closest to the cut-off ring 13 (for example, the junction depth of the cut-off ring 13 is only about 3 μm), and the cut-off ring 13 can only block the depletion on the surface of the substrate 11, but cannot block the movement of the depletion region 15 inside the substrate 11, thereby causing the depletion region 15 to move from the cut-off ring 13 (such as Figure 1 As shown in the figure, the depletion region 15 passes through the bottom of the depletion region 15 and is depleted to the dicing path, thereby forming a leakage channel; if the formation of the leakage channel is to be avoided, it is necessary to increase the distance between the VLD voltage divider ring 12 and the cut-off ring 13, thereby increasing the distance between the depletion region 15 and the cut-off ring 13 to avoid the formation of the leakage channel, but this will cause the width of the terminal area A1 to increase, thereby increasing the cost.

[0004] Therefore, how to reduce the width of the terminal region while preventing the depletion region from being depleted to the scribe line to form a leakage channel is an urgent problem to be solved. Summary of the invention

[0005] The object of the present invention is to provide a terminal structure and a manufacturing method thereof, and a semiconductor device, which can reduce the width of the terminal region while preventing the depletion region from being depleted to the scribe line to form a leakage channel.

[0006] To achieve the above object, the present invention provides a terminal structure located in a terminal region of a substrate, wherein the substrate further includes a cellular region, and the terminal region surrounds the cellular region; the terminal structure includes:

[0007] A VLD voltage divider ring is formed at one end of the terminal region close to the cell region and extends toward the other end away from the cell region, the VLD voltage divider ring comprising a plurality of connected doping rings;

[0008] A trench stop ring is formed at the other end of the terminal region away from the cell region, the substrate is spaced between the trench stop ring and the VLD voltage divider ring, and the depth of the trench stop ring is greater than or equal to the depth of the doping ring closest to the trench stop ring.

[0009] Optionally, the terminal structure further includes a doped cut-off ring, which is located in the substrate at the bottom and side surfaces of the trench cut-off ring so that the doped cut-off ring surrounds the trench cut-off ring, and the substrate is spaced between the doped cut-off ring and the VLD voltage divider ring.

[0010] Optionally, a gate structure is formed in the cell region, and the gate structure has the same depth as the trench stop ring.

[0011] Optionally, the terminal structure further includes:

[0012] A drift region is formed in the substrate, and the drift region surrounds the VLD voltage divider ring, the trench stop ring and the doping stop ring.

[0013] Optionally, the material of the trench stop ring is doped polysilicon, and the doping concentration of the trench stop ring is greater than the doping concentration of the drift region.

[0014] Optionally, the doping concentration of the doped cut-off ring is greater than the doping concentration of the drift region.

[0015] Optionally, the VLD voltage divider ring has a first conductivity type, and the trench stop ring, the doped stop ring and the drift region have a second conductivity type.

[0016] The present invention also provides a method for manufacturing a terminal structure, wherein the terminal structure is located in a terminal region of a substrate, wherein the substrate further includes a cellular region, and the terminal region surrounds the cellular region; the method for manufacturing the terminal structure comprises:

[0017] Forming a VLD voltage divider ring at one end of the terminal region close to the cell region, and the VLD voltage divider ring extends toward the other end of the terminal region away from the cell region, and the VLD voltage divider ring includes a plurality of connected doping rings;

[0018] A trench stop ring is formed at the other end of the terminal region away from the cell region, the substrate is spaced between the trench stop ring and the VLD voltage divider ring, and the depth of the trench stop ring is greater than or equal to the depth of the doping ring closest to the trench stop ring.

[0019] Optionally, the method for manufacturing the terminal structure further includes:

[0020] A doping stop ring is formed in the substrate at the bottom and side surfaces of the trench stop ring, so that the doping stop ring surrounds the trench stop ring, and the substrate is spaced between the doping stop ring and the VLD voltage divider ring.

[0021] Optionally, the steps of forming the trench stop ring and the doping stop ring include:

[0022] forming a first trench in the substrate at the other end of the terminal region away from the cell region;

[0023] Filling a polysilicon layer containing doped ions in the first trench;

[0024] An annealing process is performed to form the polysilicon layer into the trench stop ring, and to diffuse the doping ions into the substrate at the bottom and side surfaces of the trench stop ring to form the doping stop ring.

[0025] Optionally, while forming the first trench in the substrate of the terminal region away from the other end of the cell region, a second trench is also formed in the substrate of the cell region; and a gate structure is formed in the second trench.

[0026] Optionally, before forming the VLD voltage divider ring at one end of the terminal region close to the cell region, the method for manufacturing the terminal structure further includes:

[0027] A drift region is formed in the substrate, wherein the drift region surrounds the VLD voltage divider ring, the trench stop ring and the doping stop ring.

[0028] Optionally, the doping concentration of the trench stop ring is greater than the doping concentration of the drift region.

[0029] Optionally, the doping concentration of the doped cut-off ring is greater than the doping concentration of the drift region.

[0030] Optionally, the VLD voltage divider ring has a first conductivity type, and the trench stop ring, the doped stop ring and the drift region have a second conductivity type.

[0031] The present invention also provides a semiconductor device, comprising a cell region located in a substrate and a terminal region surrounding the cell region, wherein the terminal region is formed with the terminal structure.

[0032] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0033] 1. The terminal structure of the present invention comprises a VLD voltage divider ring formed at one end of the terminal region close to the cell region and extending toward the other end away from the cell region, wherein the VLD voltage divider ring comprises a plurality of connected doping rings; and a trench stop ring formed at the other end of the terminal region away from the cell region, wherein the substrate is spaced between the trench stop ring and the VLD voltage divider ring, and the trench stop ring is formed by trench filling, wherein the depth of the trench stop ring is greater than or equal to the depth of the doping ring closest to the trench stop ring, so that the depletion region can be prevented from passing through the trench stop ring and being depleted to the dicing path, thereby preventing the formation of a leakage channel; and the distance between the depletion region and the trench stop ring can be reduced, thereby reducing the width of the terminal region and saving costs.

[0034] 2. The manufacturing method of the terminal structure of the present invention comprises the following steps: forming a VLD voltage divider ring at one end of the terminal region close to the cell region, and the VLD voltage divider ring extends toward the other end of the terminal region away from the cell region, and the VLD voltage divider ring includes a plurality of connected doping rings; and forming a trench stop ring at the other end of the terminal region away from the cell region by trench filling, wherein the substrate is spaced between the trench stop ring and the VLD voltage divider ring, and the depth of the trench stop ring is greater than or equal to the depth of the doping ring closest to the trench stop ring, so as to avoid the depletion region passing through the trench stop ring and being depleted to the dicing path, thereby avoiding the formation of a leakage channel; and reducing the distance between the depletion region and the trench stop ring, thereby reducing the width of the terminal region and saving costs.

[0035] 3. The semiconductor device of the present invention comprises a cell region located in a substrate and a terminal region surrounding the cell region, wherein the terminal region is formed with the terminal structure, thereby preventing a leakage channel from being formed in the semiconductor device and reducing the size of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is a schematic diagram of an existing terminal structure;

[0037] Figure 2 is a schematic diagram of a terminal structure according to an embodiment of the present invention;

[0038] Figure 3 is a flow chart of a method for manufacturing a terminal structure according to an embodiment of the present invention;

[0039] Figure 4a to Figure 4h yes Figure 3Schematic diagram of a device in a method of manufacturing a terminal structure shown.

[0040] Among them, Figure 1 to Figure 4h The reference numerals are described as follows:

[0041] 11-substrate; 12-VLD voltage divider ring; 13-cutoff ring; 14-gate structure; 15-depletion region;

[0042] 20-drift region; 21-VLD voltage divider ring; 22-trench stop ring; 221-first trench; 222-polysilicon layer; 23-doped stop ring; 24-insulating dielectric layer; 25-oxide layer; 26-stop ring metal; 27-buffer layer; 28-collector region; 29-collector metal; 30-depletion region; 311-gate oxide layer; 312-gate layer; 313-second trench; 32-source region; 33-conductive plug; 34-emitter metal. DETAILED DESCRIPTION

[0043] In order to make the purpose, advantages and features of the present invention more clear, the terminal structure and its manufacturing method and the semiconductor device proposed by the present invention are further described in detail below. It should be noted that the drawings are all in a very simplified form and are not in precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0044] An embodiment of the present invention provides a terminal structure, which is located in a terminal region of a substrate, wherein the substrate also includes a cellular region, the terminal region surrounds the cellular region, a transition region is between the terminal region and the cellular region, and a scribe line surrounds the periphery of the terminal region; the terminal structure includes: a VLD voltage divider ring, formed at one end of the terminal region close to the cellular region and extending toward the other end away from the cellular region, the VLD voltage divider ring including a plurality of connected doped rings; a trench stop ring, formed at the other end of the terminal region away from the cellular region, the trench stop ring and the VLD voltage divider ring being spaced apart by the substrate, and the depth of the trench stop ring being greater than or equal to the depth of the doped ring closest to the trench stop ring.

[0045] See below Figure 2 The terminal structure of this embodiment is described in more detail. Figure 2 It is a schematic diagram of the longitudinal section of the terminal structure.

[0046] The substrate may be made of any suitable material known to those skilled in the art, such as single crystal silicon, silicon germanium, silicon carbide, etc.

[0047] The VLD (Variation of Lateral Doping) voltage divider ring 21 is formed at one end of the terminal region B1 close to the cell region (not shown), and the VLD voltage divider ring 21 extends toward the other end of the terminal region B1 away from the cell region, and the VLD voltage divider ring 21 surrounds the cell region; the VLD voltage divider ring 21 includes a plurality of connected doping rings (in Figure 2 In the embodiment shown, the number of doped rings is 5).

[0048] A transition region B2 is located between the terminal region B1 and the cell region. The doping ring of the VLD voltage divider ring 21 closest to the cell region may also extend from the terminal region B1 into the transition region B2.

[0049] From one end of the terminal region B1 close to the cell region to the other end far from the cell region, the depths, widths and doping concentrations of the multiple connected doping rings decrease one by one; or, the doping ring closest to the cell region has the deepest depth, the largest width and the largest doping concentration, and the depths, widths and doping concentrations of the other doping rings are the same and are correspondingly smaller than the depth, width and doping concentration of the doping ring closest to the cell region.

[0050] An oxide layer 25 may be formed on the substrate, and a partial thickness of the oxide layer 25 may be located in the substrate; the oxide layer 25 extends from the top of the doped ring closest to the cell region toward a direction away from the cell region, so that the oxide layer 25 covers a portion of the top of the doped ring closest to the cell region and the tops of all other doped rings.

[0051] The trench stop ring 22 is formed at the other end of the terminal area B1 away from the cell area, and the trench stop ring 22 surrounds the VLD voltage divider ring 21; the substrate is spaced between the trench stop ring 22 and the VLD voltage divider ring 21, and the depth of the trench stop ring 22 is greater than or equal to the depth of the doping ring closest to the trench stop ring 22.

[0052] The material of the trench stop ring 22 is doped polysilicon, that is, the trench stop ring 22 is formed by filling the trench with doped polysilicon.

[0053] The terminal structure may further include a doped cut-off ring 23, which is located in the substrate at the bottom and side surfaces of the trench stop ring 22, so that the doped cut-off ring 23 surrounds the trench stop ring 22, and the substrate is spaced between the doped cut-off ring 23 and the VLD voltage divider ring 21. Since the depth of the trench stop ring 22 is greater than or equal to the depth of the doped ring closest to the trench stop ring 22, the depth of the doped cut-off ring 23 is greater than the depth of the doped ring closest to the trench stop ring 22.

[0054] In addition, a gate structure is formed in the transition region B2 and the substrate of the cell region, the depth of the gate structure can be the same as the depth of the trench stop ring 22, and the doping ring closest to the cell region can surround the gate structure in the transition region B2. The gate structure includes a gate oxide layer 311 and a gate layer 312, and the material of the gate layer 312 is polysilicon.

[0055] The width of the trench stop ring 22 is greater than the width of the gate structure. For example, the width of the trench stop ring 22 is 4 μm to 5 μm, and the width of the gate structure is 0.7 μm to 0.9 μm.

[0056] The terminal structure further includes a drift region 20 . The drift region 20 is formed in the substrate. The drift region 20 surrounds the VLD voltage divider ring 21 , the trench stop ring 22 and the doping stop ring 23 .

[0057] The doping concentration of the trench stop ring 22 is greater than the doping concentration of the drift region 20 . If the terminal structure further includes the doping stop ring 23 , the doping concentration of the doping stop ring 23 is preferably also greater than the doping concentration of the drift region 20 .

[0058] The terminal structure may further include: an insulating dielectric layer 24 covering the top surface of the substrate. The insulating dielectric layer 24 extends from the terminal region B1 to the transition region B2; the insulating dielectric layer 24 buries the VLD voltage divider ring 21, the oxide layer 25, the trench stop ring 22, the doping stop ring 23 and the gate structure; a stop ring metal 26 formed on the insulating dielectric layer 24 above the trench stop ring 22, and the stop ring metal 26 is insulated from the trench stop ring 22.

[0059] In addition, a source region 32 is formed on the top of the substrate of the transition region B2 and the cell region; a plurality of conductive plugs 33 are formed in the transition region B2 and at the junction of the transition region B2 and the terminal region B1, and the conductive plugs 33 penetrate the insulating dielectric layer 24 and enter the substrate, and an emitter metal 34 electrically connected to the conductive plug 33 is formed on the insulating dielectric layer 24 of the transition region B2, and the emitter metal 34 is electrically connected to the source region 32 and the doped ring closest to the cell region through the conductive plug 33.

[0060] The terminal structure may further include:

[0061] A buffer layer 27 formed in the substrate at the bottom of the drift region 20;

[0062] A collector region 28 formed in the substrate at the bottom of the buffer layer 27;

[0063] The collector metal 29 is formed on the bottom surface of the substrate.

[0064] The VLD voltage divider ring 21 and the collector region 28 have a first conductivity type, and the substrate, the trench stop ring 22, the doped stop ring 23, the drift region 20, the source region 32 and the buffer layer 27 have a second conductivity type. The first conductivity type is P type, and the second conductivity type is N type; or, the first conductivity type is N type, and the second conductivity type is P type. In the working state, the VLD voltage divider ring 21 with the first conductivity type and the drift region 20 with the second conductivity type form a depletion region 30.

[0065] In summary, in the terminal structure provided by the present invention, since the trench stop ring 22 formed at the other end of the terminal area B1 away from the cell area is included, the trench stop ring 22 is formed by trench filling, and the depth of the trench stop ring 22 is greater than or equal to the depth of the doping ring closest to the trench stop ring 22 in the VLD voltage divider ring 21, so that Figure 1 Compared with the shallow cut-off ring 13 formed by the ion implantation shown in the figure, the depletion region 30 of the present invention can contact the trench cut-off ring 22 before being depleted to the scribe line, so that the depletion region 30 is cut off by the trench cut-off ring 22, avoiding the depletion region 30 passing through the trench cut-off ring 22 and being depleted to the scribe line, thereby avoiding the formation of a leakage channel; and, the distance between the depletion region 30 and the trench cut-off ring 22 can be reduced, thereby reducing the width of the terminal region B1 and saving costs.

[0066] Among them, when the depletion region 30 is depleted to the point of contacting the trench stop ring 22, since the doping concentration of the trench stop ring 22 is greater than the doping concentration of the drift region 20, the doping concentration of the N-type conductive area increases, thereby reducing the width of the depletion region 30, and the depletion region 30 is quickly depleted, that is, the depletion region 30 is cut off by the trench stop ring 22, thereby preventing the depletion region 30 from being depleted to the dicing path.

[0067] Furthermore, if the terminal structure also includes the doped cut-off ring 23, since the depth of the doped cut-off ring 23 is greater than the depth of the doped ring closest to the trench cut-off ring 22, and the doping concentration of the doped cut-off ring 23 is greater than the doping concentration of the drift region 20, the depletion region 30 can contact the doped cut-off ring 23 and the trench cut-off ring 22 before being depleted to the scribe line, and the doping concentration of the N-type conductive region is increased, thereby enabling the trench cut-off ring 22 and the doped cut-off ring 23 to jointly cut off the depletion of the depletion region 30, thereby further improving the cut-off effect.

[0068] An embodiment of the present invention provides a method for manufacturing a terminal structure, wherein the terminal structure is located in a terminal region of a substrate, wherein the substrate further comprises a cell region, wherein the terminal region surrounds the cell region, wherein a transition region is between the terminal region and the cell region, and wherein a scribe line surrounds the periphery of the terminal region; Figure 3 , Figure 3 : is a flow chart of a method for manufacturing a terminal structure according to an embodiment of the present invention, the method for manufacturing a terminal structure comprising:

[0069] Step S1, forming a VLD voltage divider ring at one end of the terminal region close to the cell region, and the VLD voltage divider ring extends toward the other end of the terminal region away from the cell region, and the VLD voltage divider ring includes a plurality of connected doping rings;

[0070] Step S2, forming a trench stop ring at the other end of the terminal region away from the cell region, the substrate being spaced between the trench stop ring and the VLD voltage divider ring, and the depth of the trench stop ring being greater than or equal to the depth of the doping ring closest to the trench stop ring.

[0071] See below Figure 4a to Figure 4h The manufacturing method of the terminal structure provided in this embodiment is described in more detail. Figure 4a to Figure 4h It is also a schematic diagram of the longitudinal section of the terminal structure.

[0072] Follow step S1, refer to Figure 4aA VLD (Variation of Lateral Doping) voltage divider ring 21 is formed at one end of the terminal region B1 close to the cell region (not shown), and the VLD voltage divider ring 21 extends toward the other end of the terminal region B1 away from the cell region, and the VLD voltage divider ring 21 surrounds the cell region; the VLD voltage divider ring 21 includes a plurality of connected doping rings (in Figure 4a In the embodiment shown, the number of doped rings is 5).

[0073] A transition region B2 is located between the terminal region B1 and the cell region. The doping ring of the VLD voltage divider ring 21 closest to the cell region may also extend from the terminal region B1 into the transition region B2.

[0074] From one end of the terminal region B1 close to the cell region to the other end far from the cell region, the depths, widths and doping concentrations of the multiple connected doping rings decrease one by one; or, the doping ring closest to the cell region has the deepest depth, the largest width and the largest doping concentration, and the depths, widths and doping concentrations of the other doping rings are the same and are correspondingly smaller than the depth, width and doping concentration of the doping ring closest to the cell region.

[0075] Taking the doping ring closest to the cell region as an example, the steps of forming the VLD voltage divider ring 21 may include: first, forming a first patterned photoresist layer (not shown) on the substrate, the first patterned photoresist layer having a plurality of ion implantation windows for forming the doping ring, the width of each ion implantation window being the same, performing a first ion implantation to form a plurality of ion implantation regions in the substrate exposed by the ion implantation windows, with gaps between each ion implantation region; then, forming an oxide layer 25 on the substrate, the oxide layer 25 of a partial thickness may be located in the substrate, the oxide layer 25 extending from the ion implantation region farthest from the cell region to the ion implantation region; The oxide layer 25 extends in the direction of the cell region so that the oxide layer 25 covers other ion implantation regions other than the ion implantation region closest to the cell region, and the oxide layer 25 does not cover the ion implantation region closest to the cell region; then, using the oxide layer 25 as a mask, a second ion implantation is performed to the ion implantation region closest to the cell region, so that the doping concentration of the ion implantation region closest to the cell region is greater than the doping concentration of other ion implantation regions; then, an annealing process is performed so that the ions in each ion implantation region are diffused so that adjacent ion implantation regions overlap and connect with each other, thereby correspondingly forming doping rings connected together, and the depth of each doping ring is correspondingly greater than the depth of each ion implantation region. Among them, since the ion implantation region closest to the cell region is also subjected to a second ion implantation, the doping ring closest to the cell region is deeper, wider, and has a greater doping concentration than other doping rings.

[0076] According to step S2, a trench stop ring 22 is formed at the other end of the terminal area B1 away from the cell area, and the trench stop ring 22 surrounds the VLD voltage divider ring 21; the substrate is spaced between the trench stop ring 22 and the VLD voltage divider ring 21, and the depth of the trench stop ring 22 is greater than or equal to the depth of the doping ring closest to the trench stop ring 22.

[0077] The steps of forming the trench stop ring 22 include: first, referring to Figure 4b , forming a first trench 221 in the substrate of the terminal region B1 away from the other end of the cell region; then, referring to Figure 4d , filling the first trench 221 with a polysilicon layer 222 containing doped ions, wherein the polysilicon layer 222 covers the substrate, the oxide layer 25 and the VLD voltage divider ring 21; then, referring to Figure 4e , removing the polysilicon layer 222 above the top surface of the substrate, so that the polysilicon layer 222 in the first trench 221 is formed into the trench stop ring 22 .

[0078] The manufacturing method of the terminal structure may further include: forming a doping stop ring 23 in the substrate on the bottom and side surfaces of the trench stop ring 22, so that the doping stop ring 23 surrounds the trench stop ring 22, and the substrate is spaced between the doping stop ring 23 and the VLD voltage divider ring 21. Since the depth of the trench stop ring 22 is greater than or equal to the depth of the doping ring closest to the trench stop ring 22, the depth of the doping stop ring 23 is greater than the depth of the doping ring closest to the trench stop ring 22.

[0079] If the terminal structure further includes the doped cut-off ring 23, the steps of forming the trench cut-off ring 22 and the doped cut-off ring 23 may include: first, referring to Figure 4b , forming a first trench 221 in the substrate of the terminal region B1 away from the other end of the cell region; then, referring to Figure 4d , filling a polysilicon layer 222 in the first trench 221, wherein the polysilicon layer 222 covers the substrate, the oxide layer 25 and the VLD voltage divider ring 21, and the polysilicon layer 222 contains doping ions; then, referring to Figure 4e , removing the polysilicon layer 222 above the top surface of the substrate, and only retaining the polysilicon layer 222 in the first trench 221; then, referring to Figure 4f , perform an annealing process so that the polysilicon layer 222 in the first trench 221 is formed into the trench stop ring 22, and the doping ions are diffused into the substrate on the bottom and side surfaces of the trench stop ring 22 to form the doping stop ring 23, the doping stop ring 23 surrounds the trench stop ring 22, and the doping stop ring 23 and the VLD voltage divider ring 21 are separated by the substrate. The temperature of the annealing process can be 1100°C to 1200°C, and the time can be 90min to 110min; it should be noted that the temperature and time of the annealing process are not limited to the above ranges, and can be adjusted according to the depth and width requirements of the doping stop ring 23.

[0080] Also, see Figure 4b , while forming the first trench 221 in the substrate of the terminal region B1 away from the other end of the cell region, a second trench 313 may be formed in the transition region B2 and the substrate of the cell region, the first trench 221 and the second trench 313 have the same depth, and the doping ring closest to the cell region may surround the second trench 313 in the transition region B2; see Figure 4c Before filling the polysilicon layer 222 in the first trench 221, a gate oxide layer 311 may be formed on the inner wall of the second trench 313; see Figure 4d and Figure 4e, while filling the polysilicon layer 222 in the first trench 221, the polysilicon layer 222 is also filled in the second trench 313, so that after removing the polysilicon layer 222 above the top surface of the substrate, the polysilicon layer 222 in the second trench 313 is used as the gate layer 312, and then a gate structure is formed in the second trench 313, and the gate structure includes the gate oxide layer 311 and the gate layer 312. Among them, since the first trench 221 and the second trench 313 are formed at the same time, and the polysilicon layer 222 is filled in the first trench 221 and the second trench 313 at the same time, the process steps can be simplified.

[0081] The width of the first groove 221 (ie, the width of the groove stop ring 22) is greater than the width of the second groove 313. For example, the width of the first groove 221 is 4 μm to 5 μm, and the width of the second groove 313 is 0.7 μm to 0.9 μm.

[0082] In addition, before forming the VLD voltage divider ring 21 at one end of the terminal region B1 close to the cell region, the manufacturing method of the terminal structure further includes: referring to Figure 4a , forming a drift region 20 in the substrate, wherein the drift region 20 surrounds the VLD voltage divider ring 21 , the trench stop ring 22 and the doping stop ring 23 .

[0083] The doping concentration of the trench stop ring 22 is greater than the doping concentration of the drift region 20 . If the terminal structure further includes the doping stop ring 23 , the doping concentration of the doping stop ring 23 is preferably also greater than the doping concentration of the drift region 20 .

[0084] Furthermore, the manufacturing method of the terminal structure further comprises: referring to Figure 4g , forming an insulating dielectric layer 24 covering the top surface of the substrate. The insulating dielectric layer 24 extends from the terminal area B1 to the transition area B2; the insulating dielectric layer 24 buries the VLD voltage divider ring 21, the oxide layer 25, the trench stop ring 22, the doping stop ring 23 and the gate structure.

[0085] Also, see Figure 4f After forming the doped cutoff ring 23 and before forming the insulating dielectric layer 24, a source region 32 may be formed in the transition region B2 and the cell region; see Figure 4gAfter forming the insulating dielectric layer 24, a contact hole (not shown) can be formed in the transition region B2 and at the junction of the transition region B2 and the terminal region B1, and metal is filled in the contact hole and the metal covers the insulating dielectric layer 24. After etching the metal, an emitter metal 34 is formed on the insulating dielectric layer 24 in the transition region B2 and a stop ring metal 26 is formed on the insulating dielectric layer 24 above the trench stop ring 22. A conductive plug 33 is formed in the contact hole. The emitter metal 34 is electrically connected to the source region 32 and the doped ring closest to the cell region through the conductive plug 33. The stop ring metal 26 is insulated from the trench stop ring 22.

[0086] Also, see Figure 4h After forming the emitter metal 34 and the stop ring metal 26, the manufacturing method of the terminal structure further includes:

[0087] forming a buffer layer 27 in the substrate at the bottom of the drift region 20;

[0088] forming a collector region 28 in the substrate at the bottom surface of the buffer layer 27;

[0089] A collector metal 29 is formed on the bottom surface of the substrate.

[0090] The VLD voltage divider ring 21 and the collector region 28 have a first conductivity type, and the substrate, the trench stop ring 22, the doped stop ring 23, the drift region 20, the source region 32 and the buffer layer 27 have a second conductivity type. The first conductivity type is P type, and the second conductivity type is N type; or, the first conductivity type is N type, and the second conductivity type is P type. Figure 4h In the working state, the VLD voltage divider ring 21 having the first conductivity type and the drift region 20 having the second conductivity type form a depletion region 30 .

[0091] In summary, in the manufacturing method of the terminal structure provided by the present invention, since the trench stop ring 22 is formed at the other end of the terminal region B1 away from the cell region by trench filling, the depth of the trench stop ring 22 is greater than or equal to the depth of the doping ring closest to the trench stop ring 22 in the VLD voltage divider ring 21, so that Figure 1 Compared with the shallow cut-off ring 13 formed by the ion implantation shown in the figure, the depletion region 30 of the present invention can contact the trench cut-off ring 22 before being depleted to the scribe line, so that the depletion region 30 is cut off by the trench cut-off ring 22, avoiding the depletion region 30 passing through the trench cut-off ring 22 and being depleted to the scribe line, thereby avoiding the formation of a leakage channel; and, the distance between the depletion region 30 and the trench cut-off ring 22 can be reduced, thereby reducing the width of the terminal region B1 and saving costs.

[0092] Among them, when the depletion region 30 is depleted to the point of contacting the trench stop ring 22, since the doping concentration of the trench stop ring 22 is greater than the doping concentration of the drift region 20, the doping concentration of the N-type conductive area increases, thereby reducing the width of the depletion region 30, and the depletion region 30 is quickly depleted, that is, the depletion region 30 is cut off by the trench stop ring 22, thereby preventing the depletion region 30 from being depleted to the dicing path.

[0093] Furthermore, if the terminal structure also includes the doped cut-off ring 23, since the depth of the doped cut-off ring 23 is greater than the depth of the doped ring closest to the trench cut-off ring 22, and the doping concentration of the doped cut-off ring 23 is greater than the doping concentration of the drift region 20, the depletion region 30 can contact the doped cut-off ring 23 and the trench cut-off ring 22 before being depleted to the scribe line, and the doping concentration of the N-type conductive region is increased, thereby enabling the trench cut-off ring 22 and the doped cut-off ring 23 to jointly cut off the depletion of the depletion region 30, thereby further improving the cut-off effect.

[0094] An embodiment of the present invention provides a semiconductor device, including a cell region located in a substrate and a terminal region surrounding the cell region, wherein a scribe line surrounds the terminal region; and the terminal region is formed with the terminal structure.

[0095] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A terminal structure, located in a terminal region of a substrate, wherein the substrate further comprises a cell region, and the terminal region surrounds the cell region; characterized in that: The terminal structure comprises: A VLD voltage divider ring is formed at one end of the terminal region close to the cell region and extends toward the other end away from the cell region, the VLD voltage divider ring comprising a plurality of connected doping rings; A trench stop ring is formed at the other end of the terminal region away from the cell region, the substrate is spaced between the trench stop ring and the VLD voltage divider ring, the depth of the trench stop ring is greater than or equal to the depth of the doped ring closest to the trench stop ring, the material of the trench stop ring is doped polysilicon, the VLD voltage divider ring has a first conductivity type, and the trench stop ring has a second conductivity type.

2. The terminal structure according to claim 1, characterized in that: The terminal structure further includes a doped cut-off ring, which is located in the substrate at the bottom and side surfaces of the trench cut-off ring so that the doped cut-off ring surrounds the trench cut-off ring, and the substrate is spaced between the doped cut-off ring and the VLD voltage divider ring.

3. The terminal structure according to claim 1, characterized in that: A gate structure is formed in the cell region, and the gate structure has the same depth as the trench stop ring.

4. The terminal structure according to claim 2, characterized in that: The terminal structure also includes: A drift region is formed in the substrate, and the drift region surrounds the VLD voltage divider ring, the trench stop ring and the doping stop ring.

5. The terminal structure according to claim 4, characterized in that: The doping concentration of the trench stop ring is greater than the doping concentration of the drift region.

6. The terminal structure according to claim 4, characterized in that: The doping concentration of the doped cut-off ring is greater than the doping concentration of the drift region.

7. The terminal structure according to claim 4, characterized in that: The doped stop ring and the drift region have a second conductivity type.

8. A method for manufacturing a terminal structure, wherein the terminal structure is located in a terminal region of a substrate, the substrate further comprising a cellular region, and the terminal region surrounds the cellular region; characterized in that: The manufacturing method of the terminal structure comprises: Forming a VLD voltage divider ring at one end of the terminal region close to the cell region, and the VLD voltage divider ring extends toward the other end of the terminal region away from the cell region, and the VLD voltage divider ring includes a plurality of connected doping rings; A trench stop ring is formed at the other end of the terminal region away from the cell region, the substrate is spaced between the trench stop ring and the VLD voltage divider ring, the depth of the trench stop ring is greater than or equal to the depth of the doped ring closest to the trench stop ring, the material of the trench stop ring is doped polysilicon, the VLD voltage divider ring has a first conductivity type, and the trench stop ring has a second conductivity type.

9. The method for manufacturing a terminal structure according to claim 8, characterized in that: The manufacturing method of the terminal structure also includes: A doping stop ring is formed in the substrate at the bottom and side surfaces of the trench stop ring, so that the doping stop ring surrounds the trench stop ring, and the substrate is spaced between the doping stop ring and the VLD voltage divider ring.

10. The method for manufacturing a terminal structure according to claim 9, characterized in that: The steps of forming the trench stop ring and the doping stop ring include: forming a first trench in the substrate at the other end of the terminal region away from the cell region; Filling a polysilicon layer containing doped ions in the first trench; An annealing process is performed to form the polysilicon layer into the trench stop ring, and to diffuse the doping ions into the substrate at the bottom and side surfaces of the trench stop ring to form the doping stop ring.

11. The method for manufacturing a terminal structure according to claim 10, characterized in that: While forming the first trench in the substrate of the terminal region away from the other end of the cell region, a second trench is also formed in the substrate of the cell region; and a gate structure is formed in the second trench.

12. The method for manufacturing a terminal structure according to claim 10, characterized in that: Before forming the VLD voltage divider ring at one end of the terminal region close to the cell region, the method for manufacturing the terminal structure further includes: A drift region is formed in the substrate, wherein the drift region surrounds the VLD voltage divider ring, the trench stop ring and the doping stop ring.

13. The method for manufacturing a terminal structure according to claim 12, characterized in that: The doping concentration of the trench stop ring is greater than the doping concentration of the drift region.

14. The method for manufacturing a terminal structure according to claim 12, wherein: The doping concentration of the doped cut-off ring is greater than the doping concentration of the drift region.

15. The method for manufacturing a terminal structure according to claim 12, characterized in that: The doped stop ring and the drift region have a second conductivity type.

16. A semiconductor device, characterized in that: The invention comprises a cell region located in a substrate and a terminal region surrounding the cell region, wherein the terminal region is formed with a terminal structure as claimed in any one of claims 1 to 7.

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