Circuit, device, method and home appliance for suppressing fluctuations in dc bus voltage

Abstract

The application discloses a circuit, device, method and household appliance for inhibiting DC bus voltage fluctuation. The device comprises a rectifier bridge, a first filter unit and a second filter unit, and a control unit. The rectifier bridge comprises a first AC terminal, a second AC terminal, a first DC terminal and a second DC terminal. The first filter unit and the second filter unit are connected in series between the first AC terminal and the second AC terminal, and a node between the first filter unit and the second filter unit is connected to the second DC terminal to form a common-mode loop. The control unit generates a differential-mode component according to a DC bus voltage, an input AC voltage and an input AC current, generates a common-mode component according to the DC bus voltage, and generates a control signal according to the differential-mode component and the common-mode component to control a switch tube in the rectifier bridge, so that the first filter unit and the second filter unit absorb high-order harmonics generated by the switch tube through the common-mode loop. Thus, high-order harmonics of the DC bus voltage can be effectively eliminated without increasing the capacity of the DC bus capacitor.

Description

Technical Field

[0001] This invention relates to the field of power supply technology, and in particular to a circuit, apparatus, method, household appliance and its power supply circuit for suppressing DC bus voltage fluctuations, as well as a computer-readable storage medium. Background Technology

[0002] Typically, a DC bus capacitor is connected in parallel at the output of the rectifier circuit. This DC bus capacitor filters the pulsating DC power output by the rectifier circuit to obtain a stable DC power.

[0003] In related technologies, the second harmonic fluctuation of DC bus voltage is reduced by increasing the DC bus capacitance. However, this method requires a large DC bus capacitance, which increases the system cost and size. Furthermore, the second harmonic fluctuation is difficult to completely eliminate, resulting in poor DC bus voltage stability. Summary of the Invention

[0004] The present invention aims to at least partially solve one of the technical problems in the related art. Therefore, the first objective of the present invention is to provide a circuit for suppressing DC bus voltage fluctuations, which can effectively eliminate high-order harmonics of the DC bus voltage without increasing the DC bus capacitance, thus ensuring high stability of the DC bus voltage.

[0005] The second objective of this invention is to provide a device for suppressing DC bus voltage fluctuations.

[0006] The third objective of this invention is to provide a power supply circuit for household appliances.

[0007] The fourth objective of this invention is to provide a household appliance.

[0008] The fifth objective of this invention is to provide a method for suppressing DC bus voltage fluctuations.

[0009] The sixth object of the present invention is to provide a computer-readable storage medium.

[0010] The seventh objective of this invention is to provide another type of household appliance.

[0011] To achieve the above objectives, a first aspect of the present invention provides a circuit for suppressing DC bus voltage fluctuations, comprising: a rectifier bridge, the rectifier bridge including a first AC terminal, a second AC terminal, a first DC terminal, and a second DC terminal, the rectifier bridge receiving input AC power through the first AC terminal and the second AC terminal, and rectifying and power factor correcting the input AC power to output DC bus voltage through the first DC terminal and the second DC terminal; a first filter unit and a second filter unit, the first filter unit and the second filter unit being connected in series between the first AC terminal and the second AC terminal, and the node between the first filter unit and the second filter unit being connected to the second DC terminal to form a common-mode loop, the first filter unit and the second filter unit absorbing the high-order harmonics generated when the rectifier bridge is working through the corresponding common-mode loop.

[0012] According to an embodiment of the present invention, the circuit for suppressing DC bus voltage fluctuations forms a common-mode circuit by connecting a first filter unit and a second filter unit in series between a first AC terminal and a second AC terminal, and connecting the node between the first filter unit and the second filter unit to a second DC terminal. In this way, the first filter unit and the second filter unit can absorb the high-order harmonics generated when the rectifier bridge is working through the corresponding common-mode circuit. Thus, the high-order harmonics of the DC bus voltage can be effectively eliminated without increasing the DC bus capacitance, ensuring that the DC bus voltage has high stability.

[0013] According to one embodiment of the present invention, the first filter unit includes a first inductor and a first capacitor. One end of the first inductor is connected to a first AC terminal, and the other end of the first inductor is connected to one end of the first capacitor. The other end of the first capacitor is connected to a second DC terminal. The second filter unit includes a second inductor and a second capacitor. One end of the second capacitor is connected to the other end of the first capacitor, and the other end of the second capacitor is connected to one end of the second inductor. The other end of the second inductor is connected to a second AC terminal.

[0014] According to one embodiment of the present invention, the capacitance value of the first capacitor is equal to the capacitance value of the second capacitor.

[0015] According to one embodiment of the present invention, the first AC terminal and the second AC terminal of the rectifier bridge are further connected to an EMI filter, wherein the EMI filter shares the first capacitor and the second capacitor with the first filter unit and the second filter unit.

[0016] According to one embodiment of the present invention, both the first capacitor and the second capacitor are X capacitors, and the first capacitor and the second capacitor are connected in parallel at the output terminal of the EMI filter.

[0017] To achieve the above objectives, a second aspect of the present invention provides an apparatus for suppressing DC bus voltage fluctuations, comprising: the aforementioned circuit for suppressing DC bus voltage fluctuations; and a control unit, wherein the control unit generates a differential-mode component based on the DC bus voltage, an input AC voltage, and an input AC current, generates a common-mode component based on the DC bus voltage, and generates a control signal based on the differential-mode component and the common-mode component to control the switching transistors in the rectifier bridge, so that the first filter unit and the second filter unit absorb the high-order harmonics generated by the switching transistors through a set of common-mode loops.

[0018] According to an embodiment of the present invention, a device for suppressing DC bus voltage fluctuations connects a first filter unit and a second filter unit in series between a first AC terminal and a second AC terminal, and connects the node between the first filter unit and the second filter unit to a second DC terminal. Simultaneously, a control unit generates a differential-mode component based on the DC bus voltage, the input AC voltage, and the input AC current, and generates a common-mode component based on the DC bus voltage. Furthermore, a control signal is generated based on the differential-mode component and the common-mode component to control the switching transistors in the rectifier bridge. This allows the first filter unit and the second filter unit to absorb high-order harmonics generated by the switching transistors through a common-mode circuit. Therefore, without increasing the DC bus capacitance, high-order harmonics of the DC bus voltage can be effectively eliminated, ensuring high stability of the DC bus voltage.

[0019] According to one embodiment of the present invention, the control unit includes: a differential-mode component generation unit, which generates the differential-mode component based on the DC bus voltage, a preset DC bus reference voltage, an input AC voltage, and an input AC current; a common-mode component generation unit, which generates a common-mode component based on the DC bus voltage and a zero-voltage signal; and a control unit, which is connected to the differential-mode component generation unit and the common-mode component generation unit respectively, and generates the control signal based on the differential-mode component and the common-mode component.

[0020] Optionally, the differential mode component generation unit includes: a first controller, which performs PI regulation based on the DC bus voltage and a preset DC bus reference voltage to output a first amplitude signal; a phase-locked loop (PLL), which performs PLL processing on the input AC voltage to output a phase angle signal; a multiplier, which generates an AC reference current based on the first amplitude signal and the phase angle signal; and a second controller, which generates the differential mode component based on the AC reference current and the input AC current.

[0021] Optionally, the common-mode component generation unit includes: a filter that filters the DC bus voltage to output a voltage fluctuation signal; and a third controller that generates the common-mode component based on the difference between the voltage fluctuation signal and the zero-voltage signal.

[0022] To achieve the above objectives, a third aspect of the present invention provides a power supply circuit for a household appliance, including the aforementioned device for suppressing DC bus voltage fluctuations.

[0023] According to the power supply circuit of the household appliance of the present invention, the above-mentioned device for suppressing DC bus voltage fluctuations can effectively eliminate high-order harmonics of DC bus voltage without increasing DC bus capacitance, thus ensuring high stability of DC bus voltage.

[0024] To achieve the above objectives, a fourth aspect of the present invention provides a household appliance, including the power supply circuit of the aforementioned household appliance.

[0025] According to the embodiments of the present invention, the power supply circuit of the household appliance described above can effectively eliminate high-order harmonics of the DC bus voltage without increasing the DC bus capacitor capacity, thus ensuring that the DC bus voltage has high stability.

[0026] To achieve the above objectives, a fifth aspect of the present invention provides a method for suppressing DC bus voltage fluctuations, comprising: acquiring a DC bus voltage, an input AC voltage, and an input AC current; generating a differential-mode component based on the DC bus voltage, the input AC voltage, and the input AC current, and generating a common-mode component based on the DC bus voltage; generating a control signal based on the differential-mode component and the common-mode component to control the switching transistors in a rectifier bridge, so that a first filter unit and a second filter unit disposed on the AC side of the rectifier bridge absorb the high-order harmonics generated by the switching transistors through a common-mode loop, wherein the first filter unit and the second filter unit are connected in series between the first AC terminal and the second AC terminal of the rectifier bridge, and the node between the first filter unit and the second filter unit is connected to the second DC terminal of the rectifier bridge to form a common-mode loop.

[0027] The method for suppressing DC bus voltage fluctuations according to embodiments of the present invention generates a differential-mode component based on the DC bus voltage, the input AC voltage, and the input AC current, and generates a common-mode component based on the DC bus voltage. A control signal is then generated based on the differential-mode and common-mode components to control the switching transistors in the rectifier bridge. This allows a first filter unit and a second filter unit located on the AC side of the rectifier bridge to absorb high-order harmonics generated by the switching transistors through a common-mode loop. The first and second filter units are connected in series between the first and second AC terminals of the rectifier bridge, and the node between the first and second filter units is connected to the second DC terminal of the rectifier bridge to form a common-mode loop. Therefore, high-order harmonics of the DC bus voltage can be effectively eliminated without increasing the DC bus capacitance, ensuring high stability of the DC bus voltage.

[0028] According to one embodiment of the present invention, generating a common-mode component based on a DC bus voltage includes: filtering the DC bus voltage to output a voltage fluctuation signal; comparing the voltage fluctuation signal with zero to generate a common-mode component based on the difference between the voltage fluctuation signal and zero.

[0029] According to one embodiment of the present invention, generating a differential-mode component based on a DC bus voltage, an input AC voltage, and an input AC current includes: performing PI regulation based on the DC bus voltage and a preset DC bus reference voltage to output a first amplitude signal, and performing phase-locked loop processing on the input AC voltage to output a phase angle signal; generating an AC reference current based on the first amplitude signal and the phase angle signal; and generating a differential-mode component based on the AC reference current and the input AC current.

[0030] To achieve the above objectives, a sixth aspect of the present invention provides a computer-readable storage medium storing a program for suppressing DC bus voltage fluctuations, which, when executed by a processor, implements the above-described method for suppressing DC bus voltage fluctuations.

[0031] According to the computer-readable storage medium of the present invention, by means of the above-described method for suppressing DC bus voltage fluctuations, high-order harmonics of DC bus voltage can be effectively eliminated without increasing the DC bus capacitance, thus ensuring high stability of DC bus voltage.

[0032] To achieve the above objectives, a seventh aspect of the present invention provides a household appliance including a memory, a processor, and a program stored in the memory and executable on the processor for suppressing DC bus voltage fluctuations. When the processor executes the program, it implements the above-described method for suppressing DC bus voltage fluctuations.

[0033] According to the embodiments of the present invention, the household appliances, through the above-described method for suppressing DC bus voltage fluctuations, can effectively eliminate high-order harmonics of the DC bus voltage without increasing the DC bus capacitance, thus ensuring high stability of the DC bus voltage.

[0034] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0035] Figure 1a A schematic diagram of a circuit for suppressing DC bus voltage fluctuations according to an embodiment of the present invention;

[0036] Figure 1b A schematic diagram of a device for suppressing DC bus voltage fluctuations according to an embodiment of the present invention;

[0037] Figure 2 A schematic diagram of a device for suppressing DC bus voltage fluctuations according to another embodiment of the present invention;

[0038] Figure 3 A schematic diagram of a device for suppressing DC bus voltage fluctuations according to another embodiment of the present invention;

[0039] Figure 4 This is a schematic diagram of the control unit in a device for suppressing DC bus voltage fluctuations according to an embodiment of the present invention;

[0040] Figure 5a The voltage waveforms of the first capacitor and the second capacitor when the above control method is not used, according to an embodiment of the present invention;

[0041] Figure 5b The voltage waveforms of the first capacitor and the second capacitor when the above control method is used in one embodiment of the present invention;

[0042] Figure 6a This is a voltage harmonic distribution diagram of the first capacitor and the second capacitor when the above control method is not used, according to an embodiment of the present invention;

[0043] Figure 6b This is a voltage harmonic distribution diagram of the first capacitor and the second capacitor when the above control method is used according to an embodiment of the present invention;

[0044] Figure 7 This is a diagram illustrating the control effect of the DC bus voltage when the above-described control method is used, according to an embodiment of the present invention.

[0045] Figure 8 This is a flowchart of a method for suppressing DC bus voltage fluctuations according to an embodiment of the present invention. Detailed Implementation

[0046] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0047] The circuits, apparatus, methods, household appliances and their power supply circuits, and computer-readable storage media for suppressing DC bus voltage fluctuations proposed in the embodiments of the present invention are described below with reference to the accompanying drawings.

[0048] like Figure 1a As shown, the circuit for suppressing DC bus voltage fluctuations proposed in this embodiment of the invention includes a rectifier bridge 10, a first filter unit 20, and a second filter unit 30.

[0049] The rectifier bridge 10 includes a first AC terminal, a second AC terminal, a first DC terminal, and a second DC terminal. The rectifier bridge 10 receives the input AC power through the first AC terminal and the second AC terminal, and performs rectification and power factor correction on the input AC power to output DC bus voltage through the first DC terminal and the second DC terminal.

[0050] refer to Figure 1a As shown, the rectifier bridge 10 can be a single-phase full-bridge rectifier circuit, specifically including a first switching transistor S. Au Second switch S Bu Third switch S Ad and the fourth switch S Bd First switching transistor S Au The first terminal and the second switching transistor S Bu After the first end is connected, it is connected to the first DC end of the rectifier bridge 10, and the first switching transistor S Au The second and third switching transistors S Ad The first terminal is connected to the first AC terminal of the rectifier bridge 10, and the second switch S Bu The second terminal and the fourth switching transistor S Bd The first terminal is connected to the second AC terminal of the rectifier bridge 10, and the third switch S Ad The second terminal and the fourth switching transistor S Bd The second terminal is connected to the second DC terminal of the rectifier bridge 10, wherein the first switching transistor S is controlled by... Au Second switch S Bu Third switch S Ad and the fourth switch S BdThis allows the rectifier bridge to rectify and correct the power factor of the input AC power, and output a DC bus voltage. Additionally, a DC bus capacitor C can be connected in parallel between the first and second DC terminals of the rectifier bridge 10. dc Through the DC bus capacitor C dc The DC bus voltage is filtered to obtain a stable DC bus voltage for the load. In this example, the use of a full-bridge structure to simultaneously achieve rectification and power factor correction results in lower conduction losses and higher efficiency compared to using a diode plus PFC circuit.

[0051] like Figure 1a As shown, the first filter unit 20 and the second filter unit 30 are connected in series between the first AC terminal and the second AC terminal, and node J between the first filter unit 20 and the second filter unit 30 is connected to the second DC terminal to form a common-mode circuit. Thus, the first filter unit 20 and the second filter unit 30 absorb the high-order harmonics generated when the rectifier bridge is operating through their corresponding common-mode circuits. For example, refer to... Figure 1a As shown, the common-mode circuit formed may include: the first DC terminal of the rectifier bridge 10 (i.e., the DC bus capacitor C) dc (one end) First switching transistor S Au The second DC terminal (i.e., DC bus capacitor C) of the first filter unit 20 and the rectifier bridge 10 dc The other end) forms a common-mode circuit, and the first DC terminal of the rectifier bridge 10 (i.e., the DC bus capacitor C) dc (one end) and the second switch S Bu The second DC terminal (i.e., DC bus capacitor C) of the second filter unit 30 and the rectifier bridge 10 dc A common-mode loop is formed at the other end. Through this common-mode loop, high-order harmonics such as the second harmonic of the DC bus voltage can be introduced to the first filter unit 20 and the second filter unit 30. That is, the circuit has the ability to inject high-order harmonic energy such as the second harmonic from the DC side to the first filter unit 20 and the second filter unit 30 on the AC side. Then, the first filter unit 20 and the second filter unit 30 filter out the high-order harmonics such as the second harmonic of the injected DC bus voltage, thereby solving the problem that it is not only costly but also has limited filtering capability due to the need to increase the DC bus capacitance to increase the filtering capability.

[0052] According to an embodiment of the present invention, the circuit for suppressing DC bus voltage fluctuations forms a common-mode circuit by connecting a first filter unit and a second filter unit in series between a first AC terminal and a second AC terminal, and connecting the node between the first filter unit and the second filter unit to a second DC terminal. In this way, the first filter unit and the second filter unit can absorb the high-order harmonics generated when the rectifier bridge is working through the corresponding common-mode circuit. Thus, the high-order harmonics of the DC bus voltage can be effectively eliminated without increasing the DC bus capacitance, ensuring that the DC bus voltage has high stability.

[0053] Figure 1b This is a schematic diagram of a device for suppressing DC bus voltage fluctuations according to an embodiment of the present invention, with reference to... Figure 1b As shown, the device for suppressing DC bus voltage fluctuations may include: the circuit for suppressing DC bus voltage fluctuations described in the above embodiments and the control unit 40, that is, the device for suppressing DC bus voltage fluctuations includes a rectifier bridge 10, a first filter unit 20, a second filter unit 30 and a control unit 40.

[0054] The rectifier bridge 10 includes a first AC terminal, a second AC terminal, a first DC terminal, and a second DC terminal. The rectifier bridge 10 receives the input AC power through the first AC terminal and the second AC terminal, and performs rectification and power factor correction on the input AC power to output DC bus voltage through the first DC terminal and the second DC terminal.

[0055] refer to Figure 1b As shown, the rectifier bridge 10 can be a single-phase full-bridge rectifier circuit, specifically including a first switching transistor S. Au Second switch S Bu Third switch S Ad and the fourth switch S Bd First switching transistor S Au The first terminal and the second switching transistor S Bu After the first end is connected, it is connected to the first DC end of the rectifier bridge 10, and the first switching transistor S Au The second and third switching transistors S Ad The first terminal is connected to the first AC terminal of the rectifier bridge 10, and the second switch S Bu The second terminal and the fourth switching transistor S Bd The first terminal is connected to the second AC terminal of the rectifier bridge 10, and the third switch S Ad The second terminal and the fourth switching transistor S Bd The second terminal is connected to the second DC terminal of the rectifier bridge 10, and the first switching transistor S Au Control terminal, second switch S Bu Control terminal, third switch S Ad The control terminal and the fourth switch S BdThe control terminals of the four transistors are connected to the control unit 40, which controls the switching on and off of the transistors to rectify and correct the power factor of the input AC power and output the DC bus voltage. Additionally, a DC bus capacitor C can be connected in parallel between the first and second DC terminals of the rectifier bridge 10. dc Through the DC bus capacitor C dc The DC bus voltage is filtered to obtain a stable DC bus voltage for the load. In this example, the use of a full-bridge structure to simultaneously achieve rectification and power factor correction results in lower conduction losses and higher efficiency compared to using a diode plus PFC circuit.

[0056] The first filter unit 20 and the second filter unit 30 are connected in series between the first AC terminal and the second AC terminal, and the node J between the first filter unit 20 and the second filter unit 30 is connected to the second DC terminal to form a common-mode circuit. For example, refer to Figure 1b As shown, the common-mode circuit formed may include: the first DC terminal of the rectifier bridge 10 (i.e., the DC bus capacitor C) dc (one end) First switching transistor S Au The second DC terminal (i.e., DC bus capacitor C) of the first filter unit 20 and the rectifier bridge 10 dc The other end) forms a common-mode circuit, and the first DC terminal of the rectifier bridge 10 (i.e., the DC bus capacitor C) dc (one end) and the second switch S Bu The second DC terminal (i.e., DC bus capacitor C) of the second filter unit 30 and the rectifier bridge 10 dc A common-mode loop is formed at the other end. Through this common-mode loop, high-order harmonics such as the second harmonic of the DC bus voltage can be introduced to the first filter unit 20 and the second filter unit 30. That is, the device has the ability to inject high-order harmonic energy such as the second harmonic from the DC side to the first filter unit 20 and the second filter unit 30 on the AC side. Then, the first filter unit 20 and the second filter unit 30 filter out the high-order harmonics such as the second harmonic of the injected DC bus voltage, thereby solving the problem that it is not only costly but also has limited filtering capability due to the need to increase the DC bus capacitance to increase the filtering capability.

[0057] The control unit 40 generates a differential-mode component based on the DC bus voltage, the input AC voltage, and the input AC current, and generates a common-mode component based on the DC bus voltage. It also generates a control signal based on the differential-mode component and the common-mode component to control the switching transistors in the rectifier bridge 10, so that the first filter unit 20 and the second filter unit 30 absorb the high-order harmonics generated by the switching transistors through a set of common-mode loops.

[0058] The control unit 40 can obtain the DC bus voltage V through a DC voltage detection circuit disposed between the first DC terminal and the second DC terminal of the rectifier bridge 10. dc The input AC voltage V is obtained through an AC voltage detection circuit located at the AC power source. ac And the input AC current i is obtained through an AC current detection circuit located at the AC power source. ac Then, based on the DC bus voltage v dc Input AC voltage v ac and the input AC current i ac Generate differential mode components and based on the DC bus voltage v dc The common-mode component is generated, and control signals such as PWM control signals are generated based on the differential-mode component and the common-mode component. Finally, the four switching transistors in the rectifier bridge 10 are turned on and off according to the control signals. In the process of rectifying and power factor correction of the input AC power and outputting DC bus voltage, the high-order harmonics of the DC bus voltage are introduced to the first filter unit 20 and the second filter unit 30 through the above two common-mode circuits. The first filter unit 20 and the second filter unit 30 absorb the high-order harmonics of the DC bus voltage, such as the second harmonic, thereby obtaining a stable DC bus voltage. This effectively solves the problem that increasing the DC bus capacitance to increase the filtering capability results in not only high cost but also limited filtering capability.

[0059] According to an embodiment of the present invention, reference Figure 2 As shown, the first filter unit 20 includes a first inductor L1 and a first capacitor C1. One end of the first inductor L1 is connected to a first AC terminal, and the other end of the first inductor L1 is connected to one end of the first capacitor C1. The other end of the first capacitor C1 is connected to a second DC terminal. The second filter unit 30 includes a second inductor L2 and a second capacitor C2. One end of the second capacitor C2 is connected to the other end of the first capacitor C1, and the other end of the second capacitor C2 is connected to one end of the second inductor L2. The other end of the second inductor L2 is connected to a second AC terminal. That is, both the first filter unit 20 and the second filter unit 30 can be LC filter units, which absorb high-order harmonics of the DC bus voltage.

[0060] It is understandable that other filtering circuits can also be used, such as capacitor filtering circuits, CLC filtering circuits, LCL filtering circuits, etc. The specific settings can be made according to actual needs, and there are no restrictions here.

[0061] According to one embodiment of the present invention, the capacitance value of the first capacitor C1 is equal to the capacitance value of the second capacitor C2, so that the filtering capabilities of the two common-mode circuits are the same, ensuring that they have the same filtering effect at different times.

[0062] According to an embodiment of the present invention, reference Figure 3 As shown, the first AC terminal and the second AC terminal of the rectifier bridge 10 are also connected to an EMI filter 50. The EMI filter 50 shares a first capacitor C1 and a second capacitor C2 with the first filter unit 20 and the second filter unit 30. Both the first capacitor C1 and the second capacitor C2 are X capacitors, and the first capacitor C1 and the second capacitor C2 are connected in parallel at the output terminal of the EMI filter 50.

[0063] Specifically, an EMI filter 50, or electromagnetic interference filter, can be installed on the AC side of the rectifier bridge 10 to suppress electromagnetic interference. The EMI filter 50 can be a CLC filter, specifically including a third capacitor C3, a common-mode inductor L, and a fourth capacitor. The fourth capacitor can be formed by connecting the first capacitor C1 and the second capacitor C2 in series. That is, the EMI filter 50 shares the first capacitor C1 and the second capacitor C2 with the first filter unit 20 and the second filter unit 30. This not only suppresses electromagnetic interference and absorbs high-order harmonics of the DC bus voltage, but also effectively reduces hardware cost and footprint. Since the first capacitor C1 and the second capacitor C2 are shared by the EMI filter 50 and the first filter unit 20 and the second filter unit 30, and are used to achieve different functions, the capacitance values ​​of these two capacitors need to be comprehensively considered when designing. Optionally, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 can be twice the capacitance value of the fourth capacitor.

[0064] According to an embodiment of the present invention, reference Figure 4 As shown, the control unit 40 may include a differential mode component generation unit 401, a common mode component generation unit 402, and a control unit 47. The differential mode component generation unit 401 generates the differential mode component based on the DC bus voltage, a preset DC bus reference voltage, the input AC voltage, and the input AC current. The common mode component generation unit 402 generates the common mode component based on the DC bus voltage and a zero voltage signal. The control unit 47 is connected to both the differential mode component generation unit 401 and the common mode component generation unit 402, and generates the control signal based on the differential mode component and the common mode component.

[0065] Furthermore, such as Figure 4As shown, the differential-mode component generation unit 401 includes a first controller 41, a phase-locked loop 42, a multiplier 43, and a second controller 44. The common-mode component generation unit 402 includes a filter 45 and a third controller 46. Specifically, the first controller 41 performs PI regulation based on the DC bus voltage and a preset DC bus reference voltage to output a first amplitude signal; the phase-locked loop 42 performs phase-locked loop processing on the input AC voltage to output a phase angle signal; the multiplier 43 generates an AC reference current based on the first amplitude signal and the phase angle signal; and the second controller 44 generates differential-mode components based on the AC reference current and the input AC current. The filter 45 filters the DC bus voltage to output a voltage fluctuation signal; and the third controller 46 generates a common-mode component based on the difference between the voltage fluctuation signal and the zero-voltage signal.

[0066] Specifically, the DC bus reference voltage v can first be controlled by the first controller 41, such as a PI controller. dc_ref With DC bus voltage v dc The difference between them is PI-regulated to output the first amplitude signal, while the input AC voltage V is regulated through the phase-locked loop 42. ac A phase-locked loop (PLL) process is performed, and the phase angle signal is output. Then, multiplier 43 multiplies the first amplitude signal and the phase angle signal to obtain the AC reference current i. ac_ref Next, the AC reference current i is controlled by the second controller 44, such as the PR controller. ac_ref With the input AC current i ac The difference between them is proportionally resonantly adjusted to output the differential mode component, while the DC bus voltage V is filtered by a filter 45, such as a high-pass filter. dc The voltage fluctuation signal is filtered to output a voltage fluctuation signal. The third controller 46 generates a common-mode component based on the difference between the voltage fluctuation signal and zero. Finally, the control unit 47, such as a PWM controller, generates a control signal, such as a PWM control signal, based on the differential-mode component and the common-mode component. The control signal is used to control the switching transistors in the rectifier bridge 10 to rectify and correct the power factor of the input AC power. At the same time, the high-order harmonics, such as the second harmonic, generated in this process are introduced into the first filter unit 20 and the second filter unit 30 to filter out the introduced high-order harmonics, such as the second harmonic, thus ensuring the stability of the DC bus voltage.

[0067] In some examples, filter 45 can be a high-pass filter composed of an RC circuit, with a transfer function of s / (s+1) / RC, or it can be a digital high-pass filter. The transfer function of common-mode controller 46 can be... Where K p and K r ω is a proportional parameter. 2ndω is twice the system's fundamental frequency (e.g., 50Hz). c This is the cutoff frequency.

[0068] Figure 5a The voltage waveforms of the first capacitor and the second capacitor when the above control method is not used, according to an embodiment of the present invention; Figure 5b The voltage waveforms of the first capacitor and the second capacitor when the above control method is used in one embodiment of the present invention; Figure 6a This is a voltage harmonic distribution diagram of the first capacitor and the second capacitor when the above control method is not used, according to an embodiment of the present invention; Figure 6b This is a voltage harmonic distribution diagram of the first capacitor and the second capacitor when the above control method is used according to an embodiment of the present invention; Figure 7 This is a diagram illustrating the control effect of the DC bus voltage when employing the above-described control method according to an embodiment of the present invention. Figures 5a-6b It can be seen that after using the above control method, the first capacitor C1 and the second capacitor C2 simultaneously have both first and second harmonic components, while before using the above control method, the first capacitor C1 and the second capacitor C2 almost only have a first harmonic component. Figure 7 As can be seen, after using the above control method, under the same DC bus capacitor, the peak-to-peak value of the DC bus voltage fluctuation can be reduced from 32V to 4V, which greatly improves the stability of the DC bus voltage and thus better ensures the stable operation of the downstream equipment.

[0069] According to an embodiment of the present invention, a device for suppressing DC bus voltage fluctuations connects a first filter unit and a second filter unit in series between a first AC terminal and a second AC terminal, and connects the node between the first filter unit and the second filter unit to a second DC terminal. Simultaneously, a control unit generates a differential-mode component based on the DC bus voltage, the input AC voltage, and the input AC current, and generates a common-mode component based on the DC bus voltage. Furthermore, a control signal is generated based on the differential-mode component and the common-mode component to control the switching transistors in the rectifier bridge. This allows the first filter unit and the second filter unit to absorb high-order harmonics generated by the switching transistors through a common-mode circuit. Therefore, without increasing the DC bus capacitance, high-order harmonics of the DC bus voltage can be effectively eliminated, ensuring high stability of the DC bus voltage.

[0070] In one embodiment, a power supply circuit for a household appliance is also provided. This power supply circuit is used to supply power to devices such as compressors and fans in the household appliance. The power supply circuit includes the aforementioned device for suppressing DC bus voltage fluctuations. For details on how the power is supplied, please refer to the foregoing. It will not be repeated here.

[0071] According to the power supply circuit of the household appliance of the present invention, the above-mentioned device for suppressing DC bus voltage fluctuations can effectively eliminate high-order harmonics of DC bus voltage without increasing DC bus capacitance, thus ensuring high stability of DC bus voltage.

[0072] In one embodiment, a home appliance is also provided, which may be an air conditioner, an air purifier, a range hood, etc., and the home appliance includes the power supply circuit of the aforementioned home appliance.

[0073] According to the embodiments of the present invention, the power supply circuit of the household appliance described above can effectively eliminate high-order harmonics of the DC bus voltage without increasing the DC bus capacitor capacity, thus ensuring that the DC bus voltage has high stability.

[0074] Figure 8 This is a flowchart illustrating a method for suppressing DC bus voltage fluctuations according to an embodiment of the present invention. (See reference...) Figure 8 As shown, the method for suppressing DC bus voltage fluctuations may include:

[0075] Step S101: Obtain the DC bus voltage, the input AC voltage, and the input AC current.

[0076] Step S102: Generate differential mode component based on DC bus voltage, input AC voltage and input AC current, and generate common mode component based on DC bus voltage.

[0077] According to one embodiment of the present invention, generating a differential-mode component based on a DC bus voltage, an input AC voltage, and an input AC current includes: performing PI regulation based on the DC bus voltage and a preset DC bus reference voltage to output a first amplitude signal, and performing phase-locked loop processing on the input AC voltage to output a phase angle signal; generating an AC reference current based on the first amplitude signal and the phase angle signal; and generating a differential-mode component based on the AC reference current and the input AC current.

[0078] According to one embodiment of the present invention, generating a common-mode component based on a DC bus voltage includes: filtering the DC bus voltage to output a voltage fluctuation signal; comparing the voltage fluctuation signal with zero to generate a common-mode component based on the difference between the voltage fluctuation signal and zero.

[0079] Step S103: Generate control signals based on differential mode components and common mode components to control the switching transistors in the rectifier bridge, so that the first and second filter units located on the AC side of the rectifier bridge can absorb the high-order harmonics generated by the switching transistors through a set of common mode circuits.

[0080] It should be noted that the first filter unit and the second filter unit are connected in series between the first AC terminal and the second AC terminal of the rectifier bridge, and the node between the first filter unit and the second filter unit is connected to the second DC terminal of the rectifier bridge to form a common-mode circuit.

[0081] Additionally, it should be noted that the description of the method for suppressing DC bus voltage fluctuations in this application is the same as the description of the device for suppressing DC bus voltage fluctuations in this application, and will not be repeated here.

[0082] The method for suppressing DC bus voltage fluctuations according to embodiments of the present invention generates a differential-mode component based on the DC bus voltage, the input AC voltage, and the input AC current, and generates a common-mode component based on the DC bus voltage. A control signal is then generated based on the differential-mode and common-mode components to control the switching transistors in the rectifier bridge. This allows a first filter unit and a second filter unit located on the AC side of the rectifier bridge to absorb high-order harmonics generated by the switching transistors through a common-mode loop. The first and second filter units are connected in series between the first and second AC terminals of the rectifier bridge, and the node between the first and second filter units is connected to the second DC terminal of the rectifier bridge to form a common-mode loop. Therefore, high-order harmonics of the DC bus voltage can be effectively eliminated without increasing the DC bus capacitance, ensuring high stability of the DC bus voltage.

[0083] In one embodiment, a computer-readable storage medium is also provided, on which a program for suppressing DC bus voltage fluctuations is stored, which, when executed by a processor, implements the above-described method for suppressing DC bus voltage fluctuations.

[0084] According to the computer-readable storage medium of the present invention, by means of the above-described method for suppressing DC bus voltage fluctuations, high-order harmonics of DC bus voltage can be effectively eliminated without increasing the DC bus capacitance, thus ensuring high stability of DC bus voltage.

[0085] In one embodiment, a home appliance is also provided, including a memory, a processor, and a program stored in the memory and executable on the processor for suppressing DC bus voltage fluctuations. When the processor executes the program, it implements the above-described method for suppressing DC bus voltage fluctuations.

[0086] According to the embodiments of the present invention, the household appliances, through the above-described method for suppressing DC bus voltage fluctuations, can effectively eliminate high-order harmonics of the DC bus voltage without increasing the DC bus capacitance, thus ensuring high stability of the DC bus voltage.

[0087] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0088] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0089] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0090] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0091] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0092] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A device for suppressing DC bus voltage fluctuations, characterized in that, include: A circuit for suppressing DC bus voltage fluctuations includes: a rectifier bridge, the rectifier bridge including a first AC terminal, a second AC terminal, a first DC terminal and a second DC terminal, the rectifier bridge receiving input AC power through the first AC terminal and the second AC terminal, and rectifying and power factor correcting the input AC power to output DC bus voltage through the first DC terminal and the second DC terminal; A first filter unit and a second filter unit are connected in series between the first AC terminal and the second AC terminal, and the node between the first filter unit and the second filter unit is connected to the second DC terminal to form a common-mode circuit. The first filter unit and the second filter unit absorb the high-order harmonics generated when the rectifier bridge is working through the corresponding common-mode circuit. The control unit generates a differential-mode component based on the DC bus voltage, the input AC voltage, and the input AC current, and generates a common-mode component based on the DC bus voltage. It also generates a control signal based on the differential-mode component and the common-mode component to control the switching transistors in the rectifier bridge, so that the first filter unit and the second filter unit absorb the high-order harmonics generated by the switching transistors through the set of common-mode circuits. The control unit includes: The differential mode component generation unit generates the differential mode component based on the DC bus voltage, the preset DC bus reference voltage, the input AC voltage, and the input AC current. A common-mode component generation unit generates a common-mode component based on the DC bus voltage and the zero-voltage signal; The control unit is a PWM controller, which is connected to the differential mode component generation unit and the common mode component generation unit respectively. The control unit generates the control signal based on the differential mode component and the common mode component, and controls the switching transistors in the rectifier bridge according to the control signal to rectify and correct the power factor of the input AC power. At the same time, the high-order harmonics generated in this process are introduced into the first filter unit and the second filter unit for filtering. The differential mode component generation unit includes: A first controller performs PI regulation based on the DC bus voltage and a preset DC bus reference voltage to output a first amplitude signal; A phase-locked loop (PLL) processes the input AC voltage to output a phase angle signal. A multiplier that generates an AC reference current based on the first amplitude signal and the phase angle signal; The second controller generates the differential mode component based on the AC reference current and the input AC current; The common-mode component generation unit includes: A high-pass filter is used to filter the DC bus voltage to output a voltage fluctuation signal. A third controller generates the common-mode component based on the difference between the voltage fluctuation signal and the zero-voltage signal.

2. The device for suppressing DC bus voltage fluctuations as described in claim 1, characterized in that, The circuit for suppressing DC bus voltage fluctuations further includes: the first filter unit includes a first inductor and a first capacitor, one end of the first inductor is connected to the first AC terminal, the other end of the first inductor is connected to one end of the first capacitor, and the other end of the first capacitor is connected to the second DC terminal; The second filter unit includes a second inductor and a second capacitor. One end of the second capacitor is connected to the other end of the first capacitor, and the other end of the second capacitor is connected to one end of the second inductor. The other end of the second inductor is connected to the second AC terminal.

3. The device for suppressing DC bus voltage fluctuations as described in claim 2, characterized in that, The capacitance of the first capacitor is equal to the capacitance of the second capacitor.

4. The device for suppressing DC bus voltage fluctuations as described in claim 2, characterized in that, The first AC terminal and the second AC terminal of the rectifier bridge are also connected to an EMI filter, wherein the EMI filter shares the first capacitor and the second capacitor with the first filter unit and the second filter unit.

5. The device for suppressing DC bus voltage fluctuations as described in claim 4, characterized in that, Both the first capacitor and the second capacitor are X capacitors, and the first capacitor and the second capacitor are connected in parallel at the output terminal of the EMI filter.

6. A power supply circuit for a household appliance, characterized in that, Includes a device for suppressing DC bus voltage fluctuations as described in any one of claims 1-5.

7. A household appliance, characterized in that, Includes the power supply circuit of the household appliance as described in claim 6.

8. A method for suppressing DC bus voltage fluctuations, wherein the apparatus according to any one of claims 1-5 is used to perform the method, characterized in that, include: Obtain the DC bus voltage, the input AC voltage, and the input AC current; Differential-mode components are generated based on the DC bus voltage, the input AC voltage, and the input AC current, and common-mode components are generated based on the DC bus voltage. A control signal is generated based on the differential-mode component and the common-mode component to control the switching transistors in the rectifier bridge. This allows the first and second filter units located on the AC side of the rectifier bridge to absorb the high-order harmonics generated by the switching transistors through a common-mode loop. The first and second filter units are connected in series between the first and second AC terminals of the rectifier bridge, and the node between the first and second filter units is connected to the second DC terminal of the rectifier bridge to form a common-mode loop. The differential-mode component is generated based on the DC bus voltage, the input AC voltage, and the input AC current, including: The DC bus voltage and the preset DC bus reference voltage are used to perform PI regulation to output a first amplitude signal, and the input AC voltage is processed by a phase-locked loop to output a phase angle signal. An AC reference current is generated based on the first amplitude signal and the phase angle signal; The differential mode component is generated based on the AC reference current and the input AC current.

9. The method for suppressing DC bus voltage fluctuations as described in claim 8, characterized in that, Generating a common-mode component based on the DC bus voltage includes: The DC bus voltage is filtered to output a voltage fluctuation signal; The voltage fluctuation signal is compared with zero so that the common-mode component is generated based on the difference between the voltage fluctuation signal and zero.

10. A computer-readable storage medium, characterized in that, It stores a program for suppressing DC bus voltage fluctuations, which, when executed by a processor, implements the method for suppressing DC bus voltage fluctuations as described in any one of claims 8-9.

11. A household appliance, characterized in that, The method includes a memory, a processor, and a program stored in the memory and executable on the processor for suppressing DC bus voltage fluctuations. When the processor executes the program, it implements the method for suppressing DC bus voltage fluctuations as described in any one of claims 8-9.

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