Method and apparatus for processing multiple communication signals with a single integrated circuit chip

Abstract

Embodiments of the present application relate to a method and device for processing multiple communication signals with a single integrated circuit chip. A device is disclosed. The device includes multiple antennas and an integrated circuit chip, the integrated circuit chip is coupled to the multiple antennas, and is configured to process cellular signals received from the multiple antennas according to a cellular communication protocol, and to process RFID signals received from the multiple antennas according to a radio frequency identification RFID protocol.

Description

[0001] This application is a divisional application of an invention patent application with an application date of February 20, 2018, application number "201880014106.3", and invention name "Method and device for processing multiple communication signals with a single integrated circuit chip". Technical Field

[0002] The present application relates to methods and apparatus for processing signals, and more particularly, to methods and apparatus for processing multiple communication signals with a single integrated circuit chip. Background Art

[0003] Some hardware (e.g., silicon) computing platforms can be used to implement digital signal processing for wireless communications, such as digital baseband processing or digital front-end implementations. For example, multimedia processing and digital radio frequency (RF) processing can be implemented in a digital front-end implementation of a wireless transceiver such as implemented by an application-specific integrated circuit (ASIC). A variety of hardware platforms can implement such digital signal processing, such as an ASIC, a digital signal processor (DSP) implemented as part of a field programmable gate array (FPGA), or a system on a chip (SoC). However, each of these solutions often requires the implementation of a custom signal processing method specific to the hardware implementation. For example, a digital signal processor can implement a turbocoding application of data in a custom design of an FPGA.

[0004] Many conventional digital signal processing systems implement a two-chip solution, where a network on a chip is implemented on one integrated circuit chip and coupled to an antenna tuned for a specific frequency range. The network on a chip is coupled to a main control chip on a separate integrated circuit chip via a communication bus (e.g., a peripheral component interconnect high-speed bus). However, such systems are physically large and draw considerable power, which limits their applicability to wireless and / or mobile applications such as smartphones, tablet computers, and laptop computers.

[0005] Additionally, there is interest in evolving wireless communications to "fifth generation" (5G) systems. 5G will certainly provide increased speed and popularity, but methods for handling 5G wireless communications have not yet been established. Summary of the invention

[0006] In one embodiment of the present disclosure, a device includes a plurality of antennas and an integrated circuit chip coupled to the plurality of antennas and configured to process cellular signals received from the plurality of antennas according to a cellular communication protocol and to process radio frequency identification (RFID) signals received from the plurality of antennas according to a RFID protocol.

[0007] Additionally or alternatively, a cellular signal is received from one or more first antennas of the plurality of antennas.

[0008] Additionally or alternatively, RFID signals are received from one or more second antennas of the plurality of antennas.

[0009] Additionally or alternatively, the integrated circuit chip is configured to at least partially simultaneously process the cellular signal and the RFID signal.

[0010] Additionally or alternatively, the integrated circuit chip includes a first set of processing elements configured to process cellular signals and a second set of processing elements configured to process RFID signals.

[0011] Additionally or alternatively, further comprising one or more switches configured to route data between the first group of processing elements and the second group of processing elements.

[0012] Additionally or alternatively, the integrated circuit chip further comprises an on-chip network.

[0013] In another aspect of the present disclosure, a device includes a plurality of antennas and an integrated circuit chip coupled to the plurality of antennas. The integrated circuit chip includes a first plurality of processing elements configured to process RFID information received using the plurality of antennas; and a second plurality of processing elements configured to process cellular data received using the plurality of antennas.

[0014] Additionally or alternatively, the first plurality of processing elements and the second plurality of processing elements are dynamically assigned from a group of processing elements according to signaling capacity.

[0015] Additionally or alternatively, the integrated circuit chip further includes an RFID interface configured to couple the plurality of antennas to the first plurality of processing elements.

[0016] Additionally or alternatively, the integrated circuit chip further includes a cellular interface configured to couple the plurality of antennas to the second plurality of processing elements.

[0017] Additionally or alternatively, the integrated circuit chip further includes a plurality of switches configured to transfer data between the first plurality of processing elements and the second plurality of processing elements.

[0018] Additionally or alternatively, the integrated circuit chip further includes a respective data memory coupled to each processing element of the first and second plurality of processing elements, and wherein the respective data memory of the first plurality of processing elements is configured to store the received RFID information and the respective data memory of the second plurality of processing elements is configured to store cellular data.

[0019] In one embodiment of the present disclosure, a method includes: receiving a first signal of a first type via a plurality of antennas; processing the first signal by a first plurality of processing elements of an integrated circuit chip to generate a data set; passing the data set to a second plurality of processing elements of an integrated circuit chip by a switch; processing the data set by the second plurality of processing elements to generate a second signal of a second type; and transmitting the second signal by the plurality of antennas.

[0020] Additionally or alternatively, the first signal of the first type is a radio frequency identification signal.

[0021] Additionally or alternatively, the second signal of the second type is a cellular signal.

[0022] Additionally or alternatively, further comprising processing the data set to generate a second signal of a second type includes generating a data packet according to a protocol associated with the signal of the second type.

[0023] Additionally or alternatively, further comprising loading an instruction set into a memory on an integrated circuit chip associated with the first plurality of processing elements, wherein the instruction set comprises instructions for processing the first signal to generate the data set.

[0024] Additionally or alternatively, further comprising loading an instruction set into a memory on an integrated circuit chip associated with the second plurality of processing elements, wherein the instruction set includes instructions for processing the data set to generate the second signal.

[0025] Additionally or alternatively, the method further includes receiving a third signal of the first type via the multiple antennas, and processing the third signal by the first multiple processing elements of the integrated circuit chip to generate a second data set; wherein the first multiple processing elements process the third signal in parallel with the second multiple processing elements processing the data set. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a block diagram of an integrated circuit chip according to an embodiment of the present invention.

[0027] Figure 2 is a flow chart illustrating a method of processing signals with a single integrated circuit chip according to an embodiment of the present invention.

[0028] Figure 3 is a flow chart illustrating a method of processing signals with a single integrated circuit chip according to an embodiment of the present invention.

[0029] Figure 4 is a block diagram of multiple processing elements and communication interfaces according to an embodiment of the present invention.

[0030] Figure 5is a block diagram of multiple processing elements according to an embodiment of the present invention.

[0031] Figure 6 is a block diagram of a processing element according to an embodiment of the present invention. DETAILED DESCRIPTION

[0032] Certain details are set forth below to provide a thorough understanding of the embodiments of the present invention. However, it will be apparent to those skilled in the art that embodiments of the present invention may be practiced without these specific details. In some instances, well-known wireless communication components, circuits, control signals, timing protocols, computing system components, and software operations are not shown in detail to avoid unnecessarily obscuring the described embodiments of the present invention.

[0033] Embodiments disclosed herein may recognize that a single-chip solution for processing communication signals provides reduced power consumption and a smaller physical footprint, which may make the single-chip solution preferred in mobile and / or wireless systems such as smartphones. In addition, such single-chip solutions may provide increased versatility by allowing for dynamic allocation of processing elements to process communication signals. Such single-chip solutions may also integrate traditional wireless communication bands (e.g., industrial, scientific, and medical radio bands) with sub-1-GHz bands that may be utilized by many emerging Internet of Things (IoT) systems. In other words, the single-chip solutions described herein are not limited to a specific frequency band like traditional systems (e.g., smartphones are limited to 4G Long Term Evolution (LTE), WiFi, and / or ). In fact, examples of single-chip solutions described herein may integrate those communication technologies with transceivers for IoT systems, such as Z-wave operating at 900 MHz; radio frequency identification (RFID) systems operating at 13.56 MHz, 433 MHz, or any of the 902-928 MHz range; and / or even microwave frequencies at 3.1-10 GHz.

[0034] In various embodiments, a processing element with a reconfigurable construction can be used to process different protocols according to the needs of a wireless system or IoT system. For example, when a reconfigurable construction space (e.g., different antennas for corresponding frequency bands) is utilized for baseband and digital front-end processing for any type of analog processing system, hardware and power complexity can be reduced. Compared with traditional wireless transceivers and IoT reader systems, the processing power of each of those receiver systems can be integrated into a reconfigurable construction space that can be dynamically shifted for processing signals from any analog processing system. In this shared reconfigurable construction space application, the processing for each receiver system can be assigned to a corresponding cluster of processing elements. In such embodiments, the summary processing results of each receiver system can be processed in a shared coherent memory space, and then it is decided whether to transmit the summary processing results via a specific transmitter. For example, using a shared reconfigurable construction, the processing results derived from the measured values ​​of the IoT system and the information from the LTE system can be transmitted via an RFID system (in some instances, using the same processing element).

[0035] Figure 1 1 is a block diagram of an integrated circuit chip 102 according to an embodiment of the present invention. The integrated circuit chip 102 is a single chip capable of processing communication signals. Examples of single-chip systems include systems in which circuits for performing the described tasks are typically fabricated on and / or in a common substrate using semiconductor manufacturing techniques. The integrated circuit chip 102 includes a plurality of processing elements 104, a network on a chip (NOC) 106, a scheduling unit 108, a radio interface 110, and a cellular interface 112. The integrated circuit chip 102 may be coupled to a plurality of antennas 114. The plurality of antennas 114 may include a first group of antennas 116 and a second group of antennas 118.

[0036] Processing element 104 may be implemented using, for example, one or more processors having any number of cores. In some examples, processing element 104 may include circuits (including custom circuits), and / or firmware for performing the functions described herein. For example, the circuits may include a multiplication unit / accumulation unit for performing the described functions, as described herein. Processing element 104 may be of any type including, but not limited to, a microprocessor or a digital signal processor (DSP), or any combination thereof. For example, processing element 104 may include a hierarchy of caches (e.g., a primary cache and a secondary cache), cores, and registers. An example processor core may include an arithmetic logic unit (ALU), a bit manipulation unit, a multiplication unit, an accumulation unit, an adder unit, a lookup table unit, a memory lookup unit, or any combination thereof.

[0037] NOC 106 may be implemented as an on-chip communication subsystem configured to facilitate communication between processing elements 104 and scheduling unit 108. NOC 106 may include, for example, one or more links, such as copper wires, connecting processing elements 104 and scheduling unit 108 and configured to carry information from processing elements 104 to scheduling unit 108 and vice versa.

[0038] Scheduling unit 108 may include a set of instructions (e.g., one or more program instructions or operations) to be executed by processing element 104. Scheduling unit may include, for example, computer software, hardware, firmware, or a combination thereof configured to provide the set of instructions from a storage device to processing element 104. For example, the set of instructions may include instructions to perform logical or arithmetic operations on data, transmit data from one processing element 104 to another processing element 104, or perform other operations. In some embodiments, a first processing element instruction set 108 may be loaded onto a first processing element 104 and include instructions for the processing element to receive a signal of a first type (e.g., a signal associated with a received radio signal), process the received signal of the first type to generate a data set, and transmit the data set to a second processing element 104. A second processing element instruction set 108 may be loaded onto a second processing element 104 and configured to receive the data set, process the data set to generate a second signal of a second type, and transmit the second signal using multiple antennas. Scheduling unit 108 may retrieve instructions for processing element 104 from one or more memories, such as volatile (e.g., dynamic random access memory (DRAM)) or non-volatile memory (e.g., flash memory). The processing element instruction sets may be stored in one or more data structures, such as a database.

[0039] The radio interface 110 may be coupled to one or more of the multiple antennas 114 and the processing element 104. The radio interface 110 may be configured to receive radio signals detected by the multiple antennas 114, and convert the received signals into signals that can be manipulated by the one or more processing elements 104, and route the generated signals to the one or more processing elements. In some embodiments, the radio interface 110 may include an analog / digital converter. In other embodiments, the radio interface 110 may include additional or different components, circuits, etc. Although described as a "radio interface", in some instances, the interface may be generally suitable for converting any type of received signal into a signal that can be manipulated by the processing element 104. For example, the radio interface 110 may be configured to receive Wi-Fi signals, optical signals, auditory signals, or any other type of signal. In some embodiments, the radio interface 110 is configured to receive RFID signals detected by the multiple antennas 114, and provide the received signals to the one or more processing elements 104.

[0040] The cellular interface 112 may be coupled to the multiple antennas 114 and to one or more of the processing elements 104. The cellular interface 112 may be configured to transmit / receive cellular signals using the multiple antennas 114 and convert the signals between signals that can be manipulated by the one or more processing elements 104 and signals that can be transmitted using the multiple antennas 114. In some embodiments, the cellular interface 112 may include a digital / analog converter. In other embodiments, the cellular interface 112 may include additional or different components, circuits, etc. Although described as a "cellular interface", in some instances, the interface may generally be suitable for any type of signal. A cellular signal may generally refer to a cellular signal of any protocol, such as 3G, 4G, 4G LTE, 5G, etc. The cellular interface 112 may be configured to transmit a Wi-Fi signal, an optical signal, an auditory signal, or any other type of signal. In some embodiments, the cellular interface 112 is configured to transmit signals of different types from the radio interface 110.

[0041] The plurality of antennas 114 are configured to receive and transmit wireless signals. The plurality of antennas 114 may generally be any type of antenna, such as a linear antenna (e.g., a dipole antenna, a loop antenna, a monopole antenna, a spiral antenna, etc.), an aperture antenna (e.g., a waveguide, a horn antenna, etc.), a reflector antenna (e.g., a parabolic reflector, a corner reflector, etc.), a lens antenna (e.g., convex, concave, convex-convex, or concave-concave), a microstrip antenna (e.g., circular, rectangular, a metal patch, etc.), an array antenna (e.g., a Yagi-Uda antenna, a microstrip patch array, an aperture array, a slotted waveguide array, etc.), or a combination thereof.

[0042] exist Figure 1In an embodiment of the present invention, the plurality of antennas 114 include a first antenna subset 116 configured to receive radio signals and transmit the received signals to the radio interface 110. The plurality of antennas 114 further include a second antenna subset 118 configured to communicate via a cellular network. The second antenna subset 118 may receive signals from the cellular interface 112 and transmit the received signals to one or more cellular nodes (not shown), such as a cellular tower. In various embodiments, the plurality of antennas 114 may be configurable. For example, the antennas in the plurality of antennas 114 may be adjustable to receive and / or transmit different types of signals. In such embodiments, the first antenna subset 116 and the second antenna subset 118 may be the same antenna. For example, the first antenna subset 116 may be configured to receive radio signals such as RFID signals and transmit the received radio signals to the processing element 104 via the radio interface 110. The first antenna subset 116 may be reconfigured to communicate using a cellular network as the second antenna subset 118. For example, the plurality of antennas 118 may include or be coupled to integrated internal mechanisms such as RF switches, varactors, mechanical actuators, or tunable materials, which enable intentional redistribution of current on the antenna surface to produce modification of its properties. The processing element 104 may process the received radio signal according to the instruction set extracted by the scheduling unit 108 and transmit the resulting cellular signal to the second antenna subset 118 via the cellular interface 112. The second antenna subset 118 may then transmit the received signal via the cellular network.

[0043] Figure 2 is a flow chart illustrating a method of processing signals with a single integrated circuit chip according to an embodiment of the present invention.

[0044] In operation 202, a first signal of a first type is received using a plurality of antennas. The signal may be received, for example, using the plurality of antennas 114, and specifically using the first antenna subset 116. In various embodiments, the first signal of the first type may be a radio signal associated with an RFID device. The first antenna subset 114 may employ beamforming to detect one or more first signals of the first type. Beamforming is a signal processing technique that enables directional signal transmission or reception. Beamforming typically uses a phased antenna array so that signals at a particular angle experience constructive interference, while signals at other angles experience destructive interference.

[0045] In operation 204, the first signal of the first type is provided to the first set of processing elements. For example, the first antenna subset 116 may provide the received first signal of the first type to one or more of the processing elements 104 via the radio interface 110. The particular processing element 104 to which the first signal of the first type is provided may be determined, for example, by an instruction set provided by the scheduling unit 108.

[0046] In operation 206, the first signal of the first type is processed to generate a data set. For example, the one or more processing elements 104 may process the received first signal to generate a specific data set. The data set may generally be any type of data. For example, the data set may include location information of one or more devices that transmit the first signal of the first type. In one embodiment, the RFID device transmits a radio signal. The radio signal is detected by the first antenna subset 116. The one or more processing elements 104 may process the received signal based on known beamforming or interferometric properties of the first antenna subset 116 to derive location information about the one or more RFID devices.

[0047] In operation 208, the data set may be transmitted to the second group of processing elements. For example, the first group of processing elements 104 may transmit the data set to the second group of processing elements 104. The specific processing elements 104 included in the second group may be identified by the processing element instruction set 108 being executed by the first group of processing elements 104. For example, the processing element instruction set 108 may include address information for the second group of processing elements 104. Once the first group of processing elements 104 generates the data set, the processing element instruction set 108 may instruct the first group of processing elements 104 to transmit the data set to the switch. The switch may then transmit the data set to the second group of processing elements 104.

[0048] In operation 210, the data set may be processed to generate a second signal of a second type. For example, the data set may be formatted for transmission according to a communication protocol corresponding to the signal of the second type. The communication protocol may be, for example, a cellular communication protocol such as 3G, 4G, or 5G. In other embodiments, the communication protocol may be Wi-Fi, Or any other type of communication protocol.

[0049] In operation 212, a second signal of a second type is transmitted utilizing the plurality of antennas. For example, the second group of processing elements 104 may transmit the second signal of the second type to the plurality of antennas 114, and specifically to the second subset of antennas 114, via the cellular interface 112. The second subset of antennas 118 may, for example, transmit the second signal of the second type to a cellular tower, or in the case of Wi-Fi, to a Wi-Fi node such as a router.

[0050] Figure 3 is a flow chart illustrating a method of processing signals with a single integrated circuit chip according to an embodiment of the present invention.

[0051] In operation 302, a first instruction set is loaded to a first group of processing elements. For example, the instruction set of the processing elements loaded by scheduling unit 108 may be passed to first group of processing elements 104 via NOC 106. First group of processing elements 104 may process data according to the received first instruction set.

[0052] In operation 304, a second instruction set is loaded to a second group of processing elements. For example, the instruction set of processing elements 104 loaded by scheduling unit 108 may be passed to a second group of processing elements 104 that is different from the first group of processing elements 104 in operation 302 via NOC 106. The second group of processing elements 104 may process data according to the received second instruction set. The second instruction set may generally include any type of instructions. In one embodiment, the second instruction set includes instructions to convert a received signal from a first format (e.g., a signal type or communication protocol) to a second format. For example, the second instruction set may include instructions to convert a signal from an RFID format to a format that can be transmitted via a cellular or WiFi network.

[0053] In operation 306, a first type of signal is received from the plurality of antennas. For example, the plurality of antennas 114 may detect one or more signals of the first type, such as radio frequency signals (e.g., and RFID signals). In one embodiment, the first type of signal may be received by the first set of antennas 116.

[0054] In operation 308, the first type of signal is routed to the first set of processing elements. For example, the plurality of antennas 114 may communicate the first type of received signal to the radio interface 110. The radio interface 110 may communicate the first type of signal to the first set of processing elements. As discussed above, the radio interface 110 may include various circuits, such as analog-to-digital converters, etc.

[0055] In operation 310, the first type of signal is processed based on the first instruction set. For example, the first set of processing elements 104 to which the first instruction set was loaded in operation 302 may process the first type of received signal according to the first instruction set. For example, the first instruction set may include processing instructions to determine the location of one or more sources of the first type of signal. However, those skilled in the art will appreciate that any series of instructions may be executed by the first set of processing elements 104.

[0056] In operation 312, the processed signals are routed to the second set of processing elements. For example, the first instruction set loaded into the first set of processing elements 104 may include instructions to pass processed signals of the first type to the second set of processing elements 104 into which the second instruction set was loaded in operation 304. Specifically, the first set of processing elements 104 may pass the processed signals to one or more switches along with instructions to transmit the signals to specific processing elements 104 executing the second instruction set. The one or more switches may then pass the processed signals to the second set of processing elements 104.

[0057] In operation 314, the signal is processed based on the second instruction set. For example, the second set of processing elements 104 to which the second instruction set is loaded in operation 304 may process the signal received in operation 312 to produce a signal of the second type. As a specific example, the second set of processing elements may convert the received signal into a format that can be transmitted via a cellular network or a WiFi network. Such processing may include, for example, converting the received signal into a data packet of information for transmission.

[0058] In operation 316, the signals are routed to the plurality of antennas. For example, the second set of processing elements 104 may transmit the processed signals to the cellular interface 112. As discussed above, the cellular interface 112 may include various circuits such as analog-to-digital converters. The cellular interface 112 may provide the second type of signals to the plurality of antennas 114. In a specific example, the cellular interface 112 may provide the second type of signals to the second set of antennas 118. In various embodiments, the second set of antennas 118 may be the same antennas as the first set of antennas 116 on which the first type of signals were received in operation 306.

[0059] In operation 318, a second type of signal is transmitted via the plurality of antennas.

[0060] Figure 4 1 is a block diagram of a plurality of clusters 406 of processing elements 104, radio interfaces 110, and cellular interfaces 112 according to an embodiment of the present invention. The clusters 406 of processing elements 104, radio interfaces 110, and cellular interfaces 112 may be as described above with respect to Figure 1 As described. Figure 44. As shown in FIG. 4, some clusters 406 may be grouped into one or more groups. For example, a first number of clusters 406 may be grouped into a first group 402, and a second number of clusters 406 may be grouped into a second group 404. Each of the clusters 406 in the first group 402 may be coupled to the radio interface 110, and the radio interface may route received signals to the clusters 406 in the first group 402. Each of the processing elements 104 in the clusters 406 may have a first instruction set loaded thereon, and may process signals received from the radio interface 110 according to the first instruction set. The clusters 406 of the first group 402 may transmit processed signals to the clusters 406 of the second group 404 via one or more switches. Each of the processing elements 104 of the clusters 406 of the second group 404 may have a second instruction set loaded thereon, and may process received signals according to the second instruction set to generate signals of a second type. The second set 404 of clusters 406 may be coupled to the cellular interface 112 and may communicate signals of the second type to the cellular interface 112 for transmission via a plurality of antennas (not shown).

[0061] Although each of the first group 402 and the second group 404 are shown as including nine clusters 406, based on system demand or signaling capacity, more or fewer clusters 406 may be dynamically added or subtracted from the first group 402 and / or the second group 404. For example, if the number of radio signals received by the antenna and transmitted to the radio interface 110 increases, additional clusters 406 may be added to the first group 402 to handle the increased processing load.

[0062] Figure 5 is a block diagram of a plurality of clusters 406 coupled via switches 502 according to an embodiment of the present invention. Figure 5In an embodiment of the present invention, each cluster 406 includes four processing elements 104. Each processing element 104 of a given cluster 406 may communicate directly with another processing element 104 within the same cluster 406. For example, each of processing elements PE0-3 may communicate directly with each other. Similarly, processing elements PE4-7 may communicate directly, as may processing elements PE8-11 and PE12-15. Processing elements 104 of different clusters 406 may communicate with each other via switch 502 based on instructions in any instruction set loaded for a given processing element 104. For example, processing element PE14 may transmit a signal to switch 502 with an instruction that the signal should be routed to processing element PE1. The switch may route the signal directly to processing element PE1, or the switch may route the signal to another processing element (e.g., processing element PE0, PE2, or PE3) in the same cluster as PE1, which then routes the received signal to processing element PE1. By linking clusters of processing elements together in this manner, more or fewer clusters 406 may be added simply by changing the instruction set loaded for a group of processing elements.

[0063] Figure 6 6. is a block diagram of processing element 104 according to an embodiment of the present invention. Processing element 104 generally includes processor 602 coupled to instruction memory 604, data memory 606, direct memory access controller 608, and switch 610.

[0064] The processor 602 may include, for example, several processing cores. In some examples, the processor 602 may include circuits (including custom circuits), and / or firmware for performing the functions described herein. For example, the circuit may include a multiplication unit / accumulation unit for performing the operations described herein. The processor 602 may be, for example, a microprocessor or a digital signal processor (DSP), or any combination thereof. The example processor core may include an arithmetic logic unit (ALU), a bit manipulation unit, a multiplication unit, an accumulation unit, an adder unit, a lookup table unit, a memory lookup unit, or any combination thereof. The instruction memory 604 is a memory device configured to store the processing element instruction set 108. The instruction memory 604 may generally be any type of memory. For example, the instruction memory 604 may be a volatile memory such as a dynamic random access memory, or a non-volatile memory such as a flash memory. The data memory 606 is a memory device configured to store received data, such as data contained in signals received and / or transmitted from the multiple antennas 114. Data memory 606 may generally be any type of memory. For example, data memory 606 may be a volatile memory such as a dynamic random access memory, or a non-volatile memory such as a flash memory. A direct memory access controller includes control circuitry for processor 602 to access instruction memory 604 and data memory 606. Switch 610 routes data from one processing element 104 to another processing element 104. For example, switch 610 may route data from one processing element 104 to another processing element 104 within a single cluster 406. A switch may generally be any type of switching structure.

[0065] In operation, the processing element instruction set 108 may be loaded into and stored in the instruction memory 604. Data in the form of received signals is stored in the data memory 606. The processor 602 processes the data in the data memory 606 according to the processing element instruction set 108 stored in the instruction memory 604. For example, the processor 602 may perform arithmetic operations, convert data from one format to another format, or perform any other type of operation. The direct memory access controller 608 may control the processor 602's access to the instruction memory 604 and / or the data memory 606. The processor 602 may pass the processed data to one or more other processing elements 104 via the switch 610.

[0066] Those of ordinary skill will further appreciate that the various illustrative logical blocks, configurations, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein may be implemented as electronic hardware, computer software executed by a processor, or a combination of both. Various illustrative components, blocks, configurations, modules, circuits, and steps have been described above generally in terms of their functionality. A skilled person may implement the described functionality in different ways for each specific application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

Claims

1. A method for processing a signal, comprising: loading a first instruction set into a first group of processing elements; receiving radio frequency signals at a first plurality of antennas, and processing the radio frequency signals using the first set of processing elements in accordance with the first set of instructions to provide processed signals related to the radio frequency signals; loading a second instruction set into a second group of processing elements; providing the processed signal to the second set of processing elements and further processing the processed signal according to the second set of instructions to provide a data packet for transmission via a cellular or Wi-Fi network; as well as The data packet is transmitted using a second plurality of antennas. 2 . The method of claim 1 , further comprising utilizing a radio interface to provide the radio frequency signal to the first set of processing elements. 3 . The method of claim 1 , wherein the data packet includes data including locations of one or more sources of the radio frequency signals.

4. The method of claim 1, further comprising utilizing a cellular interface to provide the data packets to the second plurality of antennas.

5. The method according to claim 1, further comprising: A portion of the first group of processing elements is dynamically added to the second group of processing elements as processing elements of the second group of processing elements based in part on an indication of an increase in processing load of an amount of data processed by the second group of processing elements.

6. The method according to claim 1, further comprising: passing the processed signal to one or more switches along with instructions to transmit the processed signal to the second set of processing elements; and The processed signal is passed through the one or more switches to the second set of processing elements.

7. The method according to claim 1, further comprising: The location of one or more sources of the radio frequency signal is determined.

8. A device for processing a signal, comprising: a plurality of antennas configured to receive signals of a first type; a scheduling unit configured to provide a first set of instructions and a second set of instructions to be executed by the first group of processing units and the second group of processing units; as well as an integrated circuit coupled to the plurality of antennas, the integrated circuit comprising the first set of processing elements and the second set of processing elements, wherein the first set of processing elements is configured to process the first type of signal according to the first instruction set and wherein the second set of processing elements is configured to receive processed signals based on the first type of signal and to generate a second type of signal based on the processed signals according to the second instruction set, Wherein the scheduling unit is further configured to receive the plurality of instruction sets from a memory and load the first instruction set and the second instruction set to the first group of processing elements and the second group of processing elements.

9. The apparatus of claim 8, further comprising: A plurality of switches configured to transmit processed signals of the first type from the first set of processing elements to the second set of processing elements.

10. The apparatus of claim 8, wherein the first type of signal corresponds to a radio frequency signal.

11. The apparatus of claim 8, wherein the second type of signal corresponds to a cellular signal.

12. An apparatus for processing a signal, comprising: a plurality of antennas configured to receive signals of a first type; a scheduling unit configured to provide a first set of instructions and a second set of instructions to be executed by the first group of processing units and the second group of processing units; an integrated circuit coupled to the plurality of antennas, the integrated circuit comprising the first set of processing elements and the second set of processing elements, wherein the first set of processing elements is configured to process the first type of signal in accordance with the first instruction set and wherein the second set of processing elements is configured to receive processed signals based on the first type of signal and to generate a second type of signal based on the processed signals in accordance with the second instruction set; a radio interface coupled to the plurality of antennas and the integrated circuit, the radio interface configured to transmit signals of the first type to the first set of processing elements for processing; and; A cellular interface is coupled to the plurality of antennas and the integrated circuit, the cellular interface being configured to transmit signals of the second type via the plurality of antennas.

13. The apparatus of claim 12, wherein the radio interface comprises an analog-to-digital converter.

14. The apparatus of claim 12, wherein the plurality of antennas comprises a first subset of antennas and a second subset of antennas, and wherein the radio interface is coupled to the first subset of antennas and the cellular interface is coupled to the second subset of antennas.

15. An apparatus for processing a signal, comprising: a plurality of antennas configured to receive signals of a first type; a scheduling unit configured to provide a first set of instructions and a second set of instructions to be executed by the first group of processing units and the second group of processing units; as well as an integrated circuit coupled to the plurality of antennas, the integrated circuit comprising the first set of processing elements and the second set of processing elements, wherein the first set of processing elements is configured to process the first type of signal according to the first instruction set and wherein the second set of processing elements is configured to receive processed signals based on the first type of signal and to generate a second type of signal based on the processed signals according to the second instruction set, Wherein a portion of the first group of processing elements is dynamically added to or from the second group of processing elements based on signaling capacity.

16. An apparatus for processing a signal, comprising: a plurality of antennas configured to receive signals of a first type; a scheduling unit configured to provide a first set of instructions and a second set of instructions to be executed by the first group of processing units and the second group of processing units; an integrated circuit coupled to the plurality of antennas, the integrated circuit comprising the first set of processing elements and the second set of processing elements, wherein the first set of processing elements is configured to process the first type of signal in accordance with the first instruction set and wherein the second set of processing elements is configured to receive processed signals based on the first type of signal and to generate a second type of signal based on the processed signals in accordance with the second instruction set; and A network on chip is configured to facilitate communication between the first set of processing elements and the second set of processing elements and the scheduling unit.

17. A method for processing a signal, comprising: receiving a signal of a first type via a first antenna array; loading a first instruction set into a first group of processing elements and a second instruction set into a second group of processing elements; processing the first type of signal using the first group of processing elements according to the first instruction set; generating a signal of a second type based on the processed signal of the first type according to the second set of instructions; as well as The second type of signal is transmitted via the second antenna array.

18. A method for processing a signal, comprising: receiving a signal of a first type via a first antenna array; processing the first type of signal using a first set of processing elements according to a first instruction set; converting the processed signal of the first type into a data packet for transmission; generating a second type of signal based on the processed first type of signal according to a second set of instructions; as well as The second type of signal is transmitted via the second antenna array.

19. A method for processing a signal, comprising: receiving a signal of a first type via a first antenna array; processing the first type of signal using a first set of processing elements according to a first instruction set; generating a second type of signal based on the processed first type of signal according to a second set of instructions; transmitting the second type of signal via a second antenna array; as well as A portion of the first group of processing elements is dynamically added to the second group of processing elements as processing elements of the second group of processing elements based in part on an indication of an increase in processing load of an amount of data processed by the second group of processing elements.

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