A method and related equipment for fault detection of semiconductor devices
By calculating the difference in the circuit reflection coefficient of semiconductor devices to detect device faults, the problems of inconvenient detection and high cost in the existing technology are solved, and rapid, non-destructive fault detection and determination of the number of broken bond wires are achieved.
Patent Information
- Application Number
- CN202111478391.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-06
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2041-12-06
AI Technical Summary
In the existing technology, fault detection methods for power semiconductor devices have the problems of not being able to perform online detection quickly and conveniently, and existing detection methods may damage the devices or be costly.
By acquiring the feedback signal and reference signal of the semiconductor device under test, calculating the circuit reflection coefficient, and determining whether the device is faulty by the difference between the circuit reflection coefficient and the target circuit reflection coefficient, the specific method includes acquiring the feedback signal and reference signal, calculating the circuit reflection signal and circuit reflection coefficient, and determining whether the difference exceeds a threshold.
It enables rapid and convenient detection of semiconductor device faults, avoids damage to the devices, reduces detection costs, and can determine the number of broken bond wires.
Smart Images

Figure CN114355133B_ABST
Abstract
Description
[Technical Field]
[0001] This invention relates to the field of semiconductor testing, and in particular to a method and related equipment for detecting faults in semiconductor devices. [Background Technology]
[0002] Power semiconductor devices, also known as power electronic devices, are high-power electronic components primarily used in power equipment for power conversion and control circuits. When power semiconductor devices age, are damaged, or fail, their usability is affected. Current technologies for power semiconductor device fault detection mainly categorize them into three types: mechanical, electrical, and morphological. Mechanical testing is primarily used for inspecting the bonding wire process quality before power semiconductor devices leave the factory. This process inevitably causes minor damage to the device under test and cannot perform online testing. Electrical testing can achieve online testing, but different detection circuits need to be designed for different power semiconductor devices, and it requires high resolution of the detection signal and a high level of expertise from the testing personnel. Morphological testing for encapsulated devices can only employ destructive sampling or X-ray imaging. Both of these methods require disassembling the device to specific equipment or creating a specific test structure, and X-ray testing is costly and inefficient. Therefore, how to quickly and conveniently test power semiconductor devices is a pressing issue that needs to be addressed. [Summary of the Invention]
[0003] To address the aforementioned issues, embodiments of the present invention provide a semiconductor device fault detection method and related equipment, which can quickly and conveniently determine whether a semiconductor device under test has malfunctioned.
[0004] In a first aspect, embodiments of the present invention provide a semiconductor device fault detection method, comprising:
[0005] Acquire the feedback signal after the reference signal passes through the semiconductor device under test;
[0006] The circuit reflection coefficient of the semiconductor device under test is determined based on the feedback signal and the reference signal;
[0007] Determine the first difference between the reflection coefficient of the circuit and the reflection coefficient of the target circuit;
[0008] If the first difference is greater than the first threshold, then the semiconductor device under test is determined to be faulty.
[0009] In this embodiment of the invention, the circuit reflection coefficient of the semiconductor device is calculated by acquiring the feedback signal and the reference signal after passing through the semiconductor device under test, and the difference between the circuit reflection coefficient and the target circuit reflection coefficient is used to determine whether the semiconductor device under test has malfunctioned.
[0010] In one possible implementation, determining the circuit reflection coefficient of the semiconductor device under test based on the feedback signal and the reference signal includes:
[0011] The circuit reflection signal of the semiconductor device under test is determined based on the feedback signal and the reference signal;
[0012] The circuit reflection coefficient is determined based on the circuit reflection signal and the reference signal.
[0013] In one possible implementation, determining the circuit reflection signal of the semiconductor device under test based on the feedback signal and the reference signal includes:
[0014] The circuit reflection signal is determined according to the formula Vr = VFB - Vref / 2, where Vr is the circuit reflection signal, VFB is the feedback signal, and Vref is the reference signal.
[0015] In one possible implementation, determining the circuit reflection coefficient based on the circuit reflected signal and the reference signal includes:
[0016] According to the formula Г=|Vr| / |0.5Vref|, where Г is the reflection coefficient of the circuit.
[0017] In one possible implementation, after determining that the semiconductor device under test has failed, the method further includes:
[0018] The input reflection parameters of the semiconductor device under test are determined based on the reflection coefficient of the circuit.
[0019] The number of broken bond wires in the semiconductor device under test is determined based on the value of the input reflection parameter.
[0020] In a second aspect, embodiments of the present invention provide a semiconductor fault detection device, comprising:
[0021] The acquisition module is used to acquire the feedback signal after the reference signal passes through the semiconductor device under test;
[0022] The processing module is used to determine the circuit reflection coefficient of the semiconductor device under test based on the feedback signal and the reference signal;
[0023] The processing module is further configured to determine a first difference between the circuit reflection coefficient and the target circuit reflection coefficient;
[0024] The processing module is further configured to determine that the semiconductor device under test has failed if the first difference is greater than a first threshold.
[0025] In one possible implementation, the processing module is specifically used for:
[0026] The circuit reflection signal of the semiconductor device under test is determined based on the feedback signal and the reference signal;
[0027] The circuit reflection coefficient is determined based on the circuit reflection signal and the reference signal.
[0028] In one possible implementation, the processing module is further configured to:
[0029] The input reflection parameters of the semiconductor device under test are determined based on the reflection coefficient of the circuit.
[0030] The number of broken bond wires in the semiconductor device under test is determined based on the value of the input reflection parameter.
[0031] Thirdly, embodiments of the present invention provide an electronic device, comprising:
[0032] At least one processor; and
[0033] At least one memory communicatively connected to the processor, wherein:
[0034] The memory stores program instructions that can be executed by the processor, and the processor can execute the methods described in the first and second aspects by calling the program instructions.
[0035] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing computer instructions that cause the computer to perform the methods described in the first and second aspects.
[0036] It should be understood that the second to fourth aspects of the embodiments of the present invention are consistent with the technical solutions of the first aspect of the embodiments of the present invention, and the beneficial effects achieved by each aspect and the corresponding feasible implementation are similar, and will not be described again. [Attached Image Description]
[0037] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0038] Figure 1 A schematic diagram of the equivalent impedance circuit model of a semiconductor device provided in an embodiment of the present invention;
[0039] Figure 2A flowchart of a semiconductor device fault detection method provided in an embodiment of the present invention;
[0040] Figure 3 A flowchart of another semiconductor device fault detection method provided in an embodiment of the present invention;
[0041] Figure 4 This is a waveform diagram of an input reflection parameter provided in an embodiment of the present invention;
[0042] Figure 5 This is a schematic diagram of the structure of a semiconductor device fault detection device provided in an embodiment of the present invention;
[0043] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention.
Detailed Implementation Methods
[0044] To better understand the technical solutions in this specification, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0045] It should be understood that the described embodiments are merely some, not all, of the embodiments in this specification. All other embodiments obtained by those skilled in the art based on the embodiments in this specification without inventive effort are within the scope of protection of this invention.
[0046] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of this specification. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.
[0047] In this embodiment of the invention, the circuit reflection coefficient of the semiconductor device under test is calculated to determine whether there are aging or damage faults inside the semiconductor device under test.
[0048] Figure 1 This is a schematic diagram of the equivalent impedance circuit model of a semiconductor device provided in an embodiment of the present invention, such as... Figure 1 As shown, P1 and P2 are any two pins of the semiconductor device. Figure 1 The equivalent impedance in an equivalent impedance network circuit is Z. in =R + jX, where R is the real resistance of the equivalent impedance network circuit, and jX is the imaginary reactance. Aging and damage to semiconductor devices are rarely caused by internal chip failure. Most often, they are caused by broken bonding wires from the chip to the package pins or aging and damage to the solder joints on both sides of the bonding wires. When a bonding wire in a semiconductor device breaks, the real resistance R increases, and the imaginary reactance jX also increases, thus leading to Z...in The magnitude increases. If the signal passes through a node with impedance discontinuity during its transmission, signal reflection will occur. Specifically, the reference signal can first pass through a fixed-length coaxial transmission line before being connected to the equivalent impedance network circuit, which can then be expressed by the formula... The circuit reflection coefficient Γ of the reflected signal is obtained by using the characteristic impedance of the coaxial transmission line as a reference. Therefore, the circuit reflection coefficient of the reference signal after passing through the equivalent impedance network can be obtained by comparing the measured circuit reflection coefficient with that of an intact semiconductor device.
[0049] Based on the above testing approach, this invention provides a semiconductor device fault detection method, such as... Figure 2 As shown, the processing steps of this method include:
[0050] Step 201: Obtain the feedback signal after the reference signal passes through the semiconductor device under test (DUT). This can be achieved by connecting a signal generation module to the DUT and generating the reference signal. The signal obtained after the reference signal passes through the DUT is the feedback signal. Optionally, a single-frequency signal can be used as the reference signal. The signal generation module can be connected to any pin of the DUT, and signal acquisition can be performed at any of the other pins to obtain the feedback signal. In some embodiments, the output of the signal generation module can be connected to a 1×2 power divider to obtain two reference signals. Then, one of the reference signals output by the power divider is compared with... Figure 1 Pin P1 is connected to the signal acquisition device, and the signal is acquired from pin P2 to obtain the feedback signal. Another reference signal output from the power divider is connected to the signal acquisition device to obtain the reference signal.
[0051] Step 202: Determine the circuit reflection coefficient of the semiconductor device under test (DUT) based on the feedback signal and the reference signal. In some embodiments, the circuit reflection signal of the DUT can be determined first based on the feedback signal and the reference signal, and then the circuit reflection coefficient can be determined based on the circuit reflection signal and the reference signal. Here, because the reference signal will be reflected when it encounters a node with impedance discontinuity during its passage through the semiconductor device, the circuit reflection signal will be superimposed on the forward-transmitting reference signal. Therefore, the feedback signal is essentially the result of the superposition of the reference signal and the circuit reflection signal. Thus, after obtaining the feedback signal and the reference signal, the circuit reflection coefficient can be determined using formula V. r =V FB -V ref / 2, to obtain the circuit feedback signal. Where Vr is the circuit reflected signal, V FBVref is the feedback signal, and Vref is the reference signal.
[0052] After obtaining the circuit reflection signal, it can be calculated using the formula Г=|V r | / |0.5V ref To determine the circuit reflection coefficient.
[0053] Step 203: Determine the first difference between the circuit reflection coefficient and the target circuit reflection coefficient. The target circuit reflection coefficient is the circuit reflection coefficient of a normal semiconductor device.
[0054] Step 204: If the first difference is greater than the first threshold, then the semiconductor device under test is determined to be faulty.
[0055] In some embodiments, after determining that the semiconductor device under test (DUT) is faulty, the number of broken bond wires in the DUT can also be determined based on the circuit reflection coefficient. For example... Figure 3 As shown, the processing steps of this method include:
[0056] Step 301: Determine the input reflection parameters of the semiconductor device under test based on the circuit reflection coefficient. The input reflection parameters are the S-parameters of the scattering parameters (S-parameters). 11 The parameters can be determined according to the formula S. 11 =20lg|Г| to convert the circuit reflection coefficient Г into the input reflection parameter S 11 .
[0057] Step 302: Determine the number of broken bond wires in the semiconductor device under test based on the value of the input reflection parameter. Figure 4 This is a waveform diagram of an input reflection parameter provided in an embodiment of the present invention. For example... Figure 4 As shown, waveform 1 represents the S-wave of a semiconductor device with no bond wire disconnection. 11 Parameter waveforms. Waveform 2 shows the S-wavelength of a semiconductor device with one bond wire disconnected. 11 Parameter waveforms, for example Figure 1 When any one of the bonding wires 1 to 6 shown in the diagram breaks, the S of the semiconductor device under test... 11 The parameter waveform is the same as waveform 2. Waveform 3 is the S-shape when two of the multiple bonded wires connected in parallel on the same side are broken. 11 Parameter waveforms, for example Figure 1 In the three parallel bonded wires on the left, bonded wires 1 and 2 are broken. Or, in the three parallel bonded wires on the right, bonded wires 5 and 6 are broken. Waveform 4 shows the S waveform when two bonded wires on opposite sides are broken. 11 Parameter waveform. For example... Figure 1 In the waveform, bond line 3, one of the three parallel bond lines on the left, is disconnected from bond line 6 on the right. Waveform 5 shows the S waveform when the three bond lines on opposite sides are disconnected. 11Parameter waveform. For example... Figure 1 Bond lines 2 and 3 in the middle, as well as bond line 6 on the right, are disconnected. Therefore, the S of the semiconductor device under test can be removed. 11 Parameter waveform and Figure 4 Each S in 11 The parameter waveforms are compared to determine the specific number of broken bonding wires in the semiconductor device under test.
[0058] Corresponding to the above-described semiconductor device fault detection method, this embodiment of the invention provides a schematic diagram of the structure of a semiconductor device fault detection device. (See diagram below.) Figure 5 As shown, the device includes an acquisition module 501 and a processing module 502.
[0059] The acquisition module 501 is used to acquire the feedback signal after the reference signal passes through the semiconductor device under test.
[0060] The processing module 502 is used to determine the circuit reflection coefficient of the semiconductor device under test based on the feedback signal and the reference signal.
[0061] The processing module 502 is also used to determine a first difference between the circuit reflection coefficient and the target circuit reflection coefficient.
[0062] The processing module 502 is further configured to determine that the semiconductor device under test has failed if the first difference is greater than the first threshold.
[0063] In some embodiments, the processing module 502 is specifically used for:
[0064] The circuit reflection signal of the semiconductor device under test is determined based on the feedback signal and the reference signal.
[0065] The circuit reflection coefficient is determined based on the circuit reflected signal and the reference signal.
[0066] In some embodiments, the processing module 502 is further configured to:
[0067] The input reflection parameters of the semiconductor device under test are determined based on the circuit reflection coefficient.
[0068] The number of broken bond wires in the semiconductor device under test is determined based on the values of the input reflection parameters.
[0069] Figure 5 The semiconductor device fault detection device provided in the illustrated embodiment can be used to execute this specification. Figures 1-4 The implementation principle and technical effects of the method embodiment shown can be further referred to the relevant description in the method embodiment.
[0070] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention, such as... Figure 6As shown, the aforementioned electronic device may include at least one processor and at least one memory communicatively connected to the processor, wherein the memory stores program instructions executable by the processor, and the processor can execute this specification by calling the program instructions. Figure 1-4 The embodiment shown provides a semiconductor device fault detection method.
[0071] like Figure 6 As shown, the electronic device is presented in the form of a general-purpose computing device. The components of the electronic device may include, but are not limited to: one or more processors 610, communication interface 620 and memory 630, and a communication bus 640 connecting different system components (including memory 630, communication interface 620 and processor 610).
[0072] Communication bus 640 represents one or more of several bus architectures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor, or a local bus using any of the various bus architectures. For example, these architectures include, but are not limited to, Industry Standard Architecture (ISA) buses, Micro Channel Architecture (MAC) buses, Enhanced ISA buses, Video Electronics Standards Association (VESA) local buses, and Peripheral Component Interconnect (PCI) buses.
[0073] Electronic devices typically include a variety of computer-readable media. These media can be any available media that can be accessed by the electronic device, including volatile and non-volatile media, and removable and non-removable media.
[0074] Memory 630 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) and / or cache memory. The electronic device may further include other removable / non-removable, volatile / non-volatile computer system storage media. Memory 630 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments described herein.
[0075] A program / utility having a set (at least one) of program modules can be stored in memory 630. Such program modules include—but are not limited to—an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. The program modules typically perform the functions and / or methods described in the embodiments of this specification.
[0076] Processor 610 executes various functional applications and data processing by running programs stored in memory 630, such as implementing the functions described in this specification. Figures 1-4 The embodiment shown provides a semiconductor device fault detection method.
[0077] This specification provides a computer-readable storage medium storing computer instructions that cause a computer to execute this specification. Figures 1-4 The embodiment shown provides a semiconductor device fault detection method.
[0078] The aforementioned computer-readable storage medium may be any combination of one or more computer-readable media. A computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium may be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), or flash memory, optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in connection with an instruction execution system, apparatus, or device.
[0079] The foregoing has described specific embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are possible or may be advantageous.
[0080] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this specification. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0081] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this specification, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0082] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this specification includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which the embodiments of this specification pertain.
[0083] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."
[0084] It should be noted that the devices involved in the embodiments of this specification may include, but are not limited to, personal computers (hereinafter referred to as PCs), personal digital assistants (hereinafter referred to as PDAs), wireless handheld devices, tablet computers, mobile phones, MP3 displays, MP4 displays, etc.
[0085] In the several embodiments provided in this specification, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.
[0086] Furthermore, the functional units in the various embodiments of this specification can be integrated into a single processor, or each unit can exist physically separately, or two or more units can be integrated into a single unit. The integrated units described above can be implemented in hardware or in a combination of hardware and software functional units.
[0087] The integrated units implemented as software functional units described above can be stored in a computer-readable storage medium. These software functional units, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, a connector, or a network device, etc.) or a processor to execute some steps of the methods described in the various embodiments of this specification. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0088] The above description is merely a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this specification should be included within the scope of protection of this specification.
Claims
1. A method for detecting faults in semiconductor devices, characterized in that, include: Acquire the feedback signal after the reference signal passes through the semiconductor device under test; The circuit reflection coefficient of the semiconductor device under test is determined based on the feedback signal and the reference signal; Determine the first difference between the reflection coefficient of the circuit and the reflection coefficient of the target circuit; If the first difference is greater than the first threshold, then the semiconductor device under test is determined to be faulty; After determining that the semiconductor device under test has failed, the method further includes: The input reflection parameters of the semiconductor device under test are determined based on the circuit reflection coefficient; wherein, the input reflection parameter is the S11 parameter in the scattering parameters, and the circuit reflection coefficient is converted into the S11 parameter according to the formula S11=20lg |Г|, where Г is the circuit reflection coefficient; The waveform of the S11 parameter of the semiconductor device under test is compared with the waveform of the S11 parameter corresponding to different numbers of broken bond lines to determine the number of broken bond lines in the semiconductor device under test. The reference signal is a single-frequency signal.
2. The method according to claim 1, characterized in that, Determining the circuit reflection coefficient of the semiconductor device under test based on the feedback signal and the reference signal includes: The circuit reflection signal of the semiconductor device under test is determined based on the feedback signal and the reference signal; The circuit reflection coefficient is determined based on the circuit reflection signal and the reference signal.
3. The method according to claim 2, characterized in that, Determining the circuit reflection signal of the semiconductor device under test based on the feedback signal and the reference signal includes: According to formula V r =V FB -V ref / 2 Determine the reflected signal of the circuit, where V r V is the reflected signal of the circuit. FB V is the feedback signal. ref This refers to the reference signal.
4. The method according to claim 3, characterized in that, Determining the circuit reflection coefficient based on the circuit reflected signal and the reference signal includes: According to the formula Г=|V r | / |0.5 V ref | where Г is the reflection coefficient of the circuit.
5. A semiconductor device fault detection device, characterized in that, include: The acquisition module is used to acquire the feedback signal after the reference signal passes through the semiconductor device under test; The processing module is used to determine the circuit reflection coefficient of the semiconductor device under test based on the feedback signal and the reference signal; The processing module is further configured to determine a first difference between the circuit reflection coefficient and the target circuit reflection coefficient; The processing module is further configured to determine that the semiconductor device under test has failed if the first difference is greater than a first threshold. The processing module is also used for: The input reflection parameters of the semiconductor device under test are determined based on the circuit reflection coefficient; wherein, the input reflection parameter is the S11 parameter in the scattering parameters, and the circuit reflection coefficient is converted into the S11 parameter according to the formula S11=20lg |Г|, where Г is the circuit reflection coefficient; The waveform of the S11 parameter of the semiconductor device under test is compared with the waveform of the S11 parameter corresponding to different numbers of broken bond lines to determine the number of broken bond lines in the semiconductor device under test. The reference signal is a single-frequency signal.
6. The apparatus according to claim 5, characterized in that, The processing module is specifically used for: The circuit reflection signal of the semiconductor device under test is determined based on the feedback signal and the reference signal; The circuit reflection coefficient is determined based on the circuit reflection signal and the reference signal.
7. An electronic device, characterized in that, include: At least one processor; as well as At least one memory communicatively connected to the processor, wherein: The memory stores program instructions that can be executed by the processor, and the processor can execute the method as described in any one of claims 1 to 4 by calling the program instructions.
8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause the computer to perform the method as described in any one of claims 1 to 4.
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