Boost rectifier

Abstract

This case provides a boost rectifier that receives a single-phase input voltage and includes an input stage, a switching conversion stage, an output stage, a decoupling stage, and a control circuit. The input stage receives the single-phase input voltage and includes first and second input filter capacitors. The switching conversion stage is coupled to the input stage and includes a rectifier circuit, an inductor circuit, first and second switches connected in series, and a phase output capacitor. There is a common point between the first and second switches. The output stage is configured to transfer the energy stored in the phase output capacitor to the output load. The decoupling stage is configured to perform high-impedance decoupling between the switching conversion stage and the output stage. The control circuit is configured to control the operation of the first and second switches according to a non-linear compensation signal, where the non-linear compensation signal is derived from the magnitude of the single-phase input voltage and the voltage or current on the output load.

Description

Technical Field

[0001] This case is about a front-end rectifier with power factor correction (PFC) function, especially a single-phase PFC rectifier with soft-switching. Background Art

[0002] In the aviation industry, the electrical load and power source characteristics are specified by the DO-160 standard ( https: / / www.rtca.org / content / publications ), which specifically specifies strict harmonic limits for airborne electrical equipment. In addition, modern airborne power distribution systems use a line frequency of up to 800 Hz to improve the performance of airborne generators and reduce the size of airborne passive components (such as transformers and filters). The following documents are for reference: (i) “Technology for the moreand all electric aircraft of the future,” by P. Wheeler, published in 2016 IEEEInternational Conference on Automatica (ICA-ACCA), Curico, 2016, pp. 1-5; (ii) “Advances in AC-DC power conversion topologies for More Electric Aircraft,” byB. Sarlioglu, published in 2012 IEEE Transportation Electrification Conferenceand Expo (ITEC), Dearborn, MI, 2012, pp. 1-6; and (iii) “Recent Advances of PowerElectronics Applications in More Electric Aircrafts,” by J. He et al., publishedin AIAA / IEEE Electric Aircraft Technologies Symposium (EATS), Cincinnati,OH, 2018, pp. 1-8.

[0003] Figure 1Shows an existing CCM (continuous-conduction-mode) PFC boost rectifier, which is optimized to have a line frequency of 50 or 60 Hz through an active input current shaping control method, where the active input current shaping method has a bandwidth of approximately 3 - 5 kHz and a low total harmonic distortion (THD). To achieve a similar current shaping effect at a line frequency of 800 Hz, the bandwidth of the corresponding current shaping control is approximately 50 kHz. However, in practice, since CCM PFC boost rectifiers using hard-switching are mostly designed to operate at a switching frequency of 100 kHz or lower to meet the required efficiency and thermal performance, it is difficult to implement a current shaping control method with such a large bandwidth in a CCM PFC boost rectifier using hard-switching.The following documents are available for reference: (i) “A Simple Digital DCM Control Scheme for Boost PFC Operating in Both CCM and DCM,” by S.F. Lim et al., published in IEEE Transactions on Industry Applications, vol. 47, no. 4, pp. 1802-1812, July-Aug. 2011; (ii) “Digital control for improved efficiency and reduced harmonic distortion over wide load range in boost PFC rectifiers,” by F. Chen et al., published in IEEE Trans. Power Electron., vol. 25, no. 10, pp. 2683–2692, Oct. 2010; and (iii) “Dynamic Strategy for Efficiency Estimation in a CCM-Operated Front-End PFC Converter for Electric Vehicle Onboard Charger,” by J. Lu et al., published in IEEE Transactions on Transportation Electrification, vol. 3, no. 3, pp. 545-553, Sept. 2017; and (iv) “Performance Evaluation of Bridgeless PFC Boost Rectifiers,” by L. Huber, et al., in IEEE Transactions on Power Electronics, vol. 23, no. 3, pp. 1381-1390, May 2008。

[0004] Figure 2Fig. 0 shows a conventional totem-pole bridgeless PFC rectifier, where the totem-pole bridgeless PFC rectifier has wide-bandgap (WBG) devices and operates in critical conduction mode. Examples of such PFC rectifiers can be found in the following references: (i) “Review of GaN totem-pole bridgeless PFC,” by Q. Huang et al., published in CPSS Transactions on Power Electronics and Applications, vol. 2, no. 3, pp. 187-196, Sept. 2017; (ii) “Design of GaN-Based MHz Totem-Pole PFC Rectifier,” by Z. Liu et al., published in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 4, no. 3, pp. 799-807, Sept. 2016; (iii) “Application of GaN devices for 1kW server power supply with integrated magnetics,” by F. C. Lee et al., published in CPSS Transactions on Power Electronics and Applications, vol. 1, no. 1, pp. 3-12, Dec. 2016.

[0005] To enable a PFC boost rectifier to achieve a low total harmonic distortion, it is necessary to accurately detect the zero-crossing points of the boost inductor current and the line input voltage without significant delay. However, when applied to commercially available gate drivers with propagation delay and commercially available digital controllers with limited processing speed, existing current detection techniques cannot achieve a total harmonic distortion of less than 5% at a line frequency of 800 Hz. The following literature is for reference: "GaN-based high frequency totem-pole bridgeless PFC design with digital implementation," by L. Xue et al., published in 2015 IEEE Applied Power Electronics Conference and Exposition (APEC), Charlotte, NC, 2015, pp. 759-766.

[0006] In the patent with US Publication No. 8,687,389 (entitled "Three-phase soft-switched PFC rectifier"), a PFC rectifier operating in a three-phase input voltage application is disclosed. The rectifier in this patent can achieve good power factor and low total harmonic distortion even when operating at a high line frequency when receiving a three-phase input voltage, and without additional large bandwidth or active current shaping control. In this PFC rectifier, when the neutral line of the three-phase input power supply is isolated from the PFC rectifier, even though power is transmitted through the three-phase input connection, the third harmonic in the input current (i.e., the third harmonic and its odd multiples) does not flow through the three-phase input connection. Therefore, the third harmonic current in the PFC rectifier can flow through the input filter capacitor and will not be reflected at the input port, whereby the PFC rectifier can have a good power factor. However, when operating in a single-phase system, power cannot be supplied without a neutral line connection. Therefore, since the third harmonic current in the PFC rectifier flows through the neutral line at the single-phase input terminal, it will result in a poor power factor in the single-phase system. Summary of the Invention

[0007] The object of this case is to provide a boost rectifier that receives a single-phase input voltage and is controlled by a control circuit, where the control circuit operates according to a non-linear compensation signal. The boost rectifier of this case can achieve zero-voltage switching (ZVS), and by introducing a feed-forward signal to adjust the switching frequency, a low total harmonic distortion of the input current can be obtained.

[0008] According to an embodiment of the present case, a power factor correction (PFC) discontinuous-conduction-mode (DCM) boost rectifier including a non-linear compensation circuit is provided, wherein the non-linear compensation circuit enables the power factor correction (PFC) discontinuous-conduction-mode (DCM) boost rectifier to achieve both zero voltage switching and a total input current harmonic distortion of 5% or even lower. The non-linear compensation circuit combines a feed-forward signal and an output voltage feedback control signal, wherein the feed-forward signal is derived from the input and output voltages of the power factor correction (PFC) discontinuous-conduction-mode (DCM) boost rectifier. Since low total harmonic distortion can be achieved without the need for additional large bandwidth or active current shaping control, the PFC boost rectifier of the present case is applicable to high-frequency line voltage applications (such as the aviation industry) and can thereby achieve a high power factor. In addition, the power factor correction (PFC) discontinuous-conduction-mode (DCM) boost rectifier of the present case can reduce common-mode noise.

[0009] According to an embodiment of the present case, a boost rectifier is provided that operates with a single-phase input voltage and includes an input stage, a switched conversion stage, an output stage, a decoupling stage, and a control circuit. The input stage includes first and second terminals and first and second input filter capacitors, wherein the first and second terminals are adapted to receive the single-phase input voltage. The switched conversion stage has a plurality of input terminals and first and second phase terminals, wherein the plurality of input terminals are coupled to the first and second terminals of the input stage. The switched conversion stage includes a rectifier circuit, an inductor circuit, first and second switches connected in series, and a phase output capacitor. The rectifier circuit is coupled between the plurality of input terminals and the plurality of phase terminals. The inductor circuit includes first and second boost inductors and is coupled between the plurality of input terminals and the plurality of phase terminals. There is a common point between the first and second switches, and the common point is respectively coupled to the first and second terminals of the input stage through the first and second input filter capacitors of the input stage. The phase output capacitor is connected between the first and second phase terminals. The output stage is configured to transfer the energy stored in the phase output capacitor to the output load. The decoupling stage is configured to perform high-impedance decoupling between the switched conversion stage and the output stage. The control circuit is configured to control the operation of the first and second switches according to a non-linear compensation signal, wherein the non-linear compensation signal is derived from the magnitude of the single-phase input voltage and the voltage or current on the output load. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 An existing CCM PFC boost rectifier is shown, which is optimized to have a line frequency of 50 Hz or 60 Hz through an active input current shaping control method, wherein the active input current shaping method has a bandwidth of about 3 - 5 kHz and a low total harmonic distortion.

[0011] Figure 2A conventional totem pole bridgeless PFC rectifier is shown, wherein the totem pole bridgeless PFC rectifier has wide bandgap elements and operates in a critical conduction mode.

[0012] Figure 3 A boost rectifier 300 operating with zero voltage switching is shown in one embodiment of the present disclosure.

[0013] Figure 4 FIG. 4 is a circuit diagram 400 showing the operation of the boost rectifier 300 according to an embodiment of the present invention.

[0014] Figure 5A , Figure 5B , Figure 5C , Figure 5D , Figure 5E , Figure 5F , Figure 5G , Figure 5H and Figure 5I The topologies of the circuit diagram 400 of one embodiment of the present invention in different time periods in the switching cycles of the switches S1 and S2 are respectively shown.

[0015] Figure 6 Shown in Figures 5A through 5I The main waveforms of each power stage in the switching cycle.

[0016] Figure 7 The figure shows that when no nonlinear compensation signal is applied (ie, the nonlinear compensation term 2V is multiplied by 2V in the multiplier 364), CR -V AC,RMS sinωt is set to 1), at the input line voltage V AC The peak input current 701 and the average input current 702 of the boost rectifier 300 during the positive half cycle and the corresponding switching frequency f S .

[0017] Figure 8 It shows that when the nonlinear compensation signal is applied (ie, the nonlinear compensation term 2V is multiplied by 2V in the multiplier 364), CR -V AC,RMS sinωt multiplied by the signal G), at the input voltage source V AC The peak input current 703 and the average input current 704 of the boost rectifier 300 during the positive half cycle and the corresponding switching frequency f S .

[0018] Figure 9 A boost rectifier 900 according to an embodiment of the present invention is shown, wherein Figure 3 The boost rectifier 300 shown in FIG. 1 is different from the boost rectifier 900 in that the boost rectifier 900 has a common point N between the series-connected switches S1 and S2 and a series-connected output filter capacitor C O1 and C O2Blocking capacitance C between common points B .

[0019] Figure 10 Fig. shows a boost rectifier 1000 according to an embodiment of the present case, which is different from the boost rectifier 300 shown in that the boost rectifier 1000 has boost inductors L1 and L2 on the downstream side of the rectifier circuit, and the rectifier circuit includes diodes D1 to D4 forming a full-bridge structure. Figure 3

[0020] Figure 11 Fig. shows a boost rectifier 1100 according to an embodiment of the present case, which has a transformer TR in the isolated output stage.

[0021] Figure 12 Fig. shows a boost rectifier 1200 according to an embodiment of the present case, which has switches S1 to S4 forming a full-bridge structure.

[0022] Figure 13 Fig. shows a boost rectifier 1300 according to an embodiment of the present case, which has switches S1 and S2, and switches S1 and S2 form a half-bridge resonant circuit with resonant inductor L R and resonant capacitor C R1 and C R2

[0023] Figure 14 Fig. shows a boost rectifier 1400 according to an embodiment of the present case, which has switches S1 to S4, and switches S1 to S4 form a full-bridge resonant circuit with resonant inductor L R and resonant capacitor Cr.

[0024] Among them, the reference numerals are explained as follows:

[0025] 300: Boost rectifier

[0026] 305: Input stage

[0027] 310: Switching conversion stage

[0028] 315: Decoupling stage

[0029] 350: Control circuit

[0030] 320: Output stage

[0031] V AC : Input voltage source

[0032] C1, C2: Input filter capacitors

[0033] L1, L2: Boost inductors

[0034] D1, D2, D3, D4: Diodes ​​

[0035] C R : Flying capacitor

[0036] S1, S2: Switches

[0037] N: Common point

[0038] L C : Coupled inductor

[0039] C O1 and C O2 : Output filter capacitor

[0040] V O : Output voltage

[0041] R: Resistor

[0042] V AN and V BN and V CR and V O1 and V O2 : Voltage

[0043] 355: Nonlinear compensation circuit

[0044] 360: Amplifier and compensator

[0045] 361: Scaling and rectifying circuit

[0046] 362: Scaling circuit

[0047] 363: Adder

[0048] 364: Multiplier

[0049] G: Compensation signal

[0050] V CO : Voltage-controlled oscillator

[0051] T S : Switching period

[0052] 400: Circuit schematic diagram

[0053] V S1 and V S2 and V LC : Voltage

[0054] i S1 and i S2 : Current

[0055] L M : Excitation inductor

[0056] L LK1 and L LK2 : Leakage inductance

[0057] i O1 、i O2 : Output current

[0058] i M : Excitation current

[0059] C OSS1 、C OSS2 : Output capacitor

[0060] i L1 、i L2 : Inductor current

[0061] T0, T1, T2, T3, T4, T5, T6, T7, T8, T9: Moments

[0062] 701: Peak input current

[0063] 702: Average input current

[0064] f S : Switching frequency

[0065] 703: Peak input current

[0066] 704: Average input current

[0067] 900: Boost rectifier

[0068] C B : Blocking capacitor

[0069] 1000: Boost rectifier

[0070] 1100: Boost rectifier

[0071] TR: Transformer

[0072] C B1 、C B2 : Blocking capacitor

[0073] D O1 、D O2 : Rectifier

[0074] L O : Output inductor

[0075] C O : Output capacitor

[0076] 1200: Boost rectifier

[0077] S3, S4: Switches

[0078] 1300: Boost rectifier

[0079] L R : Resonant inductor

[0080] C R1 and C R2 : Resonant capacitor

[0081] 1400: Boost rectifier

[0082] Cr: Resonant capacitor Detailed implementation manners

[0083] Some typical embodiments embodying the features and advantages of the present case will be described in detail in the following description. It should be understood that the present case can have various changes in different aspects, all of which do not depart from the scope of the present case, and the descriptions and illustrations therein are essentially for illustrative purposes and not for limiting the present case.

[0084] Figure 3 Shows a boost rectifier 300 operating with zero voltage switching in an embodiment of the present case. As Figure 3 shown, the boost rectifier 300 includes an input stage 305, a switched conversion stage 310, a decoupling stage 315, a control circuit 350, and an output stage 320. The input stage 305 includes a single-phase input voltage source V AC and input filter capacitors C1 and C2. The switched conversion stage 310 includes boost inductors L1 and L2, and each boost inductor is coupled between one end of the input voltage source V AC and one input terminal of the rectifier circuit. In this embodiment, the rectifier circuit includes diodes D1, D2, D3, and D4, and the diodes D1, D2, D3, and D4 are connected in a full-bridge configuration to form a full-bridge rectifier. In addition, the switched conversion stage 310 further includes a flying capacitor C R (also referred to as a phase output capacitor) and switches S1 and S2 connected in series, and there is a common point N electrically connected between the switches S1 and S2. The flying capacitor C R and the switches S1 and S2 connected in series are both connected across all phase terminals of the switched conversion stage 310 (in this example, the output terminals of the rectifier circuit). The input filter capacitors C1 and C2 are respectively connected between one end of the input voltage source V AC and the common point N of the switches S1 and S2. The decoupling stage 315 includes a coupled inductor L C , and the coupled inductor L C isolates the common-mode noise between the output terminals of the switched conversion stage 310 (i.e., on the flying capacitor C R ) from the output stage 320. The output stage 320 includes output filter capacitors C O1 and C O2 connected in series, and the output filter capacitors C O1 and C O2There is an electrical connection to a common point (equivalent to common point N). Furthermore, the series-connected output filter capacitors C O1 and C O2 The common point between them is coupled to the common point between the input filter capacitors C1 and C2. In Figure 3 In, the output voltage V of the boost rectifier 300 O Is applied to a resistive output load (represented by resistor R). In this embodiment, the boost rectifier 300 is a PFC DCM boost rectifier.

[0085] The input filter capacitors C1 and C2 provide an intermediate voltage at the common point N between the peak and valley of the input voltage source V AC (for example, half of the amplitude of the input voltage source V AC ). In this architecture, the voltage on the common point N can decouple the two currents flowing through the boost inductors L1 and L2, that is, the current flowing through the boost inductor L1 only depends on the phase voltage V on the input filter capacitor C1 AN , and the current flowing through the boost inductor L2 only depends on the phase voltage V on the input filter capacitor C2 BN . In this embodiment, the phase voltages V AN and V BN Have substantially equal amplitudes, but their polarities are opposite. Specifically, when the switch S1 conducts during the positive half cycle of the input voltage source V AC , the input filter capacitor C1 transfers current through the series-connected boost inductor L1 and switch S1. Similarly, when the switch S2 conducts during the negative half cycle of the input voltage source V AC , the input filter capacitor C2 transfers current through the series-connected boost inductor L2 and switch S2. When the switch S1 is turned off, the energy stored in the boost inductor L1 is transferred to the flying capacitor C R . Similarly, when the switch S2 is turned off, the energy stored in the boost inductor L2 is transferred to the flying capacitor C R .

[0086] During a specific part of each switching cycle, there is a rapid voltage change (i.e., a large voltage change rate dV / dt) between the common point N and the terminals of the flying capacitor C R , and by coupling the inductor L C Isolating the flying capacitor C R From the output stage 320 can reduce the unacceptable common-mode electromagnetic interference (EMI) noise caused by this rapid voltage change. In this architecture, since the output common-mode noise is located in a relatively small circuit or in the loop formed by the switches S1 and S2 and the flying capacitor C R , the output common-mode noise is extremely low. Furthermore, using the coupling inductor LC An impedance is provided between the output stage 320 and the switches S1 and S2, enabling parallel or interleaved operation between multiple parallel rectifiers (i.e., multiple switched conversion stages can be coupled in parallel to the same output stage through multiple decoupling stages).

[0087] Figure 3 A block schematic diagram of the control circuit 350 is also shown, where the control circuit 350 combines a feedforward signal and an output voltage feedback control signal. The feedforward signal is derived based on the input and output voltages of the boost rectifier 300. The feedforward signal manipulates the control system in a predetermined manner, independent of the output load. Conversely, the feedback control signal causes the control system to respond to the output load. In some embodiments, the control circuit 350 includes a controller and a gate drive circuit, and the gate drive circuit controls the operation of the switches S1 and S2 according to a non-linear compensation signal, where the non-linear compensation signal is derived from the magnitude of the single-phase input voltage and the voltage or current on the output load. Here, in this embodiment, the boost rectifier 300 can be a power factor correction (PFC) discontinuous conduction mode (DCM) boost rectifier.

[0088] As Figure 3 shown, the control circuit 350 includes a non-linear compensation circuit 355, where the scaling and rectification circuit 361 of the non-linear compensation circuit 355 receives the input voltage from the input voltage source V AC and rectifies and scales the received input voltage by a specific ratio to provide a ratio-adjusted and rectified voltage k||V AC ||. Then, the adder 363 subtracts the ratio-adjusted output voltage 2kV AC || from the ratio-adjusted and rectified voltage k||V O , where the ratio-adjusted output voltage 2kV O is output by the scaling circuit 362 based on the output voltage V O . The adder 363 outputs a non-linear compensation term k(2V O -||V AC ||) representing the voltage difference. Then, the multiplier 364 multiplies the non-linear compensation term by the compensation signal G, where the compensation signal G is provided by the amplifier and compensator 360. The compensation signal G is derived from the feedback control signal based on the output voltage V O . The product of the compensation signal G and the non-linear compensation term (i.e., the non-linear control signal) is used to drive the voltage-controlled oscillator V CO , where the voltage-controlled oscillator V CO generates gate signals for controlling the switches S1 and S2. The gate signals of the switches S1 and S2 are interleaved and non-overlapping pulse signals, with an approximate duty cycle of 50%, and their switching period T S and the non-linear control signal and the voltage-controlled oscillator VCO is proportional to the product of the substantial fixed gain. By the above control method, the control circuit 350 can make the boost rectifier 300 have low total harmonic distortion and an ideal high power factor, and can avoid using the active current shaping control method. In this embodiment, the non-linear compensation circuit 355 is integrated in the controller, and the controller is part of the control circuit 350. In some embodiments, the non-linear compensation circuit 355 is used to combine the feed-forward signal derived from the input and output voltages of the boost rectifier 300 with the output voltage feedback signal, and generate an output signal, and the control circuit 350 controls the operation of the switches S1 and S2 according to the output signal generated by the non-linear compensation circuit 355. In some embodiments, the non-linear compensation circuit 355 can be integrated in the controller or be part of the control circuit 350. In other embodiments, the non-linear compensation circuit 355 and the control circuit 350 can also be independent of each other.

[0089] Figure 4 is a circuit schematic diagram 400 of the operation of the boost rectifier 300 according to an embodiment of the present case. When the common switching frequency of the switches S1 and S2 is significantly higher than the line frequency, the ripple voltages on the input filter capacitors C1 and C2, the flying capacitor C R and the output filter capacitor C O1 and C O2 can be ignored, so the voltages thereon can be represented by fixed voltages V AN , V BN , V CR , V O1 and V O2 respectively. In Figure 4 , even if the output capacitances of the switches S1 and S2 are not ignored, the semiconductor switches S1 and S2 are still regarded as having substantially zero resistance (i.e., regarded as short circuits) when conducting. In addition, the coupled inductor L C is equivalent to a dual-winding ideal transformer including the exciting inductor L Figure 4 and the leakage inductors L M and L LK1 and L LK2 in R , since the average voltage on the flying capacitor C O is substantially equal to the output voltage V O (the output voltage V O1 is equal to the sum of the voltages V O2 and V R ), the flying capacitor C CR can be equivalent to a fixed voltage V Figure 4 . In AC , the reference directions of the current and voltage correspond to the half-cycle time period satisfying V AN >0, V BN <0.

[0090] Figures 5A through 5I The circuit schematic diagram 400 of an embodiment of the present case shows the topologies at different time periods during the common switching period of switches S1 and S2. Figure 6 It shows at Figures 5A through 5I the main waveforms of each power stage during the switching period where it is located. In Figure 6 , the gate signals of switches S1 and S2 are respectively labeled with the symbols "S1" and "S2". Similarly, the constants "L1" and "L2" respectively represent the inductance values of the boost inductors L1 and L2. V S1 , V S2 and V LC are the voltages across the first switch S1, the second switch S2, and the coupled inductor L C respectively, and i S1 and i S2 are the currents flowing through the first switch S1 and the second switch S2 respectively.

[0091] As Figure 6 shown, the gate signals of switches S1 and S2 do not overlap, are phase-shifted from each other by a substantially 180° angle, and there is a short dead time (for example, the period from time T1 to T) between the turn-off moment of any one switch and the turn-on moment of the other switch. Thus, both switches S1 and S2 can achieve zero-voltage switching. To maintain zero-voltage switching within the variation range of the input and output voltages, a variable switching frequency control method is adopted for the boost rectifier of an embodiment of the present case. When this variable switching frequency control method is adopted, a low switching frequency corresponds to heavy load or low input voltage, while a high switching frequency corresponds to light load or high input voltage. In one embodiment, the boost rectifier is a power factor correction (PFC) discontinuous conduction mode (DCM) boost rectifier. The boost rectifier of an embodiment of the present case can operate in a controlled burst mode or a pulse-skip mode under extremely light load or zero-load conditions, thereby avoiding any unnecessary high-frequency operations. In one embodiment, the boost rectifier is a power factor correction (PFC) discontinuous conduction mode (DCM) boost rectifier.

[0092] As Figure 5A and Figure 6 shown, during the period from time T0 to T1, when switch S2 is in the off state and the conducting switch S1 has not been turned off, the inductor current i L1 of the boost inductor L1 flows through switch S1 at a rate substantially equal to V AN / L1 and reaches a peak value at time T1 Peak value can be approximated as:

[0093]

[0094] where V AN is the phase voltage across the input filter capacitor C1, and T S is the common switching period. Since the dead time between the turn-off time T1 of switch S1 and the turn-on time T2 of switch S2 is relatively short compared to the switching period T S , Equation (1) does not take into account the time period from T1 to T2. During the time from T0 to T1, the output current i LK1 from the leakage inductor L O1 decreases at a rate of , while the output current i LK2 from the leakage inductor L O2 increases at a rate of , where V CR is the voltage across the flying capacitor C R . The magnetizing current i M from the magnetizing inductor L M can be obtained from the difference between the output currents i O1 and i O2 . In this embodiment, the magnetizing inductor L M is large enough so that the ripple current in the coupled inductor L C does not significantly affect the operation of the power factor correction (PFC) discontinuous conduction mode (DCM) boost rectifier.

[0095] As Figure 4 shown, the two windings in the coupled inductor L C have corresponding differential currents in the output currents i O1 and i O2 respectively, and the magnetic fluxes from these differential currents can cancel each other out, so that the magnetizing inductor L M can be provided by a small air gap in the magnetic core and will not cause saturation.

[0096] Figure 5B shows the topology of the circuit schematic 400 of an embodiment of the present case during the time period from T1 to T2 in a switching cycle of switches S1 and S2. When switch S1 turns off at time T1, the inductor current i L1 in the boost inductor L1 starts to charge the output capacitor C OSS1 of switch S1. Since the sum of the voltages across switches S1 and S2 is limited by the voltage V R across the flying capacitor C CR , the output capacitors C OSS1 and C OSS2 of switches S1 and S2 are charged and discharged at approximately the same rate respectively. At time T2, the output capacitor C OSS2Fully discharge, so that the anti-parallel body diode of switch S2 starts to conduct.

[0097] Figure 5C Figure 400 shows the topology of a circuit schematic of an embodiment of this case during the period from time T2 to T3 in a switching cycle of switches S1 and S2. As Figure 6 shown, when the body diode of switch S2 is forward-biased at time T2, the inductor current i L2 starts to increase linearly. At time T3, switch S2 conducts under zero-voltage conditions, and the inductor current i L2 starts to flow through switch S2.

[0098] Figure 5D Figure 400 shows the topology of a circuit schematic of an embodiment of this case during the period from time T3 to T4 in a switching cycle of switches S1 and S2. The inductor current i L2 continues to flow through switch S2, and the current i L1 flowing through boost inductor L1 drops to zero at time T4.

[0099] To maintain DCM operation, the duration from time T3 to T4 needs to be maintained at less than half of the switching cycle T S so that the rising rate of the inductor current i L1 is less than the falling rate. In this switching mode, the voltage on the flying capacitor C R is the minimum voltage and thus the minimum output voltage value is generated where the minimum voltage can be obtained from Equation (2).

[0100]

[0101] where, represents the peak phase voltage on the input filter capacitor C1, and V AC,RMS represents the root-mean-square (RMS) value of the input voltage V AC . Since the flowing directions of the inductor currents i L1 and i L2 are opposite during the period from time T2 to T4, the average current flowing through switch S2 is less than the individual currents, resulting in reduced conduction power consumption.

[0102] Figure 5E Figure 400 shows the topology of a circuit schematic of an embodiment of this case during the period from time T4 to T5 in a switching cycle of switches S1 and S2. During the period from time T4 to T5, the inductor current i L2 continues to flow through switch S2 and increases at a rate of V BN / L2, and reaches the peak value at time T5 where the peak value Approximately equal to:

[0103]

[0104] Wherein, V BN is the phase voltage on the input filter capacitor C2. Equations (1) and (3) respectively show the peak values of the inductor currents i L1 and i L2 . And since the inductance values of the inductors L1 and L2 are substantially equal, the peak values of the inductor currents i L1 and i L2 are respectively proportional to their corresponding phase voltages.

[0105] Figure 5F shows the topology of the circuit schematic diagram 400 of an embodiment of the present case during the time period from T5 to T6 in a switching cycle of the switches S1 and S2. At time T5, the switch S2 is turned off, causing the inductor current i L2 to start charging the output capacitor C OSS2 of the switch S2 and discharging the output capacitor C OSS1 of the switch S1.

[0106] Figure 5G shows the topology of the circuit schematic diagram 400 of an embodiment of the present case during the time period from T6 to T7 in a switching cycle of the switches S1 and S2. At time T6, the output capacitor C OSS1 of the switch S1 is completely discharged, and the anti-parallel body diode of the switch S1 starts to conduct. At the same time, the switch S1 conducts under zero voltage conditions. As Figure 6 shows, the switch S1 conducts at time T7.

[0107] Figure 5H shows the topology of the circuit schematic diagram 400 of an embodiment of the present case during the time period from T7 to T8 in a switching cycle of the switches S1 and S2. Once the switch S1 conducts, the rising inductor current i L1 and the inductor current i L2 flow through the switch S1 in opposite directions, such that the current flowing through the switch S1 is substantially equal to the difference between the inductor currents i L1 and i L2 .

[0108] Figure 5I shows the topology of the circuit schematic diagram 400 of an embodiment of the present case during the time period from T8 to T9 in a switching cycle of the switches S1 and S2. At time T8, the inductor current i L2 drops to zero. At time T9, a new switching cycle starts, and at the same time the switch S1 is turned off.

[0109] As Figure 6As shown, when switch S1 or S2 is turned on, the corresponding phase voltage is applied to the boost inductor L1 or L2 connected thereto via the conducting diodes in the full-bridge rectifier. Conversely, when switch S1 or S2 is turned off, the voltage difference between the corresponding phase voltage and the voltage V R on the flying capacitor C CR is applied to the boost inductor L1 or L2 connected thereto until the current i L1 or i L2 in the boost inductor reaches zero.

[0110] The average inductor current S over the switching period T can be obtained from Equation (4).

[0111]

[0112] where L is the effective equivalent inductance value of the boost inductors L1 and L2, and ω is the angular frequency of the line voltage. To achieve power factor correction, in one embodiment, the switching period T S is preferably proportional to 2V CR -V AC,RMS sinωt, or as shown in Equation (5).

[0113] T S = K(2V CR -V AC,RMS sinωt) (5)

[0114] where K is a constant. Based on this switching frequency, Equation (6) can be further derived.

[0115]

[0116] Since the voltage V R on the inductor L and the flying capacitor C CR is substantially fixed during the switching period T S , the average inductor current is proportional to the input voltage .

[0117] Please refer to Figure 3 again. The output signal of the adder 363 is substantially the non-linear compensation term 2V CR -V AC,RMS sinωt in Equation (5). Therefore, the switching period T S of the gate signals of switches S1 and S2 is proportional to the non-linear compensation term 2V CR -V AC,RMSsinωt. Accordingly, the boost rectifier 300 can automatically achieve power factor correction without the need for an active current shaping control method. In this embodiment, the boost rectifier 300 is a power factor correction (PFC) discontinuous conduction mode (DCM) boost rectifier.

[0118] Figure 7 shows the peak input current 701, the average input current 702, and the corresponding switching frequency f of the boost rectifier 300 during the positive half-cycle of the input voltage source V when no non-linear compensation signal is applied (i.e., when the non-linear compensation term 2V CR -V AC,RMS sinωt is set to 1) AC . The switching frequency f S is equal to 1 / T S . S

[0119] Figure 8 shows the peak input current 703, the average input current 704, and the corresponding switching frequency f of the boost rectifier 300 during the positive half-cycle of the input voltage source V when a non-linear compensation signal is applied (i.e., when the non-linear compensation term 2V CR -V AC,RMS sinωt is multiplied by the signal G). As AC shown, according to the non-linear compensation term in Equation (5), the switching frequency f S varies with the input voltage source V Figure 8 and the output voltage V S . AC O

[0120] The content of the present invention may have various possible changes and adjustments according to actual needs. For example, Figure 9 shows a boost rectifier 900 according to an embodiment of the present invention, which is different from the boost rectifier 300 shown in Figure 3 in that the boost rectifier 900 has a blocking capacitor C O1 between the common point N between the series-connected switches S1 and S2 and the common point between the series-connected output filter capacitors C O2 and C B . In this embodiment, the common point between the series-connected output filter capacitors C O1 and C O2 in the output stage 320 and the common point between the series-connected switches S1 and S2 in the switching conversion stage 310 are interconnected via the blocking capacitor C B . The blocking capacitor C B will significantly reduce any current flowing through the common point N and the output filter capacitors C O1 and C O2The low-frequency current at the common point between. Blocking capacitor C B The capacitance value of can be much smaller than the output filter capacitor C O1 and C O2 The capacitance value of.

[0121] Figure 10 Fig. shows a boost rectifier 1000 according to an embodiment of the present case, wherein different from the boost rectifier 300 shown in Figure 3 The boost rectifier 1000 has boost inductors L1 and L2 located on the downstream side of the rectifier circuit, and the rectifier circuit includes diodes D1 to D4 forming a full-bridge structure.

[0122] Figure 11 Fig. shows a boost rectifier 1100 according to an embodiment of the present case, which has a transformer TR in the isolated output stage. As Figure 11 shown, the transformer TR includes a primary-side winding, and the center tap of the primary-side winding is connected to the common point between the first and second switches S1 and S2 of the switched conversion stage. The boost rectifier 1100 replaces Figure 3 the coupling inductor L in the boost rectifier 300 shown in C , where the transformer TR is center-tapped to provide a virtual ground terminal for the primary-side winding and the secondary-side winding. Blocking capacitor C B1 and C B2 connect the corresponding ends of the primary-side winding to the phase terminals of the switched conversion stage. Rectifiers D O1 and D O2 are connected in series to the secondary-side winding of the transformer TR, where the transformer TR is center-tapped to provide a virtual ground terminal. In this embodiment, the output stage further includes an output LC filter. As Figure 11 shown, the output LC filter may include an output inductor L O1 coupled between rectifiers D O2 and D O and the output resistive load (i.e., resistor R), and an output capacitor C O . In one embodiment, the boost rectifier 1100 is a power factor correction (PFC) discontinuous conduction mode (DCM) boost rectifier.

[0123] Figure 12 Fig. shows a boost rectifier 1200 according to an embodiment of the present case, which has switches S1 to S4 forming a full-bridge structure. In the boost rectifier 1200, a series circuit including the primary-side winding of the isolation transformer TR and the blocking capacitor C B is connected to the common point between switches S1 and S2 and the common point between switches S3 and S4. Compared with Figure 3The boost rectifier 300 shown includes switches S3 and S4 additionally. The switches S3 and S4 can form a full-bridge architecture with switches S1 and S2 to achieve high-power conversion. In this embodiment, the boost rectifier 1200 can be a power factor correction (PFC) discontinuous conduction mode (DCM) boost rectifier.

[0124] Figure 13 A boost rectifier 1300 according to an embodiment of the present case is shown, which has switches S1 and S2, and the switches S1 and S2 are connected to the resonant inductor L R and the resonant capacitor C R1 and C R2 to form a half-bridge resonant circuit. In the boost rectifier 1300, the primary side winding of the isolation transformer TR is connected in series to the inductor L R , where the inductor L R is located between the common point N and the common point between the series-connected resonant capacitors C R1 and C R2 . Thereby, the primary side winding of the isolation transformer TR and the inductor L R form a plurality of LC circuits, and the plurality of LC circuits are located between the common point N and each phase end of the switching conversion stage. In this embodiment, the transformer TR forms a decoupling stage, and its primary side winding is connected to each phase end of the switching conversion stage through a resonant circuit. Generally, the resonant circuit can include one or more resonant inductors and one or more resonant capacitors. As Figure 13 shown, the resonant circuit includes series-connected resonant capacitors C R1 and C R2 located between the phase ends of the switching conversion stage, the common point between the series-connected resonant capacitors C R1 and C R2 and the primary side winding of the transformer TR. Therefore, in the example of Figure 13 , the primary side winding of the transformer TR is connected to each phase end of the switching conversion stage through a resonant circuit, where the resonant circuit can include one or more resonant inductors and one or more resonant capacitors. In this embodiment, the boost rectifier 1300 can be a power factor correction (PFC) discontinuous conduction mode (DCM) boost rectifier.

[0125] Figure 14 A boost rectifier 1400 according to an embodiment of the present case is shown, which has switches S1 to S4, and the switches S1 to S4 are connected to the resonant inductor L R and the resonant capacitor Cr to form a full-bridge resonant circuit. In the boost rectifier 1400, the primary side winding of the isolation transformer TR is connected in series to the inductor L R and the resonant capacitor Cr, where the inductor L Rand the resonant capacitor Cr is located between the common point N and the common point between the series-connected switches S1 and S2. Thereby, the primary side winding of the isolation transformer TR and the inductor L R and the resonant capacitor Cr form an LC circuit, where the LC circuit is located between the common point N and the phase terminals of the switching conversion stage. In this embodiment, the boost rectifier 1400 can be a power factor correction (PFC) discontinuous conduction mode (DCM) boost rectifier.

[0126] The boost rectifier in this case can adopt any form of resonant cavity circuit, which can be one or a combination of multiple of the series or parallel-connected LLC resonant circuit, LCC resonant circuit, and LLCC resonant circuit.

[0127] In summary, by combining the feedforward signal including the non-linear compensation term with the output voltage feedback control signal, the boost rectifier in this case can achieve zero voltage switching, a total input current harmonic distortion of 5% or even lower, and an adjustable switching frequency. Since low total harmonic distortion can be obtained without the need for additional wide bandwidth and active current shaping control methods, the effect of high power factor can be achieved. In at least one embodiment, the non-linear compensation term is derived based on both the input and output voltages. Furthermore, the boost rectifier in this case can reduce common mode noise.

[0128] It should be noted that the above are only the preferred embodiments proposed for the purpose of illustrating this case. This case is not limited to the described embodiments, and the scope of this case is determined by the appended claims. And this case can be variously modified by those skilled in the art, but all are not beyond the scope of what is intended to be protected by the appended claims.

Claims

1. A boost rectifier configured to operate with a single-phase input voltage and comprising: An input stage including first and second terminals and first and second input filter capacitors, wherein the first and second terminals are adapted to receive the single-phase input voltage; A switched conversion stage having a plurality of input terminals and first and second phase terminals, wherein the plurality of input terminals are coupled to the first and second terminals of the input stage, and the switched conversion stage includes: A rectifier circuit coupled between the plurality of input terminals and the plurality of phase terminals; An inductor circuit including first and second boost inductors and coupled between the plurality of input terminals and the plurality of phase terminals; First and second switches connected in series, having a common point therebetween, and the common point is respectively coupled to the first and second terminals of the input stage through the first and second input filter capacitors of the input stage; and A phase output capacitor connected between the first and second phase terminals; An output stage configured to transfer the energy stored in the phase output capacitor to an output load; a decoupling stage configured to perform high-impedance decoupling between the switched conversion stage and the output stage; and A control circuit configured to control the switching frequency of the first and second switches according to a control signal, wherein the control signal is a product of a non-linear compensation signal and a feedback signal, the feedback signal is generated based on the voltage or current on the output load, and the non-linear compensation signal is derived from the magnitude of the single-phase input voltage and the voltage or current on the output load.

2. The boost rectifier according to claim 1, wherein the rectifier circuit includes first, second, third, and fourth diodes connected in a full-bridge configuration.

3. The boost rectifier according to claim 1, wherein the first and second boost inductors respectively connect the first and second terminals of the input stage to the rectifier circuit.

4. The boost rectifier according to claim 1, wherein the rectifier circuit connects the first and second terminals of the input stage to the first and second boost inductors respectively.

5. The boost rectifier according to claim 1, wherein the output stage includes first and second output capacitors connected in series, and there is a common point between the first and second output capacitors of the output stage, and the common point between the first and second output capacitors of the output stage is connected to the common point between the first and second switches of the switched conversion stage.

6. The boost rectifier according to claim 5, further comprising a blocking capacitor, wherein the common point between the first and second output capacitors of the output stage and the common point between the first and second switches of the switched conversion stage are connected to each other through the blocking capacitor.

7. The boost rectifier according to claim 1, wherein the decoupling stage includes a coupling inductor.

8. The boost rectifier according to claim 1, wherein the decoupling stage includes a transformer, and the transformer includes a primary side winding, and a center tap of the primary side winding is connected to the common point between the first and second switches of the switched conversion stage.

9. The boost rectifier as claimed in claim 1, wherein the decoupling stage includes a transformer, and a primary side winding of the transformer is connected to the plurality of phase terminals of the switching conversion stage via a resonant circuit.

10. The boost rectifier as claimed in claim 9, wherein the resonant circuit includes one or more resonant inductors and one or more resonant capacitors.

11. The boost rectifier as claimed in claim 10, wherein the resonant circuit includes a plurality of serially connected resonant capacitors connected between the first and second phase terminals of the switching conversion stage, and the plurality of serially connected resonant capacitors have a common point coupled to the primary side winding of the transformer.

12. The boost rectifier as claimed in claim 1, wherein the switching conversion stage further includes a third switch and a fourth switch connected in series, and there is a common point between the third and fourth switches. The decoupling stage includes a transformer having a primary side winding, and the primary side winding is connected between the common point between the first and second switches of the switching conversion stage and the common point between the third and fourth switches of the switching conversion stage.

13. The boost rectifier as claimed in claim 12, further including a resonant circuit, wherein the resonant circuit is coupled to the primary side winding of the transformer and is located between the common point between the first and second switches of the switching conversion stage and the common point between the third and fourth switches of the switching conversion stage.

14. The boost rectifier as claimed in claim 1, wherein the decoupling stage includes a transformer having a secondary side winding, and a center tap of the secondary side winding provides a virtual ground terminal for the output stage.

15. The boost rectifier as claimed in claim 1, wherein the magnitude of the single-phase input voltage includes the root mean square value of the single-phase input voltage.

16. The boost rectifier as claimed in claim 1, wherein the control circuit determines a common switching period of the first and second switches according to the non-linear compensation signal.

17. The boost rectifier as claimed in claim 16, wherein the switching period is adjusted by driving a voltage-controlled oscillator via the control signal.

18. The boost rectifier as claimed in claim 1, wherein the control circuit combines a feed-forward signal and an output voltage feedback control signal, and the feed-forward signal is derived from the input and output voltages of the boost rectifier.

19. The boost rectifier as claimed in claim 1, further including a non-linear compensation circuit, wherein the non-linear compensation circuit combines a feed-forward signal and an output voltage feedback control signal to generate an output signal for controlling the first and second switches, and the feed-forward signal is derived from the input and output voltages of the boost rectifier.

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