Polishing method of silicon carbide wafer

Abstract

The present invention provides a method for polishing a silicon carbide wafer, comprising providing a silicon carbide wafer having a carbon side and a silicon side. At least one of the carbon side and the silicon side is doped to change the oxidizing ability of the doped side. After doping, the silicon carbide wafer is subjected to chemical mechanical polishing, wherein the removal rate of the silicon side is greater than or equal to the removal rate of the carbon side.

Description

Technical Field

[0001] The present invention relates to a semiconductor wafer polishing technology, in particular to a silicon carbide wafer polishing method. Background Art

[0002] Semiconductor wafers typically require polishing after slicing to remove surface defects and damage. Silicon carbide wafers have a carbon polarity side and a silicon polarity side. Because the polarity of the carbon and silicon sides differs, their chemical activity also differs, resulting in different polishing rates for both sides. Generally, the polishing rate for the carbon side is at least twice that of the silicon side. Controlling the polishing rate for the carbon or silicon side is a key issue.

[0003] The current technology to improve the difference in double-sided polishing rates is to generate an oxide layer on the silicon surface of the silicon carbide wafer to increase the polishing rate of the silicon surface. However, the generated oxide layer has problems with uneven thickness and density, resulting in increased surface roughness of the wafer after polishing and poor structural geometry. Summary of the Invention

[0004] The present invention is directed to a polishing method for silicon carbide wafers, which can make the polishing rates of the carbon surface and the silicon surface close to each other, or even make the polishing rate of the silicon surface greater than that of the carbon surface, without affecting the wafer geometry.

[0005] According to an embodiment of the present invention, a method for polishing a silicon carbide wafer includes providing a silicon carbide wafer and doping at least one of a carbon side and a silicon side of the silicon carbide wafer to alter the oxidizing ability of the doped side. After doping, the silicon carbide wafer is subjected to chemical mechanical polishing (CMP), wherein a removal rate of the silicon side is greater than or equal to a removal rate of the carbon side.

[0006] In the polishing method according to an embodiment of the present invention, the ratio of the removal rate of the silicon surface to the removal rate of the carbon surface in the chemical mechanical polishing is between 1:1 and 10:1.

[0007] In the polishing method according to an embodiment of the present invention, the doping step includes: doping the silicon surface with P-type dopants to increase the oxidation rate of the silicon surface.

[0008] In the polishing method according to the embodiment of the present invention, the doping depth of the P-type dopant is less than 1 μm, and the doping depth deviation non-uniformity of the P-type dopant in the silicon surface is within 1%.

[0009] In the polishing method according to an embodiment of the present invention, the concentration of the P-type dopant in the silicon surface is greater than 1E18 / cm 3 .

[0010] In the polishing method according to an embodiment of the present invention, the doping step includes: doping the carbon surface with N-type dopants to reduce the oxidation rate of the carbon surface.

[0011] In the polishing method according to the embodiment of the present invention, the doping depth of the N-type dopant is less than 1 μm, and the doping depth deviation non-uniformity of the N-type dopant in the carbon surface is within 1%.

[0012] In the polishing method according to an embodiment of the present invention, the concentration of the N-type dopant in the carbon surface is greater than 1E17 / cm 3 .

[0013] In the polishing method according to an embodiment of the present invention, the doping step includes doping the silicon surface with P-type dopants to increase the oxidation rate of the silicon surface, and doping the carbon surface with N-type dopants to reduce the oxidation rate of the carbon surface.

[0014] In the polishing method according to the embodiment of the present invention, the doping step includes forming a single-layer or double-layer doping layer in the doped surface.

[0015] In the polishing method according to an embodiment of the present invention, the double-layer doping layer includes a first layer and a second layer, and the first layer is located between the second layer and the doped surface.

[0016] In the polishing method according to the embodiment of the present invention, the first layer is in direct contact with the second layer.

[0017] In the polishing method according to the embodiment of the present invention, the doping concentration in the first layer is greater than the doping concentration in the second layer, and the doping depth of the double-layer doping layer is less than 2 μm.

[0018] In the polishing method according to the embodiment of the present invention, the chemical mechanical polishing step includes single-side polishing or double-side polishing of the silicon carbide wafer.

[0019] In the polishing method according to an embodiment of the present invention, the endpoint detection method of the chemical mechanical polishing includes: detecting a surface removal rate change or an electrical property change of the silicon carbide wafer to determine the endpoint.

[0020] In the polishing method according to an embodiment of the present invention, the surface of the silicon carbide wafer after the chemical mechanical polishing has a surface roughness of 1E14 / cm 3 ~1E15 / cm 3 doping concentration.

[0021] In the polishing method according to the embodiment of the present invention, the surface of the silicon carbide wafer after the chemical mechanical polishing has no doping concentration.

[0022] In the polishing method according to an embodiment of the present invention, the doping step is to form a doping layer within the doped surface, and the removal thickness of the chemical mechanical polishing is greater than the thickness of the doping layer.

[0023] Based on the above, the present invention changes the oxidation ability of the doped surface of the silicon carbide wafer by doping, so that the removal rate of the silicon surface is greater than or equal to the removal rate of the carbon surface, thereby improving the CMP speed of the silicon carbide wafer and shortening the process time.

[0024] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a first embodiment of the present invention;

[0026] Figure 2 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a second embodiment of the present invention;

[0027] Figure 3 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a third embodiment of the present invention;

[0028] Figure 4 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a fourth embodiment of the present invention;

[0029] Figure 5 FIG. 4 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a fifth embodiment of the present invention.

[0030] Description of Reference Numerals

[0031] 100: Silicon carbide wafer

[0032] 102, 200, 400, 402: doping

[0033] 104, 202, 404: doped surface

[0034] 106, 204: doping layer

[0035] 406: First floor

[0036] 408: Second floor

[0037] CMP: Chemical Mechanical Polishing

[0038] CS: Carbon surface

[0039] d1, d2, d3, d4: doping depth

[0040] SS:Silicon surface

[0041] t1, t2, t3: removal thickness DETAILED DESCRIPTION

[0042] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. However, the present invention may be embodied in many different forms and should not be construed as limited to the embodiments described herein. In the drawings, for the sake of clarity, the sizes and thicknesses of various regions, parts, and layers may not be drawn to scale. For ease of understanding, identical elements will be referenced using the same reference numerals throughout the following description.

[0043] Figure 1 FIG. 1 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a first embodiment of the present invention.

[0044] Please refer to Figure 1 The first embodiment of the polishing method of a silicon carbide wafer includes providing a silicon carbide wafer 100, which includes a carbon surface CS and a silicon surface SS. Then, at least one of the carbon surface CS and the silicon surface SS is doped 102 to change the oxidation ability of the doped surface 104. In the first embodiment, the doping step 102 is to dope the silicon surface SS with a P-type dopant to increase the oxidation rate of the silicon surface SS by generating holes in the silicon surface SS, such as the reaction formula SiC+8OH. - +8h + →SiO2+CO2+4H2O is displayed near the SiC material and the solution. The holes on the material can attract OH - , forming a discharge channel to promote the oxidation reaction. The above-mentioned doping 102 step includes forming a single-layer doping layer 106 in the doped surface 104. In this embodiment, the above-mentioned P-type dopant is, for example, boron (B), aluminum (Al) or gallium (Ga). From the perspective of doping uniformity, the doping depth d1 of the doping layer 106 (P-type dopant) is, for example, less than 1μm, and the doping depth deviation non-uniformity of the P-type dopant in the silicon surface SS is, for example, within 1%, preferably within 0.8%, and more preferably within 0.5%. In one embodiment, the concentration of the above-mentioned P-type dopant in the silicon surface SS is, for example, greater than 1E18 / cm 3 , preferably greater than 3E18 / cm 3 , preferably at 5E18 / cm 3 ~5E19 / cm 3 .

[0045] Please continue to refer to Figure 1After doping 102, the silicon carbide wafer 100 undergoes chemical mechanical polishing (CMP). The dashed lines on both sides of the silicon carbide wafer 100 after CMP represent the surfaces before polishing. The CMP step can be single-side polishing (first polishing the silicon surface SS or the carbon surface CS, then polishing the unpolished surface) or double-side polishing (simultaneously polishing the silicon surface SS and the carbon surface CS). Since the oxidation ability of the silicon surface SS is increased, the removal rate of the silicon surface SS is greater than or equal to the removal rate of the carbon surface CS. For example, if a conventional silicon carbide wafer 100 without doping 102 is directly single-sided polished, the silicon surface SS removal rate (approximately 1.5 μm / hr) to the carbon surface CS removal rate is approximately 1:2 to 1:3. If a conventional silicon carbide wafer 100 without doping 102 is directly double-sided polished, the silicon surface SS removal rate (approximately 0.15 μm / hr) to the carbon surface CS removal rate is approximately 1:4 to 1:5. However, in the chemical mechanical polishing (CMP) performed after doping 102 in this embodiment, the silicon surface SS removal rate to the carbon surface CS removal rate is, for example, between 1:1 and 10:1, or between 1:1 and 7:1, and preferably between 1:1 and 5:1. Therefore, the method of the first embodiment can effectively improve the low silicon surface SS removal rate problem of conventional methods. In the first embodiment, the oxidizing agent in the chemical mechanical polishing (CMP) is hydrogen peroxide (H2O2), potassium permanganate (KMnO4), ozone (O3), trivalent iron (Fe 3+ ) compound or combination thereof. The surface of the silicon carbide wafer 100 (eg, silicon surface SS) after chemical mechanical polishing (CMP) has no doping concentration or has a doping concentration of 1E14 / cm 3 ~1E15 / cm 3 Furthermore, the removal thickness t1 of the chemical mechanical polishing (CMP) is preferably greater than the thickness of the doping layer 106 (ie, the doping depth d1).

[0046] In one embodiment, a method for detecting an endpoint in chemical mechanical polishing (CMP) is used to detect changes in the surface removal rate of the silicon carbide wafer 100 to determine the endpoint. For example, assuming the silicon surface SS removal rate before doping 102 is 1 μm / hr, and the silicon surface SS removal rate after doping 102 is 10 times that (=10 μm / hr), if the CMP rate drops from 10 μm / hr to 1 μm / hr or lower, it is determined that the doped layer 106 has been completely or substantially removed, and CMP can be stopped at this point.

[0047] In another embodiment, the endpoint detection method of chemical mechanical polishing (CMP) is to detect the surface electrical property change of the silicon carbide wafer 100 to determine the endpoint. For example, if the concentration of P-type dopant in the silicon surface SS is 1E18 / cm 3, the resistivity of the silicon carbide wafer 100 on the silicon surface SS is assumed to be 1Ω-cm; if the doping layer 106 (P-type dopant) is removed, the concentration in the silicon surface SS is assumed to be 1E14 / cm 3 , the resistivity of the silicon carbide wafer 100 on the silicon surface SS increases to 200Ω-cm. Therefore, if the resistivity increases from 1Ω-cm to 200Ω-cm or higher, it means that the doped layer 106 has been completely or mostly removed, and the CMP can be stopped at this point.

[0048] Figure 2 1 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a second embodiment of the present invention, wherein the same element symbols as those in the first embodiment are used to represent the same or similar components, and the omitted technical descriptions can refer to the contents of the first embodiment and are therefore not repeated below.

[0049] Please refer to Figure 2 The polishing method of the silicon carbide wafer of the second embodiment also provides a silicon carbide wafer 100 having a carbon surface CS and a silicon surface SS. However, the difference from the first embodiment is that the doping step 200 is to dope the carbon surface CS with N-type dopants. Since the carbon surface CS contains N-type dopants, it can attract protons (H + ), so according to the reaction formula SiC+8OH - +8h + →SiO2+CO2+4H2O,H + With OH - After neutralization, the reaction is not easy to proceed to the right, thereby reducing the oxidation rate of the carbon surface CS and forming a single-layer doping layer 204 in the doped surface 202. In this embodiment, the above-mentioned N-type dopant is, for example, phosphorus (P), arsenic (As), antimony (Sb) or nitrogen (N). From the perspective of doping uniformity, the doping depth d2 of the doping layer 204 (N-type dopant) is, for example, less than 1 μm, and the doping depth deviation non-uniformity of the N-type dopant in the carbon surface CS is, for example, within 1%, preferably within 0.8%, and more preferably within 0.5%. In one embodiment, the concentration of the above-mentioned N-type dopant in the carbon surface CS is, for example, greater than 1E17 / cm 3 , preferably greater than 3E17 / cm 3 , preferably at 5E17 / cm 3 ~5E18 / cm 3 .

[0050] Please continue to refer to Figure 2After the doping 200, the silicon carbide wafer 100 is subjected to chemical mechanical polishing (CMP), wherein the oxidant in the chemical mechanical polishing (CMP) may refer to the first embodiment. In the second embodiment, the step of chemical mechanical polishing (CMP) may be single-side polishing (polishing the carbon surface CS or silicon surface SS first, and then polishing the unpolished side) or double-side polishing (polishing the silicon surface SS and carbon surface CS simultaneously) of the silicon carbide wafer 100, wherein the removal rate of the silicon surface SS is greater than or equal to the removal rate of the carbon surface CS. For example, the removal rate of the silicon surface SS to the removal rate of the carbon surface CS in the chemical mechanical polishing (CMP) is, for example, between 1:1 and 10:1, or between 1:1 and 7:1, preferably between 1:1 and 5:1. Therefore, the method of the second embodiment can effectively improve the problem of low removal rate of the conventional silicon surface SS. After the chemical mechanical polishing (CMP), the surface of the silicon carbide wafer 100 (such as the carbon surface CS) has no doping concentration or has a doping concentration of 1E14 / cm 3 ~1E15 / cm 3 Furthermore, the removal thickness t2 of the chemical mechanical polishing (CMP) is preferably greater than the thickness of the doped layer 204 (ie, the doping depth d2). The endpoint detection method of the chemical mechanical polishing (CMP) can be referred to the first embodiment and will not be described in detail here.

[0051] Figure 3 1 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a third embodiment of the present invention, wherein the same element symbols as those in the above embodiment are used to represent the same or similar components, and the omitted technical descriptions can refer to the contents of the above embodiment and are therefore not repeated below.

[0052] Please refer to Figure 3 The polishing method of a silicon carbide wafer of the third embodiment also provides a silicon carbide wafer 100 having a carbon surface CS and a silicon surface SS. However, the difference from the above embodiment is that the doping step includes doping 102 the silicon surface SS with a P-type dopant to increase the oxidation rate of the silicon surface SS, and doping 200 the carbon surface CS with an N-type dopant to reduce the oxidation rate of the carbon surface CS. Although Figure 3 While doping 102 is performed first and then doping 200, the present invention is not limited thereto. In another embodiment, the aforementioned doping process may first perform N-type doping 200 followed by P-type doping 102. The types and concentration ranges of the N-type and P-type dopants described above can be referenced to those in the first and second embodiments and will not be further described here. Because doping 102 / 200 changes the oxidizability of the doped surfaces, the oxidation rate of the silicon surface SS increases, while the oxidation rate of the carbon surface CS decreases.

[0053] Please continue to refer to Figure 3After the doping 200, the silicon carbide wafer 100 is subjected to chemical mechanical polishing (CMP), wherein the oxidant in the chemical mechanical polishing (CMP) may refer to the first embodiment. In the third embodiment, the step of chemical mechanical polishing (CMP) may be single-side polishing of the silicon carbide wafer 100 (first polishing the silicon surface SS or the carbon surface CS, and then polishing the unpolished surface) or double-side polishing of the silicon carbide wafer 100 (simultaneously polishing the silicon surface SS and the carbon surface CS), wherein the removal rate of the silicon surface SS is greater than or equal to the removal rate of the carbon surface CS. For example, the removal rate of the silicon surface SS to the removal rate of the carbon surface CS in the chemical mechanical polishing (CMP) is, for example, between 1:1 and 10:1, or between 1:1 and 7:1, preferably between 1:1 and 5:1. The surface of the silicon carbide wafer 100 (such as the carbon surface CS) after the chemical mechanical polishing (CMP) has no doping concentration or has a doping concentration of 1E14 / cm 3 ~1E15 / cm 3 In the third embodiment, the CMP removal thicknesses t1 and t2 are preferably greater than the thicknesses of the doped layer 102 and the doped layer 204, respectively (i.e., the doping depths d1 and d2). The CMP endpoint detection method can be referred to in the first embodiment and will not be further described here.

[0054] Figure 4 1 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a fourth embodiment of the present invention, wherein the same element symbols as those in the first embodiment are used to represent the same or similar components, and the omitted technical descriptions can refer to the contents of the first embodiment and are therefore not repeated below.

[0055] Please refer to Figure 4 The fourth embodiment of the silicon carbide wafer polishing method similarly provides a silicon carbide wafer 100 having a carbon surface CS and a silicon surface SS. However, unlike the first embodiment, the doping process involves two doping steps 400 and 402 to form a double-layer doped layer within the doped surface 404 (silicon surface SS), namely, a first layer 406 and a second layer 408 in direct contact. The first layer 406 is located between the second layer 408 and the doped surface 404. The doping depth of the double-layer doped layer is, for example, less than 2 μm, and the doping concentration within the first layer 406 is greater than the doping concentration within the second layer 408. For example, the doping concentration within the first layer 406 is five times greater than the doping concentration within the second layer 408. In this embodiment, the first doping step 400 involves doping the silicon surface SS with a P-type dopant to form the second layer 408. The doping depth d3 thereof is, for example, less than 2 μm. The second doping 402 is also to dope the silicon surface SS with P-type dopants to increase the concentration of P-type dopants in the silicon surface SS. Therefore, the doping concentration of the formed first layer 406 (the outermost layer) is greater than 5E18 / cm 3 (such as greater than 8E18 / cm3 , preferably 1E19 / cm 3 ~1E20 / cm 3 ), the doping concentration of the second layer 408 is, for example, greater than 1E18 / cm 3 (such as greater than 3E18 / cm 3 , preferably at 5E18 / cm 3 ~5E19 / cm 3 ).

[0056] The doping depth d4 of the first layer 406 can be 80% of the target thickness. The "target thickness" here refers to the removal thickness t3 during chemical mechanical polishing (CMP), for example, 2 μm to 3 μm. However, the present invention is not limited thereto. Depending on process requirements, the target thickness can be thinner or thicker. In other words, the doping depth d3 of the second layer 408 can be considered the target thickness or the doping depth of the dual-layer doping layer.

[0057] Please continue to refer to Figure 4 After doping 402, the silicon carbide wafer 100 is subjected to chemical mechanical polishing (CMP). The oxidizing agent used in the CMP process can be referenced to the first embodiment. Due to the formation of a double doping layer within the doped surface 404 (silicon surface SS), namely, a first layer 406 and a second layer 408, the oxidation rate of the silicon surface SS is increased, resulting in a CMP removal rate of the silicon surface SS to the carbon surface CS of between 1:1 and 10:1, for example, between 1:1 and 7:1, preferably between 1:1 and 5:1, which facilitates the polishing of the silicon carbide wafer 100. Furthermore, the CMP removal thickness t3 is preferably greater than the doping depth of the double doping layer (i.e., doping depth d3). The CMP endpoint detection method can be referenced to the first embodiment and will not be further described here.

[0058] Figure 5 1 is a cross-sectional flow chart of a polishing process for a silicon carbide wafer according to a fifth embodiment of the present invention, wherein the same element symbols as those in the fourth embodiment are used to represent the same or similar components, and the omitted technical descriptions can refer to the contents of the fourth embodiment and are therefore not repeated below.

[0059] Please refer to Figure 5The polishing method for a silicon carbide wafer in the fifth embodiment also provides a silicon carbide wafer 100 having a carbon surface CS and a silicon surface SS. However, unlike the fourth embodiment, the doped surface 404 is the carbon surface CS. Therefore, the first doping pass 400 is to dope the carbon surface CS with an N-type dopant, and the second doping pass 402 is also to dope the carbon surface CS with an N-type dopant to increase the concentration of the N-type dopant in the carbon surface CS. The doping concentration of the formed first layer 406 (the outermost layer) can be greater than 5E17 / cm 3 , for example, greater than 8E17 / cm 3 , preferably 1E18 / cm 3 ~1E19 / cm 3 The doping concentration of the second layer 408 can be greater than 1E17 / cm 3 , for example, greater than 3E17 / cm 3 , preferably at 5E17 / cm 3 ~5E18 / cm 3 As for the doping depth d3 of the second layer 408 , the doping depth d4 of the first layer 406 , and the removal thickness t3 , reference may be made to the fourth embodiment and will not be repeated herein.

[0060] In summary, the present invention changes the oxidation ability of the doped surface by doping the silicon surface and / or carbon surface of the silicon carbide wafer, making the removal rate of the silicon surface greater than or equal to the removal rate of the carbon surface, thereby increasing the overall CMP speed of the silicon carbide wafer and shortening the process time.

[0061] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for polishing a silicon carbide wafer, characterized in that: include: Providing a silicon carbide wafer, wherein the silicon carbide wafer comprises a carbon surface and a silicon surface; Doping at least one of the carbon surface and the silicon surface to form a doped layer in the doped surface and change the oxidation ability of the doped surface, wherein the doping step includes: doping the silicon surface with a P-type dopant to increase the oxidation rate of the silicon surface; doping the carbon surface with N-type dopants to reduce the oxidation rate of the carbon surface; and The silicon carbide wafer is subjected to chemical mechanical polishing after the doping, wherein a removal rate of the silicon surface is greater than or equal to a removal rate of the carbon surface.

2. The method for polishing a silicon carbide wafer according to claim 1, wherein: The removal rate of the silicon surface to the removal rate of the carbon surface in the chemical mechanical polishing is between 1:1 and 10:

1.

3. The method for polishing a silicon carbide wafer according to claim 1, wherein: The doping depth of the P-type dopant is less than 1 μm, and the doping depth deviation non-uniformity of the P-type dopant in the silicon surface is within 1%.

4. The method for polishing a silicon carbide wafer according to claim 1, wherein: The concentration of the P-type dopant in the silicon surface is greater than 1E18 / cm 3 .

5. The method for polishing a silicon carbide wafer according to claim 1, wherein: The doping depth of the N-type dopant is less than 1 μm, and the doping depth deviation non-uniformity of the N-type dopant in the carbon surface is within 1%.

6. The method for polishing a silicon carbide wafer according to claim 1, wherein: The concentration of the N-type dopant in the carbon surface is greater than 1E17 / cm 3 .

7. The method for polishing a silicon carbide wafer according to claim 1, wherein: The doping step includes forming a single layer or a double layer of the doping layer in the doped surface.

8. The method for polishing a silicon carbide wafer according to claim 7, wherein: The double-layer doping layer includes a first layer and a second layer, and the first layer is located between the second layer and the doped surface.

9. The method for polishing a silicon carbide wafer according to claim 8, wherein: The first layer is in direct contact with the second layer.

10. The method for polishing a silicon carbide wafer according to claim 8, wherein: The doping concentration in the first layer is greater than the doping concentration in the second layer, and the doping depth of the double-layer doping layer is less than 2 μm.

11. The method for polishing a silicon carbide wafer according to claim 1, wherein The chemical mechanical polishing step includes: single-side polishing or double-side polishing of the silicon carbide wafer.

12. The method for polishing a silicon carbide wafer according to claim 1, wherein: The endpoint detection method of the chemical mechanical polishing includes: detecting a surface removal rate change or an electrical property change of the silicon carbide wafer to determine the endpoint.

13. The method for polishing a silicon carbide wafer according to claim 1, wherein: The surface of the silicon carbide wafer after chemical mechanical polishing has a surface roughness of 1E14 / cm 3 ~1E15 / cm 3 doping concentration.

14. The method for polishing a silicon carbide wafer according to claim 1, wherein: The surface of the silicon carbide wafer after the chemical mechanical polishing has no doping concentration.

15. The method for polishing a silicon carbide wafer according to claim 1, wherein: The removal thickness of the chemical mechanical polishing is greater than the thickness of the doping layer.

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