A ramp wave injection circuit and error compensation method in a switching power supply

Abstract

A ramp injection circuit and an error compensation method for a switching power supply are disclosed. The ramp injection circuit includes a ramp voltage generation module and an error compensation module. The ramp voltage generation module generates a ramp voltage based on a first control signal. When the first control signal is in a first state, the voltage value of the ramp voltage increases linearly, and when the first control signal is in a second state, the voltage value of the ramp voltage is zero. The error compensation module samples the peak voltage of the ramp voltage as a compensation voltage, and the ramp injection circuit subtracts the compensation voltage from the ramp voltage to obtain a final ramp voltage. When the present invention is applied to a switching power supply, the switching power supply superimposes the ramp voltage on a reference voltage and subtracts the compensation voltage as a final comparison reference for comparison with the feedback voltage of the switching power supply output voltage. This ensures that the comparison reference remains constant, thereby ensuring that the output voltage of the switching power supply remains constant under different duty cycles and eliminating errors caused by the ramp voltage.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics and relates to a ramp wave injection circuit, in particular to a ramp wave injection circuit with an error compensation function, and a method for performing error compensation in a switching power supply using the ramp wave injection circuit proposed by the present invention. Background Art

[0002] With the development of technology, in order to meet market demand, the requirements for switching power supplies are getting higher and higher, and switching power supplies are usually required to have advantages such as fast response speed. In order to simplify peripheral devices and reduce output ripple, switching power supplies with fixed on-time will integrate ramp injection circuits internally. Figure 1 As shown, in a conventional fixed on-time switching power supply with an internally integrated ramp injection circuit, the ramp injection circuit generates a ramp voltage Vripple, which is superimposed with a reference voltage Vref and then compared with a feedback voltage Vfb of the switching power supply output voltage Vout, and pulse width modulation (PWM) is performed based on the comparison result.

[0003] However, this structure injects different ramp waves under different duty cycles, such as Figure 3 As shown, Figure 3 (b), (c), and (d) are the cases where the ramp voltage Vripple corresponding to three different duty cycles is superimposed on the reference voltage Vref and then compared with the feedback voltage Vfb. Figure 3 (a) is to Figure 3 In the schematic diagrams of the three cases (b), (c), and (d) drawn together, it can be seen that the ramp voltages Vripple corresponding to the three different duty cycles are different, resulting in different superposition values ​​of Vripple and Vref, which in turn causes changes in the feedback voltage Vfb.

[0004] Since the switching power supply's output voltage Vout = Vfb * (R1 + R2) / R1 = (Vref + Vripple) * (R1 + R2) / R1), different duty cycles result in different feedback voltages Vfb and, consequently, different output voltages Vout. This indicates that conventional ramp injection circuits introduce output errors into the switching power supply, necessitating a ramp injection circuit capable of compensating for these errors. Summary of the Invention

[0005] To address the output error problem caused by the ramp voltage in a switching power supply with an internally integrated ramp injection circuit, the present invention proposes a ramp injection circuit in which the peak voltage of the ramp voltage generated by sampling is used to compensate for the error. Furthermore, a solution is proposed for applying the ramp injection circuit of the present invention to the switching power supply to eliminate the output error of the switching power supply.

[0006] The technical solution of the ramp wave injection circuit proposed by the present invention is:

[0007] A ramp injection circuit includes a ramp voltage generating module and an error compensation module, wherein the ramp voltage generating module is configured to generate a ramp voltage according to a first control signal, wherein the voltage value of the ramp voltage increases linearly when the first control signal is in a first state and is zero when the first control signal is in a second state;

[0008] The error compensation module is used to sample the peak voltage of the ramp voltage as a compensation voltage, and the ramp injection circuit subtracts the compensation voltage from the ramp voltage to obtain a final ramp voltage.

[0009] Specifically, the ramp voltage generating module includes a first capacitor, a first switch, a second switch, and a current source. The first connection end of the first capacitor is grounded, and the second connection end is connected to the current source through the first switch on the one hand, and to the ground through the second switch on the other hand. The first switch and the second switch are controlled by the first control signal. When the first control signal is in the first state, the first switch is controlled to be turned on and the second switch is turned off. When the first control signal is in the second state, the first switch is controlled to be turned off and the second switch is controlled to be turned on. The second connection end of the first capacitor outputs the ramp voltage.

[0010] Specifically, when the first control signal is about to jump from the first state to the second state, a pulse signal is generated as the second control signal; the error compensation module includes a first capacitor, a second capacitor and a third switch, the first connection end of the second capacitor is grounded, and its second connection end is connected to the second connection end of the first capacitor through the third switch; the third switch is controlled by the second control signal, when the second control signal is valid, the third switch is controlled to be turned on, when the second control signal is invalid, the third switch is controlled to be turned off, and the second connection end of the second capacitor outputs the compensation voltage.

[0011] Specifically, the pulse signal generating module includes a first NOT gate, a second NOT gate, a first AND gate and a second AND gate, the input end of the first NOT gate is connected to the first input end of the first AND gate, the first input end of the second AND gate and the external control signal, and its output end is connected to the second input end of the first AND gate and the input end of the second NOT gate; the second input end of the second AND gate is connected to the output end of the second NOT gate, and its output end outputs the first control signal; the output end of the first AND gate outputs the second control signal.

[0012] The ramp wave injection circuit proposed in the present invention is applied to a switching power supply to eliminate output errors. The technical solution is as follows:

[0013] A method for compensating for errors in a ramp voltage in a switching power supply, wherein the switching power supply uses a signal obtained by superimposing a ramp voltage on a reference voltage as a comparison benchmark for comparison with a feedback voltage of the switching power supply output voltage, and generates a pulse width modulation signal based on the comparison result to control the duty cycle of the switching devices in the switching power supply. The ramp voltage is related to the duty cycle of the switching devices in the switching power supply. When the duty cycles of the switching devices in the switching power supply vary, the superimposed ramp voltage also varies, causing a change in the comparison benchmark.

[0014] The error compensation method for the ramp voltage in the switching power supply comprises: sampling the peak voltage of the ramp voltage as the compensation voltage, and using the signal obtained by superimposing the ramp voltage on the reference voltage and subtracting the sampled compensation voltage as the final comparison reference for comparison with the feedback voltage of the switching power supply output voltage, so that the comparison reference is constant and the error caused by the ramp voltage is eliminated.

[0015] Specifically, the switching device in the switching power supply includes an upper power tube and a lower power tube connected in series between a power supply and a ground. A first control signal is generated according to a signal at a connection point between the upper power tube and the lower power tube. When the first control signal is at a low level, the voltage value of the ramp voltage is controlled to increase linearly. When the first control signal is at a high level, the voltage value of the ramp voltage is controlled to be zero.

[0016] Specifically, the structure for generating the ramp voltage includes a first capacitor, a first switch, a second switch, and a current source. The first connection end of the first capacitor is grounded, and the second connection end is connected to the current source through the first switch on the one hand, and to the ground through the second switch on the other hand. The first switch and the second switch are controlled by the first control signal. When the first control signal is at a low level, the first switch is turned on and the second switch is turned off. When the first control signal is at a high level, the first switch is turned off and the second switch is turned on. The second connection end of the first capacitor outputs the ramp voltage.

[0017] Specifically, the structure for sampling the peak voltage of the ramp voltage to obtain the compensation voltage includes a first capacitor, a second capacitor and a third switch, the first connection end of the second capacitor is grounded, and the second connection end thereof is connected to the second connection end of the first capacitor through the third switch; the third switch is controlled by a second control signal, and when the second control signal is at a high level, the third switch is controlled to be turned on, and when the second control signal is at a low level, the third switch is controlled to be turned off, and the second connection end of the second capacitor outputs the compensation voltage; the second control signal is a high-level valid pulse signal generated when the first control signal is about to jump from a low level to a high level.

[0018] Specifically, the structure for generating the first control signal and the second control signal includes a first NOT gate, a second NOT gate, a first AND gate, and a second AND gate. The input end of the first NOT gate is connected to the first input end of the first AND gate, the first input end of the second AND gate, and the signal of the series connection point of the upper power tube and the lower power tube in the switching power supply, and its output end is connected to the second input end of the first AND gate and the input end of the second NOT gate; the second input end of the second AND gate is connected to the output end of the second NOT gate, and its output end outputs the first control signal; the output end of the first AND gate outputs the second control signal.

[0019] The beneficial effects of the present invention are as follows: the ramp injection circuit proposed in the present invention obtains the compensation voltage Vec by sampling and filtering the ramp peak voltage of the ramp voltage Vripple, thereby compensating for the error caused by the ramp peak voltage of the ramp voltage Vripple in the system; by applying the present invention to a switching power supply, the output voltage of the switching power supply can be kept constant under different duty cycles, thereby eliminating the output error of the switching power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The following figures facilitate a better understanding of the following description of various embodiments of the present invention. These figures schematically illustrate the key features of some embodiments of the present invention. These figures and examples provide some embodiments of the present invention in a non-limiting, non-exhaustive manner. For simplicity, identical or similar components or structures having the same function in different figures are denoted by the same reference numerals.

[0021] Figure 1 This is a schematic diagram of a switching power supply with a traditional integrated ramp injection circuit.

[0022] Figure 2 This is a circuit diagram for generating a ramp voltage.

[0023] Figure 3 These are waveform diagrams of key signals in a traditional switching power supply with an integrated ramp injection circuit at different duty cycles. Figures (b), (c), and (d) are waveform diagrams of the ramp voltage Vripple generated by the first control signal Vsw and the signal Vref+Vripple superimposed with the reference voltage Vref under three duty cycle conditions, respectively, as well as the waveform diagram of the corresponding feedback voltage Vfb. Figure (a) is a comparison diagram integrating the three conditions. It can be seen that under different duty cycle conditions, the feedback voltage Vfb of the switching power supply is different, the output voltage is also different, and there is a large error.

[0024] Figure 4 The diagram is a schematic diagram of applying a ramp wave injection circuit proposed by the present invention to a switching power supply.

[0025] Figure 5This is a specific circuit diagram of a ramp wave injection circuit proposed by the present invention in an embodiment.

[0026] Figure 6 This is a timing diagram of the first control signal Vsw and the second control signal Vsh in the ramp injection circuit proposed by the present invention, as well as a waveform diagram of the compensation voltage Vec obtained by generating the ramp voltage Vripple and sampling the peak voltage of the ramp voltage. It can be seen that the compensation voltage Vec can quickly stabilize to the peak value of the ramp voltage Vripple.

[0027] Figure 7 These are waveform diagrams of key signals at different duty cycles in a ramp wave injection circuit proposed in the present invention, wherein (b), (c), and (d) are waveform diagrams of the ramp voltage Vripple generated by the first control signal Vsw and the compensation voltage Vec obtained by sampling the ramp voltage Vripple under the three duty cycles, respectively. Figure (a) is a comparison diagram integrating the three cases. It can be seen that the peak value of the ramp voltage Vripple is different under different duty cycles. The compensation voltage Vec is kept the same as the peak value of the ramp voltage Vripple to compensate for the error introduced by the ramp voltage.

[0028] Figure 8 3. The waveform diagrams of key signals at different duty cycles in a switching power supply integrating the ramp injection circuit of the present invention are shown in FIG. 3. (b) (c) (d) are waveform diagrams of the ramp voltage Vripple generated by the first control signal Vsw under the control of the first control signal Vsw and the signal Vref+Vripple-Vec after superposition with the reference voltage Vref and subtraction of the compensation voltage Vec, as well as the waveform diagram of the corresponding feedback voltage Vfb under the three duty cycles. FIG. 3 is a comparison diagram integrating the three cases. It can be seen that under different duty cycles, the feedback voltage Vfb of the switching power supply is the same, and the output voltage is also the same, because the error introduced by the ramp voltage is compensated.

[0029] Figure 9 The circuit structure is a pulse signal generating circuit structure that generates a corresponding first control signal Vswd and a second control signal Vsh according to a voltage Vsw at a connection point between an upper power tube 106 and a lower power tube 107 .

[0030] Figure 10 yes Figure 9 The corresponding key node waveform diagram of the pulse signal generating circuit structure shown. DETAILED DESCRIPTION

[0031] To make the objectives, technical solutions, and advantages of the present invention more apparent, the present invention will be described in detail below with reference to the accompanying drawings. It is apparent that the embodiments described are only a portion of the embodiments of the present invention, not all of them. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without inventive effort are intended to fall within the scope of protection of the present invention.

[0032] It should be noted that, in the present invention, relational terms such as first and second are used solely to distinguish one entity or operation from another, and do not necessarily require or imply any actual relationship or order between these entities or operations. For example, the first and second states of the first and second control signals can be interchangeable: the first state can represent a high level and the second state can represent a low level, or the first state can represent a low level and the second state can represent a high level. The first and second connection terminals of a capacitor can also be interchangeable, without affecting the implementation of the technical solution of the present invention.

[0033] The present invention proposes a ramp injection circuit, comprising a ramp voltage generating module and an error compensation module, wherein the ramp voltage generating module is used to generate a ramp voltage Vripple according to a first control signal Vsw, such as Figure 2 and Figure 5 The figure shows an implementation of a ramp voltage generating module, including a first capacitor 201, a first switch 202, a second switch 203 and a current source 204. The first connection end of the first capacitor 201 is grounded, and the second connection end thereof is connected to the current source 204 through the first switch 202 on the one hand, and to the ground through the second switch 203 on the other hand; the second connection end of the first capacitor 201 outputs a ramp voltage Vripple; the first switch 202 and the second switch 203 are controlled by a first control signal Vsw, so that the generated ramp voltage Vripple is aligned with the first control signal Vsw. When the first control signal Vsw is in a first state, the first switch 202 is controlled to be turned on and the second switch 203 is turned off, and the voltage value of the ramp voltage Vripple increases linearly; when the first control signal Vsw is in a second state, the first switch 202 is controlled to be turned off and the second switch 203 is controlled to be turned on, and the voltage value of the ramp voltage Vripple is zero.

[0034] The present invention can be applied to switching power supplies. Since switching power supplies with a fixed on-time (including a fixed off-time) often require ramp injection to reduce output ripple, the present invention is particularly suitable for switching power supplies with a fixed on-time. When the present invention is applied to a switching power supply with a fixed on-time, a first control signal can be generated based on the voltage Vsw at the connection point between the upper power tube 106 and the lower power tube 107 in the switching power supply, such as Figure 5In the embodiment shown, the voltage Vsw at the connection point between the upper power tube 106 and the lower power tube 107 in the switching power supply is directly taken as the first control signal Vsw. Therefore, in this embodiment, the first state of the first control signal Vsw is a low level, and the second state is a high level. Figure 3 and Figure 6 As shown, when the first control signal Vsw is at a low level, the voltage value of the ramp voltage Vripple increases linearly, and when the first control signal Vsw is at a high level, the voltage value of the ramp voltage Vripple is zero. Of course, for other applications, the first state of the first control signal Vsw is not limited to a low level, but can also be a high level, and the corresponding second state of the first control signal Vsw is not limited to a high level, but can also be a low level.

[0035] In a switching power supply, an upper power transistor 106 and a lower power transistor 107 are connected in series and connected between a power supply and ground. Their gate drive signals are controlled by a PWM pulse-width modulation module 101. A conventional switching power supply with an integrated ramp circuit uses a reference voltage Vref superimposed on a ramp voltage Vripple as a comparison benchmark. This is then compared with the feedback voltage Vfb of the switching power supply output voltage. The PWM pulse-width modulation module 101 is adjusted based on the comparison result. Because the ramp voltage Vripple is generated based on the voltage Vsw at the junction of the upper power transistor 106 and the lower power transistor 107, the ramp voltage Vripple is related to the duty cycle of the switching devices in the switching power supply. When the duty cycles of the switching devices in the switching power supply vary, the superimposed ramp voltage Vripple also varies, causing a change in the comparison benchmark.

[0036] Based on this, the present invention proposes an error compensation module, which is used to sample the peak voltage of the ramp voltage Vripple as the compensation voltage Vec, and subtract the compensation voltage Vec from the ramp voltage Vripple to obtain a signal as the final ramp voltage and output it. Figure 5 The figure shows an implementation structure of the error compensation module, which includes a first capacitor 201, a second capacitor 205, and a third switch 206. The first connection terminal of the second capacitor 205 is grounded, and its second connection terminal is connected to the second connection terminal of the first capacitor 201 through the third switch 206. The second connection terminal of the second capacitor 205 outputs the peak voltage of the ramp voltage as the compensation voltage Vec. In this embodiment, the error compensation module and the ramp voltage generation module share the first capacitor 201. A third switch 206 and the second capacitor 205 are added to form a self-sampling parallel switched capacitor filter, which samples the peak voltage of the ramp voltage Vripple, performs switched capacitor filtering, and outputs Vec.

[0037] The third switch 206 is controlled by a second control signal Vsh. The second control signal Vsh is a pulse signal generated when the first control signal Vsw is about to transition from a first state to a second state. Since the voltage Vsw at the junction of the upper power transistor 106 and the lower power transistor 107 of the switching power supply is used as the first control signal Vsw in this embodiment, the second control signal Vsh is a pulse signal generated when the first control signal Vsw is about to transition from a low level to a high level. When the second control signal Vsh is valid, the third switch 206 is turned on, and when the second control signal Vsh is invalid, the third switch 206 is turned off. In some embodiments, this pulse signal can be made active high. In this case, the second control signal Vsh transitions from low to high when the first control signal Vsw is about to transition from low to high, and the second control signal Vsh transitions from high to low at the same time as the first control signal Vsw transitions from low to high. Of course, the second control signal Vsh can also be made active low, depending on the type of the third switch, so long as the third switch 206 is turned on when the second control signal Vsh is valid and turned off when the second control signal Vsh is invalid.

[0038] Combine Figure 6 、 7 The timing diagram shown illustrates the working process of the ramp wave injection circuit of the present invention for error compensation:

[0039] When the first control signal Vsw is at a low level, the first switch 202 is turned on and the second switch 203 is turned off. At this time, the first capacitor 201 is charged by the current source 204, and the ramp voltage Vripple increases. When the first control signal Vsw is at a high level, the first switch 202 is turned off and the second switch 203 is turned on. At this time, the first capacitor 201 is discharged through the second switch 203, and the ramp voltage Vripple is 0.

[0040] When the first control signal Vsw jumps from low to high, a high-level effective pulse signal is generated as the second control signal Vsh. The short pulse of the second control signal Vsh controls the third switch 206 to be turned on, and the charges of the first capacitor 201 and the second capacitor 205 are redistributed. At this time, the voltage at the second connection end of the second capacitor 205, i.e., the compensation voltage Vec, is equal to the ramp voltage Vripple at the second connection end of the first capacitor 201 (e.g., Figure 6 After a finite number of cycles, the voltage value of the compensation voltage Vec is equal to the ramp peak voltage of the ramp voltage Vripple.

[0041] In other embodiments, the voltage Vsw at the connection point between the upper power tube 106 and the lower power tube 107 in the switching power supply can be processed to obtain the first control signal and the second control signal, such as Figure 9The figure shows a pulse signal generating circuit structure that generates a first control signal Vswd and a second control signal Vsh corresponding to the voltage Vsw at the connection point between the upper power tube 106 and the lower power tube 107, including a first NOT gate 210, a second NOT gate 212, a first AND gate 211 and a second AND gate 213. The input end of the first NOT gate 210 is connected to the first input end of the first AND gate 211, the first input end of the second AND gate 213, and the signal Vsw at the series connection point between the upper power tube and the lower power tube in the switching power supply. The output end of the first NOT gate 210 is connected to the second input end of the first AND gate 211 and the input end of the second NOT gate 212; the second input end of the second AND gate 213 is connected to the output end of the second NOT gate 212, and the output end of the second AND gate 213 outputs the first control signal Vswd for controlling the first switch 202 and the second switch 203; the output end of the first AND gate 211 outputs the second control signal Vsh for controlling the third switch 206.

[0042] The first NOT gate 210 has a certain delay to meet the timing. When the signal Vsw is low, the first control signal Vswd is low, and the ramp voltage Vripple rises; when the signal Vsw is high, the first control signal Vswd turns high after the second control signal Vsh pulse; the corresponding key node waveform is as follows Figure 10 As shown. Due to the equivalent transformation of digital logic, the same logic function can be realized by different combinations of logic devices, so the implementation is as follows Figure 9 The control signal generating circuit shown is only for reference to illustrate the feasibility of this invention. The control signal can also be implemented by other logic circuits.

[0043] After obtaining the compensation voltage Vec using the above method, the compensation voltage Vec can be used to compensate for the system error caused by the ramp peak voltage of the ramp voltage Vripple. In essence, the first capacitor 201, the third switch 206, and the second capacitor 205 together form a self-sampling parallel switched capacitor filter, which samples and filters the ramp peak voltage of the ramp voltage Vripple to obtain the compensation voltage Vec.

[0044] When the present invention is applied to a switching power supply, the ramp voltage Vripple can be connected to a positive input terminal of the comparator 102, and the compensation voltage Vec can be connected to a negative input terminal of the comparator 102, such as Figure 4 As shown, the other positive input terminal of the comparator 102 is connected to the reference voltage Vref, and the other negative input terminal of the comparator 102 is connected to the feedback voltage Vfb after the output voltage is divided by the resistors, so that the signal after the reference voltage Vref is superimposed on the ramp voltage Vripple and the compensation voltage Vec is subtracted is used as a new comparison benchmark for comparison with the feedback voltage Vfb.

[0045] like Figure 8The waveform diagram shown is a comparison between the new comparison reference Vref+Vripple-Vec and the feedback voltage Vfb. Figure 8 (b), (c), and (d) are the comparisons between the new comparison benchmark Vref+Vripple-Vec and the feedback voltage Vfb corresponding to three different duty cycles. Figure 8 (a) is to Figure 8 In the diagrams where the three cases (b), (c), and (d) are drawn together, it can be seen that the ramp voltages Vripple corresponding to the three different duty cycles are different. However, the comparison result between the new comparison reference obtained by combining the compensation voltage Vec and the feedback voltage Vfb is the same. Therefore, the feedback voltages Vfb corresponding to different duty cycles are the same, and the output voltage Vout of the switching power supply is also the same, thus compensating for the error introduced by the ramp voltage.

[0046] The present invention proposes compensating for ramp voltage errors by sampling the peak voltage of the ramp voltage as a compensation voltage. While the embodiments provide a structure for generating a ramp voltage and a structure for sampling the peak voltage of the ramp voltage, those skilled in the art will appreciate that other structures for generating a ramp voltage and other structures for sampling the peak voltage of the ramp voltage are also applicable to the present invention. Furthermore, the first switch 202, second switch 203, and third switch 206 employed in the present invention can be implemented using any process-approved switching devices or combinations thereof. The current source 204 can be implemented using a current mirror or other methods. Based on the technical teachings disclosed herein, those skilled in the art can devise various other specific variations and combinations that do not depart from the essence of the present invention, and such variations and combinations remain within the scope of protection of the present invention.

Claims

1. A ramp injection circuit, comprising a ramp voltage generating module and an error compensation module, wherein the ramp voltage generating module is configured to generate a ramp voltage according to a first control signal, wherein a voltage value of the ramp voltage increases linearly when the first control signal is in a first state and is zero when the first control signal is in a second state; It is characterized in that The error compensation module is used to sample the peak voltage of the ramp voltage as a compensation voltage, and the ramp injection circuit subtracts the compensation voltage from the ramp voltage to obtain a final ramp voltage.

2. The ramp wave injection circuit according to claim 1, wherein: The ramp voltage generating module includes a first capacitor, a first switch, a second switch, and a current source. The first connection end of the first capacitor is grounded, and the second connection end is connected to the current source through the first switch and to the ground through the second switch. The first switch and the second switch are controlled by the first control signal. When the first control signal is in the first state, the first switch is turned on and the second switch is turned off. When the first control signal is in the second state, the first switch is turned off and the second switch is turned on. The second connection end of the first capacitor outputs the ramp voltage.

3. The ramp wave injection circuit according to claim 2, wherein: When the first control signal is about to jump from the first state to the second state, a pulse signal is generated as the second control signal; the error compensation module includes a first capacitor, a second capacitor and a third switch, the first connection end of the second capacitor is grounded, and the second connection end thereof is connected to the second connection end of the first capacitor through the third switch; the third switch is controlled by the second control signal, and when the second control signal is valid, the third switch is controlled to be turned on, and when the second control signal is invalid, the third switch is controlled to be turned off, and the second connection end of the second capacitor outputs the compensation voltage.

4. The ramp wave injection circuit according to claim 3, wherein: The ramp wave injection circuit also includes a pulse signal generating module, which includes a first NOT gate, a second NOT gate, a first AND gate, and a second AND gate. The input end of the first NOT gate is connected to the first input end of the first AND gate, the first input end of the second AND gate, and the external control signal, and the output end of the first NOT gate is connected to the second input end of the first AND gate and the input end of the second NOT gate; the second input end of the second AND gate is connected to the output end of the second NOT gate, and the output end of the second AND gate outputs the first control signal; the output end of the first AND gate outputs the second control signal.

5. A method for compensating for errors in a ramp voltage in a switching power supply, wherein the switching power supply uses a signal obtained by superimposing a ramp voltage on a reference voltage as a comparison benchmark for comparison with a feedback voltage of the switching power supply output voltage, and generates a pulse-width modulation signal based on the comparison result to control the duty cycle of the switching devices in the switching power supply. The ramp voltage is related to the duty cycle of the switching devices in the switching power supply. When the duty cycles of the switching devices in the switching power supply vary, the superimposed ramp voltage also varies, causing a change in the comparison benchmark. It is characterized in that The error compensation method for the ramp voltage in the switching power supply comprises: sampling the peak voltage of the ramp voltage as the compensation voltage, and using the signal obtained by superimposing the ramp voltage on the reference voltage and subtracting the sampled compensation voltage as the final comparison reference for comparison with the feedback voltage of the switching power supply output voltage, thereby eliminating the error caused by the ramp voltage.

6. The method for compensating the error of the ramp voltage in the switching power supply according to claim 5, characterized in that: The switching device in the switching power supply includes an upper power tube and a lower power tube connected in series between a power supply and a ground. A first control signal is generated according to a signal at a connection point between the upper power tube and the lower power tube. When the first control signal is at a low level, the voltage value of the ramp voltage is controlled to increase linearly. When the first control signal is at a high level, the voltage value of the ramp voltage is controlled to be zero.

7. The method for compensating the error of ramp voltage in a switching power supply according to claim 6, wherein: The structure for generating the ramp voltage includes a first capacitor, a first switch, a second switch, and a current source. The first connection end of the first capacitor is grounded, and the second connection end is connected to the current source through the first switch on the one hand, and to the ground through the second switch on the other hand. The first switch and the second switch are controlled by the first control signal. When the first control signal is at a low level, the first switch is turned on and the second switch is turned off. When the first control signal is at a high level, the first switch is turned off and the second switch is turned on. The second connection end of the first capacitor outputs the ramp voltage.

8. The method for compensating the error of ramp voltage in a switching power supply according to claim 7, wherein: The structure for sampling the peak voltage of the ramp voltage to obtain the compensation voltage includes a first capacitor, a second capacitor, and a third switch. The first connection end of the second capacitor is grounded, and the second connection end thereof is connected to the second connection end of the first capacitor through the third switch. The third switch is controlled by a second control signal. When the second control signal is at a high level, the third switch is turned on. When the second control signal is at a low level, the third switch is turned off. The second connection end of the second capacitor outputs the compensation voltage. The second control signal is a high-level valid pulse signal generated when the first control signal is about to jump from a low level to a high level.

9. The method for compensating the error of ramp voltage in a switching power supply according to claim 8, wherein: The structure for generating the first control signal and the second control signal includes a first NOT gate, a second NOT gate, a first AND gate, and a second AND gate. The input end of the first NOT gate is connected to the first input end of the first AND gate, the first input end of the second AND gate, and the signal of the series connection point of the upper power tube and the lower power tube in the switching power supply. The output end of the first NOT gate is connected to the second input end of the first AND gate and the input end of the second NOT gate; the second input end of the second AND gate is connected to the output end of the second NOT gate, and the output end of the second AND gate outputs the first control signal; the output end of the first AND gate outputs the second control signal.

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