Power amplifier circuit

Abstract

A power amplification circuit appropriately performs gain dispersion without affecting symmetry of a differential amplification circuit. The power amplification circuit (100c) includes: differential amplification circuits, i.e., amplification circuits (12a) and (12b), which amplify a high-frequency signal; a transformer (22) provided at an output side of the differential amplification circuits, which has a primary winding and a secondary winding; and a dispersion circuit (41), which is an adjustment circuit connected to a midpoint (P22) of the primary winding of the transformer (22). The dispersion circuit (41) adjusts a bias (bias current or bias voltage) supplied to the differential amplification circuits based on a power supply voltage controlled in accordance with an envelope line of the high-frequency signal.

Description

Technical Field

[0001] This invention relates to power amplifier circuits. Background Technology

[0002] In recent years, with the transition to 5G mobile communication systems, the increase in power consumption has become a concern. Envelope tracking (ET) has been adopted as a high-efficiency technology to improve power efficiency. Envelope tracking is a method of controlling the power supply voltage of a power amplifier circuit based on the amplitude level of the input signal. In envelope tracking, to achieve high efficiency, it needs to have voltage dependence of gain (gain dispersion), making each envelope power supply potential the point of optimal efficiency. Gain dispersion refers to the difference in gain relative to changes in the power supply potential supplied to the transistor. A dispersion circuit (hereinafter sometimes called an adjustment circuit) is used to adjust the gain dispersion to the point of optimal efficiency.

[0003] The power amplifier circuit disclosed in Patent Document 1 includes an adjustment circuit. The adjustment circuit adjusts the amount of bias current supplied to the amplifier circuit based on a power supply voltage controlled according to the envelope of the RF signal. Thus, the adjustment circuit adjusts the range of gain dispersion.

[0004] Furthermore, Patent Document 2 describes a power amplifier circuit in which a variable power supply potential is supplied from an envelope tracking power supply circuit. The lower the variable power supply potential, the less bias current flows to the base of the transistor. In the power amplifier circuit described in Patent Document 2, the lower the variable power supply potential, the lower the transistor gain, thus improving gain dispersion characteristics. Therefore, the power amplifier circuit described in Patent Document 2 can suppress the increase in gain at low power supply potentials and make the gain equal to that at high power supply potentials.

[0005] Prior art literature

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2020-65244

[0008] Patent Document 2: Japanese Patent Application Publication No. 2018-195954

[0009] However, regarding power amplifier circuits that include differential amplifier circuits, there are concerns that implementing gain dispersion might affect the symmetry of the differential amplifier circuit, leaving room for improvement. Summary of the Invention

[0010] The problem that the invention aims to solve

[0011] The present invention was made in view of the above circumstances, and its object is to provide a power amplifier circuit that can appropriately distribute gain without affecting the symmetry of the differential amplifier circuit.

[0012] Technical solutions for solving the problem

[0013] One side of the power amplifier circuit of the present invention includes: a differential amplifier circuit for amplifying a high-frequency signal; a transformer disposed on the output side of the differential amplifier circuit, having a primary winding and a secondary winding; and an adjustment circuit connected to the midpoint of the primary winding of the transformer, the adjustment circuit adjusting the bias current or bias voltage supplied to the differential amplifier circuit based on a power supply voltage controlled according to the envelope of the high-frequency signal.

[0014] Invention Effects

[0015] According to the present invention, the following effect is achieved: gain dispersion can be appropriately performed without affecting the symmetry of the differential amplifier circuit. Attached Figure Description

[0016] Figure 1 This is a diagram showing the structure of the transmitting circuit including the power amplifier circuit of the first embodiment.

[0017] Figure 2 This is a diagram showing the power amplifier circuit of the first comparative example.

[0018] Figure 3 This is a diagram showing an example of the structure of a distributed circuit and a bias circuit.

[0019] Figure 4 It is a diagram illustrating the operating characteristics of a distributed circuit.

[0020] Figure 5 It is a diagram illustrating the operating characteristics of a distributed circuit.

[0021] Figure 6 This is a diagram showing the power amplifier circuit based on the second comparative example.

[0022] Figure 7 This is a diagram showing a power amplifier circuit based on the second embodiment.

[0023] Figure 8 This is a diagram showing a more specific structural example of the power amplifier circuit based on the second embodiment.

[0024] Figure 9 This is a diagram showing a power amplifier circuit based on the third embodiment.

[0025] Figure 10 This is a diagram showing a power amplifier circuit based on the fourth embodiment.

[0026] Figure 11 This is a diagram showing a power amplifier circuit based on the fifth embodiment.

[0027] Figure 12 This is a diagram showing an example of the configuration on a power amplifier circuit substrate.

[0028] Figure 13 This is a diagram showing an example of the configuration on a power amplifier circuit substrate.

[0029] Figure 14 This is a diagram showing a power amplifier circuit based on the sixth embodiment.

[0030] Figure 15 This is a diagram showing a power amplifier circuit based on the seventh embodiment.

[0031] Figure 16 This is a diagram showing a power amplifier circuit based on the eighth embodiment.

[0032] Figure 17 This is a diagram showing a power amplifier circuit based on the ninth embodiment.

[0033] Figure 18 This is a diagram showing a power amplifier circuit based on the 10th embodiment.

[0034] Figure 19 This is a diagram illustrating an example of the characteristics of a filter.

[0035] Explanation of reference numerals in the attached figures

[0036] 1-3: Matching circuit;

[0037] 4: Power supply circuit;

[0038] 5, 6, L31: Inductors;

[0039] 11, 11a, 11b, 12, 12a, 12b: Amplifier circuits;

[0040] 13, 13a, 13b, 14, 14a, 14b: Bias circuit;

[0041] 15: Baseband circuit;

[0042] 21, 22: Transformer;

[0043] 30: RF circuit;

[0044] 31: Filter;

[0045] 40: Power supply circuit;

[0046] 41, 41a, 41b: Dispersion circuit;

[0047] 60: Front-end circuitry;

[0048] 70: Antenna;

[0049] 100, 100a~100k: Power amplifier circuit;

[0050] 131, 141: Resistors;

[0051] 132, 133, 135, 142, 143, 145, Q1, Q2, Q11, Qd: Transistors;

[0052] 134, 144, C12, C13, C14, C31: Capacitors;

[0053] 200: Transmitting circuit;

[0054] 221, 222: Wiring patterns;

[0055] B1~B6: Vias;

[0056] P21, P22: Midpoint;

[0057] S1: substrate;

[0058] S2: Chip. Detailed Implementation

[0059] Hereinafter, embodiments of the power amplifier circuit of the present invention will be described in detail based on the accompanying drawings. However, the present invention is not limited to these embodiments. Each embodiment is illustrative, and partial substitutions or combinations of the structures shown in different embodiments are possible. From the second embodiment onwards, descriptions of matters common to the first embodiment are omitted, and only the differences are described. In particular, descriptions of the same effects resulting from the same structure are appropriately omitted and are not mentioned repeatedly in each embodiment.

[0060] <First Implementation>

[0061] (Overall structure of the transmitting circuit)

[0062] Figure 1 This diagram illustrates the structure of a transmitting circuit including the power amplifier circuit of the first embodiment. The transmitting circuit 200 is used, for example, in a wireless communication terminal device such as a portable telephone to transmit various signals such as voice and data to a base station. Additionally, the wireless communication terminal device also includes a receiving unit for receiving signals from the base station, but its description is omitted here.

[0063] like Figure 1As shown, the transmitting circuit 200 includes a baseband circuit 15, an RF (Radio Frequency) circuit 30, a power supply circuit 40, a power amplifier circuit 100, a front-end circuit 60, and an antenna 70.

[0064] The baseband circuit 15 modulates input signals such as voice and data based on modulation methods such as HSUPA (High Speed ​​Uplink Packet Access) and LTE (Long Term Evolution). IN Modulate and output the modulated signal S. IQ Modulation signal S IQ The IQ signal (I signal and Q signal) represents the amplitude and phase on the IQ plane.

[0065] RF circuit 30 is based on the modulation signal S output from baseband circuit 15. IQ The output is a high-frequency input signal RFin. Furthermore, the RF circuit 30 is based on the modulation signal S. IQ To detect the modulation signal S IQ The amplitude level. Furthermore, the RF circuit 30 will control the signal S. CTRL Output to power supply circuit 40, control signal S CTRL The power supply circuit 40 is controlled so that the power supply potential Vcc supplied to the power amplifier circuit 100 is a level corresponding to the amplitude level of the high-frequency input signal RFin. Specifically, the RF circuit 30 controls the signal S... CTRL Output to power supply circuit 40, control signal S CTRL The power supply circuit 40 is controlled so that the power supply potential Vcc becomes the level corresponding to the envelope of the high-frequency input signal RFin. In other words, the RF circuit 30 uses the control signal S for envelope tracking. CTRL Output to power supply circuit 40.

[0066] Alternatively, in the RF circuit 30, the modulation signal S may not need to be modulated. IQ Instead of directly transforming the high-frequency input signal RFin, it transforms the modulated signal S... IQ It is transformed into an intermediate frequency (IF) signal, and a high-frequency input signal RFin is generated from the IF signal.

[0067] The power supply circuit 40 is an envelope tracking power supply circuit that generates and outputs a control signal S from the RF circuit 30. CTRLThe corresponding power supply potential Vcc, that is, the level corresponding to the envelope of the high-frequency input signal RFin, is output to the power amplifier circuit 100. The power supply circuit 40, for example, can generate a control signal S based on the input potential. CTRL A DC-DC converter and a linear amplifier with a corresponding power supply potential Vcc are used.

[0068] In addition, the power supply potential Vcc is a potential that varies according to the envelope of the high-frequency input signal RFin.

[0069] The power amplifier circuit 100 amplifies the high-frequency input signal RFin of a radio frequency and outputs a high-frequency output signal RFout, for example in a mobile communication device such as a portable telephone. The frequencies of the high-frequency input signal RFin and the high-frequency output signal RFout can be, for example, in the range of several hundred MHz (megahertz) to tens of GHz (gigahertz), but this disclosure is not limited thereto.

[0070] The power amplifier circuit 100 amplifies the power of the high-frequency input signal RFin output from the RF circuit 30 to the level required for transmission to the base station. Then, the power amplifier circuit 100 outputs the amplified high-frequency output signal RFout to the front-end circuit 60.

[0071] The front-end circuit 60 performs filtering of the high-frequency output signal RFout and switching with the received signal received from the base station. The high-frequency output signal RFout output from the front-end circuit 60 is transmitted to the base station via the antenna 70.

[0072] The power amplifier circuit 100 can also be implemented by a hybrid IC (also called a module) in which multiple components (semiconductor integrated circuits, etc.) are mounted on a substrate, but this disclosure is not limited thereto.

[0073] Here, in order to make the structure and operation of the power amplifier circuit implementation method easy to understand, the structure and operation of the power amplifier circuit of the comparative example will be explained first.

[0074] (Comparative Example 1)

[0075] Figure 2 This is a diagram showing the power amplifier circuit 100a of the first comparative example. (See diagram below.) Figure 2 As shown, the power amplifier circuit 100a includes an input terminal 10, matching circuits 1, 2, and 3, amplification circuits 11 and 12, bias circuits 13 and 14, a scattering circuit 41, an output terminal 20, and inductors 5 and 6. A high-frequency input signal RFin is input to the input terminal 10. A high-frequency output signal RFout is output from the output terminal 20.

[0076] Amplifier circuit 11 is the primary (driver stage) amplifier circuit. Amplifier circuit 12 is the secondary (power stage) amplifier circuit. Matching circuit 1 is connected to the input side of amplifier circuit 11. Furthermore, matching circuit 2 is connected between amplifier circuit 11 and amplifier circuit 12. Matching circuit 3 is connected to the output side of amplifier circuit 12. Inductor 5 is connected between connection point P11 and the power supply potential Vcc. Connection point P11 is located between the output side of amplifier circuit 11 and the input side of matching circuit 2. Inductor 6 is connected between connection point P12 and the power supply potential Vcc. Connection point P12 is located between the output side of amplifier circuit 12 and the input side of matching circuit 3. The power supply potential Vcc is a power supply voltage controlled according to the envelope of the RF signal. Power amplifier circuit 100a operates by varying the power supply voltage according to so-called envelope tracking.

[0077] Matching circuit 1 takes the high-frequency input signal RFin input to input terminal 10 as input. Matching circuit 1 matches the impedance of the circuit in the preamplifier stage (not shown) and the amplifier circuit 11. Alternatively, connection point P11 can also be located inside matching circuit 2 as long as it is electrically connected to the power supply potential Vcc. In this case, matching circuit 2 can also include another inductor inserted between connection point P11 and inductor 5. Furthermore, connection point P12 can also be located inside matching circuit 3 as long as it is electrically connected to Vcc.

[0078] Amplifier circuits 11 and 12 amplify and output the input signal, respectively. Amplifier circuits 11 and 12 are each composed of transistors.

[0079] In this disclosure, the transistor is described as a bipolar transistor, but this disclosure is not limited to this. A heterojunction bipolar transistor (HBT) can be exemplified, but this disclosure is not limited to this. The transistor can also be a field-effect transistor (FET), for example. In this case, the collector, base, and emitter are simply read as drain, gate, and source, respectively. The transistor can also be a multifinite-finger transistor, which is a plurality of unit transistors (also called "fingers") electrically connected in parallel. A unit transistor refers to the minimum structural design required to constitute a transistor.

[0080] The power amplifier circuit 100a includes a bias circuit 13 and a bias circuit 14. The bias circuit 13 supplies a bias voltage or current to the amplifier circuit 11. The bias circuit 14 supplies a bias to the amplifier circuit 12.

[0081] The scattering circuit 41 is connected to the bias circuit 13. The scattering circuit 41 functions as an adjustment circuit that adjusts the bias (bias current or bias voltage) supplied by the bias circuit 13 to the amplifier circuit 11. As described later, the scattering circuit 41 may also be connected to the bias circuit 14. In this case, the scattering circuit 41 functions as an adjustment circuit that adjusts the bias voltage or current supplied by the bias circuit 14 to the amplifier circuit 12.

[0082] (Distribution circuit and bias circuit)

[0083] Figure 3 This is a diagram showing an example of the structure of the scattering circuit 41 and the bias circuit 13.

[0084] exist Figure 3 In the case of bias circuit 13, bias circuit 13 includes resistor 131, transistors 132, 133 and 135, and capacitor 134.

[0085] A constant bias current Ibias is input to one end of resistor 131. The other end of resistor 131 is electrically connected to the collector and base of transistor 132.

[0086] The collector and base of transistor 132 are electrically connected. That is, transistor 132 is diode-connected. The emitter of transistor 132 is electrically connected to the collector and base of transistor 133.

[0087] The collector and base of transistor 133 are electrically connected. That is, transistor 133 is diode-connected. The emitter of transistor 133 is electrically connected to a reference potential.

[0088] One end of capacitor 134 is electrically connected to the collector and base of transistor 132. The other end of capacitor 134 is electrically connected to a reference potential. Capacitor 134 stabilizes the voltage of transistors 132 and 133, that is, it stabilizes the voltage across the two diodes.

[0089] The collector of transistor 135 is electrically connected to a constant power supply potential Vbat. The base of transistor 135 is electrically connected to one end of capacitor 134. A constant bias current is input to the base of transistor 135. The emitter of transistor 135 is connected to amplifier circuit 11. Transistor 135 outputs a constant current Ief_pwr to amplifier circuit 11.

[0090] In addition, Figure 3 In the example, focusing on the distributed circuit 41, the distributed circuit 41 includes transistor Qd and resistors Rd_b, Rd_c, and Rd_e. Resistors Rd_b, Rd_c, and Rd_e can also be wiring resistors.

[0091] Transistor Qd is a heterojunction bipolar transistor in which the emitter and base form a heterojunction, and the band gap of the emitter is larger than that of the base.

[0092] One end of resistor Rd_b is electrically connected to the base of transistor 135 in bias circuit 13 and one end of capacitor 134. The other end of resistor Rd_b is electrically connected to the base of transistor Qd.

[0093] One end of resistor Rd_c is connected to Figure 2 One end of inductor 5 is electrically connected. The power supply potential Vcc, which serves as the envelope tracking power supply potential, is input to one end of resistor Rd_c. The other end of resistor Rd_c is electrically connected to the collector of transistor Qd.

[0094] One end of resistor Rd_e is electrically connected to the emitter of transistor Qd. The other end of resistor Rd_e is electrically connected to amplifier circuit 11. Alternatively, resistor Rd_e can be omitted. That is, the emitter of transistor Qd can also be electrically connected to amplifier circuit 11.

[0095] The potential at one end of resistor Rd_b is the potential of capacitor 134 (a constant potential). The potential at one end of resistor Rd_c is the power supply potential Vcc, which serves as the envelope tracking power supply potential. Therefore, the operation of transistor Qd varies according to the power supply potential Vcc.

[0096] The bias current Ib is the sum of the currents Ief_pwr and Id_e. Ief_pwr is the emitter current of transistor 135, and Id_e is the emitter current of transistor Qd. In other words, Ib = Ief_pwr + Id_e. Therefore, both Ief_pwr and Id_e contribute to adjusting the bias point of the transistors within amplifier circuit 11.

[0097] The distributed circuit 41 adjusts the bias current by outputting the current Id_e corresponding to the power supply potential Vcc to the amplifier circuit 11 via the resistor Rd_e.

[0098] In this disclosure, the lower limit of the power supply potential Vcc is referred to as the first potential. The upper limit of the power supply potential Vcc is referred to as the second potential. The first potential may be exemplified as approximately 1.0V, but this disclosure is not limited thereto. The second potential may be exemplified as approximately 4.5V, but this disclosure is not limited thereto.

[0099] Transistor Qd is a heterojunction bipolar transistor. Therefore, with the power supply potential Vcc as the boundary, transistor Qd exhibits different behaviors at a third potential (threshold potential) that is higher than the first potential. This third potential can be exemplified as around 3V, but this disclosure is not limited thereto.

[0100] When the power supply potential Vcc is higher than the third potential, transistor Qd operates as an emitter follower circuit. On the other hand, when the power supply potential Vcc is lower than the third potential, transistor Qd operates as a dual PN junction diode (the PN junction between the base and collector and the PN junction between the base and emitter).

[0101] In this disclosure, the path through which current flows from the bias circuit 13 to the base of transistor Qx in the amplifier circuit 11 via resistor Rb is referred to as the first current path. The emitter of transistor 135 is electrically connected to the base of transistor Qx in the amplifier circuit 11 via the first current path. The emitter of transistor Qd is electrically connected to the first current path via resistor Rd_e.

[0102] Furthermore, the path through which current flows from the bias circuit 13 via resistor Rd_b, the PN junction between the base and collector of transistor Qd, and resistor Rd_c to connection point P11 is called the second current path. The base of transistor 135 is connected to the second current path via resistor Rd_b.

[0103] Furthermore, the path through which current flows from connection point P11 via resistor Rd_c, the collector-emitter junction of transistor Qd, resistor Rd_e, and resistor Rb to the base of transistor Qx in amplifier circuit 11 is called the third current path.

[0104] (The case where the transistor operates as an emitter follower circuit)

[0105] The case where transistor Qd operates as an emitter follower circuit will be explained. In this case, the current Ief_pwr flows from the bias circuit 13 to the base of transistor Qx via the first current path. Simultaneously, the current Id_e flows from connection point P11 to the base of transistor Qx via the third current path. At this time, the current Id_b is negligible, therefore the current Id_e becomes equal to the current Id_c. That is, Id_e ≈ Id_c.

[0106] (The case where the transistor operates as two PN junction diodes)

[0107] The case where transistor Qd operates as a two-PN junction diode will be explained. In this case, current flows from bias circuit 13 to connection point P11 via the second current path. This is because the forward voltage of the PN junction between the base and collector of transistor Qd is lower than the forward voltage of the PN junction between the base and emitter, therefore current preferentially flows between the base and collector of transistor Qd. At this time, the direction of current Id_c flow is opposite to that of the diode. Figure 3 The arrows shown point in the opposite direction.

[0108] In the distribution circuit 41, the lower the power supply potential Vcc, the greater the current Id_c in the opposite direction (from the bias circuit 13 through the second current path to the connection point P11). In other words, in the distribution circuit 41, the lower the power supply potential Vcc, the more the current Id_b flows as current Id_c in the opposite direction (from the bias circuit 13 through the second current path to the connection point P11), thus reducing the current flowing to the base of transistor 135. That is, in the distribution circuit 41, the lower the power supply potential Vcc, the less the base current of transistor 135, the less the current Ief_pwr, and therefore the less the bias current Ib.

[0109] Therefore, the collector current Icc of transistor Qx also decreases. Consequently, when the power supply potential Vcc is below the third potential, the dispersion circuit 41 can reduce the gain of transistor Qx. For example, the dispersion circuit 41 can reduce the gain of transistor Qx when the power supply potential Vcc is at the first potential, which is the lower limit potential, compared to the gain when transistor Qx's efficiency is maximized at its highest output. Therefore, the dispersion circuit 41 can improve the gain dispersion characteristics of the power amplifier circuit.

[0110] (Operating characteristics of distributed circuits)

[0111] Figure 4 as well as Figure 5 This is a diagram illustrating the operating characteristics of the distributed circuit 41. Figure 4 The supply potential Vcc-collector current Icc characteristic is shown relative to the bias current Ibias. Figure 4 In the diagram, the horizontal axis represents the power supply potential Vcc, and the vertical axis represents the collector current Icc.

[0112] exist Figure 4 In the diagram, dashed lines DL1 to DL4 indicate the operating characteristics when the distributed circuit 41 is not connected, while solid lines SL1 to SL4 indicate the operating characteristics when the distributed circuit 41 is connected. Dashed lines DL1 and solid lines SL1 correspond to the state where the bias current Ibias is the same value and high, while dashed lines DL4 and solid lines SL4 correspond to the state where the bias current Ibias is the same value and low. Figure 4 As shown, if we focus on the operating characteristics of the single-dotted lines DL1 to DL4 that are not connected to the distributed circuit 41, then under the value of each bias current Ibias, when the power supply potential Vcc decreases, the collector current Icc is approximately constant or decreases slowly.

[0113] In contrast, if we consider the values ​​of the bias currents Ibias of the solid lines SL1 to SL4 connected to the distributed circuit 41, then when the power supply potential Vcc is relatively high, the solid lines SL1 to SL4 are approximately the same as the dashed lines DL1 to DL4. Therefore, when the power supply potential Vcc is relatively high, the operating characteristics are the same as when the distributed circuit 41 is not connected. On the other hand, when the power supply potential Vcc is relatively low, the distributed circuit 41 operates, drawing current from the bias circuit 13 and causing the collector current Icc to decrease. In this example, if the power supply potential Vcc decreases, the operating characteristics shown by the solid lines SL1 to SL4 decrease linearly, and compared to the operating characteristics shown by the dashed lines DL1 to DL4, the collector current Icc decreases significantly. Thus, when the distributed circuit 41 is connected, the range of variation of the collector current Icc is... Figure 4 The lower side of the offset. As described above, if the value of the power supply potential Vcc increases, the amount of current drawn by the scattering circuit 41 from the bias circuit 13 decreases. Therefore, when the value of the power supply potential Vcc is relatively high, as described above, the operating characteristics shown by solid lines SL1 to SL4 become the same as those shown by dashed lines DL1 to DL4. Here, we focus on dashed line DL2 and solid line SL2. Dashed line DL2 and solid line SL2 can be divided into multiple intervals with respect to the power supply potential Vcc, for example, they can be divided into four intervals M1, M2, M3, and M4. Among the four intervals M1, M2, M3, and M4, interval M1 is the interval with the highest power supply potential. Among the four intervals M1, M2, M3, and M4, interval M4 is the interval with the lowest power supply potential. Refer to Figure 5 Examples of the variation in gain relative to the power supply potential Vcc in each interval M1, M2, M3, and M4 are explained. Furthermore, the gain increases or decreases proportionally to the collector current Icc.

[0114] Figure 5 This is a graph showing the characteristics of gain relative to power. In Figure 5 In the diagram, the horizontal axis represents output power, and the vertical axis represents gain. Figure 5 In the middle, single-dot dashed line pairs Figure 4 Each interval M1 to M4 in the diagram illustrates the operating characteristics when the distributed circuit 41 is not connected. Figure 5 In the middle, the solid line shows the operating characteristics when the distributed circuit 41 is connected.

[0115] like Figure 5 As shown, without the distributed circuit 41 connected, and Figure 4The operating characteristics corresponding to intervals M1 to M4 are shown by the dashed lines. If the power increases, the gain drops sharply. Without the distributed circuit 41 connected, the range of gain variation in the operating characteristics corresponding to intervals M1 to M4 is indicated by the arrow Y1.

[0116] In contrast, when the distributed circuit 41 is connected, with Figure 4 The action characteristics corresponding to intervals M1 to M4 are shown by the solid line, with a decrease in gain. In particular, in relation to... Figure 4 In the operating characteristics corresponding to interval M4, the gain drops significantly. With the scattering circuit 41 connected, the range of gain variation in each operating characteristic corresponding to intervals M1 to M4 is indicated by arrow Y2. That is, with the scattering circuit 41 connected, the range of gain variation becomes wider, as shown by arrow Y2. Therefore, by connecting the scattering circuit 41 to the bias circuit 13, the range of gain variation can be expanded. Regarding... Figure 4 The other solid lines SL1, DL1, SL3, DL3, SL4, and DL4 can also be divided into multiple intervals. Furthermore, by connecting the dispersion circuit 41 to the bias circuit 13, thus... Figure 5 As shown, it is possible to expand the range of gain variation in the motion characteristics corresponding to each interval.

[0117] exist Figure 2 In the power amplifier circuit 100a of the first comparative example shown, a distributed circuit 41 is connected to the amplifier circuit 11. Therefore, when the amplifier circuit 11 is a differential amplifier circuit, it may sometimes become an asymmetrical configuration due to differences in wiring length, etc., making it impossible to maintain the symmetry of the differential amplifier circuit.

[0118] (Comparative Example 2)

[0119] Figure 6 This is a diagram illustrating the power amplifier circuit based on the second comparative example. (As shown) Figure 6 As shown, the power amplifier circuit 100b of the second comparative example includes amplifier circuits 12a and 12b. Amplifier circuits 12a and 12b constitute a differential amplifier circuit.

[0120] A transformer 21 is provided between the primary amplifier circuit 11 and amplifier circuits 12a and 12b. The primary winding and secondary winding of the transformer 21 are electromagnetically coupled, transmitting the signal from the primary winding side to the secondary winding side. One end of the primary winding of the transformer 21 is connected to the power supply potential Vcc via an inductor 5. The transformer 21 operates as a matching circuit.

[0121] A transformer 22 is provided on the output side of amplifier circuits 12a and 12b. The primary winding and secondary winding of transformer 22 are electromagnetically coupled, transmitting the signal from the primary winding side to the secondary winding side. One end of the primary winding of transformer 22 is connected to the output of amplifier circuit 12a. The other end of the primary winding of transformer 22 is connected to the output of amplifier circuit 12b.

[0122] The midpoint P22 of the primary winding of transformer 22 is connected to the power supply potential Vcc. Transformer 22 operates as a matching circuit. The midpoint in this disclosure does not mean a position that is half the inductance value of the primary winding of transformer 22, but rather is defined as half of the primary winding within the range of manufacturing deviations of the primary winding of transformer 22.

[0123] A bias circuit 14 is connected to amplifier circuits 12a and 12b. The bias circuit 14 supplies bias current to amplifier circuits 12a and 12b.

[0124] A scattering circuit 41a is connected to the output side of amplifier circuit 12a. A scattering circuit 41b is connected to the output side of amplifier circuit 12b. The scattering circuits 41a and 41b adjust the bias current supplied from the bias circuit 14 to amplifier circuits 12a and 12b.

[0125] exist Figure 6 In the power amplifier circuit 100b of the second comparative example shown, a scattering circuit 41a is connected to amplifier circuit 12a, and a scattering circuit 41b is connected to amplifier circuit 12b. Therefore, depending on the wiring length and other factors, it is sometimes impossible to maintain the symmetry of the differential amplifier circuit including amplifier circuits 12a and 12b sufficiently.

[0126] Regarding distributed circuits, there are cases where distributed circuits are used for the power supply of primary amplifier circuits with small high-frequency signal amplitudes, and cases where distributed circuits are used for the power supply of subsequent amplifier circuits. Depending on the system, there are also requirements where only the subsequent stage performs ET operation. In this case, the amplitude of the high-frequency signal output from the subsequent stage may leak into the bias circuit, causing malfunctions. In recent years, with the strong demand for high output, this problem has become significant.

[0127] Furthermore, differential amplifier circuits are sometimes used to handle high output. In differential amplifier circuits, symmetry becomes an important design element. Here, symmetry refers to the fact that the gain or loss on the positive (+) and negative (-) sides of the differential amplifier circuit are the same; the phase difference between the positive (+) and negative (-) sides of the differential amplifier circuit is 180 degrees with no phase shift; and the impedance of the bias circuit on the positive (+) side of the differential amplifier circuit is the same as the impedance of the bias circuit on the negative (-) side. To achieve this symmetry, methods such as symmetrically connecting multiple distributed circuits can be used. However, in this case, the circuit size may increase.

[0128] <Second Implementation Method>

[0129] Figure 7 This is a diagram showing a power amplifier circuit based on the second embodiment.

[0130] [structure]

[0131] like Figure 7 As shown, the power amplifier circuit 100c based on the second embodiment and Figure 6 Similarly, the power amplifier circuit 100b shown includes amplifier circuits 12a and 12b. Amplifier circuits 12a and 12b constitute a differential amplifier circuit. A single scattering circuit 41 is connected to the output side of amplifier circuit 12a. The scattering circuit 41 controls the bias supplied from bias circuit 14 to amplifier circuits 12a and 12b. Other structures of power amplifier circuit 100c are similar to those shown in the reference diagram. Figure 6 The power amplifier circuit 100b described is the same as that in the first comparative example.

[0132] Furthermore, the power amplifier circuit 100c is configured as a two-stage amplifier circuit including amplifier circuits 11, 12a, and 12b, but this disclosure is not limited to this. The power amplifier circuit 100c may also include a single-stage amplifier circuit or three or more stages of amplifier circuits. For example, the power amplifier circuit 100c may further include one or more amplifier circuits inserted between amplifier circuits 11 and amplifier circuits 12a and 12b. Alternatively, for example, the power amplifier circuit 100c may include amplifier circuits 12a and 12b, but not amplifier circuit 11.

[0133] [action]

[0134] The high-frequency input signal RFin input to input terminal 10 is fed to amplifier circuit 11 via matching circuit 1. Amplifier circuit 11 amplifies the input signal and outputs it. The output signal of amplifier circuit 11 is a single-port signal. The output signal of amplifier circuit 11 is input to one end of the primary winding of transformer 21.

[0135] The signal from the secondary winding side of transformer 21 is input to amplifier circuit 12. Amplifier circuits 12a and 12b amplify the signal input via transformer 21. Amplifier circuits 12a and 12b output the amplified signal as a pair of differential signals. The pair of differential signals output from amplifier circuits 12a and 12b are input to the primary winding side of transformer 22. A high-frequency output signal RFout, as a single-port signal, is output to output terminal 20 from the secondary winding side of transformer 22.

[0136] Bias circuit 13 supplies bias (i.e., bias current or bias voltage) to the base or gate of amplifier circuit 11. Bias circuit 14 supplies bias (i.e., bias current or bias voltage) to amplifier circuits 12a and 12b. Distributed circuit 41 controls the bias supplied to amplifier circuits 12a and 12b based on the signal output from amplifier circuit 12a. Thus, the bias controlled by distributed circuit 41 is supplied to amplifier circuits 12a and 12b.

[0137] Here, the distributed circuit 41 is connected to the center tap of the primary winding of the transformer 22, i.e., the midpoint P22. The midpoint P22 serves as a hypothetical ground point for the high-frequency signal. That is, it does not affect the symmetry of the differential amplifier circuit containing amplifier circuits 12a and 12b. Therefore, even if the amplitude of the high-frequency signal fluctuates significantly, the differential amplifier circuit containing amplifier circuits 12a and 12b can still operate appropriately. Therefore, it is not a problem even if it becomes an asymmetrical wiring structure. In addition, because it is connected to the hypothetical ground point, signals with odd-order frequencies of the high-frequency signal are canceled out, thus not affecting the symmetry of the differential amplifier circuit.

[0138] Furthermore, by connecting to the midpoint P22, it is separated from the high-frequency signal, thus reducing the resistance value of the scattering circuit 41. By reducing the resistance value of the scattering circuit 41, the reference... Figure 4 The increased slope of the solid lines SL1 to SL4, as illustrated, expands the range of gain variation (see reference). Figure 5 ).

[0139] Generally, when the outputs of each amplification stage and the high-frequency signals are connected to distributed circuits, the resistance value of the distributed circuits needs to be set to the order of several kΩ to ensure isolation. In contrast, by connecting the distributed circuit at the midpoint of the transformer as disclosed in this invention, isolation can be ensured, thus reducing the resistance value to the order of several hundred Ω, and increasing the reference value. Figure 4 The slopes of the solid lines SL1 to SL4 are shown.

[0140] (Specific structural example)

[0141] Figure 8 This is a diagram showing a more specific structural example of the power amplifier circuit 100c based on the second embodiment. (See diagram for details.) Figure 8 As shown, input terminal 10 is connected to matching circuit 1. A capacitor C12 is provided between matching circuit 1 and amplifier circuit 11. A bias circuit 13 is connected to the input side of amplifier circuit 11 via resistor Rb11. Amplifier circuit 11 has transistor Q11.

[0142] The output side of amplifier circuit 11 is connected to the primary winding of transformer 21. The secondary winding of transformer 21 is connected to amplifier circuits 12a and 12b via capacitors C13 and C14. Amplifier circuit 12a has transistor Q1. Amplifier circuit 12b has transistor Q2. The output side of amplifier circuits 12a and 12b is connected to the primary winding of transformer 22. The secondary winding of transformer 22 is connected to output terminal 20.

[0143] The input side of amplifier circuit 12a is connected to bias circuit 14 via resistor Rb1. The input side of amplifier circuit 12b is connected to bias circuit 14 via resistor Rb2. Bias circuit 14 is connected to a reference circuit. Figure 3 The bias circuit 14 has the same structure as the bias circuit 13 described. That is, the bias circuit 14 includes resistor 141, transistors 142, 143, and 145, and capacitor 144. The bias circuit 14 is similar to... Figure 3 The bias circuit 13 operates similarly. A scattering circuit 41 is connected to the bias circuit 14. The scattering circuit 41 is connected to the reference circuit. Figure 3 Similarly, the bias circuit 13 described above controls the bias supplied from the bias circuit 14 to the amplifier circuits 12a and 12b.

[0144] The distributed circuit 41 is connected to the center tap of the primary winding of the transformer 22, i.e., the midpoint P22. Because the distributed circuit 41 is connected to the midpoint P22, it does not affect the symmetry of the differential amplifier circuit containing amplifier circuits 12a and 12b. Instead of providing separate distributed circuits for amplifier circuits 12a and 12b, a single distributed circuit 41 is provided. By combining the distributed circuits into one without disrupting the symmetry of the differential amplifier circuit containing amplifier circuits 12a and 12b, the circuit size can be miniaturized.

[0145] In addition, unlike the choke coil set in the power supply circuit, no decoupling capacitor is required for the midpoint P22 of transformer 22.

[0146] <Third Implementation Method>

[0147] Figure 9 This is a diagram illustrating a power amplifier circuit based on the third embodiment. (As shown) Figure 9 As shown, the power amplifier circuit 100d based on the third embodiment and Figure 7 Similarly, the power amplifier circuit 100c has a distributed circuit 41 connected to the center tap of the primary winding of the transformer 22, i.e., the midpoint P22. However, with Figure 7Unlike the power amplifier circuit 100c, the scattering circuit 41 adjusts the bias current supplied from the bias circuit 13 to the primary amplifier circuit 11. The midpoint P22 serves as the hypothetical ground point for the high-frequency signal. Because the scattering circuit 41 is connected to the midpoint P22, it does not affect the symmetry of the differential amplifier circuit containing amplifier circuits 12a and 12b.

[0148] <Fourth Implementation Method>

[0149] Figure 10 This is a diagram illustrating a power amplifier circuit based on the fourth embodiment. Figure 10 As shown, the power amplifier circuit 100e based on the fourth embodiment and Figure 9 Unlike the power amplifier circuit 100d, the amplifier circuits 12a and 12b are connected to bias circuits 14a and 14b. Bias circuit 14a supplies bias current to amplifier circuit 12a. Bias circuit 14b supplies bias current to amplifier circuit 12b.

[0150] In the power amplifier circuit 100e based on the fourth embodiment, with Figure 9 Similarly, in the power amplifier circuit 100d, the scattering circuit 41 is connected to the center tap of the primary winding of the transformer 22, i.e., the midpoint P22. The midpoint P22 serves as the hypothetical ground point for high-frequency signals. Because the scattering circuit 41 is connected to the midpoint P22, the scattering circuit 41 does not affect the symmetry of the differential amplifier circuit containing amplifier circuits 12a and 12b.

[0151] <Fifth Implementation>

[0152] Figure 11 This is a diagram illustrating a power amplifier circuit based on the fifth embodiment. (As shown) Figure 11 As shown, the power amplifier circuit 100f based on the fifth embodiment and Figure 10 Unlike the power amplifier circuit 100e, a scattering circuit 41a is connected to the bias circuit 14a corresponding to amplifier circuit 12a, and a scattering circuit 41b is connected to the bias circuit 14b corresponding to amplifier circuit 12b. The scattering circuit 41a adjusts the bias current supplied to amplifier circuit 12a. The scattering circuit 41b adjusts the bias current supplied to amplifier circuit 12b.

[0153] In the power amplifier circuit 100f based on the fifth embodiment, with Figure 9Similarly, in the power amplifier circuit 100d, the scattering circuits 41a and 41b are connected to the center tap of the primary winding of the transformer 22, i.e., the midpoint P22. The midpoint P22 serves as the imaginary ground point for high-frequency signals. Because the scattering circuits 41a and 41b are connected to the midpoint P22, the scattering circuits 41a and 41b do not affect the symmetry of the differential amplifier circuit containing amplifier circuits 12a and 12b.

[0154] (Example of configuration on the substrate)

[0155] Figure 12 as well as Figure 13 This is a diagram showing an example of the configuration on the substrate of the power amplifier circuit 100f. Figure 12 This is a diagram showing an image of the upper surface of the substrate. Figure 13 This is a diagram showing a cross-section of the substrate.

[0156] like Figure 12 as well as Figure 13 As shown, a chip S2 is mounted on a substrate S1. The chip S2 includes amplifier circuits 12a and 12b, bias circuits 14a and 14b, and scattering circuits 41a and 41b. A transformer 22, including wiring patterns 221, 222, and 222', is disposed adjacent to the chip S2 on the substrate S1. Although the amplifier circuit 11 and bias circuit 13 are not shown in the diagram, they are disposed inside the chip S2. In this embodiment, the chip S2 and the substrate S1 are flip-chip mounted, but they could also be mounted via wire bonding.

[0157] In this embodiment, the substrate S1 has, for example, five layers L1 to L5. Layers L1 to L5 are resin layers. Conductive wiring patterns are formed on the upper or lower sides of layers L1 to L5. A chip S2 is mounted on layer L1. A terminal T1 is provided on layer L1. Terminal T1 corresponds to an output terminal 20. Figure 13 Layer L5 is provided with terminals T2 and T3. A power supply potential Vcc is applied to terminal T2. A reference potential is applied to terminal T3.

[0158] Terminal T2 is connected to the internal wiring pattern H1 via via B1. Via B2 is connected to the internal wiring pattern H1. Power supply potential Vcc is supplied to the distribution circuits 41a and 41b of chip S2 through via B1, the internal wiring pattern H1, and via B2.

[0159] Wiring pattern 222 is provided on layer L1, and wiring pattern 222' is provided on layer L3. Wiring pattern 221 is provided on layer L2. Wiring pattern 221 is connected to chip S2 via via B3. Wiring pattern 221 corresponds to the primary winding of transformer 22. Wiring pattern 222 and wiring pattern 222' are electrically connected via via B4. Wiring pattern 222' is connected to terminal T3 via via B5. Wiring pattern 222 and wiring pattern 222' correspond to the secondary winding of transformer 22.

[0160] In this way, transformer 22 comprises multiple layers, with wiring patterns 221 corresponding to the primary winding and wiring patterns 222 and 222' corresponding to the secondary winding formed on different layers. Furthermore, wiring patterns 221 corresponding to the primary winding and wiring patterns 222 and 222' corresponding to the secondary winding are electromagnetically coupled. Transformers 21, 22, etc., based on other embodiments also have the same structure.

[0161] Furthermore, wiring pattern 221 is connected to the internal wiring pattern H1 via via B6. Via B6 corresponds to the center tap of transformer 22, i.e., the midpoint P22. Therefore, distributed circuits 41a and 41b are connected to the midpoint P22 of transformer 22.

[0162] The midpoint P22 of transformer 22 becomes the hypothetical ground point for high-frequency signals. Because the scattering circuits 41a and 41b are connected to the midpoint P22, the scattering circuits 41a and 41b will not affect the symmetry of the differential amplifier circuit containing amplifier circuits 12a and 12b.

[0163] exist Figure 12 In the context of chip S2, considering the configuration of the scattering circuits 41a and 41b, they are not symmetrically arranged. That is, the wiring length from terminal T2, where the power supply potential Vcc is applied, to scattering circuit 41a is different from the wiring length from terminal T2 to scattering circuit 41b. Even with this asymmetrical wiring, because scattering circuits 41a and 41b are connected to the midpoint P22, the symmetry of the operation of the differential amplifier circuit containing amplifier circuits 12a and 12b is not affected.

[0164] <Sixth Implementation>

[0165] Figure 14 This is a diagram illustrating a power amplifier circuit based on the sixth embodiment. (As shown) Figure 14As shown, the power amplifier circuit 100g based on the sixth embodiment includes amplifier circuits 11a and 11b. These primary amplifier circuits 11a and 11b constitute a differential amplifier circuit. That is, the power amplifier circuit 100g includes a cascaded first differential amplifier circuit (amplifier circuits 11a and 11b) and a second differential amplifier circuit (amplifier circuits 12a and 12b), and a transformer 21 is disposed between the first differential amplifier circuit (amplifier circuits 11a and 11b) and the second differential amplifier circuit (amplifier circuits 12a and 12b).

[0166] The power amplifier circuit 100g based on the sixth embodiment has a distribution circuit 41 connected to the bias circuit 14 corresponding to the amplifier circuits 12a and 12b. The distribution circuit 41 adjusts the bias current supplied to the amplifier circuits 12a and 12b.

[0167] In the power amplifier circuit 100g based on the sixth embodiment, the scattering circuit 41 is connected to the center tap of the primary winding of the transformer 21, i.e., the midpoint P21. The midpoint P21 serves as a hypothetical ground point for high-frequency signals. Because the scattering circuit 41 is connected to the midpoint P21, the scattering circuit 41 does not affect the symmetry of the differential amplifier circuit containing amplifier circuits 11a and 11b.

[0168] <Seventh Implementation>

[0169] Figure 15 This is a diagram illustrating a power amplifier circuit based on the seventh embodiment. (As shown) Figure 15 As shown, the power amplifier circuit 100h based on the seventh embodiment and Figure 14 Similarly, the power amplifier circuit 100g also includes amplifier circuits 11a and 11b that constitute a differential amplifier circuit. That is, the power amplifier circuit 100h includes a cascaded first differential amplifier circuit (amplifier circuits 11a and 11b) and a second differential amplifier circuit (amplifier circuits 12a and 12b), and the transformer 21 is disposed between the first differential amplifier circuit (amplifier circuits 11a and 11b) and the second differential amplifier circuit (amplifier circuits 12a and 12b).

[0170] Based on the power amplifier circuit 100h of the seventh embodiment and Figure 11 Similarly, in the power amplifier circuit 100f, a scattering circuit 41a is connected to the bias circuit 14a corresponding to the amplifier circuit 12a, and a scattering circuit 41b is connected to the bias circuit 14b corresponding to the amplifier circuit 12b. The scattering circuit 41a adjusts the bias current supplied to the amplifier circuit 12a. The scattering circuit 41b adjusts the bias current supplied to the amplifier circuit 12b.

[0171] In the power amplifier circuit 100h based on the seventh embodiment, the distributed circuits 41a and 41b are connected to the center tap of the primary winding of the transformer 21, i.e., the midpoint P21. Because the distributed circuits 41a and 41b are connected to the midpoint P21, the distributed circuits 41a and 41b do not affect the symmetry of the differential amplifier circuit including the amplifier circuits 11a and 11b.

[0172] <Eighth Implementation>

[0173] Figure 16 This is a diagram illustrating a power amplifier circuit based on the eighth embodiment. (As shown) Figure 16 As shown, the power amplifier circuit 100i based on the eighth embodiment and Figure 14 Similarly, the power amplifier circuit 100g also includes amplifier circuits 11a and 11b that constitute a differential amplifier circuit. That is, the power amplifier circuit 100g includes a cascaded first differential amplifier circuit (amplifier circuits 11a and 11b) and a second differential amplifier circuit (amplifier circuits 12a and 12b), and a transformer 21 is disposed between the first differential amplifier circuit (amplifier circuits 11a and 11b) and the second differential amplifier circuit (amplifier circuits 12a and 12b).

[0174] The power amplifier circuit 100i based on the eighth embodiment has a distribution circuit 41 connected to the bias circuit 13 corresponding to the amplifier circuits 11a and 11b. The distribution circuit 41 adjusts the bias current supplied to the amplifier circuits 11a and 11b.

[0175] In the power amplifier circuit 100i based on the eighth embodiment, the distributed circuit 41 is connected to the center tap of the primary winding of the transformer 21, i.e., the midpoint P21. The midpoint P21 serves as a hypothetical ground point for high-frequency signals. Because the distributed circuit 41 is connected to the midpoint P21, the distributed circuit 41 does not affect the symmetry of the differential amplifier circuit including amplifier circuits 11a and 11b. Furthermore, by providing the distributed circuit 41 as a common ground for amplifier circuits 11a and 11b, the overall circuit size can be reduced compared to the case where the distributed circuit 41 is provided separately for amplifier circuits 11a and 11b.

[0176] <Ninth Implementation>

[0177] Figure 17 This is a diagram illustrating a power amplifier circuit based on the ninth embodiment. (As shown) Figure 17 As shown, the power amplifier circuit 100j based on the ninth embodiment and Figure 15Similarly, the power amplifier circuit 100h also includes amplifier circuits 11a and 11b that constitute a differential amplifier circuit. That is, the power amplifier circuit 100j includes a cascaded first differential amplifier circuit (amplifier circuits 11a and 11b) and a second differential amplifier circuit (amplifier circuits 12a and 12b), and a transformer 21 is disposed between the first differential amplifier circuit (amplifier circuits 11a and 11b) and the second differential amplifier circuit (amplifier circuits 12a and 12b).

[0178] In the power amplifier circuit 100j based on the ninth embodiment, a scattering circuit 41a is connected to the bias circuit 13a corresponding to the amplifier circuit 11a, and a scattering circuit 41b is connected to the bias circuit 13b corresponding to the amplifier circuit 11b. The scattering circuit 41a adjusts the bias current supplied to the amplifier circuit 11a. The scattering circuit 41b adjusts the bias current supplied to the amplifier circuit 11b.

[0179] In the power amplifier circuit 100j based on the ninth embodiment, the scattering circuits 41a and 41b are connected to the center tap of the primary winding of the transformer 21, i.e., the midpoint P21. The midpoint P21 serves as the imaginary ground point for high-frequency signals. Because the scattering circuits 41a and 41b are connected to the midpoint P21, the scattering circuits 41a and 41b do not affect the symmetry of the differential amplifier circuit containing the amplifier circuits 11a and 11b.

[0180] <10th Implementation>

[0181] Figure 18 This is a diagram illustrating a power amplifier circuit based on the tenth embodiment. Figure 18 As shown, the power amplifier circuit 100k based on the tenth embodiment is... Figure 7 The power amplifier circuit 100c is supplemented with a filter 31 as a high-cut filter. Filter 31 is connected between the center tap of the primary winding of transformer 22, i.e., the midpoint P22, and the distribution circuit 41. Filter 31 has a capacitor C31 and an inductor L31 connected in series. One end of capacitor C31 is connected to the midpoint P22. The other end of capacitor C31 is connected to one end of inductor L31. The other end of inductor L31 is electrically connected to a reference potential. Filter 31 is an LC series resonant circuit.

[0182] At the midpoint P22 of transformer 22, the odd-order frequencies of the transmitted frequency fo (fundamental frequency fo, third harmonic frequency 3fo, ...) are canceled out, but the even-order frequencies (second harmonic frequency 2fo, fourth harmonic frequency 4fo, ...) are not canceled out. If the even-order harmonics are large, they may leak to the power supply potential Vcc. To suppress this, a filter 31 is added in this embodiment. Filter 31 resonates at even-order frequencies (e.g., second harmonic frequency 2fo). By providing filter 31, leakage of power at even-order frequencies to the power supply potential Vcc, as indicated by arrow Vp, can be suppressed.

[0183] Figure 19 This is a diagram illustrating an example of the characteristics of filter 31. Figure 19 The horizontal axis shows the fundamental frequency fo, the second harmonic frequency 2fo, the third harmonic frequency 3fo, and the fourth harmonic frequency 4fo. Figure 19 The vertical axis represents the power at each frequency. Regarding the second harmonic frequency 2fo, the dashed line H represents the power without filter 31, and the solid line J represents the power with filter 31. For example... Figure 19 As shown, at the midpoint P22 of transformer 22, the odd-order frequencies of the transmitted frequency fo (fundamental frequency fo, third harmonic frequency 3fo, ...) are canceled out. In contrast, the even-order frequencies (second harmonic frequency 2fo, fourth harmonic frequency 4fo, ...) are not canceled out. Without filter 31, as shown by dashed line H, the second harmonic frequency 2fo has greater power than the fourth harmonic frequency 4fo. With filter 31 resonating at the second harmonic frequency 2fo, the power of the second harmonic frequency 2fo decreases to the same level as the fourth harmonic frequency 4fo. In other words, by providing filter 31, it is possible to suppress frequencies such as... Figure 18 The arrow Yp indicates the leakage of power to the power supply potential Vcc at even frequencies.

[0184] exist Figure 18 In this configuration, the midpoint P22 serves as the hypothetical ground point for the high-frequency signal. Therefore, the filter 31 connected to the midpoint P22 will not affect the symmetry of the differential amplifier circuit containing amplifier circuits 12a and 12b.

[0185] Summary

[0186] In the case of a gain-distributed circuit connected to the power supply potential Vcc, this circuit is connected to the midpoint of the primary side of the transformer on the output side. The midpoint of the transformer becomes a hypothetical ground point for high-frequency signals. Therefore, even if the amplitude of the high-frequency signal fluctuates due to the large power of the power stage amplifier circuit, the DC feedback from the power supply potential Vcc can be transmitted. This prevents malfunctions and achieves the benefits of the gain-distributed circuit.

[0187] In the case of a differential amplifier circuit, two sets of transistors are used to combine the outputs of the two amplifier circuits. Since the outputs of the two amplifier circuits are being combined, the symmetry of the two amplifier circuits becomes important. The midpoint of the transformer becomes a hypothetical ground point for high-frequency signals; therefore, the portion connected to the midpoint has no symmetry and is irrelevant.

[0188] In the case of a single bias circuit, it needs to be positioned between (right in the middle) the two amplifier circuits to maintain symmetry. As mentioned above, by connecting it to the midpoint of the transformer, symmetry can be easily maintained from a physical layout perspective.

Claims

1. A power amplifier circuit, comprising: Differential amplifier circuits amplify high-frequency signals; A transformer, disposed on the output side of the differential amplifier circuit, has a primary winding and a secondary winding; and The adjustment circuit is connected to the midpoint of the primary winding of the transformer. The adjustment circuit adjusts the bias current or bias voltage supplied from the bias circuit to the differential amplifier circuit based on the power supply voltage controlled according to the envelope of the high-frequency signal.

2. The power amplifier circuit according to claim 1, wherein, It includes a cascaded first differential amplifier circuit and a second differential amplifier circuit. The transformer is positioned between the first differential amplifier circuit and the second differential amplifier circuit.

3. The power amplifier circuit according to claim 2, wherein, The adjustment circuit adjusts the bias current or bias voltage supplied to the first differential amplifier circuit.

4. The power amplifier circuit according to claim 2, wherein, The adjustment circuit adjusts the bias current or bias voltage supplied to the second differential amplifier circuit.

5. The power amplifier circuit according to any one of claims 1 to 4, wherein, It also includes: a high-frequency band removal filter, electrically connected to the midpoint of the primary winding.

6. The power amplifier circuit according to any one of claims 1 to 4, wherein, The transformer is implemented by a laminated substrate consisting of multiple layers. The primary winding and the secondary winding are disposed in different layers of the laminated substrate.

7. The power amplifier circuit according to claim 5, wherein, The transformer is implemented by a laminated substrate consisting of multiple layers. The primary winding and the secondary winding are disposed in different layers of the laminated substrate.

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