A method for optimizing the interface modification between the back surface of a single crystal silicon wafer and alumina

Abstract

The present invention discloses a method for optimizing the interface modification between the back surface of a monocrystalline silicon wafer and alumina, which relates to the technical field of solar photovoltaic cell manufacturing. The method sequentially includes the following steps: placing the back surface of the monocrystalline silicon wafer in an etching solution for etching, and controlling the thinning amount to be 2.47 - 2.82 μm; the etching solution includes an acid solution and an additive, and the volume ratio of the acid solution to the additive is 100:0.7 - 1.2; the acid solution is composed of nitric acid, hydrofluoric acid and water; the additive is composed of the following components by mass fraction: sodium nitrite 0.1 - 0.5%, tartaric acid 0.1 - 0.5%, sodium citrate 0.1 - 0.5%, dimethyl sulfoxide 0.1 - 0.5%, sodium dodecylbenzenesulfonate 0.1 - 0.5%, and the balance is water; after the etching is completed, a back passivation process is adopted to form an alumina back film on the back surface of the monocrystalline silicon wafer, the thickness of the alumina back film is 8 - 12 nm, and the film thickness uniformity is within the range of 5% - 10%. This optimization method can enhance the light trapping effect in the silicon wafer, improve the minority carrier lifetime of the silicon wafer, the open circuit voltage of the solar cell and the conversion efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of solar photovoltaic cell manufacturing, and specifically relates to a method for interfacial modification between the surface of a silicon wafer and an aluminum oxide passivation layer. Background Art

[0002] For the method of interfacial modification between the surface of a silicon wafer and an aluminum oxide passivation layer, generally, the surface of the silicon wafer is treated by a wet chemical method to remove the phosphosilicate glass layer on the surface of the silicon wafer. At the same time, the edge of the silicon wafer is insulated, and surface texturing of the back surface of the silicon wafer is formed. Then, an AlOx / SiNx stack is deposited on the back surface of the monocrystalline silicon wafer for passivation. On the one hand, because a SiOx film with several atomic layers will be formed between the AlOx film and the silicon substrate, and the Si=O bond is relatively stable, thus reducing the surface defects at the interface. On the other hand, a certain amount of atomic hydrogen will be formed during the deposition of the AlOx film, which can also saturate the dangling bonds in the silicon substrate.

[0003] In the prior art, the etching process is conventional acid etching without using additives. Only a mixed solution of HF (concentration 45 - 55%): HNO3 (concentration 60 - 70%): H2O with a ratio of 1:6:3 is used for etching the back surface of the silicon wafer. The etching thickness reduction is generally between 1.8 - 2.5 μm, and the reflectivity of the back surface of the silicon wafer after etching is between 25% - 30%.

[0004] For the back film process, generally, a thickened AlOx / SiNx stack is used to make up for the defect of uneven etching on the back surface of the silicon wafer. For the back passivation process, the trimethylaluminum output of the AlOx layer is between 85% - 100%, the nitrous oxide flow rate is 4 - 6 slm, the deposition time of the plasma is 60 - 80 s, the back film thickness of the aluminum oxide is generally between 12 - 18 nm, and the film thickness uniformity is in the range of 7% - 12%.

[0005] For the SiNx layer deposition process, the flow rate of silane is 1500 - 2500 sccm, the flow rate of ammonia is 6 - 15 slm, and the deposition time of the plasma is 250 - 450 s.

[0006] The prior art realizes back surface polishing, but it is prone to local non-uniformity, which is not conducive to multiple reflections and absorptions of long waves in the silicon wafer body, reduces the utilization rate of long waves by the battery, has a relatively poor light trapping effect, cannot ensure the uniformity of the back surface aluminum oxide film and the best passivation effect. At the same time, during the batch production process, there are problems such as large fluctuations in product quality between batches. Summary of the Invention

[0007] The present invention aims to modify the interface between the back surface of a silicon wafer with surface texturing and an aluminum oxide film, so as to have a stronger light trapping effect and better coverage and passivation effect of the aluminum oxide film. The problems to be solved by the current technology are as follows: the back surface texture of the silicon wafer is uneven, with some local positions being flat. After long-wavelength light enters the silicon wafer surface, multiple reflections cannot be formed, resulting in optical losses; the back surface texture of the silicon wafer is flat, and the deposition thickness is too thick under the existing aluminum oxide film process, which is not conducive to the penetration of hydrogen atoms in the aluminum oxide film to passivate the silicon wafer surface.

[0008] The technical solution adopted by the present invention to improve the problem of back polishing of a single-crystal PERC cell and matching back plating passivation to achieve the best passivation effect is as follows.

[0009] A method for optimizing the modification of the interface between the back surface of a single-crystalline silicon wafer and aluminum oxide sequentially includes the following steps:

[0010] Etch the back surface of the single-crystalline silicon wafer in an etching solution, and control the thinning amount to be 2.47 - 2.82 μm;

[0011] The etching solution includes an acid solution and an additive, and the volume ratio of the acid solution to the additive is 100:0.7 - 1.2; the acid solution is composed of nitric acid, hydrofluoric acid and water, and the volume ratio of nitric acid, hydrofluoric acid and water is 13.2:2.4:1. The mass concentration of nitric acid is 60 - 70%, and the mass concentration of hydrofluoric acid is 45 - 55%;

[0012] The additive is composed of the following components by mass fraction: sodium nitrite 0.1 - 0.5%, tartaric acid 0.1 - 0.5%, sodium citrate 0.1 - 0.5%, dimethyl sulfoxide 0.1 - 0.5%, sodium dodecylbenzenesulfonate 0.1 - 0.5%, and the balance is water;

[0013] After etching is completed, adopt a back passivation process to form an aluminum oxide back film on the back surface of the single-crystalline silicon wafer. The thickness of the aluminum oxide back film is 8 - 12 nm, and the film thickness uniformity is in the range of 5% - 10%.

[0014] Preferably, the additive is composed of the following components by mass fraction: sodium nitrite 0.2%, tartaric acid 0.2%, sodium citrate 0.2%, dimethyl sulfoxide 0.2%, sodium dodecylbenzenesulfonate 0.2%, and water 99%.

[0015] Preferably, after etching is completed, the pyramid tips on the back surface microstructure of the single-crystalline silicon wafer are fully passivated, showing a uniform and smooth structure, with a height of 2.5 - 4 μm and the angle of the pyramid tips being 20° - 26°. The key point of the present invention is to make the back pyramid tips fully passivated through the additive, showing a uniform and smooth structure, with a height of 2.5 - 4 μm and an angle of 20° - 26°, and matching the thickness of the aluminum oxide film plated on the back film, which is more conducive to passivation to improve the minority carrier lifetime and thus increase the open circuit voltage.

[0016] Preferably, in the back passivation process, the monocrystalline silicon wafer is placed in a back coating furnace tube for back passivation. The output percentage of trimethylaluminum is between 80% and 90%, the flow rate of nitrous oxide is 3 - 5 slm, and the reaction time of trimethylaluminum plasma is 55 - 75 s.

[0017] Further, after back passivation, a silicon nitride layer deposition process is also included. A silicon nitride layer is deposited on the surface of the alumina back film, and the thickness of the silicon nitride layer is 20 - 40 nm.

[0018] Preferably, in the silicon nitride layer deposition process, the flow rate of silane is 1500 - 2500 sccm, the flow rate of ammonia is 6 - 15 slm, and the deposition time of the silicon nitride layer is 200 - 400 s.

[0019] Further, a method for optimizing the interface modification between the back surface of a monocrystalline silicon wafer and alumina based on the etching tank of the RENA device. The etching solution in the etching tank has volumes of nitric acid, hydrofluoric acid, and water of 198 L, 36 L, and 15 L respectively; the volume of the additive is 2.0 - 2.8 L; the additive consists of the following components by mass fraction: sodium nitrite 0.2%, tartaric acid 0.2%, sodium citrate 0.2%, dimethyl sulfoxide 0.2%, sodium dodecylbenzenesulfonate 0.2%, and water 99%.

[0020] Further, during batch production, when the etching solution etches the monocrystalline silicon wafer, an additive is automatically replenished into the etching solution, and the automatic replenishment volume of the additive is 0.13 ml - 0.18 ml / wafer.

[0021] In the present invention, the etching thinning amount is controlled within 2.47 - 2.82 μm, which ensures the uniformity and structural stability of the back surface texture, thereby reducing the dangling bonds serving as recombination centers and lowering the surface recombination rate; meanwhile, while keeping the deposition time of the alumina back film unchanged, after the surface texturing of the silicon wafer back surface, the specific surface area increases, the thickness of the alumina thin film decreases, the penetration ability of hydrogen atoms is enhanced, and the deposition time of the third - layer silicon nitride film increases to restore the reduction in the antireflection performance of the silicon nitride film due to the increase in the specific surface area.

[0022] The present invention uses a wet chemical method to change the surface texture of the interface, making the silicon wafer surface uniform and structurally stable. The pyramid tips are fully passivated, enhancing the back reflection of incident light by the interface, enhancing the light trapping function in the silicon wafer body, and at the same time enabling the alumina thin film to cover the silicon wafer more uniformly, forming a stronger field passivation effect, reducing the carrier recombination rate on the silicon wafer surface, greatly improving the minority carrier lifetime, open - circuit voltage, and short - circuit current of the cell, thereby improving the conversion efficiency of the cell.

[0023] This optimization method enhances the light trapping effect in the silicon wafer body, improves the minority carrier lifetime of the silicon wafer, the open-circuit voltage of the solar cell, and the conversion efficiency. By adding additives to the HF / HNO3 mixed solution and performing wet chemical treatment on the back surface of the silicon wafer, the surface texture of the silicon wafer is changed to form a surface structure with the pyramid tips fully passivated. The passivated pyramid tips can make the alumina film thinner, allowing hydrogen atoms to more easily penetrate the alumina to passivate the silicon wafer surface, enhancing the passivation effect of the alumina film on the silicon wafer and reducing the recombination rate on the silicon wafer surface. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0025] Figure 1 It is a micrograph of the back surface of one of the single-crystalline silicon wafers after etching in Embodiment 6 of the present invention;

[0026] Figure 2 It is a micrograph of the back surface of one of the single-crystalline silicon wafers after etching in Embodiment 6 of the present invention;

[0027] Figure 3 It is a micrograph of the back surface of one of the single-crystalline silicon wafers after etching in Embodiment 6 of the present invention;

[0028] Figure 4 It is a micrograph of the back surface of one of the single-crystalline silicon wafers after etching in Embodiment 6 of the present invention;

[0029] Figure 5 It is a micrograph of the back surface of one of the single-crystalline silicon wafers after etching in Embodiment 6 of the present invention;

[0030] Figure 6 It is a micrograph of the back surface of one of the single-crystalline silicon wafers after etching in Embodiment 6 of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0031] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0032] It should be understood that when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, wholes, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their combinations.

[0033] It should also be understood that the terms used in this specification of the present invention are for the purpose of describing particular embodiments only and are not intended to limit the present invention.

[0034] It should be further understood that the term "and / or" used in this specification of the present invention and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0035] Example 1

[0036] A method for optimizing the interface modification between the back surface of a single-crystalline silicon wafer and alumina sequentially includes the following steps:

[0037] Prepare the acid solution: Mix nitric acid with a mass concentration of 60 - 70%, hydrofluoric acid with a mass concentration of 45 - 55% and water in a volume ratio of 13.2:2.4:1 to prepare the acid solution;

[0038] Prepare the additive: Prepare the additive by mixing 0.1 - 0.5% sodium nitrite, 0.1 - 0.5% tartaric acid, 0.1 - 0.5% sodium citrate, 0.1 - 0.5% dimethyl sulfoxide, 0.1 - 0.5% sodium dodecylbenzenesulfonate and the balance of water by mass percentage;

[0039] Prepare the etching solution: Mix the acid solution and the additive in a volume ratio of 100:0.7 - 1.2 to prepare the etching solution;

[0040] Etching: Place the back surface of the single-crystalline silicon wafer in the etching solution for etching, and control the thinning amount within 2.47 - 2.82 μm;

[0041] Back passivation process: Place the etched single-crystalline silicon wafer in a back coating furnace tube for back passivation, control the output percentage of trimethylaluminum between 80% - 90%, the nitrous oxide flow rate is 3 - 5 slm, the reaction time of trimethylaluminum plasma is 55 - 75 s, form an alumina back film on the back surface of the single-crystalline silicon wafer, the thickness of the alumina back film is 8 - 12 nm, and the film thickness uniformity is within the range of 5% - 10%;

[0042] Silicon nitride layer deposition process: After back passivation, deposit a silicon nitride layer on the surface of the alumina back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 1500 - 2500 sccm, the flow rate of ammonia is 6 - 15 slm, the deposition time of the silicon nitride layer is 200 - 400 s, and the thickness of the silicon nitride layer is 20 - 40 nm.

[0043] Example 2

[0044] A method for optimizing the interface modification between the back surface of a single-crystalline silicon wafer and alumina successively includes the following steps:

[0045] Prepare an acid solution: Mix nitric acid with a mass concentration of 70%, hydrofluoric acid with a mass concentration of 55%, and water in a volume ratio of 13.2:2.4:1 to prepare an acid solution;

[0046] Prepare an additive: Mix 0.5% sodium nitrite, 0.5% tartaric acid, 0.5% sodium citrate, 0.5% dimethyl sulfoxide, 0.5% sodium dodecylbenzenesulfonate, and the balance of water by mass percentage to prepare an additive;

[0047] Prepare an etching solution: Mix the acid solution and the additive in a volume ratio of 100:1.2 to prepare an etching solution;

[0048] Etching: Place the back surface of the single-crystalline silicon wafer in the etching solution for etching, and control the thinning amount to be 2.47 - 2.82 μm;

[0049] Back passivation process: Place the etched single-crystalline silicon wafer in a back coating furnace tube for back passivation, control the output percentage of trimethylaluminum at 80%, the nitrous oxide flow rate at 5 slm, and the reaction time of trimethylaluminum plasma at 75 s to form an alumina back film on the back surface of the single-crystalline silicon wafer, with the thickness of the alumina back film being 8 - 12 nm and the film thickness uniformity within the range of 5% - 10%;

[0050] Silicon nitride layer deposition process: After back passivation, deposit a silicon nitride layer on the surface of the alumina back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 12500 sccm, the flow rate of ammonia is 15 slm, the deposition time of the silicon nitride layer is 400 s, and the thickness of the silicon nitride layer is 38 - 40 nm.

[0051] Example 3

[0052] A method for optimizing the interface modification between the back surface of a single-crystalline silicon wafer and alumina successively includes the following steps:

[0053] Prepare an acid solution: Mix nitric acid with a mass concentration of 60%, hydrofluoric acid with a mass concentration of 45, and water in a volume ratio of 13.2:2.4:1 to prepare an acid solution;

[0054] Prepare an additive: Mix 0.1 sodium nitrite, 0.1 tartaric acid, 0.1 sodium citrate, 0.1 dimethyl sulfoxide, 0.1% sodium dodecylbenzenesulfonate, and the balance of water by mass percentage to prepare an additive;

[0055] Prepare an etching solution: Mix the acid solution and the additive in a volume ratio of 100:0.7 to prepare an etching solution;

[0056] Etching: Place the back surface of the monocrystalline silicon wafer in the etching solution for etching, and control the thinning amount within 2.47 - 2.82 μm;

[0057] Back passivation process: Place the etched monocrystalline silicon wafer in the back coating furnace tube for back passivation. Control the output percentage of trimethylaluminum between 90%, the nitrous oxide flow rate is 3 slm, and the reaction time of trimethylaluminum plasma is 55. An alumina back film is formed on the back surface of the monocrystalline silicon wafer, with the alumina back film thickness of 8 - 12 nm and the film thickness uniformity within the range of 5% - 10%;

[0058] Silicon nitride layer deposition process: After back passivation, deposit a silicon nitride layer on the surface of the alumina back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 1500 sccm, the ammonia flow rate is 15 slm, the silicon nitride layer deposition time is 200, and the silicon nitride layer thickness is 20 - 22 nm.

[0059] Example 4

[0060] Method for optimizing the interface modification between the back surface of a monocrystalline silicon wafer and alumina, successively including the following steps:

[0061] Prepare the acid solution: Mix nitric acid with a mass concentration of 65%, hydrofluoric acid with a mass concentration of 50% and water in a volume ratio of 13.2:2.4:1 to prepare the acid solution;

[0062] Prepare the additive: According to the mass percentage, prepare the additive by mixing 0.35% sodium nitrite, 0.3% tartaric acid, 0.3% sodium citrate, 0.3% dimethyl sulfoxide, 0.3% sodium dodecylbenzenesulfonate, and the balance of water;

[0063] Prepare the etching solution: Mix the acid solution and the additive in a volume ratio of 100:1 to prepare the etching solution;

[0064] Etching: Place the back surface of the monocrystalline silicon wafer in the etching solution for etching, and control the thinning amount within 2.47 - 2.82 μm;

[0065] Back passivation process: Place the etched monocrystalline silicon wafer in the back coating furnace tube for back passivation. Control the output percentage of trimethylaluminum between 85%, the nitrous oxide flow rate is 4 slm, and the reaction time of trimethylaluminum plasma is 65 s. An alumina back film is formed on the back surface of the monocrystalline silicon wafer, with the alumina back film thickness of 8 - 12 nm and the film thickness uniformity within the range of 5% - 10%;

[0066] Silicon nitride layer deposition process: After back passivation, deposit a silicon nitride layer on the surface of the alumina back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 2000 sccm, the ammonia flow rate is 10 slm, the silicon nitride layer deposition time is 300 s, and the silicon nitride layer thickness is 28 - 30 nm.

[0067] Example 5

[0068] A method for optimizing the interface modification between the back surface of a single crystal silicon wafer and alumina successively includes the following steps:

[0069] Prepare the acid solution: Mix 198 L of nitric acid with a mass concentration of 60 - 70%, 36 L of hydrofluoric acid with a mass concentration of 45 - 55% and 15 L of water to prepare the acid solution;

[0070] Prepare the additive: Prepare the additive by mixing 0.2% sodium nitrite, 0.2% tartaric acid, 0.2% sodium citrate, 0.2% dimethyl sulfoxide, 0.2% sodium dodecylbenzenesulfonate and 99% water by mass percentage;

[0071] Prepare the etching solution: Add the above acid solution and 2.0 - 2.8 L of the additive into the etching tank of the RENA equipment and mix them to prepare the etching solution;

[0072] Etching: Place the back surface of the single crystal silicon wafer in the etching solution in the etching tank for etching, and control the thinning amount within 2.47 - 2.82 μm; During the process of etching the back surface of the single crystal silicon wafer, automatically supplement the additive to the etching solution, and the automatic liquid supplement amount of the additive is 0.13 ml - 0.18 ml / wafer.

[0073] Back passivation process: Place the etched single crystal silicon wafer in the back coating furnace tube for back passivation, control the output percentage of trimethylaluminum between 80% - 90%, the nitrous oxide flow rate is 3 - 5 slm, the reaction time of trimethylaluminum plasma is 55 - 75 s, form an alumina back film on the back surface of the single crystal silicon wafer, the thickness of the alumina back film is 8 - 12 nm, and the film thickness uniformity is within the range of 5% - 10%;

[0074] Silicon nitride layer deposition process: After back passivation, deposit a silicon nitride layer on the surface of the alumina back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 1500 - 2500 sccm, the flow rate of ammonia is 6 - 15 slm, the deposition time of the silicon nitride layer is 200 - 400 s, and the thickness of the silicon nitride layer is 20 - 40 nm.

[0075] Example 6

[0076] A method for optimizing the interface modification between the back surface of a single crystal silicon wafer and alumina successively includes the following steps:

[0077] Prepare the acid solution: Mix 198 L of nitric acid with a mass concentration of 65%, 36 L of hydrofluoric acid with a mass concentration of 50% and 15 L of water to prepare the acid solution;

[0078] Prepare the additive: Prepare the additive by mixing 0.2% sodium nitrite, 0.2% tartaric acid, 0.2% sodium citrate, 0.2% dimethyl sulfoxide, 0.2% sodium dodecylbenzenesulfonate, and 99% water by mass percentage;

[0079] Prepare the etching solution: In the etching tank of the RENA equipment, add the above acid solution and 2.4 L of the additive to mix and prepare the etching solution;

[0080] Etching: Place the back surface of the single-crystalline silicon wafer in the etching solution in the etching tank for etching, and control the thinning amount to be 2.47 - 2.82 μm; During the process of etching the back surface of the single-crystalline silicon wafer, automatically supplement the additive to the etching solution, and the automatic replenishment amount of the additive is 0.15 ml / wafer.

[0081] Back passivation process: Place the etched single-crystalline silicon wafer in the back coating furnace tube for back passivation, control the output percentage of trimethylaluminum to be between 85%, the nitrous oxide flow rate to be 4 slm, and the reaction time of trimethylaluminum plasma to be 65 s, to form an aluminum oxide back film on the back surface of the single-crystalline silicon wafer, with the thickness of the aluminum oxide back film being 8 - 12 nm and the film thickness uniformity being within the range of 5% - 10%;

[0082] Silicon nitride layer deposition process: After back passivation, deposit a silicon nitride layer on the surface of the aluminum oxide back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 2000 sccm, the flow rate of ammonia is 13 slm, the deposition time of the silicon nitride layer is 300 s, and the thickness of the silicon nitride layer is 28 - 30 nm.

[0083] Example 7

[0084] Method for optimizing the interface modification between the back surface of a single-crystalline silicon wafer and aluminum oxide, successively including the following steps:

[0085] Prepare the acid solution: Prepare the acid solution by mixing 198 L of nitric acid with a mass concentration of 65%, 36 L of hydrofluoric acid with a mass concentration of 50%, and 15 L of water;

[0086] Prepare the additive: Prepare the additive by mixing 0.2% sodium nitrite, 0.2% tartaric acid, 0.2% sodium citrate, 0.2% dimethyl sulfoxide, 0.2% sodium dodecylbenzenesulfonate, and 99% water by mass percentage;

[0087] Prepare the etching solution: In the etching tank of the RENA equipment, add the above acid solution and 2.4 L of the additive to mix and prepare the etching solution;

[0088] Etching: Place the back surface of the single-crystalline silicon wafer in the etching solution in the etching tank for etching, and control the thinning amount to be 2.47 - 2.82 μm; During the process of etching the back surface of the single-crystalline silicon wafer, automatically supplement the additive to the etching solution, and the automatic replenishment amount of the additive is 0.15 ml / wafer.

[0089] Back passivation process: Place the etched monocrystalline silicon wafer in a back coating furnace tube for back passivation. Control the output percentage of trimethylaluminum between 85%, the nitrous oxide flow rate is 4 slm, and the reaction time of trimethylaluminum plasma is 70 s to form an alumina back film on the back surface of the monocrystalline silicon wafer.

[0090] Silicon nitride layer deposition process: After back passivation, deposit a silicon nitride layer on the surface of the alumina back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 2000 sccm, the ammonia flow rate is 13 slm, the deposition time of the silicon nitride layer is 300 s, and the thickness of the silicon nitride layer is 28 - 30 nm.

[0091] I. Observation of the microstructure on the back surface of the monocrystalline silicon wafer after etching in the present invention

[0092] Take six etched monocrystalline silicon wafers in Example 7 and conduct microscopic observation on their back surfaces. The results are as Figures 1-6 shown.

[0093] From Figures 1-6 the microscopic results, it can be seen that after etching is completed, the pyramid tips on the back surface microstructure of the monocrystalline silicon wafer are fully passivated, showing a uniform and smooth structure, with a height of 2.5 - 4 μm and the angle of the pyramid tips being 20° - 26°.

[0094] II. Detection of the thickness and thickness uniformity of the alumina back film on the back surface of the monocrystalline silicon wafer after back passivation in the present invention

[0095] According to the method for optimizing the interface modification between the back surface of the monocrystalline silicon wafer and alumina in Example 7, after back passivation of the back surface of the monocrystalline silicon wafer, take the tail, near the tail, in the middle, near the mouth, and the mouth positions of the back coating furnace tube respectively, and take the monocrystalline silicon wafers at the center and four corners at each position. Measure the thickness of the alumina back film on the back surface of each monocrystalline silicon wafer and calculate the thickness uniformity. The results are shown in Table 1 below.

[0096] Table 1 Thickness and thickness uniformity of the alumina film on the back surface of monocrystalline silicon wafers at different positions of the back coating furnace tube (unit: nm)

[0097]

[0098] From the test results in Table 1, it can be known that the thickness of the alumina back film in the present invention is 8 - 12 nm, and the thickness uniformity is in the range of 5% - 10%.

[0099] III. Detection of the thickness and thickness uniformity of the alumina back film on the back surface of the monocrystalline silicon wafer after back passivation in the prior art (comparative group 1)

[0100] The etching process of Comparative Group 1 was conventional acid etching without using additives. A mixed solution of HF (concentration 50%): HNO3 (concentration 65%): H2O in a volume ratio of 1:6:3 was used to etch the back side of the silicon wafer. The etching thickness reduction was between 1.8 - 2.5 μm, and the reflectivity of the back side of the silicon wafer after etching was between 25% - 30%.

[0101] Back passivation process (the same as in Example 7): The etched monocrystalline silicon wafer was placed in a back coating furnace tube for back passivation. The output percentage of trimethylaluminum was controlled at 85%, the nitrous oxide flow rate was 4 slm, and the reaction time of trimethylaluminum plasma was 70 s.

[0102] After the back side of the monocrystalline silicon wafer was passivated, five positions at the furnace tail, near the furnace tail, in the middle of the furnace, near the furnace mouth, and at the furnace mouth of the back coating furnace tube were taken respectively, and monocrystalline silicon wafers at the center and four corners were taken at each position. The thickness of the aluminum oxide back film on the back surface of each monocrystalline silicon wafer was measured and the film thickness uniformity was calculated. The results are shown in Table 2 below.

[0103] Table 2 Thickness and thickness uniformity of aluminum oxide back film on the back surface of monocrystalline silicon wafers at different positions in the back coating furnace tube of the comparative group (unit: nm)

[0104]

[0105] From the test results in Table 2, it can be seen that the thickness of the aluminum oxide back film in the comparative group was generally between 12 - 18 nm, and the film thickness uniformity was in the range of 7% - 12%.

[0106] IV. Comparative test of battery conversion efficiency

[0107] Experimental Group 1: (The reaction time of trimethylaluminum plasma was 70 s)

[0108] According to the method of Example 7, the modified and optimized monocrystalline silicon wafers were made into PERC batteries.

[0109] Comparative Group 2: (The reaction time of trimethylaluminum plasma was 80 s)

[0110] The etching process of Comparative Group 2 was conventional acid etching without using additives. A mixed solution of HF (concentration 50%): HNO3 (concentration 65%): H2O in a volume ratio of 1:6:3 was used to etch the back side of the silicon wafer. The etching thickness reduction was between 1.8 - 2.5 μm, and the reflectivity of the back side of the silicon wafer after etching was between 25% - 30%.

[0111] Back passivation process: The etched monocrystalline silicon wafer was placed in a back coating furnace tube for back passivation. The output percentage of trimethylaluminum was controlled at 85%, the nitrous oxide flow rate was 4 slm, and the reaction time of trimethylaluminum plasma was 80 s.

[0112] Silicon nitride layer deposition process: After back passivation, a silicon nitride layer is deposited on the surface of the alumina back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 2000 sccm, the flow rate of ammonia is 13 slm, the deposition time of the silicon nitride layer is 300 s, and the thickness of the silicon nitride layer is 30 nm.

[0113] Make the monocrystalline silicon wafer into a PERC cell of Comparative Group 2.

[0114] Measure the open circuit voltage (Voc), short circuit current (Isc), fill factor (FF), series resistance (Rs), parallel resistance (Rsh), conversion efficiency (Eta), and leakage current (Irev2) of the PERC cells in Experimental Group 1 and Comparative Group 2. The results are shown in Table 3.

[0115] Table 3 Electrical performance test results of the monocrystalline PERC cells in Experimental Group 1 and Comparative Group 2

[0116]

[0117] Experimental Group 2: (The reaction time of trimethylaluminum plasma is 70 s)

[0118] According to the method of Example 7, make the modified and optimized monocrystalline silicon wafer into a PERC cell.

[0119] Comparative Group 3: (The reaction time of trimethylaluminum plasma is 95 s)

[0120] The etching process of Comparative Group 3 is conventional acid etching without using additives. A mixed solution of HF (concentration 50%): HNO3 (concentration 65%): H2O in a volume ratio of 1:6:3 is used for etching the back of the silicon wafer. The etching thinning amount is 1.8 - 2.5 μm, and the reflectivity of the back of the silicon wafer after etching is between 25% - 30%.

[0121] Back passivation process: Place the etched monocrystalline silicon wafer in a back coating furnace tube for back passivation. Control the output percentage of trimethylaluminum at 85%, the flow rate of nitrous oxide is 4 slm, and the reaction time of trimethylaluminum plasma is 95 s.

[0122] Silicon nitride layer deposition process: After back passivation, a silicon nitride layer is deposited on the surface of the alumina back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 2000 sccm, the flow rate of ammonia is 13 slm, the deposition time of the silicon nitride layer is 300 s, and the thickness of the silicon nitride layer is 30 nm.

[0123] Make the monocrystalline silicon wafer into a PERC cell of Comparative Group 3.

[0124] Measure the open-circuit voltage (Voc), short-circuit current (Isc), fill factor (FF), series resistance (Rs), shunt resistance (Rsh), conversion efficiency (Eta), and leakage current (Irev2) of the PERC cells in experimental group 2 and control group 3. The results are shown in Table 4.

[0125] Table 4 Electrical performance test results of the single-crystal PERC cells in experimental group 2, control group 3, and control group 2

[0126]

[0127] Experimental group 3: (The reaction time of trimethylaluminum plasma is 70 s)

[0128] According to the method of Example 7, fabricate PERC cells using the modified and optimized monocrystalline silicon wafers.

[0129] Control group 4: (The reaction time of trimethylaluminum plasma is 60 s)

[0130] The etching process for control group 4 is conventional acid etching without using additives. Use a mixed solution of HF (concentration 50%): HNO3 (concentration 65%): H2O in a volume ratio of 1:6:3 to etch the back side of the silicon wafer. The etching thickness reduction is between 1.8 - 2.5 μm, and the reflectivity of the back side of the silicon wafer after etching is between 25% - 30%.

[0131] Back passivation process: Place the etched monocrystalline silicon wafer in a back coating furnace tube for back passivation. Control the output percentage of trimethylaluminum at 85%, the nitrous oxide flow rate at 4 slm, and the reaction time of trimethylaluminum plasma at 60 s.

[0132] Silicon nitride layer deposition process: After back passivation, deposit a silicon nitride layer on the surface of the aluminum oxide back film. Specifically, in the silicon nitride layer deposition process, the flow rate of silane is 2000 sccm, the flow rate of ammonia is 13 slm, the deposition time of the silicon nitride layer is 300 s, and the thickness of the silicon nitride layer is 30 nm.

[0133] Fabricate the PERC cells of control group 4 using this monocrystalline silicon wafer.

[0134] Measure the open-circuit voltage (Voc), short-circuit current (Isc), fill factor (FF), series resistance (Rs), shunt resistance (Rsh), conversion efficiency (Eta), and leakage current (Irev2) of the PERC cells in experimental group 3 and control group 4. The results are shown in Table 5.

[0135] Table 5 Electrical performance test results of the PERC cells in experimental group 3, control group 4, and control group 2 single-crystal PERC cells

[0136]

[0137] As described above, it is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for optimizing the interface modification between the back surface of a single crystal silicon wafer and alumina, characterized in that, The following steps are included in sequence: The back surface of the single crystal silicon wafer is placed in an etching solution for etching, and the thinning amount is controlled to be 2.47-2.82 μm; the etching solution comprises an acid solution and an additive, and the volume ratio of the acid solution to the additive is 100:0.7-1.2; the acid solution is composed of nitric acid, hydrofluoric acid and water, and the volume ratio of nitric acid, hydrofluoric acid and water is 13.2:2.4:1, the mass concentration of nitric acid is 60-70%, and the mass concentration of hydrofluoric acid is 45-55%; the additive is composed of the following mass fraction components: 0.1-0.5% sodium nitrite, 0.1-0.5% tartaric acid, 0.1-0.5% sodium citrate, 0.1-0.5% dimethyl sulfoxide, 0.1-0.5% sodium dodecylbenzene sulfonate, and the balance water; After etching, the pyramid tip of the microstructure on the back of the single crystal silicon wafer is fully passivated, presenting a uniform and smooth structure with a height of 2.5-4um and an angle of 20° to 26°. After etching is completed, a back passivation process is used to form an aluminum oxide back film on the back surface of the single crystal silicon wafer. The thickness of the aluminum oxide back film is 8-12nm, and the uniformity of the film thickness is within the range of 5%-10%.

2. The method for optimizing the modification of the back surface of a single-crystalline silicon wafer and the alumina interface according to claim 1, wherein The additive consists of the following components in mass fraction: 0.2% sodium nitrite, 0.2% tartaric acid, 0.2% sodium citrate, 0.2% dimethyl sulfoxide, 0.2% sodium dodecylbenzene sulfonate and 99% water.

3. The method for optimizing the modification of the back surface of a single-crystalline silicon wafer and the alumina interface according to claim 1, characterized in that, In the back passivation process, the single crystal silicon wafer is placed in a back coating furnace tube, the trimethylaluminum output percentage is between 80% and 90%, the laughing gas flow rate is 3-5slm, and the reaction time of the trimethylaluminum plasma is 55-75s.

4. The method for optimizing the modification of the back surface of the single crystal silicon wafer and the alumina interface according to claim 3, characterized in that After back passivation, the process also includes a silicon nitride layer deposition process with a thickness of 20-40nm.

5. The method for optimizing the modification of the back surface of a single crystal silicon wafer and the alumina interface according to claim 4, characterized in that, In the silicon nitride layer deposition process, the flow rate of silane is 1500-2500 sccm, the flow rate of ammonia is 6-15 slm, and the deposition time of the silicon nitride layer is 200-400 s.

6. The method for optimizing the modification of the back surface of a single-crystalline silicon wafer and the alumina interface according to claim 5, wherein In the acid solution, the volumes of nitric acid, hydrofluoric acid and water are 198L, 36L and 15L respectively; the volume of the additive is 2.0-2.8L.

7. The method for optimizing the modification of the back surface of a single-crystalline silicon wafer and the alumina interface according to claim 6, characterized in that, During the process of etching the single crystal silicon wafer by the etching solution, the etching solution is also automatically supplemented with additives, and the amount of the additives automatically supplemented is 0.13ml to 0.18ml per wafer.

8. The method for optimizing the modification of the back surface of a single-crystal silicon wafer and the alumina interface according to claim 2, characterized in that, In the acid solution, the volumes of nitric acid, hydrofluoric acid and water are 198L, 36L and 15L respectively; the volume of the additive is 2.0-2.8L.

9. The method for optimizing the modification of the back surface of a single-crystalline silicon wafer and the alumina interface according to claim 8, wherein, During the process of etching the single crystal silicon wafer by the etching solution, the etching solution is also automatically supplemented with additives, and the amount of the additives automatically supplemented is 0.13ml to 0.18ml per wafer.

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