Derivation of RICE parameters for lossless / lossy codec modes in video coding

Abstract

Embodiments relate to systems and methods for using rice codes in video encoding and decoding. In one embodiment, a method for encoding or decoding video data, for example, on a video encoder or decoder, is included. The method includes determining available residual coefficients adjacent to a current position in a transform unit of the video data, and determining a sum of the available residual coefficients. The method also includes modifying the sum based on the number of available residual coefficients, and determining rice parameters based on the modified sum. The method also includes encoding or decoding syntax elements of the video data based on the determined rice parameters.

Description

[0001] Priority claim

[0002] This patent application claims priority to U.S. Non-Provisional Application No. 17 / 028,928, filed on September 22, 2020; U.S. Provisional Application No. 62 / 904,592, filed on September 23, 2019; U.S. Provisional Application No. 62 / 910,072, filed on October 3, 2019; and U.S. Provisional Application No. 62 / 948,725, filed on December 16, 2019; the entire contents of which are hereby expressly incorporated herein by reference. Technical Field

[0003] The present invention relates to video encoding and video decoding. Background Art

[0004] Digital video capabilities can be incorporated into a variety of devices, including digital televisions, digital live broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite wireless telephones, so-called "smartphones," video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video codec technologies, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), and extensions of such standards. Video devices can more efficiently transmit, receive, encode, decode, and / or store digital video information by implementing such video codec technologies.

[0005] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or eliminate redundancy inherent in video sequences. For block-based video codecs, a video slice (e.g., a video picture or a portion of a video picture) can be divided into video blocks, which can also be referred to as codec tree units (CTUs), codec units (CUs), and / or codec nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial prediction with respect to reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture can use spatial prediction with respect to reference samples in neighboring blocks in the same picture, or use temporal prediction with respect to reference samples in other reference pictures. Pictures can be referred to as frames, and reference pictures can be referred to as reference frames. Summary of the Invention

[0006] The present invention relates to an entropy decoding process that converts a binary representation into a series of non-binary valued quantized coefficients. The corresponding entropy encoding process (the inverse of entropy decoding) is implicitly specified and is therefore also part of the present invention, although not described in detail here. The present invention can be applied to any existing video codec, such as High Efficiency Video Codec (HEVC), or to promising codecs proposed as standards currently under development, such as Versatile Video Codec (VVC), as well as other future video codec standards.

[0007] One embodiment includes a method for encoding or decoding video data. The method includes determining available residual coefficients adjacent to a current position in a transform unit of the video data, and determining a sum of the available residual coefficients. The method also includes modifying the sum based on the number of available residual coefficients, and determining a rice parameter based on the modified sum. The method also includes encoding or decoding (encoding) a syntax element indicating the residual coefficient at the current position based on the determined rice parameter.

[0008] Another embodiment includes an apparatus for encoding and decoding video data. The apparatus includes a memory configured to store a transform unit of a picture of the video data and a video processor. The memory is configured to store a transform unit of the picture of the video data. The video processor is configured to determine available residual coefficients adjacent to a current position in the transform unit, determine a sum of the available residual coefficients, modify the sum based on the number of available residual coefficients, determine a rice parameter based on the modified sum, and encode or decode a syntax element indicating the residual coefficient at the current position based on the determined rice parameter. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 is a conceptual diagram showing the positions of coefficients of a transform block.

[0010] Figure 2 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0011] Figure 3A and 3B is a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure and corresponding codec tree unit (CTU).

[0012] Figure 4 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0013] Figure 5 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0014] Figure 6 is a flow chart illustrating encoding video data according to some embodiments.

[0015] Figure 7is a flow chart illustrating decoding video data according to some embodiments.

[0016] Figure 8 is a flow chart illustrating encoding or decoding video data according to some embodiments. DETAILED DESCRIPTION

[0017] Transform codecs consume most of the bandwidth of the encoded video. It is desirable for schemes that use entropy codecs of syntax elements that define transform coefficients to include codec modes for lossless codecs such as transform skip residual codecs.

[0018] A scheme for transform coding and decoding includes derivation of Rice parameters for coding and decoding a coefficient-level bypass coding portion for transform coefficient coding and transform skip residual coding. See H. Schwarz, T. Nguyen, D. Marpe, T. Wiegand, M. Karczewicz, M. Coban, and J. Dong, “CE7: Transform coefficient coding with reduced number of regular-coded bins (tests 7.1.3a, 7.1.3b)”, JVET document JVET-L0274, Macau, China, October 2018.

[0019] However, this approach does not address the different statistics encountered in lossless codecs. Specifically, in transform and quantization skip lossless codecs, coefficient residuals can be large, requiring large Rice parameter values ​​to efficiently represent large coefficient levels, such as the abs_reaminder or dec_abs_level syntax elements. The Rice parameter derivation used to encode the bypass codec portion of coefficient levels for transform coefficient codecs and transform skip residual codecs should be modified to address the different statistics encountered in lossless codecs.

[0020] Figure 1 is a diagram showing the positions of transform units. In transform and quantization skip lossless codecs, coefficient residuals can be large, requiring large Rice parameter values ​​in order to efficiently represent large coefficient levels, such as the abs_remainder or dec_abs_level syntax elements. One scheme for residual_coding() of transform codec residuals uses a template that uses the adjacent coefficient level 14 for the level at position 12 (see Figure 1 , which shows the coefficient positions of the transform block) and the corresponding sums of the absolute values ​​of these adjacent coefficients to derive the sum values ​​for table lookup. In one such example, five adjacent coefficients are used.

[0021] For example, according to one such scheme, the sumAbs of the coefficients at position (x, y) uses:

[0022] sumAbs=abs(coeff(x+1,y))+abs(coeff(x+2,y))+abs(coeff(x,y+1))+abs(coeff(x+1,y+1))+abs(coeff(x,y+2))

[0023] If coeff(i,j) is outside of TU, ​​these values ​​are not included in the sumAbs calculation. The final sumAbs is clipped by:

[0024] sumAbs=max(min(sumAbs-5*baseLevel,31),0);

[0025] Where baseLevel is the base level represented by the context encoding and decoding part of the coefficient level. The final clipped sumAbs value is used to perform a table lookup in the table below to derive the Rice parameters.

[0026]

[0027]

[0028] For transform skip residual codecs, Rice parameter derivation uses 2 neighbors instead of 5, and since coefficient scanning is forward, the template uses the neighbors to the left and above to derive the sumAbs value.

[0029] The sumAbs of the coefficients at position (x, y) is used

[0030] sumAbs=abs(coeff(x-1,y))+abs(coeff(x,y-1))

[0031] This value will be clipped to min(sumAbs,31) and used to derive Rice parameters using the table below.

[0032]

[0033] According to some embodiments, conventional transform coefficients for encoding and decoding lossless Rice parameter derivation are modified as follows. Specifically, according to some embodiments, the sum of available adjacent coefficients (sumAbs) is modified based on the number of available adjacent coefficients. For example, in one embodiment, sumAbs is normalized based on the number of available adjacent coefficients. Furthermore, rather than using a table to determine Rise parameters based on sum values, a specific Rise parameter can be selected based on a comparison of sumAbs with one or more thresholds. Alternatively, a table lookup can be used depending on one or more comparisons.

[0034] In the derivation using up to 5 adjacent sumAbs, calculate Figure 1 The number of available (within transform unit boundaries) neighbors within the 5 neighbors 14 at position 12 in the matrix, and sumAbs is calculated the same as for regular coefficient encoding. If the number of available neighbors (noPos) is greater than 0 and less than 5, then sumAbs is given by

[0035] sumAbs=abs(coeff(x+1,y))+abs(coeff(x+2,y))+abs(coeff(x,y+1))+abs(coeff(x+1,y+1))+abs(coeff(x,y+2))

[0036] Normalization is performed using

[0037] sumAbs=(5x sumAbs) / noPosRounding[noPos-1]

[0038] where noPosRounding[4] = {1,2,2,4}

[0039] In one embodiment, if the base level is 0 and if sumAbs is greater than 256, Rice parameter 5 is assigned. If sumAbs is less than or equal to 256 and greater than 128, Rice parameter 4 is assigned, otherwise conventional Rice parameters are derived from sumAbs using a lookup table for conventional coefficient encoding and decoding, for example:

[0040] const uint32_t g_auiGoRiceParsCoeff

[32] =

[0041] {

[0042] 0,0,0,0,0,0,0,1,1,1,1,1,1,1,2,2,2,2,2,2,2,2,2,2,2,2,2,3,3,3,3]

[0043] If baselevel is 4 and if sumAbs is greater than 256, Rice parameters 4 are assigned, otherwise regular Rice parameters derived from sumAbs are used, using the lookup table for the regular coefficient codec. Alternatively, for baselevel equal to 4 and sumAbs not greater than 256, sumAbs–5*baselevel is clipped to a value between 0 and 31.

[0044] For transform skip residual codec, the following modifications are made. In the derivation of sumAbs using 2 neighbors, the number of available neighbors (within transform unit boundaries) in the 2 neighbors is calculated. The sumAbs at (x, y) is calculated as follows:

[0045] sumAbs=abs(coeff(x-1,y))+abs(coeff(x,y-1))

[0046] If only one neighbor is available, then sumAbs is normalized by

[0047] sumAbs=2x sumAbs

[0048] Rice parameter derivation is based on a threshold of sumAbs values ​​to determine the Rice parameter. For example, if sumAbs is greater than 128, Rice parameter 4 can be used, and if it is between 128 and 64, Rice parameter 3 can be used.

[0049] In some examples, base levels 0, 1, and 10 are mapped to offsets 0, 4, and -8, respectively. Then (hereinafter referred to as Equation 1):

[0050]

[0051]

[0052] In another example, base levels 0, 2, and 10 are three possible values ​​for the Rice Golomb codec. Levels 0, 2, and 10 map to offsets 0, -4, and -8, respectively. In some such examples, the Rice parameter can be determined according to Equation 1 as described above.

[0053] In various examples, the threshold and offset may be adjusted based on the encoding order of syntax elements in the residual codec.

[0054] In other embodiments, sumAbs can be normalized in a similar manner, i.e., when only one neighboring position is available

[0055] sumAbs=2x sumAbs

[0056] In some embodiments, the Rice parameters can be derived as follows

[0057] RiceParam=(sumAbs>128)? 4:((sumAbs>64)? 3:RiceParTable[min(31,sumAbs)]

[0058] Where RiceParTable[] is the TS RiceParameter table.

[0059] Typically, in various embodiments such as the examples described above, sumAbs value determination includes normalizing the sum by the number of available neighbors. Additional thresholds may be used to determine larger Rice parameters to encode large coefficients at TU boundaries.

[0060] The above solution can also be applied to lossy coding and decoding of residual coefficients by making corresponding changes.

[0061] In an alternative embodiment, similar to the above example, no normalization is performed on the sumAbs coefficient level. For a base level equal to 4, the sumAbs value is calculated using the following scheme:

[0062] noPos=max(0,noPos-1);

[0063] sumAbs=max(min(sumAbs-5*noPos,31),0);

[0064] Where noPos is the number of available neighbors in the template. In this embodiment, the subABs of the neighboring coefficients are cropped based on the number of available neighboring coefficients.

[0065] Various syntax elements indicating the transform residual coefficient can be encoded using a determined rice parameter, such as abs_remainder or dec_abs_level. abs_remainder[n] is the residual absolute value of the transform coefficient level at scan position n encoded using the Golomb-Rice code. dec_abs_level[n] is the intermediate value encoded using the Golomb-Rice code at scan position n and is used to determine the transform coefficient level at index n.

[0066] Figure 2 1 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of the present disclosure. The techniques of the present disclosure are generally directed to encoding and decoding (encoding and / or decoding) video data. Generally speaking, video data includes any data used to process video. Thus, video data can include original, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

[0067] like Figure 2As shown, in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. Specifically, source device 102 provides the video data to destination device 116 via a computer-readable medium 110. Source device 102 and destination device 116 may include any of a wide range of devices, including desktop computers, notebook (i.e., laptop) computers, tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some cases, source device 102 and destination device 116 may be equipped for wireless communication and, therefore, may be referred to as wireless communication devices.

[0068] exist Figure 2 In the example of , source device 102 includes video source 104, memory 106, video encoder 200 and output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120 and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of destination device 116 can be configured to apply the technology disclosed herein. Therefore, source device 102 represents an example of a video encoding device, while destination device 116 represents an example of a video decoding device. In other examples, the source device and destination device may include other components or arrangements. For example, source device 102 may receive video data from an external video source such as an external camera. Similarly, destination device 116 may be connected to an external display device instead of including an integrated display device.

[0069] like Figure 2 The system 100 shown is merely an example. The source device 102 and the destination device 116 are merely examples of codec devices in which the source device 102 generates encoded video data for transmission to the destination device 116. The present disclosure refers to a "codec" device as a device that performs encoding and decoding (encoding and / or decoding) of data. Thus, the video encoder 200 and the video decoder 300 represent examples of codec devices, specifically, a video encoder and a video decoder, respectively. In some examples, the devices 102 and 116 can operate in a substantially symmetrical manner such that each of the devices 102 and 116 includes video encoding and decoding components. Thus, the system 100 can support one-way or two-way video transmission between the video devices 102, 116, for example, for video streaming, video playback, video broadcasting, or video telephony.

[0070] Generally speaking, video source 104 represents a source of video data (i.e., raw, unencoded video data) and provides a series of consecutive pictures (also referred to as "frames") of video data to video encoder 200, which encodes the data as pictures. Video source 104 of source device 102 may include a video capture device, such as a camera, a video archive containing previously captured raw video, and / or a video feed interface for receiving video from a video content provider. As a further alternative, video source 104 may generate computer graphics-based data as the source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes captured, pre-captured, or computer-generated video data. Video encoder 200 may rearrange the pictures from the order in which they were received (sometimes referred to as "display order") into a codec order for encoding and decoding. Video encoder 200 may generate a bitstream comprising the encoded video data. Source device 102 may then output the encoded video data onto computer-readable medium 110 via output interface 108 for receipt and / or retrieval by, for example, input interface 122 of destination device 116 .

[0071] Memory 106 of source device 102 and memory 120 of destination device 116 represent general purpose memory. In some examples, memories 106, 120 can store raw video data, such as raw video from video source 104 and raw, decoded video data from video decoder 300. Additionally or alternatively, memories 106, 120 can store software instructions executable by, for example, video encoder 200 and video decoder 300, respectively. Although video encoder 200 and video decoder 300 are shown separately in this example, it should be understood that video encoder 200 and video decoder 300 can also include internal memory for functionally similar or equivalent purposes. Furthermore, memories 106, 120 can store encoded video data, such as output from video encoder 200 and input to video decoder 300. In some examples, portions of memories 106, 120 can be allocated as one or more video buffers, such as for storing raw, decoded, and / or encoded video data.

[0072] The computer-readable medium 110 can represent any type of medium or device capable of transmitting encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium that enables the source device 102 to send the encoded video data directly to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard such as a wireless communication protocol, the output interface 108 can modulate a transmission signal including the encoded video data, and the input interface 122 can modulate a received transmission signal. The communication medium can include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium can form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the Internet. The communication medium can include routers, switches, base stations, or any other equipment that can be used to facilitate communication from the source device 102 to the destination device 116.

[0073] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 116. Similarly, destination device 116 may access the encoded data from storage device 116 via input interface 122. Storage device 116 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0074] In some examples, source device 102 may output the encoded video data to a file server 114 or another intermediate storage device that may store the encoded video generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or downloading. File server 114 may be any type of server device capable of storing and transmitting the encoded video data to destination device 116. File server 114 may represent a web server (e.g., for a website), a file transfer protocol (FTP) server, a content delivery network device, or a network attached storage (NAS) device. File server 114 may additionally or alternatively implement one or more HTTP streaming protocols, such as Dynamic Adaptive Streaming over HTTP (DASH), HTTP Live Streaming (HLS), Real Time Streaming Protocol (RTSP), HTTP Dynamic Streaming, etc. Destination device 116 may access the encoded video data from file server 114 via any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., DSL, cable modem, etc.), or a combination of both suitable for accessing encoded video data stored on the file server 114. The file server 114 and the input interface 122 may be configured to operate according to a streaming protocol, a downlink transmission protocol, or a combination thereof.

[0075] Output interface 108 and input interface 122 may represent wireless transmitters / receivers, modems, wired network components (e.g., Ethernet cards), wireless communication components that operate according to any of the various IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to transmit data, such as encoded video data, according to a cellular communication standard such as 4G, 4G-LTE (Long Term Evolution), LTE-Advanced, 5G, etc. In some examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to transmit data, such as encoded video data, according to a cellular communication standard such as IEEE 802.11 specifications, IEEE 802.15 specifications (e.g., ZigBee TM ),Bluetooth TMThe source device 102 and / or the destination device 116 may include a corresponding system-on-chip (SoC) device. For example, the source device 102 may include a SoC device to perform functions attributed to the video encoder 200 and / or the output interface 108, and the destination device 116 may include a SoC device to perform functions attributed to the video decoder 300 and / or the input interface 122.

[0076] The techniques of the present disclosure can be applied to video encoding and decoding to support any of a variety of multimedia applications, such as over-the-air television broadcasting, cable television transmission, satellite television transmission, Internet streaming video transmission such as Dynamic Adaptive Streaming over HTTP (DASH), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0077] The input interface 122 of the destination device 116 receives an encoded video bitstream from the computer-readable medium 110 (e.g., storage device 112, file server 114, etc.). The encoded video bitstream computer-readable medium 110 may include signaling information defined by the video encoder 200, such as syntax elements with values ​​describing characteristics or processing of video blocks or other coded units (e.g., slices, pictures, groups of pictures, sequences, etc.), which is also used by the video decoder 300. The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0078] Despite Figure 2 Not shown, in some examples, the video encoder 200 and the video decoder 300 can each be integrated with an audio encoder and / or an audio decoder and can include appropriate MUX-DEMUX units or other hardware and / or software to handle multiplexing streams including both audio and video in a common data stream. If applicable, the MUX-DEMUX units can conform to the ITU H.223 multiplexer protocol or other protocols such as the User Datagram Protocol (UDP).

[0079] Each of the video encoder 200 and the video decoder 300 can be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When these techniques are partially implemented in software, the device can store instructions for the software in a suitable, non-transitory computer-readable medium and execute the instructions in hardware using one or more processors to perform the techniques of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, either of which can be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device. A device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device, such as a cellular phone.

[0080] The video encoder 200 and the video decoder 300 may operate in accordance with a video codec standard, such as ITU-T H.265, also known as High Efficiency Video Codec (HEVC), or extensions thereof, such as multi-view and / or scalable video codec extensions. Alternatively, the video encoder 200 and the video decoder 300 may operate in accordance with other proprietary or industry standards, such as the Joint Exploration Test Model (JEM) or ITU-T H.266, also known as Versatile Video Codec (VVC). Bross et al. described the latest draft of the VVC standard in the 12th meeting of the Joint Video Experts Group (JVET) of ITU-T SG 16WP3 and ISO / IEC JTC 1 / SC 29 / WG 11: October 3-12, 2018, CN, Macao, JVET-L1001-v9 (hereinafter referred to as "VVC Draft 3"). However, the technology of the present disclosure is not limited to any particular codec standard.

[0081] In general, the video encoder 200 and the video decoder 300 can perform block-based encoding and decoding of pictures. The term "block" generally refers to a structure that includes data to be processed (e.g., encoded, decoded, or otherwise used in the encoding and / or decoding process). For example, a block can include a two-dimensional matrix of samples of luma and / or chroma data. In general, the video encoder 200 and the video decoder 300 can encode and decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, rather than encoding and decoding red, green, and blue (RGB) data of samples of a picture, the video encoder 200 and the video decoder 300 can encode and decode luma and chroma components, where the chroma components can include both red and blue hue chroma components. In some examples, the video encoder 200 converts received RGB formatted data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to an RGB format. Alternatively, pre-processing and post-processing units (not shown) can perform these conversions.

[0082] The present disclosure may generally refer to the encoding and decoding of a picture (e.g., encoding and decoding) to include the process of encoding or decoding the data of the picture. Similarly, the present disclosure may refer to the encoding and decoding of a block of a picture to include the process of encoding or decoding the data of the block, for example, prediction and / or residual encoding and decoding. A coded video bitstream typically includes a series of values ​​of syntax elements that represent codec decisions (e.g., codec mode) and the partitioning of the picture into blocks. Therefore, references to encoding and decoding a picture or block should generally be understood as the values ​​of the syntax elements that form the picture or block.

[0083] HEVC defines various blocks, including codec units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video codec (such as the video encoder 200) partitions a codec tree unit (CTU) into CUs according to a quadtree structure. That is, the video codec partitions the CTU and CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node," and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video codec may further partition the PUs and TUs. For example, in HEVC, the residual quadtree (RQT) represents the partitioning of the TU. In HEVC, PU represents inter-frame prediction data, and TU represents residual data. An intra-predicted CU includes intra-frame prediction information, such as an intra-frame mode indication.

[0084] As another example, the video encoder 200 and the video decoder 300 can be configured to operate according to JEM or VVC. According to JEM or VVC, a video codec (such as the video encoder 200) partitions a picture into multiple codec tree units (CTUs). The video encoder 200 can partition the CTU according to a tree structure such as a quadtree binary tree (QTBT) structure or a multi-type tree (MTT) structure. The QTBT structure removes the concept of multiple partition types, such as the separation between CU, PU, ​​and TU of HEVC. The QTBT structure includes two layers: the first layer is partitioned according to a quadtree, and the second layer is partitioned according to a binary tree. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to the codec units (CUs).

[0085] In the MTT partitioning structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of triple tree (TT) partitioning. Triple tree partitioning is a partitioning in which a block is divided into three sub-blocks. In some examples, triple tree partitioning divides a block into three sub-blocks without dividing the original block through the center. The partitioning types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0086] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each luma and chroma component, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for corresponding chroma components).

[0087] The video encoder 200 and the video decoder 300 can be configured to use quadtree segmentation, QTBT segmentation, MTT segmentation, or other segmentation structures per HEVC. For illustrative purposes, the description of the technology of the present disclosure is introduced with respect to QTBT segmentation. However, it should be understood that the technology of the present disclosure can also be applied to video codecs configured to use quadtree segmentation or other types of segmentation.

[0088] This disclosure may use "NxN" and "N by N" interchangeably to refer to the sample dimensions of a block (such as a CU or other video block) in terms of vertical and horizontal dimensions, for example, 16x16 samples or 16 by 16 samples. In general, a 16x16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Similarly, an NxN CU typically has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. Furthermore, a CU does not necessarily need to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include NxM samples, where M is not necessarily equal to N.

[0089] The video encoder 200 encodes the video data of the CU representing prediction and / or residual information and other information. The prediction information indicates how the CU will be predicted to form the prediction block of the CU. The residual information generally represents the sample-by-sample difference between the samples of the CU before encoding and the prediction block.

[0090] To predict a CU, the video encoder 200 may typically form a prediction block for the CU through inter-frame prediction or intra-frame prediction. Inter-frame prediction typically refers to predicting a CU from data of a previously encoded picture, while intra-frame prediction typically refers to predicting a CU from previously encoded data of the same picture. To perform inter-frame prediction, the video encoder 200 may use one or more motion vectors to generate a prediction block. The video encoder 200 may typically perform a motion search to identify a reference block that closely matches the CU, for example, in terms of the difference between the CU and the reference block. The video encoder 200 may calculate a difference metric using the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), or other such difference calculations to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 may use uni-prediction or bi-prediction to predict the current CU.

[0091] Some examples of JEM and VVC also provide an affine motion compensation mode, which can be considered an inter-frame prediction mode. In the affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion, such as zooming in or out, rotation, perspective motion, or other irregular motion types.

[0092] To perform intra prediction, the video encoder 200 can select an intra prediction mode to generate a prediction block. Some examples of JEM and VVC provide sixty-seven intra prediction modes, including various directional modes, as well as a planar mode and a DC mode. In general, the video encoder 200 selects an intra prediction mode that describes the neighboring samples of the current block (e.g., a block of a CU), and predicts the samples of the current block from the neighboring samples of the current block. Assuming that the video encoder 200 encodes and decodes CTUs and CUs in a raster scan order (from left to right, from top to bottom), such samples may typically be above, to the upper left, or to the left of the current block in the same picture as the current block).

[0093] The video encoder 200 encodes data indicating a prediction mode for the current block. For example, for inter-frame prediction mode, the video encoder 200 may encode data indicating which of various available inter-frame prediction modes to use, as well as motion information for the corresponding mode. For unidirectional or bidirectional inter-frame prediction, for example, the video encoder 200 may encode motion vectors using Advanced Motion Vector Prediction (AMVP) or Merge Mode. The video encoder 200 may use a similar mode to encode motion vectors for affine motion compensation mode.

[0094] After a prediction, such as intra prediction or inter prediction, of a block, the video encoder 200 may calculate residual data for the block. The residual data, such as a residual block, represents the sample-by-sample difference between the block and a prediction block of the block formed using a corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to produce transformed data in a transform domain rather than a sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. Additionally, the video encoder 200 may apply a secondary transform, such as a pattern-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc., after the first transform. The video encoder 200 produces transform coefficients after applying the one or more transforms.

[0095] As described above, after any transform that produces transform coefficients, the video encoder 200 can perform quantization of the transform coefficients. Quantization generally refers to the process of quantizing transform coefficients to potentially reduce the amount of data used to represent the coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 can reduce the bit depth associated with some or all coefficients. For example, the video encoder 200 can round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 can perform a bitwise right shift of the value to be quantized.

[0096] After quantization, the video encoder 200 can scan the transform coefficients to produce a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan can be designed to place coefficients with higher energy (and therefore lower frequency) at the front of the vector and transform coefficients with lower energy (and therefore higher frequency) at the back of the vector. In some examples, the video encoder 200 can scan the quantized transform coefficients using a predefined scan order to produce a serialized vector and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 can perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 can entropy encode the one-dimensional vector, for example, according to context-adaptive binary arithmetic coding (CABAC). The video encoder 200 can also entropy encode the values ​​of syntax elements that describe metadata associated with the encoded video data for use by the video decoder 300 when decoding the video data.

[0097] To perform CABAC, the video encoder 200 may assign context within a context model to a symbol to be transmitted. For example, the context may relate to whether the symbol's neighboring values ​​are zero. The probability determination may be based on the context assigned to the symbol.

[0098] The video encoder 200 may also generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, for example, in a picture header, a block header, a slice header, or other syntax data, such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS), to the video decoder 300. The video decoder 300 may similarly decode such syntax data to determine how to decode the corresponding video data.

[0099] In this way, the video encoder 200 can generate a bitstream including the encoded video data, for example, syntax elements describing the partitioning of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Ultimately, the video decoder 300 can receive the bitstream and decode the encoded video data.

[0100] In general, the video decoder 300 performs a process that is inverse to the process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 can use CABAC to decode the values ​​of the syntax elements of the bitstream in a manner substantially similar to, but inverse to, the CABAC encoding process of the video encoder 200. The syntax elements can define information for partitioning a picture into CTUs and partitioning each CTU according to a corresponding partitioning structure (such as a QTBT structure) to define CUs of the CTU. The syntax elements can also define prediction and residual information for a block of video data (e.g., a CU).

[0101] The residual information can be represented by, for example, quantized transform coefficients. The video decoder 300 can inverse quantize and inverse transform the quantized transform coefficients of the block to reproduce a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame or inter-frame prediction) and related prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 can then combine the prediction block and the residual block (on a sample-by-sample basis) to reproduce the original block. The video decoder 300 can perform additional processing, such as deblocking to reduce visual artifacts along block boundaries.

[0102] This disclosure may generally refer to "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to the communication of values ​​for syntax elements and / or other data used to decode encoded video data. That is, video encoder 200 may signal values ​​for syntax elements in a bitstream. Generally speaking, signaling refers to generating values ​​in a bitstream. As described above, source device 102 may transmit the bitstream to destination device 116 in substantially real time or in non-real time, such as may occur when storing syntax elements on storage device 112 for later retrieval by destination device 116.

[0103] Figure 3A and Figure 3B is a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure 130 and a corresponding codec tree unit (CTU) 132. Solid lines represent quadtree splits, and dashed lines indicate binary tree splits. In each split (i.e., non-leaf) node of the binary tree, a flag is signaled to indicate which split type (i.e., horizontal or vertical) is used, where, in this example, 0 indicates horizontal split and 1 indicates vertical split. For quadtree splits, there is no need to indicate the split type because the quadtree node splits the block horizontally and vertically into 4 equally sized sub-blocks. Thus, the video encoder 200 can encode and the video decoder 300 can decode syntax elements (such as split information) for the region tree level (i.e., solid lines) of the QTBT structure 130 and syntax elements (such as split information) for the prediction tree level (i.e., dashed lines) of the QTBT structure 130. The video encoder 200 can encode and the video decoder 300 can decode video data, such as prediction and transform data, for the CU represented by the terminal leaf node of the QTBT structure 130.

[0104] Generally speaking, Figure 3BThe CTU 132 may be associated with parameters defining the size of blocks corresponding to nodes at the first and second levels of the QTBT structure 130. These parameters may include a CTU size (indicating the size of the CTU 132 in samples), a minimum quadtree size (MinQTSize, indicating the minimum allowed quadtree leaf node size), a maximum binary tree size (MaxBTSize, indicating the maximum allowed binary tree root node size), a maximum binary tree depth (MaxBTDepth, indicating the maximum allowed binary tree depth), and a minimum binary tree size (MinBTSize, indicating the minimum allowed binary tree leaf node size).

[0105] The root node of the QTBT structure corresponding to the CTU can have four child nodes at the first level of the QTBT structure, each of which can be split according to the quadtree partitioning. That is, the nodes at the first level are either leaf nodes (no child nodes) or have four child nodes. The example of the QTBT structure 130 represents such a node as including a parent node and child nodes with solid lines for branching. If the node at the first level is not larger than the maximum allowed binary tree root node size (MaxBTSize), the node can be further split by its own binary tree. The binary tree splitting of a node can be iterated until the node resulting from the split reaches the minimum allowed binary tree leaf node size (MinBTSize) or the maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such a node as having a dotted line for branching. The leaf nodes of the binary tree are called codec units (CUs), which are used for prediction (e.g., intra-picture or inter-picture prediction) and transformation without any further partitioning. As described above, a CU can also be referred to as a "video block" or "block."

[0106] In one example of a QTBT partitioning structure, the CTU size is set to 128x128 (luminance sample and two corresponding 64x64 chroma samples), MinQTSize is set to 16x16, MaxBTSize is set to 64x64, MinBTSize (for both width and height) is set to 4, and MaxBTDepth is set to 4. Quadtree partitioning is first applied to the CTU to generate quadtree leaf nodes. Quadtree leaf nodes can have sizes ranging from 16x16 (i.e., MinQTSize) to 128x128 (i.e., CTU size). If the leaf quadtree node is 128x128, it will not be further split by the binary tree because the size exceeds MaxBTSize (i.e., 64x64 in this example). Otherwise, the quadtree leaf node will be further split by the binary tree. Therefore, the leaf quadtree node is also the root node of the binary tree and has a binary tree depth of 0. When the binary tree depth reaches MaxBTDepth (4 in this example), further splitting is not allowed. When a binary tree node has a width equal to MinBTSize (4 in this example), it implies that no further horizontal splits are allowed. Similarly, a binary tree node with a height equal to MinBTSize implies that no further vertical splits are allowed for this binary tree node. As mentioned above, the leaf nodes of the binary tree are called CUs and are further processed according to prediction and transformation without further splitting.

[0107] Figure 4 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Figure 4 This is provided for illustrative purposes and should not be considered limiting of the techniques as broadly exemplified and described in this disclosure. For illustrative purposes, this disclosure describes video encoder 200 in the context of video codec standards, such as the HEVC video codec standard and the H.266 video codec standard under development. However, the techniques of this disclosure are not limited to these video codec standards and are generally applicable to video encoding and decoding.

[0108] exist Figure 4In the example of , the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filter unit 216, the DPB 218, and the entropy coding unit 220 may be implemented in one or more processors or processing circuits. Moreover, the video encoder 200 may include additional or alternative processors or processing circuits to perform these and other functions.

[0109] The video data memory 230 may store video data to be encoded by the components of the video encoder 200. The video encoder 200 may receive video data from, for example, the video source 104 ( Figure 2 ) receives video data stored in the video data memory 230. The DPB 218 can act as a reference picture memory that stores reference video data for use in the prediction of subsequent video data by the video encoder 200. The video data memory 230 and the DPB 218 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The video data memory 230 and the DPB 218 can be provided by the same memory device or separate memory devices. In various examples, as shown, the video data memory 230 can be on-chip with the other components of the video encoder 200, or off-chip relative to those components.

[0110] In the present disclosure, references to the video data memory 230 should not be construed as limited to memory internal to the video encoder 200, unless specifically described as such, or memory external to the video encoder 200, unless specifically described as such. Rather, references to the video data memory 230 should be understood as a reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data of a current block to be encoded). Figure 2 The memory 106 may also provide temporary storage of outputs from the various units of the video encoder 200 .

[0111] Shown Figure 4The various units of the video encoder 200 are described to help understand the operations performed by the video encoder 200. These units can be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide specific functions and have preset operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functions in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (e.g., receive parameters or output parameters), but the type of operations performed by the fixed-function circuits are generally immutable. In some examples, one or more units can be distinct circuit blocks (fixed-function or programmable), and in some examples, one or more units can be integrated circuits.

[0112] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed from programmable circuits. In an example where the operation of the video encoder 200 is performed using software executed by a programmable circuit, the memory 106 ( Figure 2 ) may store object code for software received and executed by video encoder 200, or another memory within video encoder 200 (not shown) may store such object code.

[0113] The video data memory 230 is configured to store received video data. The video encoder 200 can retrieve the picture of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 can be the original video data to be encoded.

[0114] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette unit, an intra-block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0115] The mode selection unit 202 typically coordinates multiple encoding passes to test combinations of encoding parameters and the resulting rate-distortion values ​​of these combinations. The encoding parameters may include the partitioning of CTUs into CUs, the prediction mode used for a CU, the transform type used for the residual data of a CU, the quantization parameter used for the residual data of a CU, etc. The mode selection unit 202 may ultimately select a combination of encoding parameters that has a better rate-distortion value than other tested combinations.

[0116] The video encoder 200 may partition a picture retrieved from the video data memory 230 into a series of CTUs and encapsulate one or more CTUs into a slice. The mode selection unit 210 may partition the CTUs of the picture according to a tree structure, such as the QTBT structure described above or the quadtree structure of HEVC. As described above, the video encoder 200 may form one or more CUs from the partitioned CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks."

[0117] In general, the mode select unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for the current block (e.g., the current CU, or, in HEVC, the overlapping portion of the PU and TU). For inter prediction of the current block, the motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously coded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 may calculate a value indicating how similar the potential reference blocks are to the current block, for example, based on the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), etc. The motion estimation unit 222 may generally perform these calculations using the sample-by-sample differences between the current block and the reference block under consideration. The motion estimation unit 222 may identify the reference block with the lowest value from these calculations, indicating the reference block that most closely matches the current block.

[0118] Motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in the current picture. Motion estimation unit 222 may then provide the motion vectors to motion compensation unit 224. For example, for unidirectional inter prediction, motion estimation unit 222 may provide a single motion vector, while for bidirectional inter prediction, motion estimation unit 222 may provide two motion vectors. Motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vectors have fractional sample precision, motion compensation unit 224 may interpolate values ​​for the prediction block based on one or more interpolation filters. Furthermore, for bidirectional inter prediction, motion compensation unit 224 may retrieve data for two reference blocks identified by the corresponding motion vectors and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.

[0119] As another example, for intra prediction or intra prediction codecs, the intra prediction unit 226 can generate a prediction block from samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 can generally mathematically combine the values ​​of adjacent samples and pad these calculated values ​​in a defined direction across the current block to produce a prediction block. As another example, for DC mode, the intra prediction unit 226 can calculate the average of adjacent samples to the current block and generate a prediction block to include this average in each sample of the prediction block.

[0120] Mode selection unit 202 provides the prediction block to residual generation unit 204. Residual generation unit 204 receives the original, unencoded version of the current block from video data memory 230 and the prediction block from mode selection unit 202. Residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, residual generation unit 204 may also determine the difference between sample values ​​in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, residual generation unit 204 may be formed using one or more circuits of subtractors that perform binary subtraction.

[0121] In the example where the mode selection unit 202 partitions the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As described above, the size of a CU may refer to the size of the luma codec block of the CU, and the size of a PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2Nx2N, the video encoder 200 may support PU sizes of 2Nx2N or NxN for intra prediction, and support PU sizes of 2Nx2N, 2NxN, Nx2N, NxN, or similar for inter prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning for PU sizes of 2NxnU, 2NxnD, nLx2N, and nRx2N for inter prediction.

[0122] In an example where the mode selection unit does not further partition the CU into PUs, each CU may be associated with a luma codec block and a corresponding chroma codec block. As described above, the size of a CU may refer to the size of the luma codec block of the CU. The video encoder 200 and the video decoder 120 may support CU sizes of 2Nx2N, 2NxN, or Nx2N.

[0123] For other video codecs such as intra-block copy mode codecs, affine mode codecs, and linear model (LM) mode codecs, as some examples, the mode selection unit 202 generates a prediction block for the current block being encoded via the corresponding unit associated with the codec technology. In some examples, such as palette mode codecs, the mode selection unit 202 may not generate a prediction block, but instead generate syntax elements indicating how to reconstruct the block based on the selected palette. In such a mode, the mode selection unit 202 may provide these syntax elements to the entropy coding unit 220 for encoding.

[0124] As described above, the residual generation unit 204 receives video data for a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0125] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, the transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 may perform multiple transforms on the residual block, such as a primary transform and a secondary transform such as a rotation transform. In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0126] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) may adjust the degree of quantization applied to the coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce information loss, and therefore, the quantized transform coefficients may have lower precision than the original transform coefficients produced by the transform processing unit 206.

[0127] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (albeit potentially with some degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the prediction block generated by the mode selection unit 202 to generate a reconstructed block.

[0128] Filter unit 216 may perform one or more filtering operations on the reconstructed blocks. For example, filter unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In some examples, the operations of filter unit 216 may be skipped.

[0129] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in examples where the operation of the filter unit 224 is not required, the reconstruction unit 214 can store the reconstructed blocks in the DPB 218. In examples where the operation of the filter unit 224 is required, the filter unit 216 can store the filtered reconstructed blocks in the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 can retrieve a reference picture from the DPB 218, which is formed from the reconstructed (and potentially filtered) blocks, to inter-predict subsequent coded pictures. In addition, the intra-prediction unit 226 can use the reconstructed blocks in the DPB 218 of the current picture to intra-predict other blocks in the current picture.

[0130] In general, entropy coding unit 220 may entropy encode syntax elements received from other functional components of video encoder 200. For example, entropy coding unit 220 may entropy encode quantized transform coefficient blocks from quantization unit 208. As another example, entropy coding unit 220 may entropy encode prediction syntax elements (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from mode selection unit 202. Entropy coding unit 220 may perform one or more entropy coding operations on the syntax elements (which is another example of video data) to generate entropy-encoded data. For example, entropy coding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) length coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioning entropy (PIPE) coding operation, an exponential Golomb coding operation, or another type of entropy coding operation on the data. In some examples, entropy coding unit 220 may operate in a bypass mode in which syntax elements are not entropy-encoded.

[0131] The video encoder 200 may output a bitstream including entropy-encoded syntax elements required to reconstruct a block of a slice or picture. Specifically, the entropy encoding unit 220 may output a bitstream.

[0132] The operations described above are described with respect to blocks. This description should be understood as operations on luma codec blocks and / or chroma codec blocks. As described above, in some examples, the luma codec blocks and chroma codec blocks are the luma and chroma components of a CU. In some examples, the luma codec blocks and chroma codec blocks are the luma and chroma components of a PU.

[0133] In some examples, the operations performed for luma codec blocks do not need to be repeated for chroma codec blocks. As an example, the operations for identifying the motion vector (MV) and reference picture for the luma codec block do not need to be repeated for identifying the MV and reference picture for the chroma blocks. Instead, the MV of the luma codec block can be scaled to determine the MV for the chroma blocks, and the reference picture can be the same. As another example, the intra prediction process can be the same for luma codec blocks and chroma codec blocks.

[0134] Video encoder 200 represents an example of a device configured to encode video data, the device including a memory configured to store the video data, and one or more processing units implemented in circuitry and configured to encode a number of additional bits that are not signaled but that the encoder is configured to assume have been signaled to satisfy a bin bit ratio constraint.

[0135] Figure 5 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Figure 5 This is provided for illustrative purposes and is not intended to limit the techniques broadly exemplified and described in this disclosure. For illustrative purposes, this disclosure describes a video decoder 300 according to the technical descriptions of JEM, VVC, and HEVC. However, the techniques of this disclosure can be performed by video codec devices configured for other video codec standards.

[0136] exist Figure 5 In the example of FIG, the video decoder 300 includes a codec picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or processing circuits. Furthermore, the video decoder 300 may include additional or alternative processors or processing circuits to perform these and other functions.

[0137] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units to perform prediction according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra-block copy unit (which may form part of the motion compensation unit 318), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0138] The CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of the video decoder 300. The video data stored in the CPB memory 320 may be, for example, received from the computer-readable medium 110 ( Figure 2 ). The CPB memory 320 may include a CPB that stores coded video data (e.g., syntax elements) from a coded video bitstream. In addition, the CPB memory 320 may store video data other than syntax elements for coded or decoded pictures, such as temporary data representing outputs from various units of the video decoder 300. The DPB 314 typically stores decoded pictures that the video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures of the coded video bitstream. The CPB memory 320 and the DPB 314 may be formed from any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetic RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The CPB memory 320 and the DPB 314 may be provided by the same memory device or separate memory devices. In various examples, the CPB memory 320 may be on-chip with the other components of the video decoder 300, or off-chip relative to those components.

[0139] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 2 ) to retrieve the encoded video data. That is, memory 120 may store data as discussed above in conjunction with CPB memory 320. Similarly, when some or all of the functionality of video decoder 300 is implemented in software to be executed by processing circuitry of video decoder 300, memory 120 may store instructions to be executed by video decoder 300.

[0140] Explained Figure 5 Various units are shown to aid in understanding the operations performed by the video decoder 300. These units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Figure 4, fixed-function circuits refer to circuits that provide specific functions and have preset operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functions in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (for example, receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more units can be distinct circuit blocks (fixed-function or programmable), and in some examples, one or more units can be integrated circuits.

[0141] The video decoder 300 may include an ALU, an EFU, digital circuits, analog circuits, and / or a programmable core formed from programmable circuits. In examples where the operation of the video decoder 300 is performed by software executed on the programmable circuits, on-chip or off-chip memory may store instructions (e.g., object code) for the software that the video decoder 300 receives and executes.

[0142] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to reproduce syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0143] Generally speaking, the video decoder 300 reconstructs a picture on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block individually (where the block currently being reconstructed (ie, decoded) may be referred to as the "current block").

[0144] The entropy decoding unit 302 may entropy encode syntax elements defining the quantized transform coefficients of the quantized transform coefficient block, as well as transform information such as a quantization parameter (QP) and / or transform mode indications. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization and, likewise, a degree of inverse quantization to be applied by the inverse quantization unit 306. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block comprising the transform coefficients.

[0145] After inverse quantization unit 306 forms a transform coefficient block, inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the coefficient block.

[0146] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 may generate the prediction block. In this case, the prediction information syntax element may indicate a reference picture in DPB 314 from which the reference block is retrieved, and a motion vector that identifies the position of the reference block in the reference picture relative to the position of the current block in the current picture. Motion compensation unit 316 may generally generate a prediction block in a manner substantially similar to that described with respect to motion compensation unit 224 ( Figure 4 ) to perform the inter-frame prediction process in the manner described.

[0147] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Again, the intra-prediction unit 318 may generally generate a prediction block in a manner substantially similar to that described with respect to the intra-prediction unit 226 ( Figure 4 The intra prediction process may be performed in the manner described in the preceding text. The intra prediction unit 318 may retrieve data of neighboring samples of the current block from the DPB 314.

[0148] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0149] The filter unit 312 may perform one or more filtering operations on the reconstructed block. For example, the filter unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filter unit 312 may not necessarily be performed in all examples.

[0150] The video decoder 300 may store the reconstructed blocks in the DPB 314. As described above, the DPB 314 may provide reference information to the prediction processing unit 304, such as samples of the current picture for intra prediction and samples of previously decoded pictures for subsequent motion compensation. In addition, the video decoder 300 may output decoded pictures from the DPB for subsequent presentation on a video display such as a video processor. Figure 2 on the display device 118 of the display device.

[0151] In this manner, video decoder 300 represents an example of a video decoding device that includes a memory configured to store video data, and one or more processing units implemented in circuitry and configured to encode a number of additional bits that are not signaled but that the encoder is configured to assume have been signaled in order to satisfy a bin bit ratio constraint.

[0152] Figure 6 is a flowchart illustrating an example method for encoding a current block. The current block may include a current CU. Although with respect to the video encoder 200 ( Figure 1 and Figure 2 ) is described, but it should be understood that other devices may be configured to perform similar Figure 6 method of method.

[0153] In this example, the video encoder 200 first predicts the current block (350). For example, the video encoder 200 may form a prediction block for the current block. The video encoder 200 may then calculate a residual block for the current block (352). To calculate the residual block, the video encoder 200 may calculate the difference between the original, unencoded block and the prediction block for the current block. The video encoder 200 may then transform and quantize the coefficients of the residual block (354). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (356). During or after the scan, the video encoder 200 may entropy encode the coefficients (358). For example, the video encoder 200 may encode the coefficients using CAVLC or CABAC. The video encoder 200 may then output the entropy-encoded data for the block (360).

[0154] Figure 7 is a flowchart illustrating an example method for decoding a current block of video data. The current block may include a current CU. Although with respect to the video decoder 300 ( Figure 1 3 ), it will be appreciated that other devices may be configured to perform similar Figure 7 method of method.

[0155] The video decoder 300 may receive entropy-encoded data for a current block, such as entropy-encoded prediction information and entropy-encoded data for coefficients of a residual block corresponding to the current block (370). The video decoder 300 may entropy decode the entropy-encoded data to determine the prediction information for the current block and reproduce the coefficients of the residual block (372). The video decoder 300 may predict the current block (374), for example, using an intra-frame or inter-frame prediction mode indicated by the prediction information for the current block to calculate a prediction block for the current block. The video decoder 300 may then reverse scan the reproduced coefficients (376) to create a block of quantized transform coefficients. The video decoder 300 may then inverse quantize and inverse transform the coefficients to produce a residual block (378). The video decoder 300 may ultimately decode the current block (380) by combining the prediction block and the residual block.

[0156] Figure 84 is a flow chart illustrating encoding or decoding video data according to some embodiments. The method begins at block 402, where the video encoder 200 or video decoder 300 determines available residual coefficients adjacent to a current position in a transform unit. Next, at block 404, the video encoder 200 or video decoder 300 determines a sum of the available residual coefficients. Moving to block 406, the video encoder 200 or video decoder 300 modifies the sum based on the number of available residual coefficients. In one embodiment, modifying the sum includes normalizing the sum based on the number of available residual coefficients. In one embodiment, modifying the sum includes clipping the sum based on the number of available coefficients. At block 408, the video encoder 200 or video decoder 300 determines rice parameters based on the modified sum. In one embodiment, determining the rice parameters includes comparing the sum to one or more thresholds and, based on the comparison, determining whether to a) use specified rice parameters or b) use the sum to index a lookup table to determine the rice parameters. Next, at block 410, the device encodes (e.g., encoded by video encoder 200 or decoded by video decoder 300) syntax elements indicating residual coefficients at the current position based on the determined rice parameters. The residual coefficients may be used to encode a video unit including a transform unit. The video unit may be encoded using lossless, transform skip residual, or lossy coding modes.

[0157] It should be appreciated that, depending on the example, certain actions or events of any of the techniques described herein may be performed in a different sequence, may be added, combined, or omitted entirely (e.g., not all described actions or events are necessary for the practice of the techniques). Furthermore, in some examples, actions or events may be performed concurrently, e.g., via multithreading, interrupt handling, or multiple processors, rather than sequentially.

[0158] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored or transmitted as one or more instructions or codes on a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which corresponds to tangible media such as data storage media, or communication media, which includes any media that facilitates the transfer of a computer program from one place to another, for example, according to a communication protocol. In this manner, computer-readable media may generally correspond to (1) non-transitory tangible computer-readable storage media or (2) communication media such as signals or carrier waves. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures to implement the techniques described in this disclosure. A computer program product may include computer-readable media.

[0159] By way of example and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, flash memory or any other medium that can be used to store the desired program code in the form of instructions or data structures and that can be accessed by a computer. In addition, any connection is properly referred to as a computer-readable medium. For example, if the instructions are sent from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio and microwaves, then the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technologies such as infrared, radio and microwaves are included in the definition of medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals or other temporary media, but rather refer to non-temporary, tangible storage media. The disks and discs used herein include optical discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks and Blu-ray discs, where disks typically reproduce data magnetically, while discs use lasers to reproduce data optically. The above combinations should also be included within the scope of computer-readable media.

[0160] Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Thus, the terms "processor" and "processing circuitry" as used herein may refer to any of the aforementioned structures or any other structure suitable for the implementation of the techniques described herein. Furthermore, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. Furthermore, these techniques may be fully implemented in one or more circuit elements or logic elements.

[0161] The techniques of this disclosure can be implemented in a wide variety of devices or apparatuses, including wireless handsets, integrated circuits (ICs), or sets of ICs (e.g., chipsets). Various components, modules, or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but they do not necessarily need to be implemented by different hardware units. Rather, as described above, the various units can be combined in a codec hardware unit or provided by a collection of interoperable hardware units including one or more processors as described above, along with appropriate software and / or firmware.

[0162] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for encoding or decoding video data, the method comprising: Determine an available residual coefficient adjacent to a current position in a transform unit of video data, where the adjacent available residual coefficient is determined according to a plurality of adjacent positions in the transform unit; determining a sum of the available residual coefficients and a number of the available residual coefficients, the number being greater than zero and less than a number of the plurality of adjacent positions in the transform unit; modifying the sum based on the number of available residual coefficients and based on the number of the plurality of neighboring positions in the transform unit; determining a rice parameter of the residual coefficient at the current position in the transform unit based on the modified sum; as well as A syntax element indicating the residual coefficient at the current position is encoded and decoded based on the determined rice parameter.

2. The method according to claim 1, wherein: Modifying the sum includes normalizing the sum based on the number of available residual coefficients.

3. The method according to claim 1, wherein: Modifying the sum includes clipping the sum based on the number of available residual coefficients.

4. The method according to claim 1, wherein: Determining the rice parameters based on the modification includes: comparing the sum to one or more thresholds; and A determination is made based on the comparison whether to a) use a specified rice parameter, or b) use the sum to index a lookup table to determine the rice parameter.

5. The method according to claim 1, wherein: The transform unit is encoded in a lossless coding mode.

6. The method according to claim 1, wherein: The transform unit is encoded using transform skip residual codec.

7. The method according to claim 1, wherein: Encoding and decoding the syntax element includes encoding the syntax element, and also includes encoding the syntax element of the transform unit including the residual coefficient.

8. The method according to claim 1, wherein: Encoding and decoding the syntax element includes decoding the syntax element, and also includes decoding the transform unit of video data using the residual coefficient.

9. A device for encoding and decoding video data, the device comprising: a memory configured to store a transform unit of a picture of video data; The video processor is configured as: Determine an available residual coefficient adjacent to a current position in the transform unit, where the adjacent available residual coefficient is determined according to a plurality of adjacent positions in the transform unit; determining a sum of available residual coefficients and a number of the available residual coefficients, the number being greater than zero and less than a number of the plurality of adjacent positions in the transform unit; modifying the sum based on the number of available residual coefficients and based on the number of the plurality of neighboring positions in the transform unit; determining a rice parameter of the residual coefficient at the current position in the transform unit based on the modified sum; as well as A syntax element indicating the residual coefficient at the current position is encoded and decoded based on the determined rice parameter.

10. The device according to claim 9, wherein: The processor is configured to modify the sum based on the number of available residual coefficients.

11. The device according to claim 9, wherein: The processor is further configured to modify the sum based on the number of available residual coefficients.

12. The device according to claim 9, wherein: In order to modify the rice parameters based on the modified sum, the processor is further configured to: comparing the sum to one or more thresholds; as well as A determination is made based on the comparison whether to a) use a specified rice parameter, or b) use the sum to index a lookup table to determine the rice parameter.

13. The device according to claim 9, wherein: The transform unit is encoded in a lossless coding mode.

14. The device according to claim 9, wherein: The transform unit is encoded using transform skip residual codec.

15. The device according to claim 9, wherein: In order to encode and decode the syntax element, the processor is configured to encode the syntax element and further configured to encode a syntax element encoding the transform unit including the residual coefficient.

16. The device according to claim 9, wherein: To encode and decode the syntax element, the processor is configured to decode the syntax element and further configured to decode the transform unit of video data based on the syntax element.

17. The device according to claim 9, wherein: The processor is implemented in circuitry coupled to the memory.

18. The apparatus of claim 9, further comprising a display configured to display the video data.

19. The apparatus of claim 9, further comprising a camera configured to capture the video data.

20. The device according to claim 9, wherein: The apparatus includes one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

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