Virtual memory processing method and device, electronic equipment and storage medium
By using Wine+Qemu technology and virtual memory management in the Linux system based on ARM architecture, the problem of insufficient memory allocation for ARM system compatibility with 32-bit and 64-bit Windows programs is solved, and efficient memory space utilization and program compatibility are achieved.
Patent Information
- Application Number
- CN202210016069.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-07
- Publication Date
- 2025-10-24
- Estimated Expiration
- 2042-01-07
AI Technical Summary
Existing ARM architecture Linux systems are difficult to run 32-bit and 64-bit Windows programs, especially in terms of memory space allocation.
Wine+Qemu technology is used to configure the operating environment of Windows programs in the ARM architecture Linux system, and through virtual memory management, the memory usage space of 32-bit and 64-bit programs is ensured to be within the 0-4GB virtual memory space. The allocation strategy of different memory granularities is used to maximize the occupation of the target virtual memory space, and then release it to the target application after initializing the operating environment.
It enables the compatible running of 32-bit and 64-bit Windows programs on the ARM architecture Linux system, ensures the efficient use and compatibility of memory space, and improves the applicability of the system.
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Figure CN114416359B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of computers, in particular to cloud computing technology, and more particularly to a virtual memory processing method and device, electronic equipment, storage medium and computer program product. BACKGROUND
[0002] ARM architecture processors are currently very popular processor architectures. Their reduced instruction set design is more efficient and has lower energy consumption than the complex instruction set commonly found in desktop computer processors. Therefore, many server devices or mobile devices such as smartphones currently use ARM architecture processors. SUMMARY
[0003] The present disclosure provides a virtual memory processing method and device, electronic equipment, storage medium and computer program product.
[0004] According to an aspect of the present disclosure, a virtual memory processing method is provided, comprising:
[0005] occupying a target virtual memory space in response to a start event of a target application program;
[0006] initializing a running environment component of the target application program, and releasing the target virtual memory space to the target application program after initialization is completed.
[0007] According to an aspect of the present disclosure, a virtual memory processing device is provided, comprising:
[0008] a memory occupation module configured to occupy a target virtual memory space in response to a start event of a target application program;
[0009] an initialization and memory release module configured to initialize a running environment component of the target application program, and release the target virtual memory space to the target application program after initialization is completed.
[0010] According to another aspect of the present disclosure, an electronic equipment is provided, comprising:
[0011] at least one processor; and
[0012] a memory in communication connection with the at least one processor; wherein
[0013] the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the virtual memory processing method of any embodiment of the present disclosure.
[0014] According to another aspect of the present disclosure, there is provided a non-transitory computer-readable storage medium storing computer instructions for causing a computer to execute the processing method of virtual memory according to any of the embodiments of the present disclosure.
[0015] According to another aspect of the present disclosure, there is provided a computer program product comprising a computer program which, when executed by a processor, implements the processing method of virtual memory according to any of the embodiments of the present disclosure.
[0016] According to the technology of the present disclosure, the purpose of reserving memory space for an application program is achieved.
[0017] It should be understood that the content described in this section is not intended to identify key or important features of the embodiments of the present disclosure, nor to limit the scope of the present disclosure. Other features of the present disclosure will become apparent through the following description. BRIEF DESCRIPTION OF DRAWINGS
[0018] The accompanying drawings are used to better understand the present scheme, and do not limit the present disclosure. Among them:
[0019] Figure 1 is a flowchart of a processing method of virtual memory according to an embodiment of the present disclosure;
[0020] Figure 2 is a flowchart of another processing method of virtual memory according to an embodiment of the present disclosure;
[0021] Figure 3 is a structural diagram of a processing device of virtual memory according to an embodiment of the present disclosure;
[0022] Figure 4 is a block diagram of an electronic device for implementing the processing method of virtual memory according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0023] Exemplary embodiments of the present disclosure are described below with reference to the accompanying drawings, which include various details of the embodiments of the present disclosure to assist in understanding, and should be considered as merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Also, in order to be clear and concise, descriptions of well-known functions and structures are omitted in the following description.
[0024] The present application is applied to a server based on an ARM (Advanced RISC Machines) architecture chip, and an operating system running on the ARM architecture chip is a Linux system. In order to make up for the shortage of limited application programs on the Linux system of the ARM architecture chip, a Wine (Wine Is Not an Emulator) + Qemu (QuickEMUlator) technology is used to configure a running environment component of a windows program in the Linux system of the ARM architecture chip, so that an application program of an x86 architecture developed for a windows system can be used in the Linux system of the ARM architecture.
[0025] It should be noted that Wine is a simulated running environment on an x86 processor, and by using Wine, an executable program of windows can be directly run in other operating systems (usually Unix-like operating systems such as Linux). Therefore, by using Wine, rich application resources under a windows environment can be directly obtained on different operating systems, and many windows applications can be directly run in Wine without any modification (without recompilation) and with high running efficiency. However, Wine technology itself is based on an x86 instruction set, and only supports a processor architecture of x86 and does not support ARM. Therefore, the Qemu technology is introduced, and by using the Qemu technology, x86 instructions are converted into ARM instructions to truly run, so as to achieve the purpose of running a windows program on a Linux system of the ARM architecture.
[0026] However, at present, there are two kinds of windows application programs, 32-bit and 64-bit programs, and the addressing spaces of the 32-bit and 64-bit programs are different. Specifically, the addressing space of the 32-bit program is 2 to the power of 32, which is 4 GB, and the addressing space of the 64-bit system is 2 to the power of 64. In order to ensure the conversion of X86 instructions to ARM instructions by using the Qemu technology, the Linux system of the ARM architecture needs to be compatible with the running of the two kinds of programs of 32-bit and 64-bit. Based on this, the present application proposes that the memory usage spaces of the 32-bit and 64-bit programs are both corresponded to the 0-4 GB space of the virtual memory, and thus a processing method of the virtual memory is proposed. The specific process is described in the following embodiments.
[0027] Figure 1For a flowchart of a virtual memory processing method of an embodiment of the present disclosure, the embodiment can be applicable to the case of compatible running of 32-bit and 64-bit windows programs in an ARM architecture-based Linux system. The method can be executed by a virtual memory processing apparatus, which is implemented in software and / or hardware and integrated on a server device based on an ARM architecture chip.
[0028] Specifically, referring to Figure 1 , the virtual memory processing method is as follows:
[0029] S101, in response to a starting event of a target application program, occupying a target virtual memory space.
[0030] S102, initializing a running environment component of the target application program, and releasing the target virtual memory space to the target application program after the initialization is completed.
[0031] In the embodiment of the present disclosure, the target application program is a 32-bit windows program or a 64-bit windows program. Correspondingly, the target virtual memory space is the addressing space of the 32-bit windows program, that is, the 0-4GB space in the virtual memory.
[0032] In the ARM architecture-based Linux system, the instruction for starting the windows program is as follows: Wine xxx.exe, where “xxx” represents the identification of the application program, for example, the name of the application program. Therefore, as long as the instruction “Wine xxx.exe” is detected to be executed, it is determined that the starting event of the target application program occurs. In order to be compatible with the execution of the 32-bit windows program and the 64-bit windows program, the present solution proposes to save the target virtual memory space (that is, the 0-4GB space in the virtual memory) as much as possible for the windows application program. Therefore, in the implementation, as long as the starting event of the target application program is detected, the target virtual memory space is first occupied, and optionally, the target virtual memory space is occupied by calling the memory mapping function mmap.
[0033] Further, in order to ensure that the target application program can run, after the target virtual memory space is occupied, the running environment component for ensuring that the target application program can stably execute in the Linux system of the ARM architecture needs to be initialized, mainly controlling the running of the qemu module in the running environment component to ensure that the x86 instruction can be converted into an ARM instruction. It should be noted that, when the running environment component is initialized, if additional memory resources are needed, then the memory above 4G in the virtual memory is allocated for initialization. After the initialization is completed, the successfully occupied target virtual memory space is released to the target application program. Optionally, the occupied target virtual memory space is released by calling the memory unmapping function munmap.
[0034] In the embodiment of the present disclosure, by controlling the memory usage space of the windows program below 4GB of virtual memory, not only the purpose of reserving memory space for the windows program is achieved, but also the execution of the 32-bit and 64-bit windows program by the Linux system of the ARM architecture can be well compatible.
[0035] Figure 2 is a flowchart of another virtual memory processing method according to an embodiment of the present disclosure. The embodiment of the present disclosure is based on the above-mentioned embodiment, and the process of occupying the target virtual memory space is refined. Referring to Figure 2 , the virtual memory processing method is as follows:
[0036] S201, in response to a start event of a target application program, the target virtual memory space is occupied according to different memory space granularities.
[0037] In the embodiment of the present disclosure, the target application program is a 32-bit windows program or a 64-bit windows program. Correspondingly, the target virtual memory space is the addressing space of the 32-bit windows program, that is, the 0-4GB space in the virtual memory space.
[0038] In the embodiment of the present disclosure, when the target virtual memory space is occupied according to different memory space granularities, the occupation can be performed according to a large granularity first, and then according to a small granularity for the occupation failure, so as to achieve the purpose of occupying the target virtual memory space to the maximum extent.
[0039] In an optional embodiment, the target virtual memory space is occupied according to different memory space granularities, including the following processes:
[0040] Firstly, the target virtual memory space is equally divided into M first sub-target virtual memory spaces according to a first memory space granularity; wherein the first memory granularity is exemplarily 2 GB, thus the target virtual memory space can be divided into two first sub-target virtual memory spaces, which are respectively a first virtual memory space of 0-2 GB and a first virtual memory space of 2-4 GB; the M first sub-target virtual memory spaces are sequentially occupied, and the first type of occupation result is recorded, for example, in the form of an array, or by other means (such as a table), which is not specifically limited here. It should be noted that the reason for dividing according to the 2 GB granularity is that the 2-4 GB space in the target virtual memory space is usually idle; therefore, by dividing according to the 2 GB granularity and directly occupying when it is determined that the 2-4 GB space is idle, the time for occupying the target virtual memory space can be saved.
[0041] Further, in the case that at least one first sub-target virtual memory space fails to be occupied, for example, the first sub-target virtual memory space of 0-2 GB fails to be occupied while the first sub-target virtual memory space of 2-4 GB is successfully occupied, any first sub-target virtual memory space (for example, the 0-2 GB memory space) that fails to be occupied is equally divided into N second sub-target virtual memory spaces according to a second memory space granularity, wherein the second memory space granularity is optionally 64 KB. Then, the N second sub-target virtual memory spaces are sequentially occupied, and the second type of occupation result is recorded, for example, in the form of an array. It should be noted that if any second sub-target virtual memory space is completely idle, it is marked as successfully occupied; otherwise, it is marked as failed to be occupied.
[0042] In the case that all M first sub-target virtual memory spaces fail to be occupied, for example, both the first sub-target virtual memory space of 2-4 GB and the first sub-target virtual memory space of 0-2 GB fail to be occupied, it indicates that it is not suitable to divide the target virtual memory space according to the first memory space granularity. At this time, in order to occupy the target virtual memory space as quickly as possible, the target virtual memory space can be equally divided into Q second sub-target virtual memory spaces according to the second memory space granularity, for example, the target virtual memory space is divided into multiple second sub-target virtual memory spaces with a size of 64 KB; then, the Q second sub-target virtual memory spaces are sequentially occupied, and the fourth type of occupation result is recorded, exemplarily, the Q second sub-target virtual memory spaces are sequentially occupied by calling the memory mapping function mmap, and the occupation result is recorded in the form of an array; wherein if a second sub-target virtual memory space is completely idle, that is, all addresses in the second sub-target virtual memory space are in an idle state, it is marked as successfully occupied; otherwise, it is marked as failed to be occupied.
[0043] Further, in the case of at least one second target virtual memory space occupation failure, any failed second target virtual memory space is divided into P third target virtual memory spaces according to a third memory space granularity; the third memory space granularity can be 4KB or other values. The P third target virtual memory spaces are sequentially occupied, and the third type of occupation result is recorded, for example, in the form of an array.
[0044] It should be noted that the first memory space granularity is 2GB, the second memory space granularity is 64KB, and the third memory space granularity is 4KB, which is to ensure the efficiency of the target virtual memory occupation. The values of the three memory space granularities can also be any size, as long as the first memory space granularity is greater than the second memory space granularity, and the second memory space granularity is greater than the third memory space granularity.
[0045] S202, initialize the running environment components of the target application, and release the target virtual memory space to the target application after initialization.
[0046] Optionally, after the running environment components of the target application are completed, the first type of occupation result, the second type of occupation result, the third type of occupation result, and the fourth type of occupation result can be traversed, and the first target virtual memory space, the third target virtual memory space, and the second target virtual memory space that are successfully occupied are sequentially released, for example, by calling the memory unmapping function munmap to release, thereby realizing the allocation of 0-4GB virtual memory space to the target application, so that the target application can execute normally regardless of whether it is a 32-bit windows program or a 64-bit windows program.
[0047] In the embodiments of the present disclosure, the target virtual memory space is occupied by different granularities to maximize the occupation of the target virtual memory space. Moreover, by taking appropriate values for the first memory space granularity, the second memory space granularity, and the third memory space granularity, the efficiency of the target virtual memory space occupation can be guaranteed. In addition, in the ARM architecture Linux system, the memory usage space of the 32-bit and 64-bit windows programs is controlled below 4GB virtual memory, thereby achieving the purpose of reserving memory space for windows programs, so that the ARM architecture Linux system can well compatible with the execution of 32-bit and 64-bit windows programs.
[0048] Figure 3is a structural schematic diagram of a processing device of virtual memory according to an embodiment of the present disclosure, and the embodiment can be applicable to a case of compatible running of 32-bit and 64-bit windows programs in an ARM architecture-based Linux system. Figure 3 As shown in the figure, the device specifically includes:
[0049] a memory occupation module 301, configured to occupy a target virtual memory space in response to a starting event of a target application program;
[0050] an initialization and memory release module 302, configured to initialize a running environment component of the target application program, and release the target virtual memory space to the target application program after the initialization is completed.
[0051] On the basis of the above embodiment, optionally, the memory occupation module includes:
[0052] a memory occupation unit, configured to occupy the target virtual memory space according to different memory space granularities.
[0053] On the basis of the above embodiment, optionally, the memory occupation unit includes:
[0054] a first division subunit, configured to divide the target virtual memory space into M first sub-target virtual memory spaces according to a first memory space granularity;
[0055] a first occupation subunit, configured to sequentially occupy the M first sub-target virtual memory spaces, and record a first type of occupation result;
[0056] a second division subunit, configured to divide any occupied-failed first sub-target virtual memory space into N second sub-target virtual memory spaces according to a second memory space granularity in a case that at least one first sub-target virtual memory space fails to be occupied;
[0057] a second occupation subunit, configured to sequentially occupy the N second sub-target virtual memory spaces, and record a second type of occupation result;
[0058] a third division subunit, configured to divide any occupied-failed second sub-target virtual memory space into P third sub-target virtual memory spaces according to a third memory space granularity in a case that at least one second sub-target virtual memory space fails to be occupied;
[0059] a third occupation subunit, configured to sequentially occupy the P third sub-target virtual memory spaces, and record a third type of occupation result.
[0060] On the basis of the above embodiment, optionally, the memory occupation unit further includes:
[0061] The fourth dividing sub-unit is configured to divide the target virtual memory space into Q second target virtual memory spaces according to the second memory space granularity in the case that the M first target virtual memory spaces fail to be occupied.
[0062] The fourth occupying sub-unit is configured to sequentially occupy the Q second target virtual memory spaces and record the fourth occupying result.
[0063] On the basis of the above-mentioned embodiments, optionally, the initialization and memory release module comprises:
[0064] The memory release sub-unit is configured to sequentially release the occupied first target virtual memory space, the third target virtual memory space and the second target virtual memory space according to the first occupying result, the second occupying result, the third occupying result and the fourth occupying result.
[0065] On the basis of the above-mentioned embodiments, optionally, the target application program is a 32-bit windows program or a 64-bit windows program.
[0066] Correspondingly, the target virtual memory space is the addressing space of the 32-bit windows program.
[0067] The virtual memory processing apparatus provided by the embodiments of the present disclosure can execute the virtual memory processing method provided by any of the embodiments of the present disclosure, and has the corresponding function modules and beneficial effects of the execution method. The contents not described in detail in the present embodiment can be referred to the description in any of the method embodiments of the present disclosure.
[0068] In the technical solutions of the present disclosure, the acquisition, storage and application of user personal information comply with relevant laws and regulations and do not violate public order and good customs.
[0069] According to the embodiments of the present disclosure, the present disclosure further provides an electronic device, a readable storage medium and a computer program product.
[0070] Figure 4 A schematic block diagram of an example electronic device 400 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptops, desktops, tablets, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular telephones, smart phones, wearable devices, and other similar computing devices. The components shown here, their connections and relationships, and their functions, are meant to be examples only, and are not intended to limit the implementations of the present disclosure described and / or claimed in this document.
[0071] AsFigure 4 As shown, the device 400 includes a computing unit 401 that can perform various appropriate actions and processes in accordance with a computer program stored in a read-only memory (ROM) 402 or a computer program loaded from a storage unit 408 into a random access memory (RAM) 403. In the RAM 403, various programs and data required for the operation of the device 400 can also be stored. The computing unit 401, the ROM 402, and the RAM 403 are connected to each other through a bus 404. An input / output (I / O) interface 405 is also connected to the bus 404.
[0072] A plurality of components in the device 400 are connected to the I / O interface 405, including: an input unit 406, such as a keyboard, a mouse, etc.; an output unit 407, such as various types of displays, speakers, etc.; the storage unit 408, such as a magnetic disk, an optical disk, etc.; and a communication unit 409, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 409 allows the device 400 to exchange information / data with other devices through a computer network, such as the Internet, and / or various telecommunication networks.
[0073] The computing unit 401 can be various general and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 401 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The computing unit 401 performs various methods and processes described above, such as the processing method of virtual memory. For example, in some embodiments, the processing method of virtual memory can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 408. In some embodiments, part or all of the computer program can be loaded and / or installed on the device 400 via the ROM 402 and / or the communication unit 409. When the computer program is loaded into the RAM 403 and executed by the computing unit 401, one or more steps of the processing method of virtual memory described above can be performed. Alternatively, in other embodiments, the computing unit 401 can be configured to perform the processing method of virtual memory by any other appropriate means, such as by means of firmware.
[0074] The various embodiments of the systems and techniques described above can be implemented in digital electronic circuitry, integrated circuitry, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on a chip (SOC), a complex programmable logic device (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include implementation in one or more computer programs that are executable and / or interpretable on a programmable system including at least one programmable processor, which can be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device.
[0075] Program code for carrying out methods of the present disclosure can be written in any combination of one or more programming languages. The program code can be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the program code, when executed by the processor or controller, produces the functions / operations specified in the flowcharts and / or the block diagrams. The program code can be executed entirely on a machine, partially on a machine, partially on a machine as a stand-alone software package, or entirely on a remote machine or server.
[0076] In the context of the present disclosure, a machine-readable medium can be a tangible medium that contains or stores a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include but is not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the machine-readable storage medium will include one or more lines of electrical conductors, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or Flash memory), optical fibers, portable compact disc read-only memories (CD-ROMs), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.
[0077] To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.
[0078] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.
[0079] The computer system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server can arise by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, a server of a distributed system, or a server combined with a blockchain.
[0080] It should be understood that various forms of flow shown above can be used, with steps reordered, added, or removed. For example, steps recited in the present disclosure can be performed in parallel, in series, or in a different order, without limitation herein, so long as the desired results of the technology of the present disclosure are achieved.
[0081] The specific embodiments described above are not intended to limit the scope of the present disclosure. Those skilled in the art will understand that various modifications, combinations, sub-combinations, and alternatives can be made to the specific embodiments without departing from the spirit and principles of the present disclosure. Any further modifications, equivalent substitutions, improvements, and the like, either alone or in some combination or sub-combination, are intended to be included within the scope of the present disclosure.
Claims
1. A processing method of virtual memory, comprising: occupying a target virtual memory space in response to a start event of a target application program in an ARM architecture-based Linux system, so as to reserve a virtual memory space for the target application program; the target application program being a 32-bit windows program or a 64-bit windows program; the target virtual memory space being an addressing space of the 32-bit windows program; initializing a running environment component of the target application program, and releasing the target virtual memory space to the target application program after the initialization is completed.
2. The method of claim 1, wherein, The occupying of the target virtual memory space comprises: occupying the target virtual memory space according to different memory space granularities.
3. The method of claim 2, wherein, The occupying of the target virtual memory space according to different memory space granularities comprises: equally dividing the target virtual memory space into M first sub-target virtual memory spaces according to a first memory space granularity; occupying the M first sub-target virtual memory spaces in sequence and recording a first type of occupation result; in a case where at least one first sub-target virtual memory space fails to be occupied, equally dividing any first sub-target virtual memory space that fails to be occupied into N second sub-target virtual memory spaces according to a second memory space granularity; occupying the N second sub-target virtual memory spaces in sequence and recording a second type of occupation result; in a case where at least one second sub-target virtual memory space fails to be occupied, equally dividing any second sub-target virtual memory space that fails to be occupied into P third sub-target virtual memory spaces according to a third memory space granularity; occupying the P third sub-target virtual memory spaces in sequence and recording a third type of occupation result.
4. The method according to claim 3, further comprising: in a case where all the M first sub-target virtual memory spaces fail to be occupied, equally dividing the target virtual memory space into Q second sub-target virtual memory spaces according to the second memory space granularity; occupying the Q second sub-target virtual memory spaces in sequence and recording a fourth type of occupation result.
5. The method of claim 4, wherein, The releasing of the target virtual memory space comprises: releasing the occupied first sub-target virtual memory spaces, third sub-target virtual memory spaces and second sub-target virtual memory spaces in sequence according to the first type of occupation result, the second type of occupation result, the third type of occupation result and the fourth type of occupation result.
6. A processing apparatus of virtual memory, comprising: a memory occupying module, configured to occupy a target virtual memory space in response to a start event of a target application program in an ARM architecture-based Linux system; the target application program being a 32-bit windows program or a 64-bit windows program; the target virtual memory space being an addressing space of the 32-bit windows program; an initialization and memory releasing module, configured to initialize a running environment component of the target application program, and release the target virtual memory space to the target application program after the initialization is completed.
7. The apparatus of claim 6, wherein, The memory occupying module comprises: The memory occupation unit is configured to occupy the target virtual memory space according to different memory space granularities.
8. The apparatus of claim 7, wherein, The memory occupation unit comprises: A first division subunit configured to divide the target virtual memory space into M first sub-target virtual memory spaces according to a first memory space granularity; A first occupation subunit configured to sequentially occupy the M first sub-target virtual memory spaces and record a first type of occupation result; A second division subunit configured to, in a case where at least one of the first sub-target virtual memory spaces fails to be occupied, divide any first sub-target virtual memory space that fails to be occupied into N second sub-target virtual memory spaces according to a second memory space granularity; A second occupation subunit configured to sequentially occupy the N second sub-target virtual memory spaces and record a second type of occupation result; A third division subunit configured to, in a case where at least one of the second sub-target virtual memory spaces fails to be occupied, divide any second sub-target virtual memory space that fails to be occupied into P third sub-target virtual memory spaces according to a third memory space granularity; A third occupation subunit configured to sequentially occupy the P third sub-target virtual memory spaces and record a third type of occupation result.
9. The apparatus of claim 8, wherein the memory occupation unit further comprises: A fourth division subunit configured to, in a case where all of the M first sub-target virtual memory spaces fail to be occupied, divide the target virtual memory space into Q second sub-target virtual memory spaces according to the second memory space granularity; A fourth occupation subunit configured to sequentially occupy the Q second sub-target virtual memory spaces and record a fourth type of occupation result.
10. The apparatus of claim 9, wherein, The initialization and memory release module comprises: A memory release subunit configured to, according to the first type of occupation result, the second type of occupation result, the third type of occupation result, and the fourth type of occupation result, sequentially release the occupied first sub-target virtual memory spaces, the third sub-target virtual memory spaces, and the second sub-target virtual memory spaces.
11. An electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-5.
12. A non-transitory computer readable storage medium having stored thereon computer instructions, wherein, The computer instructions are used to enable the computer to perform the method of any one of claims 1-5.
13. A computer program product comprising a computer program which, when executed by a processor, implements the method of any one of claims 1-5.
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