A frequency feedforward method applied to a single-phase ups phase-locked loop

Abstract

The application provides a frequency feedforward method applied to a single-phase UPS, which mainly comprises four parts, namely, a phase discriminator, a loop filter, a frequency feedforward and a voltage-controlled oscillator. The phase discriminator is used for generating a quadrature component of a single-phase input voltage and performing coordinate transformation on the quadrature component, the Q-axis data after the coordinate transformation is used as the input of the loop filter, the output value after PI regulation is accumulated with a center frequency to obtain an output frequency, the output frequency is converted into an angle under the action of the voltage-controlled oscillator, and finally a phase locking result is obtained, during which the frequency feedforward is used for updating the center frequency and compensating a direct current bias. Compared with the prior art, the feedforward of the method is taken from the output frequency value and is used for compensating the center frequency and bias calculation, so that the bypass can be tracked again under the condition of frequency mutation or existence of the direct current bias, and the inverter voltage of the UPS output can be tracked quickly and accurately.

Description

Technical Field

[0001] This invention relates to the field of phase tracking technology for single-phase systems, and more particularly to a frequency feedforward method applied to a phase-locked loop in a single-phase UPS. Background Technology

[0002] For a single-phase online UPS (Uninterruptible Power Supply) to synchronize its inverter voltage with the bypass voltage, it needs to obtain the bypass phase. The machine needs to be able to quickly and accurately track bypass voltages of different frequencies or frequency abrupt changes. Phase-locked loops (PLLs) are slow at locking phase when tracking bypass voltages that deviate from the center frequency, and the locking time increases with the deviation from the center frequency. Frequency feedforward schemes can be introduced to improve this problem, but existing schemes still have room for improvement in convergence speed or phase-locking accuracy.

[0003] The existing digital phase-locked loops of single-phase UPS mainly adopt the second-order generalized integral method (SOGI). Because the center frequency value is fixed, the synchronization time is too long under the condition of frequency change, which causes the software to judge the phase lock-in to be lost. Summary of the Invention

[0004] This invention aims to overcome the shortcomings of the prior art and provide a frequency feedforward method for single-phase UPS phase-locked loops.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] A frequency feedforward method applied to a single-phase UPS phase-locked loop includes the following steps:

[0007] The bypass voltage is sampled to obtain the bypass sampling signal U. byp (k) and input to the input terminal of the phase-locked loop, where the sampling frequency is f. s k represents the sampling sequence number;

[0008] The bypass sampling signal is input into a second-order generalized integral module, and a pair of orthogonal components U corresponding to the bypass sampling signal are obtained based on the stationary coordinate system constructed by the second-order generalized integral module. α (k) and U β (k);

[0009] According to U α (k) and U β (k), the Q-axis voltage component U in the two-phase stationary coordinate system is calculated using coordinate formulas. q (k), by a given value and U q (k) The feedback value yields the error value ε, which, after PI adjustment, is output at the center angular frequency ω. c (k) The accumulated output angular frequency ωo (k);

[0010] By measuring the output angular frequency ω o (k) is integrated to obtain the phase information θ of the input bypass sampling signal.

[0011] In some embodiments, the method further includes the step of: outputting angular frequency ω o (k) and sampling frequency f s The number of periodic sampling points N is calculated, the DC bias is calculated using the periodic mean algorithm, and the bypass sampling signal is biased and compensated at the input of the phase-locked loop.

[0012] In some embodiments, the method further includes the step of: initializing the phase-locked loop upon initial use or power-on, and setting the bypass sampling signal U... byp The phase θ(k) is 0, and the angular frequency ω o (k)=ω c (k) = A, where A is the angular frequency corresponding to the power grid frequency.

[0013] In some embodiments, the formula for calculating the number of periodic sampling points N is N = 2 * π * f s / ω o .

[0014] In some embodiments, the orthogonal component U is obtained. α (k) and U β The formula for calculating (k) is as follows:

[0015]

[0016] Where the coefficient k is 0.5;

[0017] Calculate the Q-axis voltage component U in a two-phase stationary coordinate system q The formula for (k) is as follows:

[0018]

[0019] In some embodiments, the output after PI regulation is related to the center angular frequency ω. c (k) Accumulation yields the output angular frequency ω o (k), where ω c (k)=a*ω o (k)+(1-a)ω c (k-1), where a is the filter coefficient.

[0020] In some embodiments, the proportional parameter of the PI adjustment is k. p =0.1, integral coefficient k i =0.1.

[0021] According to another aspect of the present invention, a frequency feedforward phase-locked loop (PLL) for a single-phase UPS is provided, comprising: a phase detector, a loop filter, a frequency feedforward module, and a voltage-controlled oscillator.

[0022] The phase detector is used to analyze the bypass sampling signal U obtained from the sampling process. byp (k) is transformed to obtain the orthogonal component U. α (k) and U β (k), and perform coordinate transformation to obtain the Q-axis voltage component U. q (k), by a given value and U q (k) The feedback value yields the error value ε, where the sampling frequency is f. s k represents the sampling sequence number;

[0023] Q-axis voltage component U q (k) is used as the input of the loop filter, and the output value is obtained after PI adjustment;

[0024] The frequency feedforward module is used to correlate the PI-adjusted output value with the center angular frequency ω. c (k) After accumulation, the output angular frequency ω is obtained. o (k);

[0025] Output angular frequency ω o (k) is converted to an angle under the action of the voltage-controlled oscillator, and finally the phase-locked result is obtained.

[0026] In some embodiments, the frequency feedforward phase-locked loop further includes a DC bias compensation module for outputting an angular frequency ω. o (k) and sampling frequency f s The number of periodic sampling points N is calculated, the DC bias is calculated using the periodic mean algorithm, and the bypass sampling signal is biased and compensated at the input of the phase-locked loop.

[0027] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein at least one instruction, at least one program, code set, or instruction set is stored therein, the instruction, program, code set, or instruction set being loaded and executed by a processor to perform the operations performed in a frequency feedforward method applied to a single-phase UPS phase-locked loop as described above.

[0028] The beneficial effects of this invention are:

[0029] This invention provides a frequency feedforward method. The feedforward is taken from the output frequency value and is used to compensate for the center frequency. It can re-track the bypass when the frequency changes, so that the inverter voltage output by the UPS can quickly and accurately track the bypass. Attached Figure Description

[0030] Figure 1 This is a control block diagram of a frequency feedforward method applied to a single-phase UPS phase-locked loop according to an embodiment of the present invention.

[0031] Figure 2 The diagram shows a simulated bypass sampling signal according to an embodiment of the present invention. The input bypass signal in the diagram contains a 50V third harmonic and a 100Vdc DC bias. At t=0.5s, the frequency changes abruptly from 50Hz to 60Hz.

[0032] Figure 3 for Figure 2 The quadrature component diagram of the output of the second-order generalized integrator of the simulated bypass sampling signal.

[0033] Figure 4 for Figure 2 Frequency convergence plot when the frequency of the bypass sampling signal changes abruptly.

[0034] Figure 5 for Figure 2 The frequency steady-state diagram of the simulated bypass sampling signal.

[0035] Figure 6 for Figure 2 Phase tracking diagram when the frequency of the bypass sampling signal changes abruptly. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to represent selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0037] The present invention will be described in detail below with reference to the embodiments.

[0038] Please see Figure 1 According to one embodiment of the present invention, a frequency feedforward method for a single-phase UPS phase-locked loop is provided, comprising the following steps:

[0039] The bypass voltage is sampled to obtain the bypass sampling signal U. byp(k) and input to the input terminal of the phase-locked loop, where the sampling frequency is f. s k represents the sampling sequence number;

[0040] The bypass sampling signal is input into a second-order generalized integral module, and a pair of orthogonal components U corresponding to the bypass sampling signal are obtained based on the stationary coordinate system constructed by the second-order generalized integral module. α (k) and U β (k);

[0041] According to U α (k) and U β (k), the Q-axis voltage component U in the two-phase stationary coordinate system is calculated using coordinate formulas. q (k), by a given value and U q (k) The feedback value yields the error value ε, which, after PI adjustment, is output at the center angular frequency ω. c (k) The accumulated output angular frequency ω o (k);

[0042] By measuring the output angular frequency ω o (k) is integrated to obtain the phase information θ of the input bypass sampling signal.

[0043] In some embodiments, the method further includes the step of: outputting angular frequency ω o (k) and sampling frequency f s The number of periodic sampling points N is calculated, the DC bias is calculated using a period averaging algorithm, and bias compensation is applied to the bypass sampling signal at the input of the phase-locked loop. In some embodiments, the formula for calculating the number of periodic sampling points N is N = 2 * π * f s / ω o .

[0044] When the input bypass sampling voltage signal has a DC bias, it can cause problems such as low phase-locked loop (PLL) accuracy. The feedforward frequency of this invention is taken from the output frequency value. The feedforward is used to compensate for the center frequency and calculate the bias, enabling re-tracking of the bypass even under frequency abrupt changes or the presence of a DC bias. Furthermore, when the conditioning circuit experiences a bias in the bypass voltage sampling due to temperature drift or other factors, the PLL output frequency fluctuation is small, resulting in high tracking accuracy. Therefore, the inverter voltage output by the UPS of this invention can quickly and accurately track the bypass.

[0045] In some embodiments, the method further includes the step of: initializing the phase-locked loop upon initial use or power-on, and setting the bypass sampling signal U... byp The phase θ(k) is 0, and the angular frequency ω o (k)=ω c(k) = A, where A is the angular frequency corresponding to the power grid frequency. For example, the operating frequency of my country's power grid is 50Hz, then its corresponding angular frequency is 100π.

[0046] In some embodiments, the orthogonal component U is obtained. α (k) and U β The formula for calculating (k) is as follows:

[0047]

[0048] Where the coefficient k is 0.5;

[0049] Calculate the Q-axis voltage component U in a two-phase stationary coordinate system q The formula for (k) is as follows:

[0050]

[0051] In some embodiments, the output after PI regulation is related to the center angular frequency ω. c (k) Accumulation yields the output angular frequency ω o (k), where ω c (k)=a*ω o (k)+(1-a)ω c (k-1), where a is the filter coefficient.

[0052] In some embodiments, the proportional parameter of the PI adjustment is k. p =0.1, integral coefficient k i =0.1.

[0053] The following is an exemplary embodiment of the present invention. It should be understood that the specific embodiment described herein is only for explaining the present invention and is not intended to limit the present invention.

[0054] A frequency feedforward method applied to a single-phase UPS phase-locked loop includes the following steps:

[0055] S1. Initialization: Assume the phase θ(k) of the bypass sampling voltage is 0, and the angular frequency ω... o (k) = 100π;

[0056] S2. Sample the bypass voltage; the sampled signal is U. byp (k), where k is the sampling sequence number and the sampling frequency is f. s ;

[0057] S3, DC bias compensation: via output angular frequency ω o (k) and sampling frequency f s The number of periodic sampling points is calculated to be N = 2πf s / ω oThe DC bias is calculated and compensated using the periodic mean algorithm.

[0058] S4, Orthogonal Components: The bypass sampled signal is used as the input to the second-order generalized integrator module, and a pair of orthogonal components U are obtained by using the formula. α and U β The formula is as follows:

[0059]

[0060] In the above formula, the coefficient of k is 0.5;

[0061] S5, according to U α (k) and U β (k), the Q-axis voltage component U in the two-phase stationary coordinate system can be calculated using the coordinate formula. q (k);

[0062]

[0063] S6. The phase-locked loop process is actually a process of synchronizing the rotating coordinate system with the bypass voltage. When U q When (k) is zero, it indicates that the phase-locked loop has converged, as determined by the given value. and U q (k) The feedback value yields the error value ε, which, after PI adjustment, is output at the center frequency ω. c (k) Accumulation yields the output frequency ω o (k), where ω c (k)=a*ω o (k)+(1-a)ω c (k-1), filter coefficient a = 0.001, proportional parameter of PI control is k p =0.1, integral coefficient k i =0.1;

[0064] S7. By integrating the output frequency, the phase information θ(k) of the input bypass voltage signal is obtained as ∫ω. o (k);

[0065] S8. Repeat steps 2 to 7 to obtain the phase and frequency information at the next moment. Specific implementation examples:

[0067] Simulation of bypass voltage signal U byp =500Sin(ω) o t)+50Sin(3ω o t)+100, sampling frequency f s At 10kHz, the waveform is as follows Figure 2 As shown; the analog signal is fed into a second-order generalized integrator, generating a waveform as shown. Figure 3As shown; at t = 0.5s, the frequency abruptly changes from 50Hz to 60Hz. Figure 4 It can be seen that the frequency converges and stabilizes after about 0.3 seconds, while a phase-locked loop without frequency feedforward may require more than ten seconds to stabilize the frequency; after phase-locking is completed, the phase-locking accuracy can be obtained from the frequency stability graph ( Figure 5 It can be seen that the phase-locked loop (PLL) with DC bias compensation fluctuates at a frequency of 0.01 rad / s, while the frequency fluctuation of the PLL without DC bias compensation reaches 0.3 rad / s. After a frequency abrupt change, the PLL output phase begins to converge after approximately 0.25 seconds. It can be observed that the single-phase UPS PLL frequency feedforward method proposed in this invention can not only converge rapidly under conditions of frequency abrupt changes, but also maintain high-precision phase-locking performance even in bypass voltage signals containing DC bias.

[0068] According to another aspect of the present invention, a frequency feedforward phase-locked loop (PLL) for use in a single-phase UPS is provided, comprising: a phase detector 1, a loop filter 2, a frequency feedforward module 3, and a voltage-controlled oscillator 4. The phase detector 1 is used to analyze the sampled bypass sampling signal U. byp (k) is transformed to obtain the orthogonal component U. α (k) and U β (k), and perform coordinate transformation to obtain the Q-axis voltage component U. q (k), by a given value and U q (k) The feedback value yields the error value ε, where the sampling frequency is f. s k represents the sampling sequence number. Q-axis voltage component U q (k) is used as the input to the loop filter 2, and the output value is obtained after PI adjustment. The frequency feedforward module 3 is used to compare the PI-adjusted output value with the center angular frequency ω. c (k) After accumulation, the output angular frequency ω is obtained. o (k). Output angular frequency ω o (k) Under the action of the voltage-controlled oscillator 4, the angle is converted, and finally the phase-locked result is obtained. In some embodiments, the frequency feedforward module 3 includes a low-pass filter (LPF) to filter the center frequency before accumulating it with the PI output value, ω c (k)=a*ω o (k)+(1-a)ω c (k-1), filter coefficient a = 0.001.

[0069] In some embodiments, the frequency feedforward phase-locked loop further includes a DC bias compensation module 5, used to output angular frequency ω o (k) and sampling frequency f s The number of periodic sampling points N is calculated, the DC bias is calculated using the periodic mean algorithm, and the bypass sampling signal is biased and compensated at the input of the phase-locked loop.

[0070] Furthermore, this embodiment of the invention also proposes a computer-readable storage medium storing a data processing program, which can be executed by one or more processors. The functions or operation steps implemented are largely the same as those in the above embodiments, and will not be repeated here.

[0071] It should be noted that the sequence numbers of the above embodiments of the present invention are merely for descriptive purposes and do not represent the superiority or inferiority of the embodiments. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, apparatus, article, or method that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, apparatus, article, or method. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, apparatus, article, or method that includes that element.

[0072] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0073] The implementation schemes in the above embodiments can be further combined or replaced, and the embodiments are merely descriptions of preferred embodiments of the present invention, and are not intended to limit the concept and scope of the present invention. Various changes and improvements made by those skilled in the art to the technical solutions of the present invention without departing from the design concept of the present invention shall fall within the protection scope of the present invention.

Claims

1. A frequency feed forward method applied to a single phase UPS phase locked loop, characterized in that Includes the following steps: The bypass voltage is sampled to obtain a bypass sampling signal The sampling frequency is The sampling sequence number is represented​​ input the bypass sampling signal into a second-order generalized integration module, and obtain a pair of quadrature components corresponding to the bypass sampling signal according to a stationary coordinate system constructed based on the second-order generalized integration module and ; according to and The Q-axis voltage component in the two-phase stationary coordinate system is calculated using coordinate formulas. By a given value and Feedback value to obtain error value After PI regulation, the output frequency is the same as the center angular frequency. The accumulated output angular frequency ,in = , a These are the filter coefficients; by integrating the output angular frequency to obtain phase information of the input bypass sampling signal ; By output angular frequency and sampling frequency The number of periodic sampling points N is calculated, the DC bias is calculated using the periodic mean algorithm, and the bypass sampling signal is biased and compensated at the input of the phase-locked loop.

2. The frequency feed forward method applied to a single phase UPS phase locked loop of claim 1, wherein, It also includes the following steps: The phase-locked loop is initialized upon initial use or power-on, and the bypass sampling signal is set to... ( phase angular frequency , where A is the angular frequency corresponding to the power grid frequency.

3. The frequency feed forward method for single phase UPS phase locked loop as claimed in claim 1 wherein, The calculation formula of the periodic sampling point number N is .

4. The frequency feed forward method for single phase UPS phase locked loop according to claim 1, wherein, Obtaining quadrature components And The calculation formula is as follows: Where the coefficient k is 0.5; Calculate the Q-axis voltage component in a two-phase stationary coordinate system The formula is as follows: 。 5. The frequency feed forward method for single phase UPS phase locked loop as claimed in claim 1 wherein, The PI regulated proportional parameter is , integral coefficient .

6. A phase locked loop, applying the frequency feed forward method of single phase UPS phase locked loop of above claims 1-5, characterized by include: Phase detector, loop filter, frequency feedforward module, and voltage-controlled oscillator. The phase detector is used to analyze the bypass sampling signal obtained from the sampling process. ( The orthogonal components are obtained by transformation. and The Q-axis voltage component was obtained by performing a coordinate transformation on it. By a given value and Feedback value to obtain error value The sampling frequency is , Indicates the sampling sequence number; Q-axis voltage component as an input of the loop filter and the output value is obtained after PI regulation. The frequency feedforward module is used to compare the PI-adjusted output value with the center angular frequency. The output angular frequency is obtained after accumulation. ; Output angular frequency Converts into angle under the action of the voltage-controlled oscillator, and finally gets the phase-locked result.

7. A phase-locked loop as claimed in claim 6, characterized in that It also includes a DC bias compensation module, used to output angular frequency and sampling frequency The number of periodic sampling points N is calculated, the DC bias is calculated using the periodic mean algorithm, and the bypass sampling signal is biased and compensated at the input of the phase-locked loop.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores at least one instruction, at least one program, code set, or instruction set, which is loaded and executed by a processor to perform the operations described in any one of claims 1-5 in a frequency feedforward method applied to a single-phase UPS phase-locked loop.

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