Supercapacitor charging and discharging control system based on nonlinear PI and peak current

Abstract

The present application discloses a supercapacitor charge and discharge control system based on nonlinear PI and peak current, the system includes: an IGBT half-bridge module, a supercapacitor CSC and a control module; two bridge arms are arranged in the IGBT half-bridge module, wherein the first bridge arm is connected to the positive electrode of the supercapacitor CSC through a first inductor L1, and the second bridge arm is connected to the negative electrode of the supercapacitor CSC through a second inductor L2 and a resistor R connected in series; the control module is connected to the control end of the IGBT half-bridge module, and the control module is used to send a drive signal to the IGBT transistor in the IGBT half-bridge module. Through the technical solution in the present application, the problem of high hardware cost caused by the need to use large inductors during the supercapacitor charge and discharge process is solved, and it helps to improve the efficiency of supercapacitor charge and discharge.

Description

Technical Field

[0001] The present application relates to the technical field of supercapacitor energy storage, and in particular, to a supercapacitor charge and discharge control system based on nonlinear PI and peak current. Background Art

[0002] Supercapacitor is a new type of energy storage component. It has a higher specific energy than conventional capacitors, and a higher specific power and service life than batteries. Supercapacitors have excellent performance in performance, safety, maintenance-free and environmental protection, and are ideal energy storage components.

[0003] During the circuit breaker breaking capacity test, since the instantaneous power when the circuit breaker is breaking is large, if the power grid is directly powered, it will have a large impact on the grid and affect the normal operation of other equipment. Therefore, the energy storage capacity of the supercapacitor can be used. After the supercapacitor is fully charged, the AC current required for circuit breaker breaking can be realized through the corresponding conversion device.

[0004] In the prior art, a continuous current method is usually used to control the charge and discharge of supercapacitors. Since the inductance needs to be large enough to make the current continuous, a large inductor needs to be used in the charge and discharge process, resulting in high hardware costs and low charging efficiency. Summary of the invention

[0005] The purpose of this application is to solve the problem of high hardware cost due to the need to use large inductance during the charging and discharging process of supercapacitors, and to improve the efficiency of supercapacitor charging and discharging.

[0006] The technical solution of the present application is: to provide a supercapacitor charge and discharge control system based on nonlinear PI and peak current, the system includes: an IGBT half-bridge module, a supercapacitor C SC and a control module; the IGBT half-bridge module is provided with two bridge arms, wherein the first bridge arm is connected to the super capacitor C through the first inductor L1 SC The second bridge arm is connected to the super capacitor C through the second inductor L2 and the resistor R in series. SC The control module is connected to the control end of the IGBT half-bridge module, and the control module is used to send a drive signal to the IGBT transistor in the IGBT half-bridge module.

[0007] In any of the above technical solutions, further, the control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module, specifically including: when the super capacitor C SC When charging, when judging the supercapacitor C SCWhen the voltage of the super capacitor C is less than the given voltage, the control module sends a first drive signal to the IGBT half-bridge module to make the IGBT half-bridge module output a constant current value to charge the super capacitor C SC to charge.

[0008] In any of the above technical solutions, further, the control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module, specifically including: when the super capacitor C SC When charging, when judging the supercapacitor C SC When the voltage reaches a given voltage, the control module sends a second drive signal to the IGBT half-bridge module to make the IGBT half-bridge module output a constant power value charging current to the supercapacitor C SC to charge.

[0009] In any of the above technical solutions, further, the control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module based on the PWM control signal, and the control module is also provided with a double closed-loop control loop, wherein the outer loop control loop is a voltage outer loop control loop, the inner loop control loop is a current inner loop control loop, and the voltage outer loop control loop is used to calculate the supercapacitor C SC The current inner loop control loop is used to control the charging current given value and the super capacitor C SC The charging sampling current generates a forced signal to turn off the output of the PWM control signal.

[0010] In any of the above technical solutions, further, a Hall voltage sensor is provided in the voltage outer loop control circuit, and the Hall voltage sensor is used to detect the super capacitor C SC The output voltage of the voltage outer loop control loop is used to calculate the supercapacitor C SC The charging current given value, the calculation formula of the charging current given value is:

[0011]

[0012] In the formula, e c is the voltage control error, k p is the proportionality coefficient, k i is the integral coefficient, i cref is the given value of charging current, where the voltage control error e c is the supercapacitor C SC The difference between the output voltage and the given output voltage, the charging current given value is transmitted to the current inner loop control loop, so that the control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module.

[0013] In any of the above technical solutions, further, the current inner loop control loop is implemented by a comparator, and the same-direction input terminal of the comparator is connected to the super capacitor C SC The current sampling end is provided with a current sensor, which is used to collect the current of the super capacitor C SC The charging sampling current, the inverting input terminal of the comparator is connected to the output terminal of the voltage outer loop control loop, and the comparator is used to generate a forced signal when it is determined that the charging sampling current is greater than the given value of the charging current.

[0014] In any of the above technical solutions, further, the control module also includes: a low-pass filter; the low-pass filter is arranged on the supercapacitor C SC Between the current sampling terminal and the inner control loop, a low-pass filter is used to filter the charging sampling current.

[0015] In any of the above technical solutions, further, the IGBT half-bridge module includes four IGBT transistors and a DC bus capacitor C dc , wherein the emitter of the first IGBT transistor Q1 is connected to the collector of the second IGBT transistor Q2, and the collector of the first IGBT transistor Q1 and the emitter of the second IGBT transistor Q2 are connected in parallel to the DC bus capacitor C dc The first IGBT transistor Q1 and the second IGBT transistor Q2 are recorded as the first bridge arm, the emitter of the first IGBT transistor Q1 is connected to the first inductor L1, and the first bridge arm is used to connect the super capacitor C SC The emitter of the third IGBT transistor Q3 is connected to the collector of the fourth IGBT transistor Q4, and the collector of the third IGBT transistor Q3 and the emitter of the fourth IGBT transistor Q4 are connected in parallel to the DC bus capacitor C dc The third IGBT transistor Q3 and the fourth IGBT transistor Q4 are recorded as the second bridge arm, the emitter of the third IGBT transistor Q3 is connected to the second inductor L2, and the second bridge arm is used to connect the super capacitor C SC Discharge.

[0016] In any of the above technical solutions, further, the IGBT half-bridge module also includes four diodes, the two ends of any IGBT transistor are connected in parallel with a diode, the collector of the IGBT transistor is connected to the cathode of the diode, and the emitter of the IGBT transistor is connected to the anode of the diode, wherein when the first bridge arm is connected to the super capacitor C SC When charging, if the first IGBT transistor Q1 is turned off, the diode connected in parallel with the second IGBT transistor Q2 is used for freewheeling, and the diode connected in parallel with the first IGBT transistor Q1 is used to cooperate with the second bridge arm to charge the super capacitor C SC Perform chopper discharge.

[0017] In any of the above technical solutions, further, the control module is connected to the gates of the first IGBT transistor Q1 , the second IGBT transistor Q2 , the third IGBT transistor Q3 and the fourth IGBT transistor Q4 respectively.

[0018] The beneficial effects of this application are:

[0019] The technical solution in this application adopts the voltage outer loop fractional-order PI control and the current inner loop peak current control, and is combined with an IGBT half-bridge module with two bridge arms. Not only is the circuit structure simple, but it can also be realized in the supercapacitor C SC When charging, a smaller inductor is selected, which reduces the hardware cost. In addition, a smaller inductor can significantly improve the efficiency of supercapacitor charging and discharging. The current inner loop uses the peak current of the charging sampling current as the control parameter, which makes the supercapacitor C SC During the charging process, the charging current will not exceed the set maximum current value, and the control effect is safe and reliable. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The advantages of the above and / or additional aspects of the present application will become apparent and easily understood in the description of the embodiments in conjunction with the following drawings, in which:

[0021] Figure 1 is a schematic block diagram of a supercapacitor charge and discharge control system based on nonlinear PI and peak current according to an embodiment of the present application;

[0022] Figure 2 is a schematic diagram of supercapacitor charging current simulation according to an embodiment of the present application;

[0023] Figure 3 is a schematic block diagram of a dual closed-loop control system according to an embodiment of the present application;

[0024] Figure 4 is a schematic diagram of a sampling circuit according to an embodiment of the present application;

[0025] Figure 5 It is a simulation schematic diagram of a charging waveform according to an embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0027] In the following description, many specific details are elaborated to facilitate a full understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Therefore, the protection scope of the present application is not limited to the specific embodiments disclosed below.

[0028] This embodiment provides a supercapacitor charge and discharge control system based on nonlinear PI and peak current, the system includes: an IGBT half-bridge module, a supercapacitor C SC and a control module; the IGBT half-bridge module is provided with two bridge arms, wherein the first bridge arm is connected to the super capacitor C through the first inductor L1 SC The second bridge arm is connected to the super capacitor C through the second inductor L2 and the resistor R in series. SC The control module is connected to the control end of the IGBT half-bridge module, and the control module is used to send a drive signal to the IGBT transistor in the IGBT half-bridge module.

[0029] Furthermore, the IGBT half-bridge module includes four IGBT transistors and a DC bus capacitor C dc , wherein the emitter of the first IGBT transistor Q1 is connected to the collector of the second IGBT transistor Q2, and the collector of the first IGBT transistor Q1 and the emitter of the second IGBT transistor Q2 are connected in parallel to the DC bus capacitor C dc The first IGBT transistor Q1 and the second IGBT transistor Q2 are recorded as the first bridge arm, the emitter of the first IGBT transistor Q1 is connected to the first inductor L1, and the first bridge arm is used to connect the super capacitor C SC The emitter of the third IGBT transistor Q3 is connected to the collector of the fourth IGBT transistor Q4, and the collector of the third IGBT transistor Q3 and the emitter of the fourth IGBT transistor Q4 are connected in parallel to the DC bus capacitor C dc The third IGBT transistor Q3 and the fourth IGBT transistor Q4 are recorded as the second bridge arm, the emitter of the third IGBT transistor Q3 is connected to the second inductor L2, and the second bridge arm is used to connect the super capacitor C SC Discharge.

[0030] Preferably, the IGBT half-bridge module also includes four diodes, both ends of any IGBT transistor are connected in parallel with a diode, the collector of the IGBT transistor is connected to the cathode of the diode, and the emitter of the IGBT transistor is connected to the anode of the diode, wherein, when the first bridge arm charges the supercapacitor CSC, if the first IGBT transistor Q1 is turned off, the diode connected in parallel with the second IGBT transistor Q2 is used for freewheeling, and the diode connected in parallel with the first IGBT transistor Q1 is used to cooperate with the second bridge arm to perform chopping discharge on the supercapacitor CSC.

[0031] Preferably, the control module is connected to the gates of the first IGBT transistor Q1 , the second IGBT transistor Q2 , the third IGBT transistor Q3 and the fourth IGBT transistor Q4 , respectively.

[0032] like Figure 1 As shown, the first IGBT transistor Q1, the second IGBT transistor Q2, the third IGBT transistor Q3, and the fourth IGBT transistor Q4 form two IGBT half-bridge modules, wherein the first IGBT transistor Q1 and the third IGBT transistor Q3 are upper tubes of the two IGBT half-bridge modules, and their collectors are connected to the DC bus capacitor C dc The positive electrode of the second IGBT transistor Q2 and the fourth IGBT transistor Q4 are the lower tubes of the two IGBT half-bridge modules, and their emitters are connected to the DC bus capacitor C dc The emitters of the first IGBT transistor Q1 and the third IGBT transistor Q3 are connected to the input sides of the first inductor L1 and the second inductor L2 respectively. The first inductor L1 and the second inductor L2 are filter inductors. The output side of the first inductor L1 is connected to the super capacitor C SC The positive electrode of the second inductor L2 is connected to the input side of the resistor R, and the output of the resistor R is connected to the super capacitor C SC The negative electrode of the resistor R is the discharge resistor.

[0033] Based on the above embodiments, this embodiment shows a super capacitor C SC The implementation method of charge and discharge control, the control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module, specifically includes:

[0034] When the super capacitor C SC When charging, when judging the supercapacitor C SC When the voltage of the super capacitor C is less than the given voltage, the control module sends a first drive signal to the IGBT half-bridge module to make the IGBT half-bridge module output a constant current value to charge the super capacitor C SC to charge.

[0035] Furthermore, the control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module, which specifically includes:

[0036] When the super capacitor C SC When charging, when judging the supercapacitor C SC When the voltage reaches a given voltage, the control module sends a second drive signal to the IGBT half-bridge module to make the IGBT half-bridge module output a constant power value charging current to the supercapacitor C SC to charge.

[0037] Specifically, the supercapacitor C SC The charging process is divided into two stages:

[0038] In the supercapacitor C SC When charging, the first bridge arm #1 works and the second bridge arm #2 does not work. SC The capacitance is very large, so the supercapacitor C SC The voltage rises slowly. The specific process is as follows Figure 2 As shown, where u g It is the driving signal sent by the control module to the four IGBT transistors in the IGBT half-bridge module.

[0039] At time t1, the gate trigger signal of the first IGBT transistor Q1 of the upper bridge arm of the first bridge arm #1 is controlled. At this time, the first IGBT transistor Q1 is turned on and starts to supply power to the super capacitor C SC Charging, due to the supercapacitor C SC The capacitance is large. In one switching cycle, the supercapacitor C SC The voltage remains basically unchanged, so the rate of increase of the inductor current is:

[0040]

[0041] In the formula, i c is the supercapacitor charging current; u dc is the DC bus voltage; u c is the voltage of the supercapacitor, and L1 is the filter inductor.

[0042] At t2, the charging current rises to the maximum allowed current I max At this time, the driving signal of the first IGBT transistor Q1 of the upper bridge arm of the first bridge arm #1 is removed, the first IGBT transistor Q1 is turned off, and the inductor current is continued to flow through the diode in the second IGBT transistor Q2 of the lower bridge arm of the first bridge arm #1 until the current drops to 0. During the continued flow process, the voltage borne by the first inductor L1 is negative. The supercapacitor C SC The rate of change of voltage and current is:

[0043]

[0044] In this embodiment, the super capacitor C SC The discharge process is divided into two stages: the first stage adopts constant current discharge to quickly discharge the supercapacitor C SC The voltage of the super capacitor C is reduced to a safe voltage; the second stage directly uses the discharge resistor to discharge. The specific working process is: during discharge, the second bridge arm #2 performs chopping and discharges through the resistor R, the first bridge arm #1 does not work, and the super capacitor C SCThe discharge current passes through the diode of the first IGBT transistor Q1 in the upper bridge arm of the first bridge arm #1, and then chopped and discharged through the second bridge arm #2.

[0045] In this embodiment, the control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module based on the PWM control signal. The control module is also provided with a double closed-loop control loop, wherein the outer loop control loop is a voltage outer loop control loop, and the inner loop control loop is a current inner loop control loop. The voltage outer loop control loop is used to calculate the supercapacitor C SC The charging current given value, wherein a Hall voltage sensor is provided in the voltage outer loop control loop, and the Hall voltage sensor is used to detect the supercapacitor C SC The output voltage of the voltage outer loop control loop is used to calculate the supercapacitor C SC The charging current given value, the calculation formula of the charging current given value is:

[0046]

[0047] In the formula, e c is the voltage control error, k p is the proportionality coefficient, k i is the integral coefficient, i cref is the given value of charging current, where the voltage control error e c is the supercapacitor C SC The difference between the output voltage and the given output voltage,

[0048] In this embodiment, the charging current given value is transmitted to the current inner loop control circuit, so that the control module sends a driving signal to the IGBT transistor in the IGBT half-bridge module.

[0049] In this embodiment, the current inner loop control loop is used to control the current according to the given value of the charging current and the super capacitor C SC The charging sampling current generates a forced signal to turn off the output of the PWM control signal. The current inner loop control loop is implemented by a comparator, and the same-direction input terminal of the comparator is connected to the supercapacitor C SC The current sampling end is provided with a current sensor, which is used to collect the current of the super capacitor C SC The charging sampling current, the inverting input terminal of the comparator is connected to the output terminal of the voltage outer loop control loop, and the comparator is used to generate a forced signal when it is determined that the charging sampling current is greater than the given value of the charging current.

[0050] Specifically, Figure 3 As shown, the super capacitor C SC The charge and discharge control system adopts a dual closed-loop control of voltage outer loop and current inner loop, and its specific implementation is as follows:

[0051] In this embodiment, the voltage outer loop control loop is implemented by a nonlinear PI controller with fractional-order PI control, and the Hall voltage sensor detects the supercapacitor C SC The output voltage u c , with the given output voltage u of the system cref Compare and calculate the difference between the two as the voltage control error e c , then take the cube root of the voltage control error e c 3 , input the cube root of the voltage control error into the proportional part of the nonlinear PI controller to obtain the first output current given component;

[0052] The cube root of the control error is input into the integral part of the nonlinear PI controller to obtain the second output current given component;

[0053] The first and second output current given components of the nonlinear PI controller are summed to obtain the supercapacitor C SC Charging current given value i cref Therefore, the supercapacitor C SC The calculation formula for the given value of the charging current is:

[0054]

[0055] In the formula, e c is the voltage control error, k p is the proportionality coefficient, k i is the integral coefficient, i cref is the given value of charging current.

[0056] In this embodiment, the current inner loop adopts peak current control, which is mainly implemented by the TMS320F28377D chip and its peripheral circuits. The specific implementation method is as follows: the CMPSS comparator in the TMS320F28377D chip has two external comparison inputs, namely the same direction input terminal (CMPINxP and CMPINxN) and the reverse input terminal.

[0057] It should be noted that, in this embodiment, the negative input terminal of the CMPSS comparator selects the internal DAC output of the TMS320F28377D chip.

[0058] After comparison by the CMPSS comparator, the output signal is synchronized and filtered, and there are four outputs, namely: high-side synchronous filter output signals CTRIPH and CTRIPOUTH and low-side synchronous filter output signals CTRIPL and CTRIPOUTL.

[0059] Set the charging current given value i of the voltage outer loop output crefAs the signal output by the internal DAC, it is input to the inverting input of the internal comparator of the CMPSS comparator. Based on the supercapacitor C sc Charging sampling current i c As the non-inverting input of the internal comparator of the CMPSS comparator.

[0060] External current signal (charging sampling current i c ) is input from the CMPINxP pin and is compared with the internal DAC output signal (charging current given value i cref ) for comparison, and then configure the output of the CMPSS comparison module as CTRIPH. It should be noted that the CTRIPH is configured as an asynchronous output.

[0061] In this embodiment, CTRIPH is selected as the input of ePWM through the digital comparison output selection logic registers DCTRIIPSEL and DCTRIPSEL. When the supercapacitor charging sampling current is small, the default output of CTRIPH is low. When the supercapacitor charging sampling current is greater than the internal DAC setting current, the CTRIPH output is high. Therefore, the effective level of CTRIPH is high.

[0062] The enhanced pulse width modulation module ePWM in the TMS320F28377D chip is configured with the corresponding frequency and duty cycle, and the counting mode is set, wherein it is set that when the counter value is equal to zero, the first IGBT transistor Q1 of the upper bridge arm of the first bridge arm #1 is turned on, the third IGBT transistor Q3 of the upper bridge arm of the second bridge arm #2 is turned off, and the lower bridge arms of the two bridge arms are always kept off. When the CTRIPH signal of the CMPSS comparator is input, the corresponding forced signal is generated according to the CTRIPH signal to control the IGBT half-bridge module.

[0063] Specifically, when the CTRIPH signal is at a low level, the IGBT half-bridge module does not operate. When the CTRIPH signal is at a high level, that is, at time t2, the charging current rises to the maximum allowed current I max When the PWM control signal is forced low, the output of the PWM control signal is turned off, so that the IGBT half-bridge module is turned off.

[0064] On the basis of the above embodiment, this embodiment also shows an implementation method of a sampling circuit, which is composed of a socket circuit, a low-pass filter and a DC bias circuit connected in series, wherein the low-pass filter is a second-order voltage-controlled active low-pass filter, and the low-pass filter is arranged between the current sampling end of the supercapacitor CSC and the inner loop control loop, and the low-pass filter is used to filter the charging sampling current.

[0065] Specifically, Figure 4 As shown, the supercapacitor C is collected through the current sensor SC The charging sampling current is input to the sampling circuit through the socket circuit. The socket circuit is mainly implemented by the Molex chip and its peripheral circuits, and the pin 6 of the Molex chip is used as the input pin. The input pin is also connected to the input end of the low-pass filter, and the sampling resistor R125 and one end of the capacitor C131 are connected between the two, and the other ends of the sampling resistor R125 and the capacitor C131 are grounded.

[0066] The low-pass filter is mainly implemented by the operator U35B and its peripheral circuits. The same-direction input terminal of the operator U35B is connected to the output pin of the socket circuit through the series-connected resistors R122 and R123, and the reverse input terminal of the operator U35B is grounded through the resistor R126. The same-direction input terminal of the operator U35B is also grounded through the capacitor C132. The operator U35B is implemented by the TL084 chip.

[0067] The output end of the operator U35B is connected between the resistor R122 and the resistor R123 through the capacitor C128, and the output end of the operator U35B is also connected to the reverse input end of the operator U35B through the resistor R128. The output end of the operator U35B is also connected to the DC bias circuit.

[0068] The DC bias circuit includes a resistor R124, a resistor R121 and a resistor R127, wherein the resistor R121 and the resistor R127 are connected in series, one end of the resistor R121 is connected to the power supply VADC_REF, one end of the resistor R127 is grounded, one end of the resistor R124 is connected to the output end of the operator U35B, the other end of the resistor R124 is connected between the resistor R121 and the resistor R127, and the other end of the resistor R124 is also connected to the non-inverting input end of the CMPSS comparator.

[0069] In this embodiment, the current sensor adopts CHB-100A, whose rated measuring current is 100A and the output signal is the rated current 50mA. sc Charging sampling current i cThe current signal is sampled by the current sensor CHB-100A and input into the circuit through the 6-pin of the socket. The current signal is converted into a voltage signal through the 60Ω sampling resistor R125, and the voltage signal is used as the input of the second-order voltage-controlled active low-pass filter. The second-order voltage-controlled active low-pass filter consists of an operator and corresponding peripheral circuits. The same-direction input pin No. 5 of the operator is connected to a 1kΩ resistor R123 and a grounded capacitor C132. The reverse input terminal of the operator is connected to two 4.7kΩ resistors, of which resistor R126 is grounded, and the other resistor R128 is connected to the output of the operator. The output pin No. 7 of the operator is also connected to a 4.7nf capacitor C128. The output of the operator is output to the same-direction input terminal of the CMPSS comparator through a DC bias circuit composed of R124, R121 and a 3V power supply VADC_REF.

[0070] The condition for critical continuity of charging current is that the current rises from 0 to the maximum current in the first half of the switching cycle, and the current drops from the maximum current to 0 in the second half of the switching cycle. Figure 2 As shown, in this embodiment, the switching frequency of the IGBT transistor is set to 5kHz, and the minimum value of the inductor L1 is taken according to the critical point of the current waveform:

[0071]

[0072] Among them U max is the maximum value of the charging voltage, I max is the maximum value of the charging current, T s is the switching cycle.

[0073] Through simulation experiments, the charge and discharge control system in this embodiment can use a small inductor to achieve the supercapacitor C SC Charging speed, such as Figure 5 As shown, the horizontal axis is 50s, the vertical axis is 100V, and the inductance L1 is 1mH. It can be seen that the supercapacitor C SC It only takes 250s for the voltage across the battery to rise to 500V, which means it charges faster.

[0074] The above describes the technical solution of the present application in detail in combination with the accompanying drawings. The present application proposes a supercapacitor charge and discharge control system based on nonlinear PI and peak current, the system comprising: an IGBT half-bridge module, a supercapacitor CSC and a control module; two bridge arms are provided in the IGBT half-bridge module, wherein the first bridge arm is connected to the positive electrode of the supercapacitor CSC through the first inductor L1, and the second bridge arm is connected to the negative electrode of the supercapacitor CSC through the second inductor L2 and the resistor R in series; the control module is connected to the control end of the IGBT half-bridge module, and the control module is used to send a drive signal to the IGBT transistor in the IGBT half-bridge module. Through the technical solution in the present application, the problem of high hardware cost caused by the need to use large inductors during the supercapacitor charge and discharge process is solved, and it helps to improve the efficiency of supercapacitor charge and discharge.

[0075] The steps in this application can be adjusted in order, combined, and deleted according to actual needs.

[0076] The units in the device of the present application can be combined, divided and deleted according to actual needs.

[0077] Although the present application is disclosed in detail with reference to the accompanying drawings, it should be understood that these descriptions are merely exemplary and are not intended to limit the application of the present application. The scope of protection of the present application is defined by the appended claims and may include various modifications, alterations and equivalents made to the invention without departing from the scope and spirit of the present application.

Claims

1. A supercapacitor charging and discharging control system based on nonlinear PI and peak current, characterized in that: The system includes: IGBT half-bridge module, super capacitor C SC and a control module; The IGBT half-bridge module is provided with two bridge arms, wherein the first bridge arm is connected to the super capacitor C via the first inductor L1. SC The second bridge arm is connected to the super capacitor C through the second inductor L2 and the resistor R connected in series. SC The negative electrode; The control module is connected to the control end of the IGBT half-bridge module, and is used to send a drive signal to the IGBT transistor in the IGBT half-bridge module. The control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module based on the PWM control signal, The control module is also provided with a double closed-loop control loop, wherein the outer loop control loop is a voltage outer loop control loop, and the inner loop control loop is a current inner loop control loop. The voltage outer loop control loop is used to calculate the super capacitor C SC The charging current given value, The current inner loop control loop is used to control the charging current given value and the super capacitor C SC The charging sampling current generates a forced signal to turn off the output of the PWM control signal; The voltage outer loop control circuit is provided with a Hall voltage sensor, which is used to detect the super capacitor C SC The output voltage, The voltage outer loop control loop is used to calculate the super capacitor C SC The charging current given value is calculated as follows: ； In the formula, e c is the voltage control error, k p is the proportionality coefficient, k i is the integral coefficient, i cref is the given value of the charging current, wherein the voltage control error e c The super capacitor C SC The difference between the output voltage and the given output voltage, The charging current given value is transmitted to the current inner loop control loop, so that the control module sends a driving signal to the IGBT transistor in the IGBT half-bridge module; The IGBT half-bridge module includes four IGBT transistors and a DC bus capacitor C dc ,in, The emitter of the first IGBT transistor Q1 is connected to the collector of the second IGBT transistor Q2. The collector of the first IGBT transistor Q1 and the emitter of the second IGBT transistor Q2 are connected in parallel to the DC bus capacitor C dc The first IGBT transistor Q1 and the second IGBT transistor Q2 are recorded as the first bridge arm, the emitter of the first IGBT transistor Q1 is connected to the first inductor L1, and the first bridge arm is used to connect the super capacitor C SC Charging; The emitter of the third IGBT transistor Q3 is connected to the collector of the fourth IGBT transistor Q4. The collector of the third IGBT transistor Q3 and the emitter of the fourth IGBT transistor Q4 are connected in parallel to the DC bus capacitor C dc The third IGBT transistor Q3 and the fourth IGBT transistor Q4 are recorded as the second bridge arm, the emitter of the third IGBT transistor Q3 is connected to the second inductor L2, and the second bridge arm is used to connect the super capacitor C SC Discharge.

2. The supercapacitor charge and discharge control system based on nonlinear PI and peak current as claimed in claim 1, characterized in that: The control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module, specifically including: When the super capacitor C SC When charging, when determining that the supercapacitor C SC When the voltage of the super capacitor C is less than the given voltage, the control module sends a first drive signal to the IGBT half-bridge module to make the IGBT half-bridge module output a charging current with a constant current value to charge the super capacitor C SC to charge.

3. The supercapacitor charge and discharge control system based on nonlinear PI and peak current as claimed in claim 2, characterized in that: The control module sends a drive signal to the IGBT transistor in the IGBT half-bridge module, and specifically includes: When the super capacitor C SC When charging, when determining that the supercapacitor C SC When the voltage of the super capacitor C reaches a given voltage, the control module sends a second drive signal to the IGBT half-bridge module to make the IGBT half-bridge module output a charging current with a constant power value to charge the super capacitor C SC to charge.

4. The supercapacitor charge and discharge control system based on nonlinear PI and peak current as claimed in claim 3, characterized in that: The current inner loop control loop is implemented by a comparator, and the same-direction input end of the comparator is connected to the super capacitor C SC The current sampling end is provided with a current sensor, and the current sampling end is used to collect the current of the super capacitor C SC The charging sampling current, The inverting input terminal of the comparator is connected to the output terminal of the voltage outer loop control loop. The comparator is used to generate the forced signal when it is determined that the charging sampling current is greater than the given charging current value.

5. The supercapacitor charge and discharge control system based on nonlinear PI and peak current as claimed in claim 4, characterized in that: The control module also includes: a low-pass filter; The low-pass filter is arranged on the super capacitor C SC Between the current sampling terminal and the inner loop control loop, the low-pass filter is used to filter the charging sampling current.

6. The supercapacitor charge and discharge control system based on nonlinear PI and peak current as claimed in claim 5, characterized in that: The IGBT half-bridge module also includes four diodes, and the two ends of any IGBT transistor are connected in parallel with a diode, the collector of the IGBT transistor is connected to the cathode of the diode, and the emitter of the IGBT transistor is connected to the anode of the diode, wherein: When the first bridge arm connects the super capacitor C SC During charging, if the first IGBT transistor Q1 is turned off, the diode connected in parallel with the second IGBT transistor Q2 is used for freewheeling. The diode connected in parallel with the first IGBT transistor Q1 is used to cooperate with the second bridge arm to connect the super capacitor C SC Perform chopper discharge.

7. The supercapacitor charge and discharge control system based on nonlinear PI and peak current as claimed in claim 6, characterized in that: The control module is respectively connected to the gates of the first IGBT transistor Q1 , the second IGBT transistor Q2 , the third IGBT transistor Q3 , and the fourth IGBT transistor Q4 .

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