Method, device, electronic device and storage medium for testing circuit board

Abstract

The present disclosure provides a method, apparatus, electronic device, and storage medium for testing circuit boards. The method includes: obtaining a first test item list corresponding to a first circuit board to be tested; determining a second circuit board to be tested corresponding to the first circuit board to be tested based on the test items that have changed in the first test item list; constructing a first plane model corresponding to the first circuit board to be tested and a second plane model corresponding to the second circuit board to be tested; comparing the first plane model and the second plane model to generate target test items; the target test items are used to test the circuit board.

Description

Technical Field

[0001] The present disclosure relates to the field of circuit board testing, and in particular to a method, device, electronic device, and storage medium for testing a circuit board. Background Art

[0002] As a crucial component of the electronics industry, circuit boards undoubtedly play a key role in the continuous development of various electronic products. Circuit board quality can directly impact product quality and cost, and testing circuit boards is an effective way to assess the quality of circuit board design and manufacturing.

[0003] Therefore, it is extremely important to test the circuit board, and improving the test efficiency and accuracy of the circuit board is a goal that has been pursued. Summary of the Invention

[0004] The present disclosure provides a method, device, electronic device, and storage medium for testing a circuit board, to at least solve the above technical problems existing in the prior art.

[0005] According to a first aspect of the present disclosure, a method for testing a circuit board is provided, the method comprising: obtaining a first test item list corresponding to a first circuit board to be tested; determining a second circuit board to be tested corresponding to the first circuit board to be tested based on test items that have changed in the first test item list; constructing a first plane model corresponding to the first circuit board to be tested and a second plane model corresponding to the second circuit board to be tested; comparing the first plane model with the second plane model to generate target test items; the target test items are used to test the circuit board.

[0006] In one possible implementation manner, obtaining a first test item list corresponding to the first circuit board to be tested includes: performing the following operations for each test item of the first circuit board to be tested: generating a network (NET) package corresponding to the test item; matching the NET package with the pin information of the first circuit board to be tested; if the NET package matches the pin information of the first circuit board to be tested, adding the test item corresponding to the NET package to the first test item list.

[0007] In one embodiment, the constructing of the first plane model corresponding to the first circuit board to be tested and the second plane model corresponding to the second circuit board to be tested includes: obtaining parameters of each first component in the first circuit board to be tested, the parameters of each first component including the coordinates of the component pad connected to the NET corresponding to each first component, the component position number, the component model and the component direction; constructing the first plane model based on the parameters of the first component, and different first components are presented in the first plane model based on different shapes and / or colors; obtaining parameters of each second component in the second circuit board to be tested, the parameters of each second component including the coordinates of the component pad connected to the NET corresponding to each second component, the component position number, the component model and the component direction; constructing the second plane model based on the parameters of the second component, and different second components are presented in the second plane model based on different shapes and / or colors.

[0008] In one possible implementation manner, obtaining the parameters of each first component in the first circuit board to be tested includes: matching the NET according to the pin information of the first circuit board to be tested, and if the NET matches the pin information of the first circuit board to be tested, obtaining the pad connected to the NET, the coordinates of the pad, and the component position number corresponding to the pad; obtaining the parameters of each second component in the second circuit board to be tested includes: matching the NET according to the pin information of the second circuit board to be tested, and if the NET matches the pin information of the second circuit board to be tested, obtaining the pad connected to the NET, the coordinates of the pad, and the component position number corresponding to the pad.

[0009] In one possible implementation manner, the comparing the first plane model and the second plane model to generate a target test item includes: presenting component numbers to the first plane model and the second plane model respectively according to the same component numbering strategy; comparing whether the models of the first component and the second component with the same component number in the first plane model and the second plane model are consistent; if the models of the first component and the second component with the same component number are inconsistent, determining that the test item corresponding to the second component is the target test item.

[0010] According to a second aspect of the present disclosure, a device for testing a circuit board is provided, comprising: an acquisition module for acquiring a first test item list corresponding to a first circuit board to be tested; a processing module for determining a second circuit board to be tested corresponding to the first circuit board to be tested based on a changed test item in the first test item list; a construction module for constructing a first plane model corresponding to the first circuit board to be tested and a second plane model corresponding to the second circuit board to be tested; a generation module for comparing the first plane model and the second plane model to generate target test items; the target test items are used to test the circuit board.

[0011] In one possible implementation manner, the generation module is further used to generate a NET package corresponding to the item to be tested; the acquisition module is used to match the NET package with the pin information of the first circuit board to be tested, and if the NET package matches the pin information of the first circuit board to be tested, the item to be tested corresponding to the NET package is added to the first test item list.

[0012] In one embodiment, the processing module is configured to determine a first component corresponding to a changed test item in the first test item list; replace the first component with a second component; and determine a second circuit board to be tested based on the second component.

[0013] In one embodiment, the acquisition module is used to obtain the parameters of each first component in the first circuit board to be tested, the parameters of each first component include the component pad coordinates, component position number, component model and component direction connected to the NET corresponding to each first component; obtain the parameters of each second component in the second circuit board to be tested, the parameters of each second component include the component pad coordinates, component position number, component model and component direction connected to the network NET corresponding to each second component; the construction module is used to construct the first plane model based on the parameters of the first component, different first components are presented in the first plane model based on different shapes and / or colors; based on the parameters of the second component, the second plane model is constructed, different second components are presented in the second plane model based on different shapes and / or colors.

[0014] In one possible implementation manner, the acquisition module is used to match the NET package according to the pin information of the first circuit board to be tested, and if the NET package matches the pin information of the first circuit board to be tested, obtain the pads connected to the NET, the coordinates of the pads, and the component position numbers corresponding to the pads; match the NET according to the pin information of the second circuit board to be tested, and if the NET matches the pin information of the second circuit board to be tested, obtain the pads connected to the NET, the coordinates of the pads, and the component position numbers corresponding to the pads.

[0015] In one embodiment, the generation module includes: a numbering sub-module, used to number the components presented in the first plane model and the second plane model respectively according to the same component numbering strategy; a comparison sub-module, used to compare whether the models of the first component and the second component with the same component number in the first plane model and the second plane model are consistent; and a determination sub-module, used to determine that the test item corresponding to the second component is the target test item if the models of the first component and the second component with the same component number are inconsistent.

[0016] According to a third aspect of the present disclosure, there is provided an electronic device, including:

[0017] at least one processor; and

[0018] a memory communicatively connected to the at least one processor; wherein,

[0019] The memory stores instructions that can be executed by the at least one processor. The instructions are executed by the at least one processor to enable the at least one processor to perform the method described in the present disclosure.

[0020] According to a fourth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to cause the computer to execute the method described in the present disclosure.

[0021] The method, device, electronic device and storage medium for testing circuit boards disclosed in the present invention obtain a first test item list corresponding to a first circuit board to be tested, and then determine a second circuit board to be tested corresponding to the first circuit board to be tested based on the test items that have changed in the first test item list, thereby constructing a first plane model corresponding to the first circuit board to be tested and a second plane model corresponding to the second circuit board to be tested. Finally, the first plane model and the second plane model are compared to realize automatic generation of target test items, which not only improves the efficiency of circuit board test item generation, but also improves the accuracy of generated circuit board test items compared to manual report compilation, which may have certain errors in test items.

[0022] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood by reading the detailed description below with reference to the accompanying drawings, in which several embodiments of the present disclosure are shown by way of example and not limitation, wherein:

[0024] In the drawings, the same or corresponding reference numerals denote the same or corresponding parts.

[0025] Figure 1 A schematic flow chart of a method for testing a circuit board according to an embodiment of the present disclosure is shown;

[0026] Figure 2 Another schematic flow chart of a method for testing a circuit board according to an embodiment of the present disclosure is shown;

[0027] Figure 3 A detailed optional flow chart of a method for testing a circuit board according to an embodiment of the present disclosure is shown;

[0028] Figure 4 Another detailed optional flow chart of a method for testing a circuit board according to an embodiment of the present disclosure is shown;

[0029] Figure 5 A schematic diagram showing a method for testing a circuit board according to an embodiment of the present disclosure is shown;

[0030] Figure 6 A schematic diagram of a model showing a method for testing a circuit board according to an embodiment of the present disclosure is shown;

[0031] Figure 7 A schematic diagram showing the structure of a device for testing a circuit board according to an embodiment of the present disclosure is shown;

[0032] Figure 8 A schematic diagram of the structure of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0033] To make the purposes, features, and advantages of the present disclosure more apparent and understandable, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present disclosure without creative work shall fall within the scope of protection of the present disclosure.

[0034] At present, when measuring electronic signals of circuit boards, it is necessary to organize the test items of the circuit board according to the needs based on the circuit schematic. The circuit board can be tested only after the organization of the test items is completed. If there is a material problem with the first circuit board to be tested, the material will be replaced or added to generate a second circuit board to be tested corresponding to the first circuit board to be tested. When outputting the circuit board change file and the tester organizes the test items according to the change file, it is necessary to reserve materials from multiple suppliers to cope with the risk of material shortages when mass-producing circuit boards. Materials from multiple suppliers need to be verified on the mainboard, and the tester needs to manually organize the test items based on experience and reading a large amount of information. The whole process takes a long time of manpower, has low testing efficiency, and may also cause human errors.

[0035] Figure 1 A flow chart of a method for testing a circuit board according to an embodiment of the present disclosure is shown.

[0036] refer to Figure 1 A processing flow of a method for testing a circuit board according to an embodiment of the present disclosure includes at least the following steps:

[0037] Step S101: Obtain a first test item list corresponding to a first circuit board to be tested.

[0038] In some embodiments, before obtaining the first test item list corresponding to the first circuit board to be tested, the original data of the first circuit board to be tested can be obtained, wherein the original data includes: test item network to be tested (NET) data, circuit board pin information (Symbol Pin Report) and circuit board component information (Component Report).

[0039] In some embodiments, the NET data of the test items to be tested can be organized, wherein the NET data of the test items to be tested include the name of the NET to be tested and the test items corresponding to the NET to be tested; one test item can correspond to multiple NETs to be tested, and one NET to be tested can also correspond to multiple test items, such as: the same test item can correspond to two NET tests to be tested, or it can correspond to three NET tests to be tested.

[0040] As an example, the same test item can correspond to different NETs to be tested. Refer to Table 1:

[0041] Table 1. NET data for test items

[0042] Test item name Network name (net_name) 12V_Output Voltage Regulation Test +12V_P 12V_Output Ripple Voltage&HF Noise Test +12V_P,12V_SW 12V_Operational Frequency Test 12V_SW 12V_Power Efficiency Confirmation +12V_P 12V_Load Transient Test +12V_P 12V_Overshoot Test +12V_P 12V_Undershoot Test +12V_P 12V_Input power lines Signal Quality 12V_VIN,′12V_SW 12V_Dead Time and Ringing&VDS Voltage&Switch waveform Confirmation +3V_UG, 12V_SW, +12V_LG

[0043] In some embodiments, the NET data of the test item to be tested includes but is not limited to the NET data of the test item to be tested corresponding to the first circuit board to be tested.

[0044] As an example, different circuit boards have different sizes. Circuit board A is larger in size, and there may be more components and wires arranged in the circuit board, so more data needs to be tested accordingly. Circuit board B is smaller in size, and there may be fewer components and wires arranged in the circuit board, so less data needs to be tested accordingly. The NET data of the test items to be tested organized for circuit board A can be used to obtain the first test item list for circuit board B, and test items that can also be used to test circuit board B can be screened out from the NET data of the test items to be tested organized for circuit board A.

[0045] In the embodiment of the present disclosure, the more comprehensive the NET data of the test item to be tested is, the more comprehensive the test items screened out based on the NET data of the test item to be tested for testing the circuit board to be tested are.

[0046] In some embodiments, the Symbol Pin Report and Component Report can be obtained from the layout of the circuit board under test. Refer to Table 2 and Table 3:

[0047] Table 2. Symbol Pin Report

[0048] REFDES PIN_NUMBER COMP_DEVICE_TYPE PAD_STACK_NAME PIN_X PIN_Y NET_NAME C1940 1 CAP NP_C_0402_220P_0402_50V7K R20X22 -659.54 -436.00 PWR_LED1# C1940 2 CAP NP_C_0402_220P_0402_50V7K R20X22 -659.54 -436.00 GND C10059 1 CAP NP_C_0603_1U_0603_25V6M R25X35 -1133.70 -1603.60 +USB_VCCB C10059 2 CAP NP_C_0603_1U_0603_25V6M R25X35 -1133.70 -1658.60 GND C10060 1 CAP NP_C_0402_470P_0402_50V7K R20X22 -1091.90 -1604.50 +USB_VCCB C10060 2 CAP NP_C_0402_470P_0402_50V7K R20X22 -1091.90 -1640.50 GND C10061 1 CAP NP_C_0402_.1U_0402_10V6-K R20X22 -1337.10 -1467.60 USB30_TX_P4 C10061 2 CAP NP_C_0402_.1U_0402_10V6-K R20X22 -1337.10 -1431.60 USB30_TX_C_P4 C10062 1 CAP NP_C_0402_.1U_0402_10V6-K R20X22 -1371.80 -1467.30 USB30_TX_N4

[0049] Among them, REFDES is the component's bit number, PIN_NUMBER is the component's pin number, COMP_DEVICE_TYPE is the component model, PAD_STACK_NAME is the pad model, PIN_X is the pin's X-axis coordinate, PIN_Y is the pin's Y-axis coordinate, and NET_NAME is the network name.

[0050] Table 3. Component Report

[0051] REFDES COMP_DEVICE_TYPE COMP_VALUE COMP_TOL SYM_X SYM_Y SYM-ROTATE C5 CAP NP_C_0201_0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 5465.00 -1834.50 270.000 C6 CAP NP_C_0201_0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 5442.00 -1834.50 270.000 C7 CAP NP_C_0402_220P_0402_50V7K 220P_0402_50V7K 5265.00 -1771.00 180.000 C8 CAP NP_C_1206_100U_1206_6.3V6M 100U_1206_6.3V6M 5966.00 -1933.00 180.000 C9 CAP NP_C_0402_1U_0402_10V6K 1U_0402_10V6K 5510.00 -1654.00 270.000 C10 CAP NP_C_0805_47U_0805_6.3V6-M 47U_0805_6.3V6-M 6015.00 -1937.00 0.000 C11 CAP NP_C_0402_1U_0402_10V6K 1U_0402_10V6K 5474.00 -1654.00 270.000 CW1 CAP NP_C_0402_.1U_0402_10V6-K .1U_0402_10V6-K 5513.00 -1877.00 270.000 CW2 CAP NP_C_0402_.1U_0402_10V6-K .1U_0402_10V6-K 5287.00 -2060.00 90.000

[0052] Among them, REFDES is the component number, COMP_DEVICE_TYPE is the component model, COMP_VALUE is the component parameter, COMP_TOL is the component capacity, SYM_X is the component X-axis coordinate, SYM_Y is the component Y-axis coordinate, and SYM-ROTATE is the component direction degree.

[0053] In some embodiments, a specific implementation process of obtaining a first test item list corresponding to the first circuit board to be tested may include:

[0054] Perform the following operations for each test item of the first circuit board to be tested:

[0055] Generate a NET package corresponding to the item to be tested;

[0056] The NET package is matched with the pin information of the first circuit board to be tested. If the NET package matches the pin information of the first circuit board to be tested, the test item corresponding to the NET package is added to the first test item list.

[0057] In some embodiments, the NETs corresponding to the items to be tested may be packaged, for example, multiple NETs corresponding to one item to be tested may be packaged into one NET package.

[0058] In some embodiments, using the NET package as an index, all NET packages generated corresponding to each test item of the first circuit board to be tested are matched with the Symbol Pin Report in sequence. If there is a complete match, all test items corresponding to the complete matching NET package are obtained.

[0059] Among them, the NET package can contain multiple NETs. Complete matching means that the NET and Symbol PinReport are matched in sequence. If one NET is inconsistent with the Symbol Pin Report, the NET package containing the NET that is inconsistent with the Symbol PinReport is determined to be unmatched, and the test items corresponding to the corresponding NET package will not be generated.

[0060] In some embodiments, all test items corresponding to the obtained fully matched NET packages may also be integrated, such as merging multiple repeated test items into one test item, where the repeated test item may refer to the content tested by test item A being covered by test item B.

[0061] As an example, test item A can measure 3 electronic signals about component a, and test item B can measure 4 electronic signals about component a, where the electronic signals measured by test item B include the electronic signals measured by test item A, that is, test item A and test item B are duplicate test items. Test item A and test item B can be merged, and only test item B needs to be tested during testing.

[0062] In the disclosed embodiment, repeated test items are integrated, generation of redundant test items is avoided, efficiency of circuit board test item generation is improved, and thus efficiency of testing circuit boards is improved.

[0063] In some embodiments, after adding the to-be-tested items corresponding to the NET package to the first test item list, a new test item report may be generated based on the test item report template.

[0064] Step S102: determining a second circuit board to be tested corresponding to the first circuit board to be tested based on the changed test items in the first test item list.

[0065] In some embodiments, a specific implementation process of determining the second circuit board to be tested corresponding to the first circuit board to be tested based on the changed test items in the first test item list may include:

[0066] Determine a first component corresponding to a changed test item in the first test item list;

[0067] The first component is replaced with a second component, and a second circuit board to be tested is determined based on the second component.

[0068] In some embodiments, changes in test items in the first test item list may be caused by changes in the electrical characteristics of the NET corresponding to the changed test item, and changes in the electrical characteristics of the NET may be caused by changes in components connected to the NET. The essence of electronic signal measurement is to measure the electrical characteristics of the NET. Any changes in components connected to the NET will cause changes in the electrical characteristics of the NET. Therefore, it is necessary to determine changes in components related to the NET and then determine whether to measure the electrical characteristics of the NET. Component changes may involve replacing components of the same type produced by different manufacturers or replacing components of different types. The factors that cause changes in test items are not limited herein.

[0069] As an example, replacing capacitor C1 with model 1 produced by manufacturer a on circuit board A with capacitor C1 with model 1 produced by manufacturer b may cause changes in the electrical characteristics of the NET corresponding to capacitor C1, thereby causing changes in the test items corresponding to the NET that has undergone electrical changes.

[0070] In some embodiments, it is also possible to determine whether the number of circuit board layers of the first circuit board to be tested is consistent with that of the second circuit board to be tested. If the number of circuit board layers of the first circuit board to be tested is inconsistent with that of the second circuit board to be tested, it means that the entire circuit board has changed, and it is necessary to re-acquire the test item list, that is, to obtain the second test item list corresponding to the second circuit board to be tested.

[0071] Step S103 : constructing a first plane model corresponding to the first circuit board to be tested and a second plane model corresponding to the second circuit board to be tested.

[0072] In some embodiments, after determining the second circuit board to be tested corresponding to the first circuit board to be tested based on the changed test items in the first test item list, the bill of materials (BOM) of the first circuit board to be tested and the BOM, Symbol Pin Report, and Component Report files of the second circuit board to be tested can be obtained. The BOM file refers to Table 3:

[0073] Table 3. BOM file

[0074] BOM Location Component model (Name) SMT MB NMB671 EG530 I58300H X1 V2GN / R ZZZ1 PCB 17P NM-B671 REV1 M / B ZZZ8 ROYALTY HDMI W / LOGO+HDCP UE1 S IC IT8586E / FX LQFP 128P KB CONTROLLER UL1 S IC RTL8111GUL-CG QFN 32P E-LAN ​​CTRL U5, U27 S IC SY6288C20AAC SOT23 5P POWER SWITCH U2 S IC SY6288D20AAC SOT23 5P POWER SWITCH PU301 S IC BQ24780SRUYR QFN 28P PWM PU401 S IC SY8286BRAC QFN 20P PWM PU502 S IC APL5930CKAI-TRG SOP 8P LDO PU5802 S IC RT9610CGQW WDFN 8P DRIVER PU402 S IC SY8288CRAC QFN 20P PWM U14 S IC AH9247-W-7SC59 3P SWITCH UA1 S IC RTS5199-GR QFN 56P CONTROLLER PU5801 S IC RT8813DGQW WQFN 24P PWM

[0075] In some embodiments, the specific implementation process of constructing the first plane model corresponding to the first circuit board to be tested and the second plane model corresponding to the second circuit board to be tested may include:

[0076] Obtaining parameters of each first component in the first circuit board to be tested, the parameters of each first component including coordinates of a component pad connected to a NET corresponding to each first component, a component position number, a component model, and a component direction;

[0077] Based on the parameters of the first component, a first plane model is constructed, wherein different first components are presented in the first plane model based on different shapes and / or colors;

[0078] Obtaining parameters of each second component in the second circuit board to be tested, the parameters of each second component including coordinates of a component pad connected to a NET corresponding to each second component, a component position number, a component model, and a component direction;

[0079] A second plane model is constructed based on the parameters of the second components, and different second components are presented in the second plane model based on different shapes and / or colors.

[0080] In some embodiments, obtaining parameters of each first component in the first circuit board to be tested includes:

[0081] Matching the NET package according to the pin information of the first circuit board to be tested, if the NET package is consistent with the pin information of the first circuit board to be tested, obtaining the pad connected to the NET in the NET package, the coordinates of the pad, and the component position number corresponding to the pad;

[0082] Obtaining parameters of each second component in the second circuit board to be tested, including:

[0083] The NET package is matched according to the pin information of the second circuit board to be tested. If the NET package is consistent with the pin information of the second circuit board to be tested, the pad connected to the NET in the NET package, the coordinates of the pad and the component position number corresponding to the pad are obtained.

[0084] In some embodiments, after obtaining the pads connected to the NET in the NET package that matches the pin information of the first circuit board to be tested, the coordinates of the pads, and the component position numbers corresponding to the pads, it is possible to search in the BOM file of the first circuit board to be tested whether the corresponding material exists. If it does not exist, no operation is required. If it exists, the corresponding material position number and component model are obtained.

[0085] In some embodiments, after obtaining the pads connected to the NET in the NET package that matches the pin information of the second circuit board to be tested, the coordinates of the pads, and the component position numbers corresponding to the pads, it is possible to search in the BOM file of the second circuit board to be tested whether the corresponding material exists. If it does not exist, no operation is required. If it exists, the corresponding material position number and component model are obtained.

[0086] In the embodiment of the present disclosure, the pin information of the circuit board to be tested obtained based on the schematic file may be different from the actual BOM list of the circuit board to be tested, which can save circuit board materials and reduce costs to a certain extent without affecting the function and quality of the circuit board.

[0087] In some embodiments, after obtaining the corresponding material number and component model from the BOM file of the first circuit board to be tested, the orientation degree of the corresponding component can be searched in the Component Report file according to the obtained number.

[0088] In some embodiments, after obtaining the corresponding material number and component model from the BOM file of the second circuit board to be tested, the orientation degree of the corresponding component can be searched in the Component Report file according to the obtained number.

[0089] In some embodiments, when constructing the first plane model and the second plane model, the shape of each component can be equivalent to a rectangle. The size of the rectangle can be the size of a 0201 capacitor, the long side of the rectangle can represent the direction of the component, and the center point of the rectangle can be used as the coordinate of the Pad center point. Thus, the first plane model and the second plane model are constructed through the Pad coordinates and the component direction data, wherein the equivalent shape, size and meaning of the shape of the component are not limited here.

[0090] In some embodiments, the rectangle obtained by equilibrating the components may be colored to facilitate image recognition after constructing the plane model.

[0091] Step S104 , comparing the first plane model and the second plane model to generate target test items; the target test items are used to test the circuit board.

[0092] In some embodiments, image recognition can be performed on the first plane model and the second plane model, and the direction and position of the rectangle in the first plane model image can be identified based on the color and shape of the components after equivalence. The second plane model image can be recognized based on the direction and position of the rectangle in the first plane model image to obtain the direction and position of the rectangle in the second plane model image. The recognition results of the first plane model image and the second plane model image are compared respectively. If the recognition results are different, a target test item is generated.

[0093] In some embodiments, a specific implementation process of comparing the first plane model and the second plane model to generate a target test item may include:

[0094] Numbering the components presented in the first plane model and the second plane model respectively according to the same component numbering strategy;

[0095] Comparing whether the models of the first component and the second component having the same component number in the first plane model and the second plane model are consistent;

[0096] If the first component and the second component having the same component number have different models, the test item corresponding to the second component is determined to be the target test item.

[0097] In some embodiments, the component numbering strategy can be based on the component coordinates to number the components. The components are numbered in order from small to large according to the size of the X-axis data. If the X-axis data of the components are the same, the components are numbered in order from large to small according to the size of the Y-axis data to obtain numbered components. There is no restriction on the component numbering strategy here.

[0098] In some embodiments, each numbered component has a corresponding component model. The models of the first component and the second component with the same component number in the first plane model and the second plane model are compared. If the models are consistent, no operation is required. If the models are inconsistent, the test item corresponding to the second component is determined to be the target test item.

[0099] In some embodiments, the target test items may be integrated, for example, by merging multiple repeated test items into one test item, where the repeated test item may refer to a test item A whose content is covered by test item B.

[0100] As an example, test item A can measure 3 electronic signals about component a, and test item B can measure 4 electronic signals about component a, where the electronic signals measured by test item B include the electronic signals measured by test item A, that is, test item A and test item B are duplicate test items. Test item A and test item B can be merged, and only test item B needs to be tested during testing.

[0101] In the disclosed embodiment, repeated test items are integrated, generation of redundant test items is avoided, efficiency of circuit board test item generation is improved, and thus efficiency of testing circuit boards is improved.

[0102] In some embodiments, after determining that the test item corresponding to the second component is a target test item, a new target test item report may be generated based on the test item report template.

[0103] Figure 2 Another flow chart of a method for testing a circuit board according to an embodiment of the present disclosure is shown.

[0104] refer to Figure 2 Another process flow of a method for testing a circuit board according to an embodiment of the present disclosure includes at least the following steps:

[0105] Step S201: obtaining original data of a first circuit board to be tested.

[0106] In some embodiments, the original data includes: NET data of the test item to be tested, Symbol Pin Report, and Component Report.

[0107] In some embodiments, the NET data of the test items to be tested can be organized, wherein the NET data of the test items to be tested include the name of the NET to be tested and the test items corresponding to the NET to be tested; one test item can correspond to multiple NETs to be tested, and one NET to be tested can also correspond to multiple test items, such as: the same test item can correspond to two NET tests to be tested, or it can correspond to three NET tests to be tested.

[0108] In some embodiments, the NET data of the test item to be tested includes but is not limited to the NET data of the test item to be tested corresponding to the first circuit board to be tested.

[0109] As an example, different circuit boards have different sizes. Circuit board A is larger in size, and there may be more components and wires arranged in the circuit board, so more data needs to be tested accordingly. Circuit board B is smaller in size, and there may be fewer components and wires arranged in the circuit board, so less data needs to be tested accordingly. The NET data of the test items to be tested organized for circuit board A can be used to obtain the first test item list for circuit board B, and test items that can also be used to test circuit board B can be screened out from the NET data of the test items to be tested organized for circuit board A.

[0110] In the embodiment of the present disclosure, the more comprehensive the NET data of the test item to be tested is, the more comprehensive the test items screened out based on the NET data of the test item to be tested for testing the circuit board to be tested are.

[0111] Execute steps S202-S203 for each test item of the first circuit board to be tested:

[0112] Step S202: Generate a NET package corresponding to the item to be tested.

[0113] Step S203: Match the NET packet with the pin information of the first circuit board to be tested.

[0114] If the NET package matches the pin information of the first circuit board to be tested, the test item corresponding to the NET package is added to the first test item list.

[0115] In some embodiments, the NETs corresponding to the items to be tested may be packaged, for example, multiple NETs corresponding to one item to be tested may be packaged into one NET package.

[0116] In some embodiments, using the NET package as an index, all NET packages generated corresponding to each test item of the first circuit board to be tested are matched with the Symbol Pin Report in sequence. If there is a complete match, all test items corresponding to the complete matching NET package are obtained.

[0117] Among them, the NET package can contain multiple NETs. Complete matching means that the NET and Symbol PinReport are matched in sequence. If one NET is inconsistent with the Symbol Pin Report, the NET package containing the NET that is inconsistent with the Symbol PinReport is determined to be unmatched, and the test items corresponding to the corresponding NET package will not be generated.

[0118] Step S204: Integrate the test items in the first test item list.

[0119] For example, multiple duplicate test items can be merged into one test item, where the duplicate test item may refer to the content tested by test item A being covered by test item B.

[0120] As an example, test item A can measure 3 electronic signals about component a, and test item B can measure 4 electronic signals about component a, where the electronic signals measured by test item B include the electronic signals measured by test item A, that is, test item A and test item B are duplicate test items. Test item A and test item B can be merged, and only test item B needs to be tested during testing.

[0121] In the disclosed embodiment, repeated test items are integrated, generation of redundant test items is avoided, efficiency of circuit board test item generation is improved, and thus efficiency of testing circuit boards is improved.

[0122] Step S205: Generate a new test item report based on the test item report template.

[0123] Step S206: Determine the first component corresponding to the changed test item in the first test item list.

[0124] Step S207: Replace the first component with a second component, and determine a second circuit board to be tested based on the second component.

[0125] In some embodiments, changes in the test items in the first test item list may be caused by changes in the electrical characteristics of the NET corresponding to the changed test items, and changes in the electrical characteristics of the NET may be caused by changes in components connected to the NET, wherein the changes in components may be replacements of the same type of components produced by different manufacturers, or replacements of different types of components. There is no restriction on the factors causing changes in the test items.

[0126] As an example, replacing capacitor C1 with model 1 produced by manufacturer a on circuit board A with capacitor C1 with model 1 produced by manufacturer b may cause changes in the electrical characteristics of the NET corresponding to capacitor C1, thereby causing changes in the test items corresponding to the NET that has undergone electrical changes.

[0127] Step S208 , determining whether the number of circuit board layers of the first circuit board to be tested is consistent with that of the second circuit board to be tested.

[0128] If the number of circuit board layers of the first circuit board to be tested is inconsistent with that of the second circuit board to be tested, it means that the entire circuit board has changed, and it is necessary to obtain the test item list again, that is, obtain the second test item list corresponding to the second circuit board to be tested.

[0129] Step S209 , obtaining the BOM, Symbol PinReport, and Component Report files of the first circuit board to be tested and the second circuit board to be tested.

[0130] Step S210: Matching the NET package according to the pin information of the first circuit board to be tested.

[0131] If the NET package is consistent with the pin information of the first circuit board to be tested, the pad connected to the NET in the NET package, the coordinates of the pad, and the component position number corresponding to the pad are obtained.

[0132] Step S211 , searching the BOM file of the first circuit board to be tested to see whether the corresponding material exists.

[0133] If the material does not exist, no operation is required. If the material exists, obtain the corresponding material number and component model.

[0134] Step S212: Match the NET package according to the pin information of the second circuit board to be tested.

[0135] If the NET package is consistent with the pin information of the second circuit board to be tested, the pad connected to the NET in the NET package, the coordinates of the pad, and the component position number corresponding to the pad are obtained.

[0136] Step S213: Search the BOM file of the second circuit board to be tested to see whether the corresponding material exists.

[0137] If the material does not exist, no operation is required. If the material exists, obtain the corresponding material number and component model.

[0138] In the embodiment of the present disclosure, the pin information of the circuit board to be tested obtained based on the schematic file may be different from the actual BOM list of the circuit board to be tested, which can save circuit board materials and reduce costs to a certain extent without affecting the function and quality of the circuit board.

[0139] Step S214 , searching the component orientation number corresponding to the component in the Component Report file according to the obtained bit number.

[0140] Step S215 : constructing a first plane model based on the parameters of the first components, wherein different first components are presented in the first plane model based on different shapes and / or colors.

[0141] Step S216 : constructing a second plane model based on the parameters of the second components, wherein different second components are presented in the second plane model based on different shapes and / or colors.

[0142] In some embodiments, when constructing the first plane model and the second plane model, the shape of each component can be equivalent to a rectangle. The size of the rectangle can be the size of a 0201 capacitor, the long side of the rectangle can represent the direction of the component, and the center point of the rectangle can be used as the coordinate of the Pad center point. Thus, the first plane model and the second plane model are constructed through the Pad coordinates and the component direction data, wherein the equivalent shape, size and meaning of the shape of the component are not limited here.

[0143] In some embodiments, the rectangle obtained by equilibrating the components may be colored to facilitate image recognition after constructing the plane model.

[0144] Step S217: performing image recognition on the first plane model and the second plane model.

[0145] Specifically, the direction and position of the rectangle in the first plane model image are identified based on the color and shape after the components are equivalent. The direction and position of the rectangle in the first plane model image are used as a reference to identify the second plane model image, and the direction and position of the rectangle in the second plane model image are obtained. The recognition results of the first plane model image and the second plane model image are compared respectively. If the recognition results are different, a target test item is generated.

[0146] Step S218 : numbering the components presented in the first plane model and the second plane model respectively according to the same component numbering strategy.

[0147] In some embodiments, the component numbering strategy can be based on the component coordinates to number the components. The components are numbered in order from small to large according to the size of the X-axis data. If the X-axis data of the components are the same, the components are numbered in order from large to small according to the size of the Y-axis data to obtain numbered components. There is no restriction on the component numbering strategy here.

[0148] Step S219 : comparing whether the models of the first component and the second component with the same component number in the first plane model and the second plane model are consistent.

[0149] Step S220 : If the first component and the second component having the same component number are of different models, determining the test item corresponding to the second component as the target test item.

[0150] Step S221: Integrate target test items.

[0151] For example, multiple duplicate test items can be merged into one test item, where the duplicate test item may refer to the content tested by test item A being covered by test item B.

[0152] As an example, test item A can measure 3 electronic signals about component a, and test item B can measure 4 electronic signals about component a, where the electronic signals measured by test item B include the electronic signals measured by test item A, that is, test item A and test item B are duplicate test items. Test item A and test item B can be merged, and only test item B needs to be tested during testing.

[0153] In the disclosed embodiment, repeated test items are integrated, generation of redundant test items is avoided, efficiency of circuit board test item generation is improved, and thus efficiency of testing circuit boards is improved.

[0154] Step S222: Generate a new target test item report based on the test item report template.

[0155] Figure 3 A detailed optional flow chart of a method for testing a circuit board according to an embodiment of the present disclosure is shown.

[0156] refer to Figure 3 Taking the first circuit board C to be tested as an example, a detailed optional process of the method for testing a circuit board according to an embodiment of the present disclosure is described, which at least includes the following steps:

[0157] Step S301: obtaining original data of a first circuit board C to be tested.

[0158] The original data includes: NET data of the test item to be tested, Symbol Pin Report and ComponentReport.

[0159] Optionally, the NET data to be tested of the test items can be organized, wherein the NET data to be tested of the test items include the name of the NET to be tested and the test items corresponding to the NET to be tested; one test item can correspond to multiple NETs to be tested, and one NET to be tested can also correspond to multiple test items, such as: the same test item can correspond to two NET tests to be tested, or it can correspond to three NET tests to be tested.

[0160] Optionally, the NET data of the test item to be tested includes but is not limited to the NET data of the test item to be tested corresponding to the first circuit board C to be tested.

[0161] In the embodiment of the present disclosure, the more comprehensive the NET data of the test item to be tested is, the more comprehensive the test items screened out based on the NET data of the test item to be tested for testing the first circuit board C to be tested are.

[0162] Execute steps S302-S303 for each test item of the first circuit board C to be tested:

[0163] Step S302: Generate a NET package corresponding to the item to be tested.

[0164] Step S303: Match the NET packet with the pin information of the first circuit board C to be tested.

[0165] If the NET package matches the pin information of the first circuit board C to be tested, the test item corresponding to the NET package is added to the first test item list.

[0166] Optionally, the NETs corresponding to the items to be tested may be packaged, for example, multiple NETs corresponding to one item to be tested may be packaged into one NET package.

[0167] Optionally, using the NET package as an index, all NET packages generated corresponding to each test item of the first circuit board C to be tested are matched with the Symbol Pin Report in sequence. If there is a complete match, all test items corresponding to the complete matching NET package are obtained.

[0168] Among them, the NET package can contain multiple NETs. Complete matching means that the NET and Symbol PinReport are matched in sequence. If one NET is inconsistent with the Symbol Pin Report, the NET package containing the NET that is inconsistent with the Symbol PinReport is determined to be unmatched, and the test items corresponding to the corresponding NET package will not be generated.

[0169] Step S304: Integrate the test items in the first test item list.

[0170] For example, multiple duplicate test items can be merged into one test item, where the duplicate test item may refer to the content tested by test item A being covered by test item B.

[0171] In the disclosed embodiment, repeated test items are integrated, generation of redundant test items is avoided, efficiency of circuit board test item generation is improved, and thus efficiency of testing circuit boards is improved.

[0172] Step S305: Generate a new test item report based on the test item report template.

[0173] Figure 4 Another detailed optional flowchart of the method for testing a circuit board according to an embodiment of the present disclosure is shown.

[0174] refer to Figure 4 Taking the second circuit board D corresponding to the first circuit board C to be tested as an example, another detailed optional process of the method for testing circuit boards in the embodiment of the present disclosure is described, which at least includes the following steps:

[0175] Step S401: Determine the first component c corresponding to the changed test item in the first test item list.

[0176] Step S402: Replace the first component c with the second component d, and determine the second circuit board D to be tested based on the second component d.

[0177] Optionally, changes in the test items in the first test item list may be caused by changes in the electrical characteristics of the NET corresponding to the changed test items, and changes in the electrical characteristics of the NET may be caused by changes in components connected to the NET, wherein the changes in components may be replacements of the same type of components produced by different manufacturers, or replacements of different types of components. There is no restriction on the factors causing changes in the test items here.

[0178] Step S403 , determining whether the number of circuit board layers of the first circuit board C to be tested is consistent with that of the second circuit board D to be tested.

[0179] Among them, if the number of circuit board layers of the first circuit board C to be tested is inconsistent with that of the second circuit board D to be tested, it means that the entire circuit board has changed, and it is necessary to re-acquire the test item list, that is, obtain the second test item list corresponding to the second circuit board D to be tested.

[0180] Step S404 , obtaining the BOM, Symbol PinReport, and Component Report files of the first circuit board to be tested and the second circuit board to be tested.

[0181] Step S405: Match the NET package according to the pin information of the first circuit board C to be tested.

[0182] If the NET package is consistent with the pin information of the first circuit board C to be tested, the pad connected to the NET in the NET package, the coordinates of the pad, and the component position number corresponding to the pad are obtained.

[0183] Step S406 , searching the BOM file of the first circuit board C to be tested to see whether the corresponding material exists.

[0184] If the material does not exist, no operation is required. If the material exists, obtain the corresponding material number and component model.

[0185] Step S407: Match the NET package according to the pin information of the second circuit board D to be tested.

[0186] If the NET package is consistent with the pin information of the second circuit board D to be tested, the pad connected to the NET in the NET package, the coordinates of the pad, and the component position number corresponding to the pad are obtained.

[0187] Step S408: Search the BOM file of the second circuit board D to be tested to see whether the corresponding material exists.

[0188] If the material does not exist, no operation is required. If the material exists, obtain the corresponding material number and component model.

[0189] In the embodiment of the present disclosure, the pin information of the circuit board to be tested obtained based on the schematic file may be different from the actual BOM list of the circuit board to be tested, which can save circuit board materials and reduce costs to a certain extent without affecting the function and quality of the circuit board. Figure 5 .

[0190] Step S409 , searching the component's orientation in the Component Report file according to the acquired bit number.

[0191] Step S410 : constructing a first plane model based on parameters of the first component c, wherein different first components are presented in the first plane model based on different shapes and / or colors.

[0192] Step S411 : constructing a second plane model based on the parameters of the second component d, wherein different second components are presented in the second plane model based on different shapes and / or colors.

[0193] Optionally, when constructing the first plane model and the second plane model, the shape of each component can be equivalent to a rectangle, referring to Figure 6The size of the rectangle can be the size of a 0201 capacitor, the long side of the rectangle can represent the direction of the component, and the center point of the rectangle can be used as the coordinate of the center point of the Pad, thereby constructing the first plane model and the second plane model through the Pad coordinates and the component direction data, wherein the equivalent shape, size and meaning of the shape of the component are not limited here.

[0194] Optionally, the rectangle obtained by equilibrating the components may be colored to facilitate image recognition after constructing the plane model.

[0195] Step S412: performing image recognition on the first plane model and the second plane model.

[0196] Specifically, the direction and position of the rectangle in the first plane model image are identified based on the color and shape after the components are equivalent. The direction and position of the rectangle in the first plane model image are used as a reference to identify the second plane model image, and the direction and position of the rectangle in the second plane model image are obtained. The recognition results of the first plane model image and the second plane model image are compared respectively. If the recognition results are different, a target test item is generated.

[0197] Step S413 : numbering the components presented in the first plane model and the second plane model respectively according to the same component numbering strategy.

[0198] In some embodiments, the component numbering strategy can be based on the component coordinates to number the components. The components are numbered in order from small to large according to the size of the X-axis data. If the X-axis data of the components are the same, the components are numbered in order from large to small according to the size of the Y-axis data to obtain numbered components. There is no restriction on the component numbering strategy here.

[0199] Step S414 : comparing whether the models of the first component c and the second component d having the same component number in the first plane model and the second plane model are consistent.

[0200] Step S415 : If the first component c and the second component d having the same component number are of different models, then the test item corresponding to the second component d is determined to be the target test item.

[0201] Step S416: Integrate the target test items.

[0202] For example, multiple duplicate test items can be merged into one test item, where the duplicate test item may refer to the content tested by test item A being covered by test item B.

[0203] In the disclosed embodiment, repeated test items are integrated, generation of redundant test items is avoided, efficiency of circuit board test item generation is improved, and thus efficiency of testing circuit boards is improved.

[0204] Step S417: Generate a new target test item report based on the test item report template.

[0205] Figure 7 A schematic diagram of the structure of a device for testing a circuit board according to an embodiment is shown.

[0206] refer to Figure 7 , an embodiment of a device for testing a circuit board, the device 70 for testing a circuit board includes: an acquisition module 701, used to obtain a first test item list corresponding to a first circuit board to be tested; a processing module 702, used to determine a second circuit board to be tested corresponding to the first circuit board to be tested based on the test items that have changed in the first test item list; a construction module 703, used to construct a first plane model corresponding to the first circuit board to be tested, and a second plane model corresponding to the second circuit board to be tested; a generation module 704, used to compare the first plane model and the second plane model to generate target test items; the target test items are used to test the circuit board.

[0207] In some embodiments, the generation module 704 is also used to generate a NET package corresponding to the item to be tested; the acquisition module 701 is used to match the NET package with the pin information of the first circuit board to be tested. If the NET package matches the pin information of the first circuit board to be tested, the item to be tested corresponding to the NET package is added to the first test item list.

[0208] In some embodiments, the processing module 702 is configured to determine a first component corresponding to a changed test item in the first test item list; replace the first component with a second component; and determine a second circuit board to be tested based on the second component.

[0209] In some embodiments, an acquisition module 701 is used to acquire parameters of each first component in a first circuit board to be tested, the parameters of each first component including the coordinates of the component pad connected to the NET corresponding to each first component, the component position number, the component model number and the component direction; acquire parameters of each second component in a second circuit board to be tested, the parameters of each second component including the coordinates of the component pad connected to the NET corresponding to each second component, the component position number, the component model number and the component direction; a construction module 703 is used to construct a first plane model based on the parameters of the first components, different first components are presented in the first plane model based on different shapes and / or colors; and construct a second plane model based on the parameters of the second components, different second components are presented in the second plane model based on different shapes and / or colors.

[0210] In some embodiments, the acquisition module 701 is used to match the NET package according to the pin information of the first circuit board to be tested. If the NET package matches the pin information of the first circuit board to be tested, the pads connected to the NET, the coordinates of the pads, and the component position numbers corresponding to the pads are obtained; and the NET package is matched according to the pin information of the second circuit board to be tested. If the NET package matches the pin information of the second circuit board to be tested, the pads connected to the NET, the coordinates of the pads, and the component position numbers corresponding to the pads are obtained.

[0211] In some embodiments, the generation module 704 includes: a numbering sub-module 7041, which is used to number the components presented in the first plane model and the second plane model respectively according to the same component numbering strategy; a comparison sub-module 7042, which is used to compare whether the models of the first component and the second component with the same component number in the first plane model and the second plane model are consistent; and a determination sub-module 7043, which is used to determine that the test item corresponding to the second component is the target test item if the models of the first component and the second component with the same component number are inconsistent.

[0212] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device and a readable storage medium.

[0213] Figure 8 A schematic block diagram of an example electronic device 800 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smartphones, wearable electronic devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0214] like Figure 8 As shown, the electronic device 800 includes a computing unit 801, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 802 or a computer program loaded from a storage unit 808 into a random access memory (RAM) 803. In the RAM 803, various programs and data required for the operation of the electronic device 800 can also be stored. The computing unit 801, the ROM 802, and the RAM 803 are connected to each other via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0215] Multiple components in the electronic device 800 are connected to the I / O interface 805, including an input unit 806, such as a keyboard, a mouse, etc.; an output unit 807, such as various types of displays, speakers, etc.; a storage unit 808, such as a magnetic disk, an optical disk, etc.; and a communication unit 809, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 809 allows the electronic device 800 to exchange information / data with other electronic devices via a computer network such as the Internet and / or various telecommunication networks.

[0216] The computing unit 801 can be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units that run machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 801 performs the various methods and processes described above, such as the method for testing a circuit board. For example, in some embodiments, the method for testing a circuit board can be implemented as a computer software program that is tangibly contained in a machine-readable medium, such as a storage unit 808. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 800 via the ROM 802 and / or the communication unit 809. When the computer program is loaded into the RAM 803 and executed by the computing unit 801, one or more steps of the method for testing a circuit board described above can be performed. Alternatively, in other embodiments, the computing unit 801 can be configured to perform the method for testing a circuit board by any other appropriate means (e.g., by means of firmware).

[0217] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0218] The program code for implementing the method of the present disclosure can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device so that when the program code is executed by the processor or controller, the functions / operations specified in the flow chart and / or block diagram are implemented. The program code can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0219] In the context of the present disclosure, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in conjunction with an instruction execution system, device or equipment. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium can include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0220] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0221] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

[0222] A computer system may include a client and a server. The client and server are generally remote from each other and typically interact through a communication network. The client-server relationship arises through computer programs running on the respective computers and having a client-server relationship with each other. The server may be a cloud server, a server in a distributed system, or a server integrated with a blockchain.

[0223] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this disclosure can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved. This is not a limitation herein.

[0224] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. Throughout the present disclosure, "plurality" means two or more, unless otherwise specifically defined.

[0225] The above description is merely a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this disclosure should be included in the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A method for testing a circuit board, characterized in that: The method comprises: Obtaining a first test item list corresponding to a first circuit board to be tested; determining a second circuit board to be tested corresponding to the first circuit board to be tested based on the changed test items in the first test item list; Constructing a first plane model corresponding to the first circuit board to be tested and a second plane model corresponding to the second circuit board to be tested; Comparing the first plane model and the second plane model to generate target test items; the target test items are used to test the circuit board; The obtaining of a first test item list corresponding to the first circuit board to be tested includes: Perform the following operations for each test item of the first circuit board to be tested: Generate a network NET package corresponding to the item to be tested; Matching the NET package with the pin information of the first circuit board to be tested, and if the NET package matches the pin information of the first circuit board to be tested, adding the test item corresponding to the NET package to the first test item list; The determining the second circuit board to be tested corresponding to the first circuit board to be tested based on the changed test items in the first test item list includes: Determining a first component corresponding to a changed test item in the first test item list; The first component is replaced with a second component, and a second circuit board to be tested is determined based on the second component.

2. The method according to claim 1, characterized in that The step of constructing a first plane model corresponding to the first circuit board to be tested and a second plane model corresponding to the second circuit board to be tested includes: Obtaining parameters of each first component in the first circuit board to be tested, wherein the parameters of each first component include the coordinates of a component pad connected to a NET corresponding to each first component, a component position number, a component model, and a component direction; constructing the first plane model based on the parameters of the first components, wherein different first components are presented in the first plane model based on different shapes and / or colors; Obtaining parameters of each second component in the second circuit board to be tested, wherein the parameters of each second component include the coordinates of a component pad connected to a NET corresponding to each second component, a component position number, a component model, and a component direction; The second plane model is constructed based on the parameters of the second components, and different second components are presented in the second plane model based on different shapes and / or colors.

3. The method according to claim 2, characterized in that The obtaining of the parameters of each first component in the first circuit board to be tested includes: Matching the NET according to the pin information of the first circuit board to be tested, and if the NET matches the pin information of the first circuit board to be tested, obtaining the pad connected to the NET, the coordinates of the pad, and the component number corresponding to the pad; The obtaining of the parameters of each second component in the second circuit board to be tested includes: The NET is matched according to the pin information of the second circuit board to be tested. If the NET matches the pin information of the second circuit board to be tested, the pad connected to the NET, the coordinates of the pad, and the component position number corresponding to the pad are obtained.

4. The method according to claim 1, wherein The comparing the first plane model and the second plane model to generate a target test item includes: Numbering the components presented in the first plane model and the second plane model respectively according to the same component numbering strategy; Comparing whether the models of the first component and the second component having the same component number in the first plane model and the second plane model are consistent; If the first component and the second component having the same component number have different models, the test item corresponding to the second component is determined to be the target test item.

5. A device for testing a circuit board, characterized in that: The device comprises: An acquisition module, configured to acquire a first test item list corresponding to a first circuit board to be tested; A processing module, configured to determine a second circuit board to be tested corresponding to the first circuit board to be tested based on the changed test items in the first test item list; A construction module, configured to construct a first plane model corresponding to the first circuit board to be tested, and a second plane model corresponding to the second circuit board to be tested; a generating module, configured to compare the first plane model and the second plane model to generate target test items; the target test items are used to test the circuit board; The generating module is further configured to generate a NET package corresponding to the item to be tested; The acquisition module is configured to match the NET package with the pin information of the first circuit board to be tested, and if the NET package matches the pin information of the first circuit board to be tested, add the test item corresponding to the NET package to the first test item list; The processing module is further configured to determine a first component corresponding to a changed test item in the first test item list; The first component is replaced with a second component, and a second circuit board to be tested is determined based on the second component.

6. The device according to claim 5, characterized in that The acquisition module is used to acquire parameters of each first component in the first circuit board to be tested, wherein the parameters of each first component include the coordinates of the component pad connected to the NET corresponding to each first component, the component position number, the component model number, and the component direction; and acquire parameters of each second component in the second circuit board to be tested, wherein the parameters of each second component include the coordinates of the component pad connected to the network NET corresponding to each second component, the component position number, the component model number, and the component direction; The construction module is used to construct the first plane model based on the parameters of the first components, and different first components are presented in the first plane model based on different shapes and / or colors; and to construct the second plane model based on the parameters of the second components, and different second components are presented in the second plane model based on different shapes and / or colors.

7. The device according to claim 6, characterized in that The acquisition module is configured to match the NET according to the pin information of the first circuit board to be tested, and if the NET matches the pin information of the first circuit board to be tested, acquire the pad connected to the NET, the coordinates of the pad, and the component number corresponding to the pad; The NET is matched according to the pin information of the second circuit board to be tested. If the NET matches the pin information of the second circuit board to be tested, the pad connected to the NET, the coordinates of the pad, and the component position number corresponding to the pad are obtained.

8. The device according to claim 5, characterized in that The generation module includes: a numbering submodule, configured to number the components presented in the first plane model and the second plane model respectively according to the same component numbering strategy; a comparison submodule, configured to compare whether the models of the first component and the second component having the same component number in the first plane model and the second plane model are consistent; The determination submodule is configured to determine that the test item corresponding to the second component is a target test item if the first component and the second component having the same component number are of different models.

9. An electronic device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor. The instructions are executed by the at least one processor to enable the at least one processor to perform the method for testing a circuit board according to any one of claims 1 to 4.

10. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: The computer instructions are used to enable the computer to execute the method for testing a circuit board according to any one of claims 1 to 4.

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