Method of forming a patterned hardmask and method of forming a plurality of conductive lines

Abstract

A method of manufacturing a patterned hardmask includes forming a plurality of first photoresist features on a hardmask layer; forming at least one sacrificial feature on the hardmask layer and between two adjacent ones of the plurality of first photoresist features; performing a trimming process on the plurality of first photoresist features to form a plurality of second photoresist features; and performing an etching process on the hardmask layer using the at least one sacrificial feature and the plurality of second photoresist features as an etching mask, wherein a plurality of openings are formed in the hardmask layer to obtain a patterned hardmask. Thereby, a fine metal line (width less than or equal to 12.5 nm) can be formed using the patterned hardmask through the patterned hardmask with narrow openings, and a relatively fine metal line can be formed using only one patterned hardmask.

Description

TECHNICAL FIELD

[0001] The present invention relates to a method of forming a hard mask and a method of forming a conductive line using the hard mask. BACKGROUND

[0002] The size of the conductive line of the semiconductor device is currently designed to be in the sub-micron range, and thus it is quite difficult to reduce the metal line (ML) in the manufacturing process. In addition, the current technology of forming the metal line has reached its limit, and thus a method of reducing the width of the metal line is required.

[0003] Therefore, the person skilled in the art has been devoted to developing a method to solve the above problems. SUMMARY

[0004] Therefore, the present invention proposes a method of manufacturing a patterned hard mask, which includes forming a plurality of first photoresist features on a hard mask layer; forming at least one sacrificial feature between two adjacent ones of the plurality of first photoresist features on the hard mask layer; performing a trimming process on the plurality of first photoresist features to form a plurality of second photoresist features; and performing an etching process on the hard mask layer using the at least one sacrificial feature and the plurality of second photoresist features as an etching mask, wherein a plurality of openings are formed in the hard mask layer to obtain a patterned hard mask.

[0005] In one or more embodiments of the present invention, the at least one sacrificial feature and the two adjacent ones of the plurality of second photoresist features are spaced apart by the same pitch.

[0006] In one or more embodiments of the present invention, forming the at least one sacrificial feature between the two adjacent ones of the plurality of first photoresist features on the hard mask layer further includes forming a sacrificial layer on the plurality of first photoresist features; and selectively removing the sacrificial layer and forming the sacrificial feature, wherein the sacrificial feature contacts one of the two adjacent ones of the plurality of first photoresist features.

[0007] In one or more embodiments of the present invention, selectively removing the sacrificial layer includes performing a selective etching process on the sacrificial layer in conjunction with an end point detection to expose an upper surface of each of the plurality of first photoresist features; and performing an etching lithography process on the sacrificial layer to form the sacrificial feature.

[0008] In one or more embodiments of the present invention, forming the at least one sacrificial feature between the two adjacent ones of the plurality of first photoresist features includes forming two sacrificial features between the two adjacent ones of the plurality of first photoresist features.

[0009] In one or more embodiments of the present invention, the two sacrificial features and the two adjacent ones of the plurality of second photoresist features are spaced apart by the same pitch, wherein the pitch is less than or equal to 12.5 nanometers.

[0010] In one or more embodiments of the application, two immediately adjacent ones of the plurality of conductive lines are spaced apart by the same pitch, wherein each conductive line has a width less than or equal to 12.5 nanometers.

[0011] In one or more embodiments of the application, the plurality of first photoresist features comprises a hydrocarbon, and the trimming process comprises an oxygen plasma process.

[0012] Another aspect of the application provides a method of forming a plurality of conductive lines, comprising: forming a plurality of first photoresist features on a hardmask layer; forming at least one sacrificial feature between two immediately adjacent ones of the plurality of first photoresist features on the hardmask layer; performing a trimming process on the plurality of first photoresist features to form a plurality of second photoresist features, whereby the sacrificial feature is between two immediately adjacent ones of the plurality of second photoresist features; performing a first etching process on the hardmask layer using the at least one sacrificial feature and the plurality of second photoresist features as an etching mask, wherein a plurality of openings are formed in the hardmask layer; performing a second etching process on a dielectric layer under the hardmask layer, whereby a plurality of recesses corresponding to the plurality of openings are formed in the dielectric layer; and forming the plurality of conductive lines in the plurality of recesses.

[0013] In one or more embodiments of the application, the at least one sacrificial feature and two immediately adjacent ones of the plurality of first photoresist features are alternately spaced apart by the same pitch.

[0014] In one or more embodiments of the application, forming the at least one sacrificial feature between two immediately adjacent ones of the plurality of first photoresist features comprises: forming a sacrificial layer on the plurality of first photoresist features; and selectively removing the sacrificial layer and forming the sacrificial feature, wherein the sacrificial feature contacts an immediately adjacent one of the plurality of first photoresist features.

[0015] In one or more embodiments of the application, selectively removing the sacrificial layer comprises: performing a selective etching process on the sacrificial layer with end-point detection to expose an upper surface of each of the plurality of first photoresist features; and performing an etching lithography process on the sacrificial layer to form the sacrificial feature.

[0016] In one or more embodiments of the application, forming the at least one sacrificial feature between two immediately adjacent ones of the plurality of first photoresist features comprises: forming two sacrificial features between two immediately adjacent ones of the plurality of first photoresist features.

[0017] In one or more embodiments of the application, the two sacrificial features and two immediately adjacent ones of the plurality of second photoresist features are spaced apart by the same pitch, wherein the pitch is less than or equal to 12.5 nanometers.

[0018] In one or more embodiments of the application, the plurality of openings are repeatedly arranged by the same pitch, wherein each of the plurality of openings has a width less than or equal to 12.5 nanometers.

[0019] In one or more embodiments of the present application, the plurality of photoresist features comprises a hydrocarbon and the trimming process comprises an oxygen plasma process.

[0020] In summary, the present application provides a method that shrinks a plurality of photoresist features on a hard mask using a trimming process, whereby a plurality of small-sized openings can be formed in the hard mask. In addition, an etching process can be performed on a dielectric layer using the patterned hard mask and a plurality of small-sized grooves can be formed. Thereby, fine metal lines (width less than or equal to 12.5 nm) can be formed and a relatively fine metal line can be formed using only one hard mask.

[0021] The above description only illustrates the problems to be solved by the present application, the technical means for solving the problems, and the effects thereof, and the specific details of the present application will be described in the embodiments and the related drawings below. BRIEF DESCRIPTION OF DRAWINGS

[0022] To achieve the above-mentioned advantages and features, the principles described above will be explained in more detail with reference to the embodiments, and the specific embodiments are shown in the drawings. These drawings only illustratively describe the present application, and therefore do not limit the scope of the application. The principles of the present application will be clearly explained, and additional features and details will be fully described through the drawings, in which:

[0023] FIG. 1A A flowchart illustrating a process of manufacturing a patterned hard mask in one or more embodiments of the present application is shown;

[0024] FIG. 1B A flowchart illustrating a process of manufacturing a plurality of conductive lines in one or more embodiments of the present application is shown;

[0025] FIGS. 2-8 A cross-sectional view that can be used to represent each step of manufacturing a hard mask; and

[0026] FIGS. 9-10 A cross-sectional view that can be used to represent each step of manufacturing a plurality of conductive lines. DETAILED DESCRIPTION

[0027] In the following, a plurality of embodiments of the present application will be disclosed with reference to the drawings. For the purpose of clear illustration, many practical details will be described in the following description. However, it should be understood that these practical details are not intended to limit the present application. That is, in some embodiments of the present application, these practical details are not necessary. In addition, for the purpose of simplifying the drawings, some conventional structures and elements will be shown in the drawings in a simple schematic manner.

[0028] Reference will now be made to FIG. 1A , FIG. 1AA flowchart of a method 100a of fabricating a patterned hardmask in some embodiments of the present application is shown. The method 100a starts at step 110a, which includes forming a plurality of first photoresist features on a hardmask layer. Next, the method 100a proceeds to step 120a, which includes forming at least one sacrificial feature on the hardmask layer and between two adjacent ones of the plurality of first photoresist features. The method 100a proceeds to step 130a, which includes performing a trimming process on the plurality of first photoresist features and forming a plurality of second photoresist features. Thereafter, the method 100a proceeds to step 140a, which includes using the at least one sacrificial feature and the plurality of second photoresist features as an etching mask and performing a first etching process on the hardmask layer, wherein a plurality of openings are formed in the hardmask layer to obtain a patterned hardmask.

[0029] FIGS. 2-8 A cross-sectional view can be used to represent each step of fabricating the hardmask. FIG. 2 A flowchart of a method 100a of fabricating a patterned hardmask in some embodiments of the present application is shown. The method 100a starts at step 110a, which includes forming a plurality of first photoresist features on a hardmask layer. Next, the method 100a proceeds to step 120a, which includes forming at least one sacrificial feature on the hardmask layer and between two adjacent ones of the plurality of first photoresist features. The method 100a proceeds to step 130a, which includes performing a trimming process on the plurality of first photoresist features and forming a plurality of second photoresist features. Thereafter, the method 100a proceeds to step 140a, which includes using the at least one sacrificial feature and the plurality of second photoresist features as an etching mask and performing a first etching process on the hardmask layer, wherein a plurality of openings are formed in the hardmask layer to obtain a patterned hardmask. FIG. 1A FIG. 2 Each detail of step 110a is shown in FIG. 1. Referring to FIG. 1, a plurality of first photoresist features 211 are formed on a hardmask layer 230, wherein the hardmask layer 230 is formed on a dielectric layer 250. In some embodiments of the present application, the dielectric layer 250 is formed on a semiconductor substrate, which can be, for example, a single-crystalline semiconductor silicon substrate. In some embodiments of the present application, the plurality of first photoresist features 211 are parallel line features, wherein each of the two adjacent ones of the plurality of first photoresist features 211 has the same pitch x1.

[0030] Specifically, a photoresist layer (not shown) is applied on the upper surface of the hardmask layer 230, and then the photoresist layer is exposed to light through a photomask (not shown). Depending on whether a positive photoresist or a negative photoresist is used, the exposed or unexposed portions of the photoresist layer are further removed, thereby forming the plurality of first photoresist features 211. In addition, the dielectric layer 250 comprises a dielectric material, such as silicon oxide, but the present application is not limited thereto.

[0031] FIGS. 3-5 A flowchart of a method 100a of fabricating a patterned hardmask in some embodiments of the present application is shown. The method 100a starts at step 110a, which includes forming a plurality of first photoresist features on a hardmask layer. Next, the method 100a proceeds to step 120a, which includes forming at least one sacrificial feature on the hardmask layer and between two adjacent ones of the plurality of first photoresist features. The method 100a proceeds to step 130a, which includes performing a trimming process on the plurality of first photoresist features and forming a plurality of second photoresist features. Thereafter, the method 100a proceeds to step 140a, which includes using the at least one sacrificial feature and the plurality of second photoresist features as an etching mask and performing a first etching process on the hardmask layer, wherein a plurality of openings are formed in the hardmask layer to obtain a patterned hardmask. FIG. 1A ​Details of step 120a include at least one sacrificial feature 221 formed on the hard mask layer 230 and between two adjacent first photoresist features 211. The sacrificial layer S is conformally formed on the first photoresist features 211 via a conformal deposition process, such as chemical vapor deposition (CVD), atomic layer deposition (ALD), or other suitable deposition processes. Furthermore, the sacrificial layer S can be made of silicon oxide or silicon nitride, but the invention is not limited thereto.

[0032] refer to FIG. 4 and FIG. 5 The sacrificial layer S is partially removed to form a sacrificial feature 221, which contacts one of the two adjacent first photoresist features 211. Specifically, a selective etching process is performed on the sacrificial layer S in conjunction with endpoint detection to expose the upper surface 211t of each first photoresist feature 211. Then, a photolithographic etching process is performed on the sacrificial layer S to form a two-phase separated sacrificial feature 221, with each sacrificial feature 221 spaced apart from the two adjacent first photoresist features 211.

[0033] refer to FIG. 6 and FIG. 7 Draw FIG. 1A Details of step 130a, wherein step 130a includes performing a trimming process on a plurality of first photoresist features 211 to form a plurality of second photoresist features 212. Specifically, the plurality of first photoresist features 211 include hydrocarbon materials, such as hydrocarbon-containing photoresist materials, and the trimming process includes an oxygen-containing plasma process, but the invention is not limited thereto. FIG. 6 Multiple first photoresist features 211a are formed by a trimming process, and each of the multiple first photoresist features 211a has a side portion 211b, wherein the height of the side portion 211b is lower than the center height of the first photoresist feature 211a, and the side portion 211b includes a recessed portion that is lower than the top of the adjacent sacrificial feature 221. FIG. 7 After performing the aforementioned trimming process, a photolithographic etching process is applied to the plurality of first photoresist features 211a, and some portions of the plurality of first photoresist features 211a are removed to form a plurality of second photoresist features 212. For example, FIG. 6 The side portion 211b is removed, but the invention is not limited thereto.

[0034] In some embodiments of the present application, the sacrificial features 221 and the immediately adjacent second photoresist features 212 are spaced apart by a pitch x2, where the pitch x2 is less than or equal to 12.5 nm, although the present application is not limited in this respect. In some embodiments of the present application, two immediately adjacent sacrificial features 221 are spaced apart by the same pitch x2, and two immediately adjacent sacrificial features 221 are formed between two immediately adjacent second photoresist features 212. That is, two immediately adjacent second photoresist features 212 are spaced apart by the same pitch x2 as the immediately adjacent sacrificial features 221, although the present application is not limited in this respect.

[0035] FIG. 8 depicted FIG. 1A Details of step 140a are depicted, where step 140a includes performing a first etching process on the hard mask layer 230 using the plurality of second photoresist features 212 and the plurality of sacrificial features 221 as an etch mask. Subsequently, a plurality of openings 231 are formed in the hard mask layer 230 to pattern the hard mask layer 230, thereby resulting in a patterned hard mask. The first etching process can include a non-isotropic etching process, such as a reactive ion etching process or a plasma dry etching process, although the present application is not limited in this respect. In some embodiments of the present application, the plurality of openings 231 are arranged in a repeating pattern with the same pitch x3, and each opening 231 has a width wl, where the width wl is less than or equal to 12.5 nm, although the present application is not limited in this respect.

[0036] Reference is made to FIG. 1BAnother aspect of the present disclosure is to provide a method 100b of forming a plurality of conductive lines. In some embodiments of the present disclosure, the method 100b starts from step 110b, which includes forming a plurality of first photoresist features on a hard mask layer. The method 100b then proceeds to step 120b, in which at least one sacrificial feature is formed on the hard mask layer and between two adjacent ones of the plurality of first photoresist features. The method 100b then proceeds to step 130b, which includes performing a trimming process on the plurality of first photoresist features to form a plurality of second photoresist features. Next, the method 100b performs step 140b, which includes using the at least one sacrificial feature and the plurality of second photoresist features as an etching mask and performing a first etching process on the hard mask layer, in which a plurality of openings are formed in the hard mask layer. The method 100b then proceeds to step 150b, which includes performing a second etching process on a dielectric layer under the hard mask layer, whereby a plurality of recesses corresponding to the plurality of openings are formed in the dielectric layer. Thereafter, the method 100b proceeds to step 160b, which includes forming a plurality of conductive lines in the plurality of recesses, respectively. In particular, steps 110a-140a of the method 100a can correspond to steps 110b-140b of the method 100b, and thus the method 100a and the method 100b have the same features, but the method 100b further includes steps 150b and 160b.

[0037] FIG. 9 Illustration FIG. 1B In detail of step 150b, which includes performing a second etching process on the dielectric layer 250 under the hard mask layer 230, whereby a plurality of recesses 251 corresponding to the plurality of openings 231 are formed in the dielectric layer 250. In this example, the hard mask layer 230 with the plurality of openings 231 serves as an etching mask in the second etching process, and the second etching process can be a non-isotropic etching process, such as a reactive ion etching process or a plasma dry etching process, but the present disclosure is not limited thereto.

[0038] FIG. 10 Illustration FIG. 1BDetails of step 160b are shown in FIG. 2, wherein step 160b includes forming a plurality of conductive lines 270 in the plurality of recesses 251 of the dielectric layer 250. In particular, the plurality of conductive lines 270 includes a conductive material, such as tungsten, aluminum, copper, titanium, tantalum, titanium nitride, tantalum nitride, or an alloy thereof. The plurality of conductive lines 270 can be formed by a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, electroplating (which can be either electroplating or electroless plating), or other suitable methods. In addition, a planarization process, such as a chemical mechanical polish (CMP) process, can be performed on the dielectric layer 250 and the plurality of conductive lines 270, whereby the top surface of the dielectric layer 250 and the top surface of the plurality of conductive lines 270 are flush with each other. In some embodiments of the present application, two adjacent conductive lines 270 of the plurality of conductive lines 270 are separated by the same pitch x4. Each conductive line 270 has the same width w2, and the width w2 is less than or equal to 12.5 nm, although the present application is not limited thereto.

[0039] In summary, the present application provides a method that shrinks the plurality of photoresist features on the hard mask using a trimming process, whereby a plurality of small-sized openings can be formed in the hard mask. In addition, the dielectric layer can be etched using the patterned hard mask and a plurality of small-sized recesses are formed. As a result, fine metal lines (width less than or equal to 12.5 nm) can be formed, and a relatively fine metal line can be formed using only one hard mask.

[0040] Having described several embodiments of the application, it is to be appreciated various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. Therefore, the true scope of the present application is indicated by the following claims.

[0041] LIST OF ABBREVIATIONS

[0042] 100a, 100b: method

[0043] 110a, 120a, 130a, 140a: step 110b, 120b, 130b, 140b, 150b, 160b: step 211, 211a: first photoresist feature

[0044] 211b: side portion

[0045] 211t: upper surface

[0046] 212: second photoresist feature

[0047] 221: sacrificial feature

[0048] 230: hard mask layer 231: opening 250: dielectric layer 251: recess 270: conductive line S: sacrificial layer w1, w2: width x1, x2, x3, x4: pitch

Claims

1. A method of manufacturing a patterned hard mask, characterized by, Comprising: forming a plurality of first photoresist features on a hardmask layer; forming at least one sacrificial feature between two first photoresist features adjacent to each other on the hardmask layer; performing a trimming process on the first photoresist features to form a plurality of second photoresist features; and performing an etching process on the hardmask layer using the at least one sacrificial feature and the second photoresist features as an etching mask, wherein a plurality of openings are formed in the hardmask layer to obtain the patterned hardmask.

2. The method of claim 1, wherein, The at least one sacrificial feature and the two second photoresist features adjacent to each other on both sides thereof are spaced apart at different pitches.

3. The method of claim 1, wherein, Forming the at least one sacrificial feature between the two first photoresist features adjacent to each other further comprises: forming a sacrificial layer on the first photoresist features; and partially removing the sacrificial layer and forming the sacrificial feature, wherein the sacrificial feature contacts one of the two first photoresist features adjacent to each other.

4. The method of claim 3, wherein, Partially removing the sacrificial layer comprises: performing a selective etching process on the sacrificial layer in conjunction with end-point detection to expose an upper surface of each of the first photoresist features; and performing an etching lithography process on the sacrificial layer to form the sacrificial feature.

5. The method of claim 1, wherein, Forming the at least one sacrificial feature between the two first photoresist features adjacent to each other comprises: forming two sacrificial features between the two first photoresist features adjacent to each other.

6. The method of claim 5, wherein, The two sacrificial features and the two second photoresist features adjacent to each other on both sides thereof are spaced apart at the same pitch.

7. The method of claim 6, wherein, The pitch is less than or equal to 12.5 nanometers.

8. The method of claim 1, wherein, The openings are repeatedly arranged at the same pitch.

9. The method of claim 8, wherein, The openings have a width less than or equal to 12.5 nanometers.

10. The method of claim 1, wherein, The first photoresist features comprise hydrocarbons, and the trimming process comprises an oxygen plasma process.

11. A method of forming a plurality of electrically conductive lines, the method comprising: Comprising: forming a plurality of first photoresist features on a hardmask layer; forming at least one sacrificial feature between two first photoresist features adjacent to each other; performing a trimming process on the first photoresist features to form a plurality of second photoresist features, whereby the sacrificial feature is located between two second photoresist features adjacent to each other; performing a first etching process on the hardmask layer using the at least one sacrificial feature and the second photoresist features as an etching mask, wherein a plurality of openings are formed in the hardmask layer; performing a second etching process on a dielectric layer under the hardmask layer, whereby a plurality of recesses corresponding to the openings are formed in the dielectric layer; and forming the conductive lines in the recesses. The at least one sacrificial feature and the two second photoresist features adjacent to each other on both sides thereof are spaced apart at different pitches.

12. The method of claim 11, wherein, Forming the at least one sacrificial feature between the two first photoresist features adjacent to each other comprises:

13. The method of claim 11, wherein, forming a sacrificial layer on the first photoresist features; and partially removing the sacrificial layer and forming the sacrificial feature, wherein the sacrificial feature contacts an adjacent one of the first photoresist features. Partially removing the sacrificial layer comprises:

14. The method of claim 13, wherein, performing a selective etching process on the sacrificial layer in conjunction with end-point detection to expose an upper surface of each of the first photoresist features; and performing an etching lithography process on the sacrificial layer to form the sacrificial feature. Forming the at least one sacrificial feature between the two first photoresist features adjacent to each other comprises:

15. The method of claim 11, wherein, forming two sacrificial features between the two first photoresist features adjacent to each other. two of the sacrificial features are formed between two of the first photoresist features that are adjacent to each other.

16. The method of claim 15, wherein, The two sacrificial features and the two second photoresist features adjacent to each other on both sides of the two sacrificial features are spaced apart by the same pitch.

17. The method of claim 16, wherein, The pitch is less than or equal to 12.5 nanometers.

18. The method of claim 11, wherein, The two conductive lines that are adjacent to each other are spaced apart by the same pitch.

19. The method of claim 11, wherein, Each of the conductive lines has a width that is less than or equal to 12.5 nanometers.

20. The method of claim 11, wherein, The first photoresist features comprise a hydrocarbon, and the trimming process comprises an oxygen plasma process.

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