A power pulse application circuit with adjustable pulse width and a pulse adjustment method

Abstract

The application discloses a power pulse application circuit with adjustable pulse width and a pulse regulation method. C The circuit comprises a diode D3, a resistor R1, a resistor R C , a capacitor C1, a capacitor C2, a capacitor C5, a capacitor C C 1, a switch SW1, a switch SW2, a power supply VH, a switch and VH control and driving unit; the capacitor C1 is connected in parallel with a source; one end of the capacitor C C 1 and the capacitor C C 2 is connected with the resistor R C , and the other end is connected with a bus DUT+ and a bus DUT- respectively; the power supply VH is connected in parallel with the capacitor C2, the + end of the power supply VH is connected with the bus DUT+ through the switches SW1 and SW2 and the capacitor C C 1, and the - end of the power supply VH is connected with the bus DUT- through the capacitor C C 2; the switch and VH control and driving unit is used for controlling the on-off and switch sequence of the switches SW1 and SW2. The application realizes pulse output with the required pulse width by controlling the on-off and sequence of the switches SW1 and SW2, solves the technical problems that the pulse width regulation is limited and the pulse edge shape is not easy to regulate in the prior art, and especially can realize narrow pulse output.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of electronic equipment testing, and particularly relates to a power pulse applying circuit with adjustable pulse width and a pulse adjusting method. BACKGROUND

[0002] In the testing of electronic equipment, there is often a need to apply a pulse on the bus for testing whether the electronic equipment can work reliably under the interference of the bus. For example, EHV-16HV pulse and EHV-10Load-dump of VW80300 Issue 2016-10 Electrical and Electronic High-Voltage Components in Motor Vehicles. When a pulse is applied on the bus, the pulse not only acts on the device under test, but also acts on the source. In order to reduce the interaction between the pulse and the source, a common solution is to connect an inductor between the source and the device under test, and the pulse is applied to the device under test, and the inductor isolates the interaction between the pulse and the source, as shown in FIG. 1. Figure 1 S,HV is a source for supplying power to the device under test DUT. After the bus is powered on, two capacitors C C are charged to one-half of the bus voltage through resistors R C The power supply V H charges the capacitor C2 to the required voltage, and the switch is closed to apply a pulse to the bus, and the inductors L1 and L2 isolate the influence of the pulse on the source.

[0003] In the above scheme, whether a mechanical switch or an electronic switch is used, it is not easy to generate a power pulse with a narrow pulse width, so that the pulse width adjustment is greatly limited, and the edge shape of the pulse is also not easy to adjust. In addition, when the pulse is applied to the bus, the inductor can suppress the interaction between the pulse and the source, but at the end of the pulse, due to the characteristics of the inductor, the inductor will generate a negative pulse and an oscillation waveform on the bus, and even the bus voltage will become negative, which is contrary to the test purpose. SUMMARY

[0004] In view of the defects of the prior art, the purpose of the present application is to provide a power pulse applying circuit with adjustable pulse width and a pulse adjusting method, which can output a power pulse with a required width and adjust the pulse edge.

[0005] In order to achieve the above purpose, the present application adopts the following technical solutions:

[0006] On the one hand, the present application provides a pulse applying test circuit with adjustable pulse width, which comprises a diode D3, a resistor R1, a resistor R​C , capacitor C1, capacitor C2, capacitor C5, capacitor C C 1, capacitor C C 2, switch SW1, switch SW2, power supply VH, switch and VH control and driving unit; wherein, the capacitor C1 is connected in parallel with the source; the capacitor C C 1 and one end of the capacitor C C 2 are connected to the resistor R C , the other end is connected to the bus DUT+ and DUT- respectively; the power supply VH is connected in parallel with the capacitor C 2, the + end of the power supply VH is connected to the bus DUT+ through the capacitor C C 1 and the switch SW1, SW2 connected in series; the - end of the power supply VH is connected to the bus DUT- through the capacitor C C 2; the switch and VH control and driving unit is used for controlling the on-off of the switch SW1, SW2, switch timing;

[0007] The switch SW1 and SW2 use bidirectional blocking switch; or, the switch SW1 and SW2 use unidirectional switch and the switch needs bidirectional blocking, and the switch SW3 is connected in series with the switch SW1 and SW2, the switch SW3 uses MOS tube and the body diode direction of SW3 is opposite to that of SW1 and SW2; or, the switch SW3 uses diode and the body diode direction of SW3 is opposite to that of SW1 and SW2.

[0008] On the other hand, the pulse regulation method of the adjustable pulse width power pulse applying circuit is given, one of the following three ways is used to control each switch by the switch and VH control and driving unit to realize the required pulse width and pulse amplitude output:

[0009] (1) after the power supply VH charges the capacitor C2 to the required pulse amplitude, any one of the switch SW1 and SW2 is turned on before the other one is turned off, then the on time of the other switch is the required pulse width;

[0010] (2) after the power supply VH charges the capacitor C2 to the required pulse amplitude, the switch SW1 and SW2 are turned on and turned off at the same time, then the on time of them is the required pulse width;

[0011] (3) after the power supply VH charges the capacitor C2 to the required pulse amplitude, any one of the switch SW1 and SW2 is turned on before the other one is turned off, then the common on time of the switch SW1 and SW2 is the required pulse width, which can produce narrow pulse under this way;

[0012] Meanwhile, in the modes (1) to (3), if the switch SW3 is provided in the circuit, the power source VH charges the capacitor C2 to the required pulse amplitude, and then the switch SW3 is turned on before the switches SW1 and SW2 and turned off after the switches SW1 and SW2.

[0013] Further, when the paths of the switches SW1 to SW3 are established and the voltage VH starts to output, the rising edge of the pulse is adjusted by adjusting the output impedance of the power source VH; the falling edge of the pulse is adjusted by adjusting the off-waveform of the power source VH; or when the paths of the switches SW1 to SW3 are established and the voltage VH starts to output, the output waveform of the power source VH is adjusted to realize the required pulse waveform output.

[0014] Further, the adjustable pulse width application pulse test circuit of the present application further comprises a pulse edge adjusting circuit, which comprises a resistor R, a switch SW4, a switch SW5 and a capacitor C, wherein the resistor R is connected in parallel with the power source VH through the switch SW4; the capacitor C is connected to the -terminal of the power source VH through one end of the switch SW5 and connected to the common node of the switches SW1 and SW2 through the other end.

[0015] On the other hand, the present application also provides a pulse adjusting method of the adjustable pulse width application pulse test circuit of the present application comprising the pulse edge adjusting circuit, which controls the switches by using the switches and the VH control and driving unit to realize the required pulse edge and pulse width output, and comprises the following modes:

[0016] (1) generating a pulse with fixed pulse width and pulse amplitude:

[0017] the switches SW4 and SW5 are turned off; the power source VH charges the capacitor C2 to the required pulse amplitude, and then any one of the switches SW1 and SW2 is turned on before the other one and turned off, and the on-time of the other switch is the required pulse width; or the switches SW1 and SW2 are turned on and turned off at the same time, and the on-time of them is the required pulse width;

[0018] (2) generating a pulse with fixed pulse width and pulse amplitude and requiring narrow pulse:

[0019] the switches SW4 and SW5 are turned off; the power source VH charges the capacitor C2 to the required pulse amplitude; any one of the switches SW1 and SW2 is turned on before the other one and turned off, and the common on-time of the switches SW1 and SW2 is the required pulse width, and narrow pulse can be generated in this mode;

[0020] (3) generating a pulse with fixed pulse width and pulse amplitude and requiring narrow pulse, and the falling edge of the pulse is adjustable:

[0021] Switch SW4 is off; after power source VH charges capacitor C2 to the required pulse amplitude; either switch SW1 or SW2 is turned on before the other one is turned off, then the common on time of switch SW1 and SW2 is the required pulse width, in this way, narrow pulse can be generated; switch SW5 is turned on immediately after either switch SW1 or SW2 is turned on, thus charging capacitor C;

[0022] Meanwhile, in modes (1)-(3), if switch SW3 is provided, after power source VH charges capacitor C2 to the required pulse amplitude, switch SW3 is turned on before switch SW1 and SW2, and switch SW3 is turned off later than switch SW1 and SW2.

[0023] Further, in mode (1), if the falling edge needs to be adjusted, the on time of switch SW1 and SW2 is prolonged, and switch SW4 is turned on at the beginning of the prolonging operation, thus realizing the adjustment of the falling edge by connecting resistor R in parallel to capacitor C2.

[0024] Further, when the paths of switches SW1-SW3 are established and voltage VH starts to output, the rising edge of the pulse is adjusted by adjusting the output impedance of power source VH and turning on switch SW4 at the same time; the falling edge of the pulse is adjusted by adjusting the output waveform of power source VH and turning on switch SW4 at the same time; or, when the paths of switches SW1-SW3 are established and voltage VH starts to output, the required pulse waveform output is realized by adjusting the output waveform of power source VH and turning on switch SW4 or SW5.

[0025] Further, the adjustable pulse width application pulse test circuit of the present application can further comprise a decoupling circuit, which has three implementation modes:

[0026] (1) comprising inductor L1 and diode D1, inductor L1 is connected to the positive output of the source, and diode D1 is connected in parallel with inductor L1 in the same direction;

[0027] (2) comprising inductor L2 and diode D2, inductor L2 is connected to the negative output of the source, and diode D2 is connected in parallel with inductor L2 in the same direction;

[0028] (3) comprising inductor L1, inductor L2, diode D1 and D2; diode D1 and D2 are connected in parallel with inductor L1 and L2 in the same direction, respectively.

[0029] Further, the adjustable pulse width application pulse test circuit of the present application further comprises an absorption circuit, the absorption circuit comprises a diode D3, a resistor R1 and a capacitor C5, wherein the diode D3 and the resistor R1 are connected in reverse parallel, the cathode of the diode D3 is connected to the bus DUT+ through one end of the resistor R1, the anode of the diode D3 is connected to the other end of the resistor R1 and then connected to one end of the capacitor C5, and the other end of the capacitor C5 is connected to the bus DUT-.

[0030] Compared with the prior art, the present application has the following technical effects:

[0031] 1. The on-off and timing of the switches SW1 and SW2 are controlled by the switch and VH control and driving unit, so as to realize the pulse output with the required pulse width, solve the technical problems that the pulse width adjustment is limited and the pulse edge shape is not easy to adjust in the prior art, and especially realize narrow pulse output. Here, the narrow pulse refers to the pulse in the order of ns in the present application.

[0032] 2. The switch SW4 and the resistor R are arranged as a discharge circuit of the power supply VH and the capacitor C2, so as to control the pulse edge under the control of the switch and VH control and driving unit. The switch SW5 and the capacitor C are arranged, so as to adjust the pulse edge under the control of the switch and VH control and driving unit.

[0033] 3. The inductor and the diode connected in the same direction in parallel are arranged on the bus, the energy of the inductor is reversely released and absorbed nearby, the influence on the bus is minimal, the bus voltage is not excessively lowered, and the technical problem that the inductor generates a negative pulse and oscillation on the bus at the end of the pulse due to the characteristics of the inductor, and even the bus becomes negative, is effectively solved. According to the test, there is almost no negative pulse on the bus at the end of the pulse.

[0034] 4. The switch SW3 is arranged in series behind the switches SW1 and SW2, so as to realize the anti-backflow effect, that is, the bidirectional blocking effect.

[0035] 5. The absorption circuit composed of the diode D3, the resistor R1 and the capacitor C5 is connected to the bus, so as to effectively absorb the oscillation generated by the cable and the like. In the steady state, the capacitor C5 is charged to the bus voltage through the resistor R1. When there is a negative voltage and oscillation on the bus, the diode D3 and the capacitor C5 are used for absorption. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 is a schematic diagram of the VW80300-EHV16 pulse application test circuit;

[0037] Figure 2 is a schematic diagram of the adjustable pulse width power pulse application circuit of the embodiment 1;

[0038] Figure 3 1 is a schematic diagram of a power pulse application circuit with adjustable pulse width according to Example 3;

[0039] Figure 4 This is the pulse waveform required by the EHV-16 test of VW80300; in the figure: V N，HV The power supply voltage from the source to the device under test (DUT), namely the bus steady-state voltage, V peak is the pulse amplitude, ⊿V HV / ⊿t is the pulse rising slope, t h is the minimum time between one pulse and another pulse, t ip is the pulse width.

[0040] Figure 5 This is the pulse waveform required by the EHV-10 test of VW80300; in the figure: V N，HV The power supply voltage from the source to the device under test (DUT), namely the bus steady-state voltage, V peak is the pulse amplitude, ⊿V HV / ⊿t is the pulse rising slope, t h It is the minimum time between one pulse and another.

[0041] Figure 6 This is the waveform of the applied pulse according to the VW80300-EHV16 circuit;

[0042] Figure 7 This is the waveform of the pulse applied to the circuit of the present invention.

[0043] The present invention is further explained below with reference to the accompanying drawings and specific embodiments. DETAILED DESCRIPTION

[0044] Example 1:

[0045] like Figure 2 As shown, the power pulse applying circuit with adjustable pulse width provided in this embodiment includes a diode D3, a resistor R1, a resistor R C , capacitor C1, capacitor C2, capacitor C5, capacitor C C 1. Capacitor C C 2. Switch SW1, switch SW2, power supply VH, switch and VH control and drive unit; wherein: capacitor C1 is connected in parallel with the source; capacitor C C 1 and capacitor C C One end of 2 is connected to the resistor R C The other end is connected to the busbars DUT+ and DUT- respectively; the power supply VH is connected in parallel with the capacitor C2, and the + end of the power supply VH passes through the capacitor C through the switches SW1 and SW2 connected in series. C 1 is connected to the bus DUT+, and the - end of the power supply VH passes through the capacitor CC 2 is connected to the bus DUT-; the switch and VH control and drive unit is used to control the on and off and switching timing of the switches SW1 and SW2. The switch and VH control and drive unit can adopt a single-chip microcomputer.

[0046] In this embodiment, three switches SW1 and SW2 are connected in series to realize Figure 1 For details on the switches in Figure 2 Switches SW1 and SW2 use bidirectional blocking switches; or, switches SW1 and SW2 use unidirectional switches (such as MOS tubes or IGBT devices) and Figure 1 When the switch in the circuit needs to be bidirectionally blocked, a switch SW3 is connected in series here. The switch SW3 can use a MOS tube as an anti-backfeed switch (in Figure 2 The positions of the switches SW1, SW2, and SW3 are adjustable), and the direction of the body diode of SW3 is opposite to the direction of the body diodes of SW1 and SW2; or, the switch SW3 uses a diode and the direction of the body diodes is opposite to that of SW1 and SW2.

[0047] Among the above components, the source is the power supply of the device under test (DUT). C 1 and capacitor C C 2 plays the role of coupling the pulse to the bus; resistor R C With capacitor C C 1 and capacitor C C 2 constitutes a charging circuit; switches SW1, SW2 and SW3 are used to control the pulses applied by the power supply VH to the bus. The bus voltage passes through the resistor R C Give two capacitors C C1 and C C2 Charging; steady state resistance R C The voltage is zero, and the two capacitors C C1 and C C2 Each is 1 / 2 bus voltage (assuming C C1 and C C2 The power supply VH charges capacitor C2. Switches SW1-SW3 are conducting, and the bus voltage instantly rises to the bus voltage plus the voltage across C2, generating a pulse that acts on the DUT. The switch and VH control and drive unit controls the on / off switching and timing of each switch to control the pulse output.

[0048] Example 2:

[0049] Based on the power pulse application circuit with adjustable pulse width in Example 1, this Example 2 provides a pulse adjustment method, specifically using one of the following three methods to control each switch using a switch and a VH control and drive unit to achieve the required pulse width and pulse amplitude output:

[0050] (1) the power source VH charges the capacitor C2 to the required pulse amplitude, then either one of the switches SW1 and SW2 is turned on before the other one is turned off, and the on time of the other switch is the required pulse width;

[0051] (2) the power source VH charges the capacitor C2 to the required pulse amplitude, then the switches SW1 and SW2 are turned on and turned off at the same time, and the on time of them is the required pulse width;

[0052] (3) the power source VH charges the capacitor C2 to the required pulse amplitude, then either one of the switches SW1 and SW2 is turned on before the other one is turned off, and the common on time of the switches SW1 and SW2 is the required pulse width, and in this way, a narrow pulse can be generated, and the narrow pulse here refers to a pulse of ns level in the present application.

[0053] Meanwhile, in the ways (1) to (3), if the switch SW3 is provided, then the power source VH charges the capacitor C2 to the required pulse amplitude, the switch SW3 is turned on before the switches SW1 and SW2, and the switch SW3 is turned off later than the switches SW1 and SW2.

[0054] Preferably, in the above ways, when the paths of the switches SW1 to SW3 are established and the voltage VH starts to output, the rising edge of the pulse is adjusted by adjusting the output impedance of the power source VH; the falling edge of the pulse is adjusted by adjusting the off-waveform of the power source VH; or when the paths of the switches SW1 to SW3 are established and the voltage VH starts to output, the required pulse waveform output is achieved by adjusting the output waveform of the power source VH.

[0055] Embodiment 3:

[0056] In order to meet the higher test requirements and realize the adjustment of the pulse edge, a pulse edge adjustment circuit can be added on the basis of the adjustable pulse width power pulse application circuit in Embodiment 1; the pulse edge adjustment circuit comprises a resistor R, a switch SW4, a switch SW5 and a capacitor C, wherein the resistor R is connected in parallel with the power source VH through the switch SW4; the capacitor C is connected to the -terminal of the power source VH through one end of the switch SW5 and connected to the common node of the switches SW1 and SW2 at the other end. In the scheme of the present embodiment, the switch SW4 and the resistor R are a discharge circuit of the power source VH and the capacitor C2, which is used to control the pulse edge under the control of the switch and VH control and driving unit; the switch SW5 and the capacitor C are used to adjust the pulse edge under the control of the switch and VH control and driving unit.

[0057] Embodiment 4:

[0058] Based on the adjustable pulse width power pulse application circuit in Embodiment 3, the present embodiment gives a pulse width adjustment method, which is to control the switches by using the switch and VH control and driving unit to achieve the required pulse edge and pulse width output, including the following ways:

[0059] (1) Generate a pulse with fixed pulse width and pulse amplitude:

[0060] Switches SW4 and SW5 are off; after power source VH charges capacitor C2 to the required pulse amplitude, either one of switches SW1 and SW2 is turned on first and then turned off, and the on time of the other switch is the required pulse width; or, switches SW1 and SW2 are turned on and off simultaneously, and the on time of them is the required pulse width.

[0061] Preferably, on the basis of the above operation mode, if the falling edge also needs to be adjusted, the on time of switches SW1 and SW2 is extended, and switch SW4 is turned on at the beginning of the extension operation so as to make resistor R parallel to capacitor C2, thereby achieving the adjustment of the falling edge (for example, the originally required pulse width is 10us, and switch SW4 is turned on when the on time of the latter switch among switches SW1 and SW2 reaches 10us). In this mode, resistor R, capacitor C2 and power source VH jointly determine the falling edge, and each device is selected according to the falling edge to be adjusted. The pulse waveform generated in this mode is shown in Figure 4 .

[0062] (2) Generate a pulse with fixed pulse width and pulse amplitude and require narrow pulse:

[0063] Switches SW4 and SW5 are off; after power source VH charges capacitor C2 to the required pulse amplitude; either one of switches SW1 and SW2 is turned on first and then turned off, and the common on time of switches SW1 and SW2 is the required pulse width, and in this mode, narrow pulse can be generated.

[0064] (3) Generate a pulse with fixed pulse width and pulse amplitude and require narrow pulse, and the pulse falling edge is adjustable:

[0065] Switch SW4 is off; after power source VH charges capacitor C2 to the required pulse amplitude; either one of switches SW1 and SW2 is turned on first and then turned off, and the common on time of switches SW1 and SW2 is the required pulse width, and in this mode, narrow pulse can be generated; switch SW5 is turned on immediately after either one of switches SW1 and SW2 is turned on, so as to charge capacitor C, and in this mode, capacitor C and device under test DUT determine the pulse falling edge, and each device is selected according to the falling edge to be adjusted. In this mode, the pulse waveform shown in Figure 4 and the narrow pulse waveform shown in Figure 5 can be generated.

[0066] At the same time, in methods (1) to (3), if switch SW3 is provided, after power supply VH charges capacitor C2 to the required pulse amplitude, switch SW3 is turned on before switches SW1 and SW2, and switch SW3 is turned off later than switches SW1 and SW2.

[0067] Preferably, in the above manner, when the path of switches SW1 to SW3 is established, the voltage VH starts to be output, and the rising edge of the pulse is adjusted by adjusting the output impedance of the power supply VH and turning on the switch SW4 at the same time; the falling edge of the pulse is adjusted by adjusting the power-off waveform of the power supply VH and turning on the switch SW4 at the same time; or, when the path of switches SW1 to SW3 is established, the voltage VH starts to be output, the output waveform of the power supply VH is adjusted and the switch SW4 or SW5 is turned on to achieve the required pulse waveform output.

[0068] Example 5:

[0069] In order to solve the technical problem in the prior art that the inductor may generate negative pulses and oscillations on the busbar due to the characteristics of the inductor at the end of the pulse, and may even turn the busbar negative, a decoupling circuit is added to the power pulse application circuit with adjustable pulse width in Example 1 and Example 3, respectively. The circuit has three implementation methods: (1) including an inductor L1 and a diode D1, the inductor L1 is connected to the positive output of the source, and the diode D1 is connected in parallel with the inductor L1 in the same direction (that is, the direction from the anode to the cathode of the diode is consistent with the direction of the current flowing through the inductor in a steady state); (2) including an inductor L2 and a diode D2, the inductor L2 is connected to the negative output of the source, and the diode D2 is connected in parallel with the inductor L2 in the same direction (that is, the direction from the anode to the cathode of the diode is consistent with the direction of the current flowing through the inductor in a steady state); (3) including an inductor L1, an inductor L2, diodes D1 and D2; the diodes D1 and D2 are connected in parallel with the inductors L1 and L2 in the same direction (that is, the direction from the anode to the cathode of the diode is consistent with the direction of the current flowing through the inductor in a steady state).

[0070] In the above technical solution, due to the presence of inductors L1 and L2, the voltage at the source end remains unchanged. Diode D1 is connected in parallel with inductor L1. In steady-state, current flows through inductor L1, but no current flows through diode D1. When a pulse is applied to the bus, the diode remains in the off state, the pulse is turned off, and the energy generated by inductor L1 is released in the reverse direction and absorbed locally by diode D1. Diode D2 is connected in parallel with inductor L2. In steady-state, current flows through inductor L2, but no current flows through diode D2. When a pulse is applied to the bus, the diode remains in the off state, the pulse ends, and the energy generated by inductors L1 and L2 is released in the reverse direction and absorbed locally by diodes D1 and D2. This method of absorbing the reverse release of inductor energy locally minimizes the impact on the bus and does not reduce the bus voltage too much.

[0071] By Figure 1The pulse is applied to the circuit shown in Fig. 8 to obtain the waveform shown in Fig. 9. Figure 6 The waveform of the pulse applied to the circuit shown in Fig. 8 is shown in Fig. 9. Figure 6 As can be seen from Fig. 9, there is a large negative pulse at the end of the pulse. After the decoupling circuit shown in Fig. 10 is added to the circuit shown in Fig. 8, the pulse is applied to the circuit to obtain the waveform shown in Fig. 11. Figure 7 The waveform of the pulse applied to the circuit shown in Fig. 8 is shown in Fig. 9. Figure 7 As can be seen from the test waveform of Fig. 12, the defect of the original test circuit is eliminated, and there is almost no negative pulse at the end of the pulse.

[0072] Example 6:

[0073] In order to absorb the oscillation generated by the cable and the like, on the basis of Examples 1, 3 and 5, an absorbing circuit can be added, which includes a diode D3, a resistor R1 and a capacitor C5, wherein the diode D3 and the resistor R1 are connected in reverse parallel, the cathode of the diode D3 is connected to one end of the resistor R1 through the bus DUT+, the anode of the diode D3 is connected to the other end of the resistor R1, and then connected to one end of the capacitor C5, and the other end of the capacitor C5 is connected to the bus DUT-. The absorbing circuit in this example can effectively absorb the oscillation generated by the cable and the like. In the steady state, the capacitor C5 is charged to the bus voltage through the resistor R1; when there is a negative voltage and oscillation on the bus, it is absorbed through the diode D3 and the capacitor C5.

Claims

1. A power pulse application circuit with adjustable pulse width, characterized in that: Including diode D3, resistor R1, resistor R C , capacitor C1, capacitor C2, capacitor C5, capacitor C C 1. Capacitor C C 2. Switch SW1, switch SW2, power supply VH, switch and VH control and drive unit; wherein, the capacitor C1 is connected in parallel with the source; the capacitor C C 1 and capacitor C C One end of 2 is connected to the resistor R C The other end is connected to the busbar DUT+ and DUT- respectively; the power supply VH is connected in parallel with the capacitor C2, and the + end of the power supply VH is connected to the capacitor C2 through the switches SW1 and SW2 in series. C 1 is connected to the bus DUT+, and the - end of the power supply VH passes through the capacitor C C 2 is connected to the bus DUT-; the switch and VH control and drive unit are used to control the on / off and switching timing of switches SW1 and SW2; The switches SW1 and SW2 are bidirectional blocking switches; or, when the switches SW1 and SW2 are unidirectional switches and bidirectional blocking is required, a switch SW3 is connected in series with the switches SW1 and SW2, and the switch SW3 uses a MOS transistor and the direction of the body diode of SW3 is opposite to the direction of the body diodes of SW1 and SW2; or, when the switches SW1 and SW2 are unidirectional switches and bidirectional blocking is required, a switch SW3 is connected in series with the switches SW1 and SW2, and the switch SW3 uses a diode and the direction of the body diode of SW3 is opposite to the direction of the body diodes of SW1 and SW2; The pulse adjustment method of the power pulse application circuit with adjustable pulse width adopts one of the following three methods, using switches and VH control and driving units to control each switch to achieve the required pulse width and pulse amplitude output: (1) After the power supply VH charges the capacitor C2 to the required pulse amplitude, if either switch SW1 or SW2 is turned on first and then turned off later than the other, the on-time of the other switch is the required pulse width; (2) After the power supply VH charges the capacitor C2 to the required pulse amplitude, the switches SW1 and SW2 are turned on and off at the same time, and their on-time is the required pulse width; (3) After the power supply VH charges the capacitor C2 to the required pulse amplitude, if either switch SW1 or SW2 is turned on or off earlier than the other, the combined on-time of switches SW1 and SW2 is the required pulse width. In this way, a narrow pulse can be generated. At the same time, in methods (1) to (3), if a switch SW3 is provided in the circuit, after the power supply VH charges the capacitor C2 to the required pulse amplitude, the switch SW3 is turned on before the switches SW1 and SW2, and the switch SW3 is turned off later than the switches SW1 and SW2; When the path of switches SW1 to SW3 is established, the voltage VH starts to be output, and the rising edge of the pulse is adjusted by adjusting the output impedance of the power supply VH; the falling edge of the pulse is adjusted by adjusting the power-off waveform of the power supply VH; or, when the path of switches SW1 to SW3 is established, the voltage VH starts to be output, and the output waveform of the power supply VH is adjusted to achieve the required pulse waveform output.

2. The power pulse applying circuit with adjustable pulse width according to claim 1, characterized in that: It also includes a pulse edge adjustment circuit, which includes a resistor R, a switch SW4, a switch SW5 and a capacitor C, wherein the resistor R is connected in parallel with the power supply VH through the switch SW4; the capacitor C is connected to the - end of the power supply VH through the switch SW5, and the other end is connected to the common node of the switches SW1 and SW2.

3. The power pulse applying circuit with adjustable pulse width according to claim 1 or 2, characterized in that: A decoupling circuit is also included. The decoupling circuit has three implementation modes: (1) It includes inductor L1 and diode D1. Inductor L1 is connected to the positive output of the power source, and diode D1 is connected in parallel with inductor L1 in the same direction. (2) Inductor L2 and diode D2 are included. Inductor L2 is connected to the negative output of the source. Diode D2 is connected in parallel with inductor L2 in the same direction. (3) It includes an inductor L1, an inductor L2, and diodes D1 and D2; the diodes D1 and D2 are connected in parallel with the inductors L1 and L2 in the same direction, respectively.

4. The power pulse applying circuit with adjustable pulse width according to claim 1 or 2, characterized in that: It also includes an absorption circuit, which includes a diode D3, a resistor R1 and a capacitor C5, wherein the diode D3 and the resistor R1 are connected in reverse parallel, the cathode of the diode D3 and one end of the resistor R1 are connected to the bus DUT+, the anode of the diode D3 is connected to the other end of the resistor R1 and then connected to one end of the capacitor C5, and the other end of the capacitor C5 is connected to the bus DUT-.

5. A pulse adjustment method for a power pulse application circuit with adjustable pulse width according to claim 2, characterized in that: This method uses switches and VH control and drive units to control each switch to achieve the required pulse edge and pulse width output, including the following methods: (1) Generate pulses with fixed pulse width and pulse amplitude: Switches SW4 and SW5 are turned off; After the power supply VH charges the capacitor C2 to the required pulse amplitude, if either switch SW1 or SW2 is turned on first and then off, the on-time of the other switch is the required pulse width; alternatively, if switches SW1 and SW2 are turned on and off simultaneously, their on-time is the required pulse width; (2) Generate pulses with fixed pulse width and pulse amplitude and require narrow pulses; Switches SW4 and SW5 are turned off; power supply VH charges capacitor C2 to the required pulse amplitude; if either switch SW1 or SW2 is turned on first or turned off first, the combined on time of switches SW1 and SW2 is the required pulse width. In this way, narrow pulses can be generated. (3) Generate pulses with fixed pulse width and pulse amplitude and require narrow pulses with adjustable pulse falling edge: Switch SW4 is turned off; After the power supply VH charges the capacitor C2 to the required pulse amplitude; if either switch SW1 or SW2 is turned on before the other, the combined on-time of switches SW1 and SW2 is the required pulse width. In this way, a narrow pulse can be generated; switch SW5 is turned on immediately after either switch SW1 or SW2 is turned on, thereby charging the capacitor C; At the same time, in methods (1) to (3), if switch SW3 is provided, after the power supply VH charges the capacitor C2 to the required pulse amplitude, switch SW3 is turned on before switches SW1 and SW2, and switch SW3 is turned off later than switches SW1 and SW2; When the path of switches SW1 to SW3 is established, voltage VH starts to be output, and the rising edge of the pulse is adjusted by adjusting the output impedance of power supply VH and turning on switch SW4 at the same time; the falling edge of the pulse is adjusted by adjusting the power-off waveform of power supply VH and turning on switch SW4 at the same time; or, when the path of switches SW1 to SW3 is established, voltage VH starts to be output, the output waveform of power supply VH is adjusted and switch SW4 or SW5 is turned on to achieve the required pulse waveform output.

6. The method according to claim 5, wherein In the method (1), if the falling edge needs to be adjusted, the on-time of switches SW1 and SW2 is extended, and at the beginning of the extension operation, switch SW4 is turned on so that resistor R is connected in parallel to both ends of capacitor C2 to achieve the adjustment of the falling edge.

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