ADC circuit and control method thereof

Abstract

The present invention provides an ADC circuit and a control method thereof, belonging to the field of electronic technology. The ADC circuit at least includes: an input preprocessing module and an analog-to-digital conversion module. The input preprocessing module is used to receive an input signal, and is configured to output a first signal based on the input signal when the first control signal is at a first level; and output a second signal based on the input signal when the first control signal is at a second level; the analog-to-digital conversion module is configured to output a corresponding first digital signal based on the sampled first signal during the conversion period when the second control signal is at a third level matching the first level, and output a corresponding second digital signal based on the sampled second signal when the second control signal is at a fourth level matching the second level; wherein the first control signal is level-switched during the conversion period, and the second control signal is level-switched during the sampling period. By adopting the present invention, continuous conversion of differential signals and single-ended signals can be achieved.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to an ADC circuit and a control method thereof. Background Art

[0002] In the field of electronic technology, analog-to-digital converter (ADC) circuits can be used for signal measurement to convert analog signals into digital signals.

[0003] In some application scenarios, it is necessary to support continuous measurement of differential signals and single-ended signals of different input channels. The current conventional practice is to switch the ADC working mode and use the differential mode and single-ended mode to process the differential signal and the single-ended signal respectively.

[0004] However, the existing ADC cannot run two working modes continuously. For example, the ADC needs to be reconfigured after the differential signal is processed, and then the single-ended signal is processed. There will be redundant mode switching time in between, and it cannot run continuously. And when the ADC accuracy requirements are relatively high, the ADC needs to be calibrated. The traditional method cannot meet the requirements of continuous calibration of the ADC differential mode and single-ended mode. Summary of the invention

[0005] In order to solve the problems of the prior art, an embodiment of the present invention provides an ADC circuit and a control method thereof. The technical solution is as follows:

[0006] According to one aspect of the present invention, there is provided an ADC circuit, the ADC circuit comprising at least: an input preprocessing module, an analog-to-digital conversion module;

[0007] The input preprocessing module is used to receive an input signal, and is configured to output a first signal based on the input signal when the first control signal is at a first level; and output a second signal based on the input signal when the first control signal is at a second level;

[0008] The analog-to-digital conversion module is connected to the input preprocessing module and is configured to sample the signal output by the input preprocessing module during a sampling period; during a conversion period, when the second control signal is a third level matching the first level, a corresponding first digital signal is output based on the sampled first signal, and when the second control signal is a fourth level matching the second level, a corresponding second digital signal is output based on the sampled second signal;

[0009] The first control signal is level-switched during the conversion period, and the second control signal is level-switched during the sampling period.

[0010] Optionally, the input preprocessing module includes at least a first switch;

[0011] The first switch is configured to switch the signal output by the input preprocessing module based on the first control signal.

[0012] Optionally, when the first control signal is at the first level, one end of the first switch is used to connect a negative input voltage to the negative end of the input preprocessing module, and the other end is connected to the analog-to-digital conversion module;

[0013] When the first control signal is at the second level, one end of the first switch is used to connect the first preset voltage to the negative end of the input preprocessing module, and the other end is connected to the analog-to-digital conversion module.

[0014] Optionally, the analog-to-digital conversion module includes a digital-to-analog conversion module, a comparison module and a logic module, and the digital-to-analog conversion module is used for sampling, holding and quantization;

[0015] The digital-to-analog conversion module is connected to the input preprocessing module and is configured to, during the conversion period, when the second control signal is at the third level, execute the first working mode corresponding to the first signal; and when the second control signal is at the fourth level, execute the second working mode corresponding to the second signal;

[0016] The input end of the comparison module is connected to the digital-to-analog conversion module, and the output end is connected to the logic module;

[0017] The logic module is configured to output a digital signal corresponding to the input signal.

[0018] Optionally, the digital-to-analog conversion module includes a positive-end digital-to-analog conversion module and a negative-end digital-to-analog conversion module, the positive-end digital-to-analog conversion module is adapted to the second switch, and the negative-end digital-to-analog conversion module is adapted to the third switch;

[0019] During the conversion,

[0020] When the second control signal is at the third level, the second switch and the third switch are adapted to the first working mode;

[0021] When the second control signal is at the fourth level, the second switch adapts to the second working mode, and the third switch is used to connect the second preset voltage to the negative end digital-to-analog conversion module.

[0022] Optionally, a difference between the second preset voltage and a first preset voltage connected to the input preprocessing module is not greater than a difference threshold.

[0023] Optionally, the logic module is further configured to quantize the error voltage of the digital-to-analog conversion module during calibration to obtain a mismatch code.

[0024] Optionally, the ADC circuit further includes a calibration module;

[0025] The calibration module is connected to the analog-to-digital conversion module, and is configured to determine a calibration code based on a mismatch code obtained during calibration, and to perform calibration code complementation on the analog-to-digital conversion module.

[0026] Optionally, the calibration module includes a calibration digital-to-analog conversion module, a calibration algorithm module, and a calibration control module;

[0027] The input end of the calibration algorithm module is connected to the analog-to-digital conversion module, and the output end is connected to the calibration control module, and is configured to determine a first calibration code corresponding to the first signal based on the mismatch code when the second control signal is the third level; and determine a second calibration code corresponding to the second signal based on the mismatch code when the second control signal is the fourth level;

[0028] The calibration control module is configured to transmit the calibration code currently output by the calibration algorithm module to the calibration digital-to-analog conversion module during the conversion period;

[0029] The calibration digital-to-analog conversion module is configured to perform voltage compensation on the digital-to-analog conversion module based on a currently received calibration code during the conversion period.

[0030] Optionally, the calibration algorithm module is further configured to store the mismatch code.

[0031] Optionally, the calibration control module is further configured to set the calibration code to a preset intermediate calibration code during the sampling period, and transmit the intermediate calibration code to the calibration digital-to-analog conversion module.

[0032] According to another aspect of the present invention, a control method for an ADC circuit is provided, wherein the ADC circuit at least comprises: an input preprocessing module and an analog-to-digital conversion module, and the method comprises:

[0033] receiving an input signal, and when the first control signal is at a first level, obtaining a first signal based on the input signal through the input preprocessing module; and when the first control signal is at a second level, obtaining a second signal based on the input signal through the input preprocessing module;

[0034] During the sampling period, the acquired signal is sampled;

[0035] During the conversion, when the second control signal is at a third level matching the first level, the first signal is converted into a corresponding first digital signal; when the second control signal is at a fourth level matching the second level, the second signal is converted into a corresponding second digital signal;

[0036] The first control signal is level-switched during the conversion period, and the second control signal is level-switched during the sampling period.

[0037] Optionally, the input preprocessing module includes at least a first switch;

[0038] The method further includes: controlling the first switch based on the first control signal to switch the signal output by the input preprocessing module.

[0039] Optionally, controlling the first switch based on the first control signal to switch the signal output by the input preprocessing module includes:

[0040] When the first control signal is at the first level, the first switch is controlled to connect the negative input voltage from the negative end of the input preprocessing module to the analog-to-digital conversion module; and the positive input voltage from the positive end of the input preprocessing module to the analog-to-digital conversion module;

[0041] When the first control signal is at the second level, the first switch is controlled to connect the first preset voltage from the negative end of the input preprocessing module to the analog-to-digital conversion module; and the positive input voltage from the positive end of the input preprocessing module to the analog-to-digital conversion module.

[0042] Optionally, the analog-to-digital conversion module includes a digital-to-analog conversion module, a comparison module and a logic module, and the digital-to-analog conversion module is used for sampling, holding and quantization;

[0043] The sampling of the acquired signal comprises: sampling the acquired signal based on the digital-to-analog conversion module;

[0044] The converting the first signal into a corresponding first digital signal comprises: controlling the digital-to-analog conversion module to execute a first working mode corresponding to the first signal; and outputting a first digital signal corresponding to the first signal based on the logic module;

[0045] The converting the second signal into a corresponding second digital signal includes: controlling the digital-to-analog conversion module to execute a second working mode corresponding to the second signal; and outputting a second digital signal corresponding to the second signal based on the logic module.

[0046] Optionally, the digital-to-analog conversion module includes a positive-end digital-to-analog conversion module and a negative-end digital-to-analog conversion module, the positive-end digital-to-analog conversion module is adapted to the second switch, and the negative-end digital-to-analog conversion module is adapted to the third switch;

[0047] The method further comprises:

[0048] When the second control signal is at the third level, controlling the second switch and the third switch to adapt to the first working mode;

[0049] When the second control signal is at the fourth level, the second switch is controlled to adapt to the second working mode, and the third switch is controlled to connect the second preset voltage to the negative end digital-to-analog conversion module.

[0050] Optionally, a difference between the second preset voltage and a first preset voltage connected to the input preprocessing module is not greater than a difference threshold.

[0051] Optionally, the method further includes:

[0052] During calibration, the logic module is multiplexed to quantize the error voltage of the digital-to-analog conversion module to obtain a mismatch code.

[0053] Optionally, the ADC circuit further includes a calibration module;

[0054] The method further comprises:

[0055] During the conversion, the calibration module determines a calibration code based on the mismatch code obtained during the calibration period, and performs calibration code compensation on the analog-to-digital conversion module.

[0056] Optionally, the calibration module includes a calibration digital-to-analog conversion module, a calibration algorithm module, and a calibration control module;

[0057] The step of determining a calibration code based on a mismatch code obtained during calibration by the calibration module and performing calibration code backfilling on the analog-to-digital conversion module includes:

[0058] When the second control signal is at the third level, the calibration algorithm module determines a first calibration code corresponding to the first signal based on the mismatch code; when the second control signal is at the fourth level, the calibration algorithm module determines a second calibration code corresponding to the second signal based on the mismatch code;

[0059] Transmitting the calibration code currently output by the calibration algorithm module to the calibration digital-to-analog conversion module;

[0060] Based on the calibration digital-to-analog conversion module, voltage compensation is performed on the analog-to-digital conversion module according to the currently received calibration code.

[0061] Optionally, the method further includes:

[0062] The mismatch code is stored based on the calibration algorithm module.

[0063] Optionally, the method further includes:

[0064] During the sampling period, the voltage of the calibration digital-to-analog conversion module is set to a preset intermediate calibration code.

[0065] According to another aspect of the present invention, a chip is provided, comprising the above-mentioned ADC circuit.

[0066] According to another aspect of the present invention, there is provided an electronic device, comprising:

[0067] The above ADC circuit;

[0068] Processor; and

[0069] Memory for storing programs,

[0070] The program includes instructions, and when the instructions are executed by the processor, the processor executes the control method of the ADC circuit.

[0071] According to another aspect of the present invention, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable a computer to execute the control method of the ADC circuit described above.

[0072] In the embodiment of the present invention, the ADC circuit can realize continuous conversion between two different working modes through the first control signal and the second control signal, and there is no need to restart the ADC circuit to configure different working modes. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Further details, features and advantages of the invention are disclosed in the following description of exemplary embodiments in conjunction with the accompanying drawings, in which:

[0074] Figure 1 A schematic diagram of the structure of an ADC circuit provided according to an exemplary embodiment of the present invention is shown;

[0075] Figure 2 A timing control schematic diagram provided according to an exemplary embodiment of the present invention is shown;

[0076] Figure 3 A schematic diagram of an input preprocessing module provided according to an exemplary embodiment of the present invention is shown;

[0077] Figure 4 A schematic diagram of the structure of an ADC circuit provided according to an exemplary embodiment of the present invention is shown;

[0078] Figure 5 A schematic diagram of the structure of a SAR ADC circuit according to an exemplary embodiment of the present invention is shown;

[0079] Figure 6 A schematic diagram of the structure of an ADC circuit provided according to an exemplary embodiment of the present invention is shown;

[0080] Figure 7 A schematic diagram of the structure of an ADC circuit provided according to an exemplary embodiment of the present invention is shown;

[0081] Figure 8 A timing control schematic diagram provided according to an exemplary embodiment of the present invention is shown;

[0082] Fig. 9 A schematic diagram of the structure of a SAR ADC circuit according to an exemplary embodiment of the present invention is shown;

[0083] Fig.10 A flow chart of a control method of an ADC circuit provided according to an exemplary embodiment of the present invention is shown;

[0084] Fig.11 A schematic diagram of switch states during sampling according to an exemplary embodiment of the present invention is shown;

[0085] Fig.12 A schematic diagram of switch states during sampling according to an exemplary embodiment of the present invention is shown;

[0086] Fig.13 A schematic diagram of switch states during conversion according to an exemplary embodiment of the present invention is shown;

[0087] Fig.14 A schematic diagram of switch states during conversion according to an exemplary embodiment of the present invention is shown;

[0088] Fig.15 A flow chart of a calibration control method for an ADC circuit according to an exemplary embodiment of the present invention is shown;

[0089] Fig.16 A block diagram of an exemplary electronic device that can be used to implement an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0090] Embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be construed as being limited to the embodiments described herein, which are instead provided for a more thorough and complete understanding of the present invention. It should be understood that the drawings and embodiments of the present invention are only for exemplary purposes and are not intended to limit the scope of protection of the present invention.

[0091] It should be understood that the various steps described in the method embodiments of the present invention may be performed in different orders and / or in parallel. In addition, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present invention is not limited in this respect.

[0092] The term "including" and its variations used in this document are open inclusions, that is, "including but not limited to". The term "based on" means "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one other embodiment"; the term "some embodiments" means "at least some embodiments". Relevant definitions of other terms will be given in the following description. It should be noted that the concepts of "first", "second", etc. mentioned in the present invention are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0093] It should be noted that the modifications of "one" and "plurality" mentioned in the present invention are illustrative rather than restrictive, and those skilled in the art should understand that, unless otherwise clearly indicated in the context, it should be understood as "one or more".

[0094] The names of the messages or information exchanged between multiple devices in the embodiments of the present invention are only used for illustrative purposes, and are not used to limit the scope of these messages or information.

[0095] An embodiment of the present invention provides an ADC circuit, such as Figure 1 As shown, the ADC circuit at least includes: an input preprocessing module and an analog-to-digital conversion module. The circuit can be composed of Figure 2 The timing shown is controlled, wherein sar_clk refers to the clock control signal, sar_sample refers to the sampling control signal, DIFF_EN1 refers to the first control signal, and DIFF_EN2 refers to the second control signal.

[0096] The input preprocessing module is used to receive an input signal, and is configured to output a first signal based on the input signal when the first control signal is at a first level; and to output a second signal based on the input signal when the first control signal is at a second level;

[0097] The analog-to-digital conversion module is connected to the input preprocessing module and is configured to sample the signal output by the input preprocessing module during the sampling period; during the conversion period, when the second control signal is a third level matching the first level, output a corresponding first digital signal based on the sampled first signal, and when the second control signal is a fourth level matching the second level, output a corresponding second digital signal based on the sampled second signal;

[0098] The first control signal performs level switching during the conversion period, and the second control signal performs level switching during the sampling period.

[0099] In a possible implementation, the input signal of the first signal may be a differential signal, and the first signal may be a corresponding differential signal; the input signal of the second signal may be a single-ended signal, and the second signal may be a corresponding pseudo differential signal.

[0100] Optionally, the input preprocessing module may include at least a first switch;

[0101] The first switch is configured to switch the signal output by the input preprocessing module based on the first control signal.

[0102] like Figure 3 As shown in the schematic diagram of the input preprocessing module, the first switch can be arranged at the negative end of the input preprocessing module.

[0103] In a possible implementation, the positive end of the input preprocessing module may also be provided with a switch identical to the first switch, so as to reduce the output voltage imbalance between the positive and negative ends of the input preprocessing module and improve the accuracy of analog-to-digital conversion.

[0104] In another possible implementation, the positive terminal of the input preprocessing module may not be provided with a switch, and the positive terminal input voltage is connected to the analog-to-digital conversion module. This embodiment does not limit whether a switch is provided at the positive terminal of the input preprocessing module.

[0105] Optionally, when the first control signal is at a first level, one end of the first switch is used to connect a negative input voltage to the negative end of the input preprocessing module, and the other end is connected to the analog-to-digital conversion module;

[0106] When the first control signal is at the second level, one end of the first switch is used to connect the first preset voltage to the negative end of the input preprocessing module, and the other end is connected to the analog-to-digital conversion module.

[0107] Optional, such as Figure 4In the ADC circuit shown, the analog-to-digital conversion module may include a digital-to-analog conversion module, a comparison module, and a logic module, and the digital-to-analog conversion module may be used for sampling, holding, and quantization. The quantization may be performed in a successive approximation manner or in other manners, which is not limited in this embodiment.

[0108] The digital-to-analog conversion module is connected to the input preprocessing module and is configured to, during the conversion period, execute the first working mode corresponding to the first signal when the second control signal is at the third level; and execute the second working mode corresponding to the second signal when the second control signal is at the fourth level;

[0109] The input end of the comparison module is connected to the digital-to-analog conversion module, and the output end is connected to the logic module;

[0110] The logic module is configured to output a digital signal corresponding to the input signal.

[0111] In a possible implementation, Figure 5 In the SAR ADC (Successive Approximation Register Analog-to-Digital Converter) circuit shown, the digital-to-analog conversion module may be a digital-to-analog conversion differential capacitor array (DAC), the comparison module may be a comparator (COMP), and the logic module may be a SAR logic module.

[0112] Optionally, the digital-to-analog conversion module includes a positive-end digital-to-analog conversion module and a negative-end digital-to-analog conversion module, the positive-end digital-to-analog conversion module is adapted to the second switch, and the negative-end digital-to-analog conversion module is adapted to the third switch;

[0113] During the conversion period,

[0114] When the second control signal is at a third level, the second switch and the third switch are adapted to the first working mode;

[0115] When the second control signal is at the fourth level, the second switch is adapted to the second working mode, and the third switch is used to connect the second preset voltage to the negative-end digital-to-analog conversion module.

[0116] During sampling, the second switch is used to connect the positive output voltage of the input preprocessing module to the positive digital-to-analog conversion module, and the third switch is used to connect the negative output voltage of the input preprocessing module to the negative digital-to-analog conversion module.

[0117] The ADC circuit can realize continuous conversion between differential signals and single-ended signals under the control of the first control signal and the second control signal.

[0118] Optionally, the above logic module is also configured to quantize the error voltage of the digital-to-analog conversion module during calibration to obtain a mismatch code. That is to say, during calibration, the existing logic module in the analog-to-digital conversion module can be reused to calculate the mismatch code, without adding an additional logic module in the subsequent calibration module, thereby optimizing the logic complexity of the calibration module and reducing the area of ​​the ADC circuit.

[0119] Furthermore, in order to improve the accuracy of the ADC circuit, such as Figure 6 As shown, the ADC circuit may further include a calibration module.

[0120] The calibration module is connected to the analog-to-digital conversion module, and is configured to determine a calibration code based on the mismatch code obtained during calibration, and to perform calibration code complementation on the analog-to-digital conversion module.

[0121] Optional, such as Figure 7 The ADC circuit shown in FIG. 1 may include a calibration digital-to-analog conversion module, a calibration algorithm module, and a calibration control module. The ADC circuit may include: Figure 8 The timing shown is controlled, where CALCODE_I <m:1>Refers to the calibration code output by the calibration algorithm module, CALCODE_P / N <m:1>It refers to the calibration code output by the calibration control module. The number of M bits is determined by the number of bits of the calibration digital-to-analog conversion module.

[0122] The input end of the calibration algorithm module is connected to the analog-to-digital conversion module, and the output end is connected to the calibration control module, and is configured to determine a first calibration code corresponding to the first signal based on the mismatch code when the second control signal is at a third level; and determine a second calibration code corresponding to the second signal based on the mismatch code when the second control signal is at a fourth level;

[0123] The calibration control module is configured to transmit the calibration code currently output by the calibration algorithm module to the calibration digital-to-analog conversion module during the conversion period;

[0124] The calibration digital-to-analog conversion module is configured to perform voltage compensation on the digital-to-analog conversion module based on the currently received calibration code during the conversion period.

[0125] In one possible implementation, when the ADC circuit is as follows Figure 5 When the SAR ADC circuit is shown in FIG. 1 , the corresponding circuit after adding the calibration module is as follows Fig. 9 As shown. The input end of the calibration algorithm module is connected to the successive approximation search logic module. The calibration digital-to-analog conversion module can be a calibration differential capacitor array (CALDACP / CALDACN), which is connected to the input end of the comparator and can be configured to compensate the voltage at the input end of the comparator based on the currently received calibration code during the conversion period. The calibration digital-to-analog conversion module can also adopt other circuit structures, such as a capacitor resistor array. This embodiment does not limit the specific circuit structure of the calibration digital-to-analog conversion module.

[0126] Optionally, the calibration algorithm module is further configured to store the mismatch code.

[0127] Optionally, the calibration control module is further configured to set the calibration code to a preset intermediate calibration code during sampling, and transmit the intermediate calibration code to the calibration digital-to-analog conversion module.

[0128] The ADC circuit can realize continuous conversion of differential signals and single-ended signals, and can also realize continuous calibration of differential signals and single-ended signals. In particular, since the logic module is reused, there is no need to add another logic module, which optimizes the logic complexity of the calibration module and reduces the area of ​​the ADC circuit.

[0129] The embodiment of the present invention provides a control method of an ADC circuit, which can be used to control the above ADC circuit. Fig.10 The control method flow chart of the ADC circuit shown in the figure introduces the control method.

[0130] First of all Figure 2 , 8 The timing control relationship shown in is introduced.

[0131] In the electronic device, a clock control signal sar_clk, a sampling control signal sar_sample, a first control signal DIFF_EN1, and a second control signal DIFF_EN2 may be set in advance for the ADC circuit.

[0132] When the sampling control signal is at a high level, the ADC circuit is in the sampling period and performs sampling-related processing; when the sampling control signal is at a low level, the ADC circuit is in the conversion period and performs conversion-related processing. Figure 2 , 8 As shown, sar_sample can be initially at a low level, and switches from a low level to a high level at the second rising edge of sar_clk, and switches from a high level to a low level at the fourth rising edge, and the sampling period is 2 clock cycles; it switches from a high level to a low level at the fourth rising edge of sar_clk, and switches from a low level to a high level at the 16th rising edge, and the conversion period is 12 clock cycles. This embodiment does not limit the initial level of the sampling control signal, the specific position of the switching level, the sampling period, and the conversion period.

[0133] In this embodiment, the first control signal can be used to control the output voltage mode of the input preprocessing module. In order to ensure that the external input signal can be processed in advance before the ADC circuit samples, the first control signal can be switched before the sampling control signal is switched to a high level, that is, the first control signal can be switched in level during the conversion period.

[0134] In a preferred embodiment, the first control signal can switch the level one clock cycle or multiple clock cycles earlier than the sampling control signal to avoid affecting the sampling. Figure 2 , 8 As shown, DIFF_EN1 can be switched one clock cycle or multiple clock cycles earlier than sar_sample during the conversion period, for example, at the first rising edge of sar_clk, DIFF_EN1 switches from a low level to a high level; during the conversion period of the ADC circuit, DIFF_EN1 can switch from a high level to a low level at the fifth rising edge of sar_clk, or from a high level to a low level at the fifteenth rising edge. This embodiment does not limit the position where the first control signal switches the level.

[0135] In this embodiment, the second control signal can be used to control the working mode of the ADC circuit during the conversion period, specifically, it can be used to control the working mode of the digital-to-analog conversion module (DAC) in the analog-to-digital conversion module during the conversion period, and when the ADC circuit includes a calibration module, it can control the working mode of the calibration module. Similar to the first control signal, in order to ensure that the ADC circuit can be configured with the corresponding working mode in advance before the conversion, the second control signal can be switched before the sampling control signal is switched to a low level, that is, the second control signal can be switched in level during the sampling period, and the switching of the second control signal does not affect the sampling function of the digital-to-analog conversion module.

[0136] In a preferred embodiment, the second control signal can switch levels earlier than the sampling control signal to avoid affecting the conversion. Figure 2 , 8 As shown, DIFF_EN2 can be switched earlier than sar_sample during the sampling period, for example, at the third rising edge of sar_clk, DIFF_EN2 switches from a low level to a high level, or at the second or third falling edge. This embodiment does not limit the specific position of the switching level of the second control signal.

[0137] Secondly Fig.10 A control method of the ADC circuit shown in FIG. 1 is introduced.

[0138] Step 1001, receiving an input signal, when the first control signal is at a first level, obtaining a first signal based on the input signal through an input preprocessing module; when the first control signal is at a second level, obtaining a second signal based on the input signal through the input preprocessing module.

[0139] In a possible implementation, the ADC circuit can collect signals from multiple channels outside the circuit, wherein the collected signals can include at least differential signals and single-ended signals. For differential signals, there can be two channel inputs, such as channel X and channel X-1, and the signal of channel X can be used as the positive input signal VINP of the input preprocessing module, and the signal of channel X-1 is the negative input signal VINN of the input preprocessing module. For single-ended signals, there can be one channel input, such as channel X-2, and the signal of channel X-2 can be used as the positive input signal VINP of the input preprocessing module.

[0140] The first control signal can control the output voltage mode of the input preprocessing module, so that the input preprocessing module can output a first signal corresponding to a differential signal, or a second signal corresponding to a single-ended signal.

[0141] When the first control signal is at the first level, the output voltage mode of the input preprocessing module may be a differential mode, in which case the positive output signal VIN+ of the input preprocessing module may be a signal VINP of channel X, and the negative output signal VIN- may be a signal VINN of channel X-1. The first level may be a high level or a low level, which is not limited in this embodiment.

[0142] When the first control signal is at the second level, the output voltage mode of the input preprocessing module can be a single-ended mode. At this time, the positive output signal VIN+ of the input preprocessing module can be the signal VINP of channel X-2, and the negative output signal VIN- can be the first preset voltage. Among them, the second level is opposite to the above-mentioned first level. When the first level is at a high level, the second level is at a low level; when the first level is at a low level, the second level is at a high level. The first preset voltage can be a built-in positive reference voltage VREFN, a negative reference voltage VREFP or other fixed voltage values. The second preset voltage in the following text is similar. The first preset voltage and the second preset voltage can be the same or different, and this embodiment does not limit this.

[0143] Optionally, the input preprocessing module includes at least a first switch;

[0144] The method further includes: controlling the first switch based on the first control signal to switch the signal output by the input preprocessing module. The corresponding processing can be as follows:

[0145] When the first control signal is at the first level, the first switch is controlled to connect the negative input voltage from the negative end of the input preprocessing module to the analog-to-digital conversion module; and the positive input voltage from the positive end of the input preprocessing module to the analog-to-digital conversion module;

[0146] When the first control signal is at the second level, the first switch is controlled to connect the first preset voltage from the negative end of the input preprocessing module to the analog-to-digital conversion module; and the positive input voltage from the positive end of the input preprocessing module to the analog-to-digital conversion module.

[0147] Specifically, Fig.11 , 12 The switch state during the sampling period shown is taken as an example that both the positive and negative ends of the input preprocessing module include switches, wherein the switch at the positive end is used to connect the positive input voltage to the analog-to-digital conversion module; the switch at the negative end is used to connect the negative input voltage or the first preset voltage to the analog-to-digital conversion module. The switch at the negative end corresponds to the first switch mentioned above.

[0148] A specific implementation of the output voltage mode of the input preprocessing module controlled by the first control signal is as follows:

[0149] When the first control signal is at the first level, one end of the positive switch can be used to receive the positive input voltage, and the other end can be connected to the analog-to-digital conversion module; one end of the negative switch can be used to receive the negative input voltage, and the other end can be connected to the analog-to-digital conversion module. At this time, the output voltage mode is a differential mode, VIN+=VINP, VIN-=VINN, the input preprocessing module outputs a first signal corresponding to the differential signal, and VINP is input to the positive end of the digital-to-analog conversion module, and VINN is input to the negative end of the digital-to-analog conversion module.

[0150] When the first control signal is at the second level, one end of the switch at the positive end can be used to receive the positive input voltage, and the other end can be connected to the analog-to-digital conversion module; one end of the switch at the negative end can be used to receive the first preset voltage, and the other end can be connected to the analog-to-digital conversion module. At this time, the output voltage mode is a single-ended mode, VIN+=VINP, VIN-=first preset voltage, the input preprocessing module outputs a second signal corresponding to the single-ended signal, and VINP is input to the positive end of the digital-to-analog conversion module, and the first preset voltage is input to the negative end of the digital-to-analog conversion module.

[0151] Step 1002: During the sampling period, the acquired signal is sampled.

[0152] In a possible implementation, during sampling, regardless of the differential mode or the single-ended mode, the digital-to-analog conversion module can sample the signal output by the input preprocessing module without modifying the circuit structure of the digital-to-analog conversion module.

[0153] Optionally, when the ADC circuit is Figure 4 As shown, the acquired signal can be sampled based on the digital-to-analog conversion module.

[0154] Optionally, the digital-to-analog conversion module may include a positive-end digital-to-analog conversion module and a negative-end digital-to-analog conversion module, the positive-end digital-to-analog conversion module is adapted to the second switch, and the negative-end digital-to-analog conversion module is adapted to the third switch. During sampling, the second switch is used to connect the positive-end output voltage of the input preprocessing module to the positive-end digital-to-analog conversion module, and the third switch is used to connect the negative-end output voltage of the input preprocessing module to the negative-end digital-to-analog conversion module.

[0155] In a possible implementation, Fig.11 , 12 As shown in the switch states during sampling, the digital-to-analog conversion differential capacitor array may include a plurality of switches (SP / SN), each switch being matched with a capacitor (CP / CN).

[0156] During sampling, one end of each switch of the positive end capacitor array of the digital analog conversion differential capacitor array can be connected to the positive end of the input preprocessing module, and the other end can be connected to the positive end capacitor; one end of each switch of the negative end capacitor array of the digital analog conversion differential capacitor array can be connected to the negative end of the input preprocessing module, and the other end can be connected to the negative end capacitor, so that the signal output by the input preprocessing module can be input into the digital analog conversion differential capacitor array.

[0157] Step 1003, during the conversion period, when the second control signal is at a third level matching the first level, convert the first signal into a corresponding first digital signal; when the second control signal is at a fourth level matching the second level, convert the second signal into a corresponding second digital signal.

[0158] In a possible implementation, the second control signal can control the working mode of the ADC circuit, so that the ADC circuit can execute the first working mode corresponding to the differential signal or the second working mode corresponding to the single-ended signal, and output the digital signal corresponding to the differential signal or the single-ended signal. Among them, the third level can be a high level or a low level, which is not limited in this embodiment. The fourth level is opposite to the third level. When the third level is a high level, the fourth level is a low level; when the third level is a low level, the fourth level is a high level.

[0159] Optionally, when the ADC circuit is Figure 4 As shown, when the second control signal is at the third level, the digital-to-analog conversion module can be controlled to execute the first working mode, and then based on the logic module, the first digital signal corresponding to the first signal is output. When the second control signal is at the fourth level, the digital-to-analog conversion module can be controlled to execute the second working mode, and then based on the logic module, the second digital signal corresponding to the second signal is output.

[0160] Optionally, corresponding to the case where the above-mentioned digital-to-analog conversion module includes a second switch and a third switch, the following processing can be performed: when the second control signal is a third level, the second switch and the third switch are controlled to adapt to the first operating mode; when the second control signal is a fourth level, the second switch is controlled to adapt to the second operating mode, and the third switch is controlled to connect the second preset voltage to the negative end digital-to-analog conversion module.

[0161] In a possible implementation, Fig.13 , 14 In the switching state during the conversion shown, when the second control signal is at the third level, each switch of the digital analog conversion differential capacitor array can be controlled separately based on the successive approximation search logic module. At this time, the positive and negative terminal capacitor arrays of the digital analog conversion differential capacitor array are simultaneously controlled by the successive approximation search logic module.

[0162] When the second control signal is at the fourth level, each switch of the positive capacitor array of the digital analog conversion differential capacitor array is controlled based on the successive approximation search logic module; each switch of the negative capacitor array of the digital analog conversion differential capacitor array is used to receive the second preset voltage at one end, and the other end is connected to the negative capacitor. At this time, only the positive capacitor array of the digital analog conversion differential capacitor array is controlled by the successive approximation search logic module, and the negative capacitor array is fixedly connected to the above-mentioned second preset voltage, that is, the positive reference voltage VREFN, the negative reference voltage VREFP or other fixed voltage values.

[0163] Optionally, the difference between the second preset voltage and the first preset voltage connected to the input preprocessing module may not be greater than a difference threshold, wherein the difference threshold may be equal to (VREFN+VREFP) / 2. In a preferred embodiment, the second preset voltage is equal to the first preset voltage.

[0164] In another possible implementation, when the second preset voltage is not equal to the first preset voltage, the digital signal output by the ADC circuit can be processed based on the voltage difference. Specifically, the second preset voltage can be subtracted from the first preset voltage to obtain the voltage difference; based on the principle of analog-to-digital conversion in the ADC circuit, the voltage difference is converted into a difference code value; and the digital signal code value output by the ADC circuit is subtracted from the difference code value to obtain the final digital signal code value.

[0165] Exemplarily, when the ADC circuit processes a single-ended signal, if the first preset voltage is 0V and the second preset voltage is 1 / 2*VREFP, the voltage difference can be obtained by the following formula: voltage difference = second preset voltage - first preset voltage = 1 / 2*VREFP. The voltage difference is converted into a difference code value by the following formula: difference code value = voltage difference / VREFP * 2^N = 2^(N-1). The digital signal code value is calculated by the following formula: final digital signal code value = digital signal code value - difference code value.

[0166] When the ADC circuit processes a differential signal, if the first preset voltage is 0V and the second preset voltage is 1 / 2*VREFP, the voltage difference can be obtained by the following formula: voltage difference = second preset voltage - first preset voltage = 1 / 2*VREFP. The voltage difference is converted into a difference code value by the following formula: difference code value = voltage difference / VREFP * 2^ (N-1) = 2^ (N-2). The digital signal code value is calculated by the following formula: final digital signal code value = digital signal code value - difference code value.

[0167] Wherein, N is the number of bits of the ADC circuit, and the difference code value can be positive or negative. In addition, the above-mentioned process of converting the difference code value can be processed in the circuit or by software during use, which is not limited in this embodiment.

[0168] Furthermore, in order to improve the accuracy of the ADC circuit, the signal can be calibrated based on the calibration module, that is, the calibration module determines the calibration code based on the mismatch code obtained during the calibration, and the calibration code is supplemented to the analog-to-digital conversion module.

[0169] The following will refer to Figure 7 The ADC circuit shown in Fig.15 The calibration control method of the ADC circuit shown is introduced.

[0170] Step 1501, when the second control signal is at the third level, the calibration algorithm module determines the first calibration code corresponding to the first signal based on the mismatch code; when the second control signal is at the fourth level, the calibration algorithm module determines the second calibration code corresponding to the second signal based on the mismatch code.

[0171] In a possible implementation, the second control signal can control the working mode of the calibration algorithm module so that the calibration algorithm module calculates and outputs the first calibration code corresponding to the differential signal or the second calibration code corresponding to the single-ended signal. The working mode of the calibration algorithm module corresponds to the working mode of the ADC circuit during the above conversion period.

[0172] When the second control signal is at the third level, the operating mode is the first operating mode corresponding to the differential signal. During the conversion, the calibration algorithm module can calculate the first calibration code of the differential signal based on the offset and capacitance mismatch error voltage of the digital-to-analog conversion differential capacitor array, and store the first calibration code in the calibration algorithm module.

[0173] When the second control signal is at the fourth level, the operating mode is the second operating mode corresponding to the single-ended signal. During the conversion, the calibration algorithm module can calculate the second calibration code of the single-ended signal based on the offset of the digital-to-analog conversion differential capacitor array and the error voltage of the capacitor mismatch, and store the second calibration code in the calibration algorithm module.

[0174] In a preferred embodiment, the mismatch code can be calculated by the logic module in the analog-to-digital conversion module, and the specific process is as follows: during calibration, the multiplexing logic module quantizes the error voltage of the digital-to-analog conversion module to obtain the mismatch code. Figure 5 The SAR ADC circuit shown can reuse the existing successive approximation search logic module in the analog-to-digital conversion module during the error calibration stage. The SAR logic control signal controls the calibration control module to control the calibration differential capacitor array, quantize the digital-to-analog conversion of the offset of the differential capacitor array and the error voltage of the capacitor mismatch, and transmit the obtained mismatch code to the calibration algorithm module, which stores the mismatch code.

[0175] Step 1502: Transmit the calibration code currently output by the calibration algorithm module to the calibration differential capacitor array.

[0176] In a possible implementation, the SAR logic control signal can control the calibration of the differential capacitor array by controlling the calibration control module, and the output of the calibration control module is determined by the output of the calibration algorithm module. Fig. 9 In the SAR ADC circuit shown in FIG. 1 , during the conversion period, when the second control signal is at the third level, the calibration code CALCODE_I output by the calibration algorithm module is <m:1>is a differential calibration code (i.e., the first calibration code). At this time, the calibration control module can output the positive end calibration code CALCODE_P <m:1>And negative terminal calibration code CALCODE_N <m:1>, transmitted to the calibration differential capacitor array. Among them, the positive end calibration code CALCODE_P <m:1>You can input the positive end capacitance array of the calibration differential capacitance array, the negative end calibration code CALCODE_N <m:1>The negative terminal capacitance array of the calibrated differential capacitance array can be input.

[0177] When the second control signal is at the fourth level, the calibration code CALCODE_I output by the calibration algorithm module <m:1>It is a single-ended calibration code (ie, the second calibration code), and the subsequent processing of the calibration control module is the same as above, which will not be repeated here.

[0178] Step 1503: Based on the calibration of the digital-to-analog conversion module, voltage compensation is performed on the analog-to-digital conversion module according to the currently received calibration code.

[0179] In a possible implementation, Fig. 9 In the SAR ADC circuit shown in FIG. 1 , during the conversion period, when the second control signal is at the third level, the positive terminal capacitor array of the calibration differential capacitor array can receive the differential calibration code CALCODE_P <m:1>, the calibration code value CALCODE_P <m:1>The voltage that is replenished to the positive input of the comparator; the negative end capacitor array of the calibration differential capacitor array can receive the differential calibration code CALCODE_N <m:1>, the calibration code value CALCODE_N <m:1>The voltage fed back to the negative input of the comparator.

[0180] When the second control signal is at the fourth level, the calibration differential capacitor array can receive the single-ended calibration code to compensate the voltage at the comparator input terminal. The specific processing is the same as above and will not be repeated here.

[0181] During the sampling period before the above step 1503, a backfill reset can also be performed to set the voltage of the calibration digital-to-analog conversion module to a preset intermediate calibration code. Figure 8 CALCODE_P / N shown <m:1>,During the sampling period, the calibration control module outputs a preset intermediate calibration code according to the sampling control signal, and transmits the intermediate calibration code to the calibration ,differential capacitor array, and sets the calibration differential capacitor array to the intermediate calibration code value, so as to prepare for compensating the error voltage that may be positive or negative during the normal conversion period.

[0182] Optionally, the ADC circuit may further include a reset switch, and the reset switch may be used to connect the bias voltage to the digital-to-analog conversion module.

[0183] In a possible implementation, Fig.11 , 12 As shown, during the sampling period, the reset switch SWCM1 / 2 can be closed to reset one plate of the capacitor in the digital-to-analog conversion differential capacitor array to the bias voltage VCM. Fig.13 , 14 As shown, during the conversion period, the reset switch SWCM1 / 2 can be opened.

[0184] The embodiments of the present invention can achieve the following beneficial effects:

[0185] (1) Through the first control signal and the second control signal provided by the present invention, the ADC circuit can realize continuous conversion of differential signals and single-ended signals, without restarting the ADC circuit to configure different working modes.

[0186] (2) Through the ADC circuit and corresponding timing control provided by the present invention, continuous calibration can be achieved on the basis of achieving continuous conversion of differential signals and single-ended signals.

[0187] (3) In the error calibration stage, the quantized error voltage is realized by multiplexing the logic module, without adding another logic module, thus optimizing the logic complexity of the calibration module and reducing the area of ​​the ADC circuit.

[0188] An exemplary embodiment of the present invention further provides a chip, including the ADC circuit provided by the embodiment of the present invention.

[0189] The exemplary embodiment of the present invention further provides an electronic device, comprising: an ADC circuit provided by an embodiment of the present invention; at least one processor; and a memory connected to the at least one processor in communication. The memory stores a computer program that can be executed by the at least one processor, and the computer program is used to enable the electronic device to perform the method according to the embodiment of the present invention when executed by the at least one processor.

[0190] Exemplary embodiments of the present invention also provide a non-transitory computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor of a computer, is used to cause the computer to perform a method according to an embodiment of the present invention.

[0191] refer to Fig.16 , now a block diagram of an electronic device 1600 that can be used as the present invention will be described, which is an example of a hardware device that can be applied to various aspects of the present invention. Electronic devices are intended to represent various forms of digital electronic computer devices, such as data center servers, notebook computers, thin clients, laptop computers, desktop computers, workstations, personal digital assistants, blade servers, mainframe computers, and other suitable computers. Electronic devices can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples, and are not intended to limit the implementation of the present invention described and / or required herein.

[0192] like Fig.16 As shown, the electronic device 1600 includes a computing unit 1601, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 1602 or a computer program loaded from a storage unit 1608 into a random access memory (RAM) 1603. In the RAM 1603, various programs and data required for the operation of the device 1600 can also be stored. The computing unit 1601, the ROM 1602, and the RAM 1603 are connected to each other via a bus 1604. An input / output (I / O) interface 1605 is also connected to the bus 1604.

[0193] Multiple components in the electronic device 1600 are connected to the I / O interface 1605, including: an input unit 1606, an output unit 1607, a storage unit 1608, and a communication unit 1609. The input unit 1606 can be any type of device that can input information to the electronic device 1600, and the input unit 1606 can receive input digital or character information, and generate key signal input related to user settings and / or function control of the electronic device. The output unit 1607 can be any type of device that can present information, and can include but is not limited to a display, a speaker, a video / audio output terminal, a vibrator, and / or a printer. The storage unit 1604 can include but is not limited to a disk, an optical disk. The communication unit 1609 allows the electronic device 1600 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks, and can include but is not limited to a modem, a network card, an infrared communication device, a wireless communication transceiver, and / or a chipset, such as a Bluetooth device, a WiFi device, a WiMax device, a cellular communication device, and / or the like.

[0194] The computing unit 1601 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 1601 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 1601 performs the various methods and processes described above. For example, in some embodiments, the control method of the ADC circuit may be implemented as a computer software program, which is tangibly included in a machine-readable medium, such as a storage unit 1608. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 1600 via the ROM 1602 and / or the communication unit 1609. In some embodiments, the computing unit 1601 may be configured to perform the control method of the ADC circuit by any other appropriate means (e.g., by means of firmware).

[0195] The program code for implementing the method of the present invention can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code can be executed entirely on the machine, partially on the machine, partially on the machine as a stand-alone software package and partially on a remote machine, or entirely on a remote machine or server.

[0196] In the context of the present invention, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0197] As used herein, the terms "machine-readable medium" and "computer-readable medium" refer to any computer program product, apparatus, and / or device (e.g., disk, optical disk, memory, programmable logic device (PLD)) for providing machine instructions and / or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The term "machine-readable signal" refers to any signal for providing machine instructions and / or data to a programmable processor.

[0198] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0199] The systems and techniques described herein may be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.

[0200] A computer system may include clients and servers. Clients and servers are generally remote from each other and usually interact through a communication network. The relationship of client and server is generated by computer programs running on respective computers and having a client-server relationship to each other.

Claims

1. An analog-to-digital converter (ADC) circuit, characterized in that: The ADC circuit at least includes: an input preprocessing module and an analog-to-digital conversion module; The input preprocessing module is used to receive an input signal, and is configured to output a first signal based on the input signal when the first control signal is at a first level; and output a second signal based on the input signal when the first control signal is at a second level; the second signal is different from the first signal; The analog-to-digital conversion module is connected to the input preprocessing module and is configured to sample the signal output by the input preprocessing module during a sampling period; during a conversion period, when the second control signal is a third level matching the first level, a corresponding first digital signal is output based on the sampled first signal, and when the second control signal is a fourth level matching the second level, a corresponding second digital signal is output based on the sampled second signal; Among them, the first control signal performs level switching during the conversion period and is used to control the output voltage mode of the input preprocessing module; the second control signal performs level switching during the sampling period and is used to control the working mode of the analog-to-digital conversion module during the conversion period.

2. The ADC circuit according to claim 1, characterized in that: The input preprocessing module at least includes a first switch; The first switch is configured to switch the signal output by the input preprocessing module based on the first control signal.

3. The ADC circuit according to claim 2, characterized in that: When the first control signal is at the first level, one end of the first switch is used to connect the negative input voltage to the negative end of the input preprocessing module, and the other end is connected to the analog-to-digital conversion module; When the first control signal is at the second level, one end of the first switch is used to connect the first preset voltage to the negative end of the input preprocessing module, and the other end is connected to the analog-to-digital conversion module.

4. The ADC circuit according to claim 1, characterized in that: The analog-to-digital conversion module includes a digital-to-analog conversion module, a comparison module and a logic module, and the digital-to-analog conversion module is used for sampling, holding and quantization; The digital-to-analog conversion module is connected to the input preprocessing module and is configured to, during the conversion period, when the second control signal is at the third level, execute the first working mode corresponding to the first signal; and when the second control signal is at the fourth level, execute the second working mode corresponding to the second signal; The input end of the comparison module is connected to the digital-to-analog conversion module, and the output end is connected to the logic module; The logic module is configured to output a digital signal corresponding to the input signal.

5. The ADC circuit according to claim 4, characterized in that: The digital-to-analog conversion module includes a positive-end digital-to-analog conversion module and a negative-end digital-to-analog conversion module, the positive-end digital-to-analog conversion module is adapted to the second switch, and the negative-end digital-to-analog conversion module is adapted to the third switch; During the conversion, When the second control signal is at the third level, the second switch and the third switch are adapted to the first working mode; When the second control signal is at the fourth level, the second switch adapts to the second working mode, and the third switch is used to connect the second preset voltage to the negative end digital-to-analog conversion module.

6. The ADC circuit according to claim 5, characterized in that: A difference between the second preset voltage and a first preset voltage connected to the input preprocessing module is not greater than a difference threshold.

7. The ADC circuit according to claim 4, characterized in that: The logic module is further configured to quantize the error voltage of the digital-to-analog conversion module during calibration to obtain a mismatch code.

8. The ADC circuit according to claim 1, characterized in that: The ADC circuit also includes a calibration module; The calibration module is connected to the analog-to-digital conversion module, and is configured to determine a calibration code based on a mismatch code obtained during calibration, and to perform calibration code complementation on the analog-to-digital conversion module.

9. The ADC circuit according to claim 8, characterized in that: The calibration module includes a calibration digital-to-analog conversion module, a calibration algorithm module, and a calibration control module; The input end of the calibration algorithm module is connected to the analog-to-digital conversion module, and the output end is connected to the calibration control module, and is configured to determine a first calibration code corresponding to the first signal based on the mismatch code when the second control signal is at the third level; When the second control signal is at the fourth level, determining a second calibration code corresponding to the second signal based on the mismatch code; The calibration control module is configured to transmit the calibration code currently output by the calibration algorithm module to the calibration digital-to-analog conversion module during the conversion period; The calibration digital-to-analog conversion module is configured to perform voltage compensation on the digital-to-analog conversion module based on a currently received calibration code during the conversion period.

10. The ADC circuit according to claim 9, characterized in that: The calibration algorithm module is further configured to store the mismatch code.

11. The ADC circuit according to claim 9, characterized in that: The calibration control module is further configured to set the calibration code as a preset intermediate calibration code during the sampling period, and transmit the intermediate calibration code to the calibration digital-to-analog conversion module.

12. A control method for an ADC circuit, characterized in that: The ADC circuit at least includes: an input preprocessing module and an analog-to-digital conversion module, and the control method includes: receiving an input signal, and when the first control signal is at a first level, obtaining a first signal based on the input signal through the input preprocessing module; when the first control signal is at a second level, obtaining a second signal based on the input signal through the input preprocessing module; the second signal is different from the first signal; During the sampling period, the acquired signal is sampled; During the conversion, when the second control signal is at a third level matching the first level, the first signal is converted into a corresponding first digital signal; when the second control signal is at a fourth level matching the second level, the second signal is converted into a corresponding second digital signal; Among them, the first control signal performs level switching during the conversion period and is used to control the output voltage mode of the input preprocessing module; the second control signal performs level switching during the sampling period and is used to control the working mode of the analog-to-digital conversion module during the conversion period.

13. The control method of the ADC circuit according to claim 12, characterized in that: The input preprocessing module at least includes a first switch; The control method further includes: controlling the first switch based on the first control signal to switch the signal output by the input preprocessing module.

14. The control method of the ADC circuit according to claim 13, characterized in that: The controlling the first switch based on the first control signal to switch the signal output by the input preprocessing module includes: When the first control signal is at the first level, the first switch is controlled to connect the negative input voltage from the negative end of the input preprocessing module to the analog-to-digital conversion module; and the positive input voltage from the positive end of the input preprocessing module to the analog-to-digital conversion module; When the first control signal is at the second level, the first switch is controlled to connect the first preset voltage from the negative end of the input preprocessing module to the analog-to-digital conversion module; and the positive input voltage from the positive end of the input preprocessing module to the analog-to-digital conversion module.

15. The control method of the ADC circuit according to claim 12, characterized in that: The analog-to-digital conversion module includes a digital-to-analog conversion module, a comparison module and a logic module, and the digital-to-analog conversion module is used for sampling, holding and quantization; The sampling of the acquired signal comprises: sampling the acquired signal based on the digital-to-analog conversion module; The converting the first signal into a corresponding first digital signal comprises: controlling the digital-to-analog conversion module to execute a first working mode corresponding to the first signal; and outputting a first digital signal corresponding to the first signal based on the logic module; The converting the second signal into a corresponding second digital signal includes: controlling the digital-to-analog conversion module to execute a second working mode corresponding to the second signal; and outputting a second digital signal corresponding to the second signal based on the logic module.

16. The control method of the ADC circuit according to claim 15, characterized in that: The digital-to-analog conversion module includes a positive-end digital-to-analog conversion module and a negative-end digital-to-analog conversion module, the positive-end digital-to-analog conversion module is adapted to the second switch, and the negative-end digital-to-analog conversion module is adapted to the third switch; The control method further comprises: When the second control signal is at the third level, controlling the second switch and the third switch to adapt to the first working mode; When the second control signal is at the fourth level, the second switch is controlled to adapt to the second working mode, and the third switch is controlled to connect the second preset voltage to the negative end digital-to-analog conversion module.

17. The control method of the ADC circuit according to claim 16, characterized in that: A difference between the second preset voltage and a first preset voltage connected to the input preprocessing module is not greater than a difference threshold.

18. The control method of the ADC circuit according to claim 17, characterized in that: The control method further comprises: During calibration, the logic module is multiplexed to quantize the error voltage of the digital-to-analog conversion module to obtain a mismatch code.

19. The control method of the ADC circuit according to claim 12, characterized in that: The ADC circuit also includes a calibration module; The control method further comprises: During the conversion, the calibration module determines a calibration code based on the mismatch code obtained during the calibration period, and performs calibration code compensation on the analog-to-digital conversion module.

20. The control method of the ADC circuit according to claim 19, characterized in that: The calibration module includes a calibration digital-to-analog conversion module, a calibration algorithm module, and a calibration control module; The step of determining a calibration code based on a mismatch code obtained during calibration by the calibration module and performing calibration code backfilling on the analog-to-digital conversion module includes: When the second control signal is at the third level, the calibration algorithm module determines a first calibration code corresponding to the first signal based on the mismatch code; when the second control signal is at the fourth level, the calibration algorithm module determines a second calibration code corresponding to the second signal based on the mismatch code; Transmitting the calibration code currently output by the calibration algorithm module to the calibration digital-to-analog conversion module; Based on the calibration digital-to-analog conversion module, voltage compensation is performed on the analog-to-digital conversion module according to the currently received calibration code.

21. The control method of the ADC circuit according to claim 19, characterized in that: The control method further comprises: The mismatch code is stored based on the calibration algorithm module.

22. The control method of the ADC circuit according to claim 19, characterized in that: The control method further comprises: During the sampling period, the voltage of the calibration digital-to-analog conversion module is set to a preset intermediate calibration code.

23. A chip, characterized in that: The method comprises the ADC circuit as claimed in any one of claims 1 to 11.

24. An electronic device comprising: The ADC circuit according to any one of claims 1 to 11; processor; as well as Memory for storing programs, The program comprises instructions, which, when executed by the processor, cause the processor to perform the method according to any one of claims 12-22.

25. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to cause a computer to execute the method according to any one of claims 12-22.

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