Method for adjusting the resonance frequency of a resonance circuit included in an electronic pen, electronic pen, and method for producing the electronic pen
By using adjustment units and measurement units in the resonant circuit of the electronic pen, the state of the internal capacitor array is changed, and the problem of low frequency adjustment efficiency caused by manufacturing errors in the prior art is solved, and efficient reference resonant frequency adjustment is achieved.
Patent Information
- Application Number
- CN201980100860.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-12-13
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2039-12-13
AI Technical Summary
When adjusting the reference resonance frequency of the resonant circuit in the electronic pen, the prior art may cause excessive disconnection or multiple adjustments due to the manufacturing error of the capacitor, which is inefficient.
By using the adjustment unit and the measurement unit, the capacitance element state in the internal capacitor array is changed, and the reference resonance frequency of the resonant circuit is adjusted according to the measurement result of the alternating magnetic field.
The reference resonance frequency is appropriately adjusted based on the estimated capacitance change, which improves the adjustment efficiency and avoids excessive disconnection.
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Figure CN114450656B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for adjusting the resonance frequency of a resonance circuit included in an electronic pen, an electronic pen and a method for producing the electronic pen. Background Art
[0002] An electronic pen used in an electromagnetic resonance (EMR) input system is provided with an LC resonant circuit, which is composed of a coil excited by a magnetic field transmitted from a sensor coil of a position detection device and a capacitor connected in parallel with the coil (for example, see Patent Documents 1 and 2). When the resonant circuit enters the magnetic field, an induced electromotive force is generated in the coil, thereby accumulating power in the resonant circuit. The electronic pen is configured to transmit pen information including pen pressure information, side switch information, etc. using the power.
[0003] As specific methods for transmitting pen information, there are known methods of transmitting pen information as digital information by turning on or off the supply of a signal to a resonance circuit according to the content of the pen information, and a method of transmitting pen information as a displacement of the resonance frequency by changing the resonance frequency of the resonance circuit according to the content of the pen information. Hereinafter, the resonance frequency of the resonance circuit in the former case and the resonance frequency that serves as a reference for the displacement in the latter case are collectively referred to as "reference resonance frequency".
[0004] In order for the position detection device to correctly receive the pen information sent by the electronic pen, it is necessary to make the reference resonant frequency of the resonant circuit equal to a predetermined standard value. However, due to manufacturing errors in the inductance of the coil and the capacitance of the capacitor, it is inevitable that the reference resonant frequency will deviate in the stage just after the resonant circuit is assembled. Therefore, in the manufacturing process of the electronic pen, a plurality of capacitors are preliminarily arranged in parallel, and the reference resonant frequency is measured after the resonant circuit is assembled. Based on the result, the wiring is cut with a laser, thereby disconnecting several capacitors from the circuit, and then the reference resonant frequency is made consistent with the above-mentioned standard value. Patent document 1 discloses an example of an electronic pen configured to be able to perform such a reference resonant frequency matching.
[0005] Prior art literature
[0006] Patent Literature
[0007] Patent Document 1: Japanese Patent No. 6320231
[0008] Patent Document 2: International Publication No. 2016 / 056299 Summary of the invention
[0009] Problems to be solved by the invention
[0010] However, conventionally, the reference resonant frequency is matched based on the rated values of the capacitance values of the plurality of capacitors disposed in the resonant circuit, that is, the reference resonant frequency after the wiring is cut is predicted based on the rated values of the capacitance values of the capacitors, and the capacitor to be cut is selected based on the predicted result.
[0011] However, the actual capacitance value of the capacitor has manufacturing errors and is not limited to the same value as the rated value. As a result, if the capacitor to be disconnected is selected based on the rated value as described above, there is a situation where the reference resonant frequency adjustment fails due to excessive disconnection, and the efficiency of the adjustment operation such as capacitor selection and wiring cutting must be repeated multiple times, which deteriorates.
[0012] Therefore, one object of the present invention is to provide a method of adjusting the resonance frequency of a resonance circuit included in an electronic pen, which can appropriately adjust the reference resonance frequency, an electronic pen, and a method of producing the electronic pen.
[0013] Technical solutions to solve problems
[0014] The method of the present invention is a method for adjusting the resonant frequency of a resonant circuit included in an electronic pen, wherein the electronic pen includes: a coil; an external capacitor; and an integrated circuit, including an internal capacitor array composed of a plurality of capacitor elements connected in parallel, the resonant circuit being composed of the coil, the external capacitor and the internal capacitor array, the method including the following steps performed using an adjustment unit for adjusting the capacitance of the internal capacitor array and a measurement unit for measuring the alternating magnetic field generated by the resonant circuit: (1) a state changing step of changing the state of a predetermined portion of the plurality of capacitor elements constituting the internal capacitor array; and (2) an adjustment step of changing the state of a portion or all of one or more capacitor elements other than the portion of the plurality of capacitor elements constituting the internal capacitor array according to the amount of change in the reference resonant frequency of the resonant circuit changed by the change.
[0015] The electronic pen of the present invention includes: a coil; an external capacitor; and an integrated circuit, including an internal capacitor array composed of multiple capacitor elements connected in parallel, the internal capacitor array is composed of a part of capacitor elements whose states have been changed by prescribed processing and the remaining capacitor elements whose states have not been changed, and the electronic pen is configured to send signals using a resonant circuit composed of the coil, the external capacitor and the remaining capacitor elements.
[0016] The method of producing an electronic pen of the present invention is a method of producing the above-mentioned electronic pen by executing the above-mentioned method.
[0017] Effects of the Invention
[0018] According to the present invention, the reference resonant frequency can be adjusted based on the estimated capacitance change amount of each of the plurality of capacitive elements, and thus the reference resonant frequency can be adjusted appropriately. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 1 is a diagram showing the appearance of the digital pen 1 according to the first embodiment of the present invention.
[0020] Figure 2 It means that the configuration is Figure 1 A top view of the structure in the housing 2 is shown.
[0021] Figure 3 1 is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 according to the first embodiment of the present invention.
[0022] Figure 4 is the minimum capacitance unit C MIN Schematic cross-sectional view of .
[0023] Figure 5 (a) represents the capacitor array C 1ARRAY (b) is a diagram showing a specific example of the structure of the capacitor C shown in (a). aTB , C a1 ~C a9 A diagram showing an example of the rated value, maximum value, minimum value, and manufacturing error of the capacitance change (=|C1-C0|) caused by application of the potential Vc for each of the above.
[0024] Figure 6 (a) represents the capacitor C a 1 and 2 are graphs showing the relationship between the rated value of the capacitance change caused by the application of the potential Vc and the actual capacitance change caused by the application of the potential Vc, and (b) is a graph in which the vicinity of the origin of (a) is enlarged.
[0025] Figure 7 1 is a flowchart showing a process of adjusting the reference resonant frequency of the first resonant circuit performed by the external device 30 .
[0026] Figure 8 It means in Figure 7 Flowchart showing details of the reference resonant frequency adjustment process executed in step S6.
[0027] Fig. 9 The minimum capacitance unit C of the modified example of the first embodiment of the present invention is MIN Schematic cross-sectional view of .
[0028] Fig.10 1 is a diagram showing a circuit configuration of an electronic pen 1 and an integrated circuit 6 according to a second embodiment of the present invention.
[0029] Fig.11 1 is a diagram showing a circuit configuration of an electronic pen 1 and an integrated circuit 6 according to a third embodiment of the present invention. DETAILED DESCRIPTION
[0030] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0031] Figure 1 1 is a diagram showing the appearance of an electronic pen 1 according to a first embodiment of the present invention. As shown in the figure, the electronic pen 1 is configured to include a cylindrical housing 2, a pen tip member 3 disposed at one end in the longitudinal direction of the housing 2, and an operation switch 4 provided on the surface of the housing 2. The operation switch 4 is referred to as a side switch when provided on the side of the housing 2, and is referred to as a tail switch when provided at the end of the housing 2.
[0032] The user of the electronic pen 1 moves the electronic pen 1 while holding the housing 2 with one hand and making the pen tip part 3 contact the touch surface of the position detection device (not shown), thereby inputting to the position detection device. During the input, the electronic pen 1 and the position detection device are configured to communicate based on the above-mentioned electromagnetic resonance (EMR) method. The electronic pen 1 is configured to send pen information through the communication, and the pen information includes pen pressure information indicating the pressure (pen pressure) applied to the pen tip part 3 and switch information indicating the on / off state of the operation switch 4. As described in detail later, the electronic pen 1 is configured to change the resonant frequency of the resonant circuit according to the content of the pen information, thereby sending the pen information as a displacement of the resonant frequency.
[0033] Figure 2 It means that it is configured in Figure 1 1 is a top view of the structure in the housing 2 shown in FIG. In this figure, an external device 30 used to adjust the reference resonance frequency of the resonance circuit of the electronic pen 1 is also shown. Figure 3 2 is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 .
[0034] like Figure 2 As shown, a substrate 5 is disposed in the housing 2, on the upper surface of which, in addition to Figure 1 In addition to the operation switch 4 shown in the figure, an integrated circuit 6, a variable capacitance capacitor VC, a fixed capacitance capacitor C B1 , C B2 and a plurality of pads 7. In addition, a coil L is disposed between the substrate 5 and the pen tip member 3. Although not shown, they are electrically connected via wiring or the like provided on the substrate 5. The variable capacitance capacitor VC and the fixed capacitance capacitor C B1 , C B2 It is an external capacitor in the sense of being arranged outside the integrated circuit 6 .
[0035] Depend on Figure 3 It can be seen that the variable capacitance capacitor VC and the fixed capacitance capacitor C B1 , C B2 Together with the coil L, a resonant circuit (LC resonant circuit) of the electronic pen 1 is formed. In addition, a fixed capacitance capacitor C is provided. B1 , C B2 This is because only the capacitor array C provided in the integrated circuit 6 1ARRAY , C 2ARRAY (described later) capacitance, the capacitance of the resonant circuit is insufficient, and in the future it will be possible to make the capacitor array C 1ARRAY , C 2ARRAY When the capacitance is increased, it is not necessary to set the fixed capacitance capacitor C B1 , C B2 .
[0036] The external device 30 includes: a measuring device 31 (measuring unit) for measuring the alternating magnetic field generated at the tip of the electronic pen 1 (the alternating magnetic field generated by the resonant circuit in the electronic pen 1); an adjusting device 32 (adjusting unit) for adjusting the capacitor array C 1ARRAY , C 2ARRAY and a probe 33, connected to the integrated circuit 6 via a plurality of pads 7. The external device 30 is used in part of the manufacturing process of the electronic pen 1 to perform capacitor array C 1ARRAY , C 2ARRAY The device is installed in the electronic pen 1 after adjusting the capacitance, and is removed from the electronic pen 1 after the adjustment is completed.
[0037] Typically, the measuring device 31 is a tablet terminal including a CPU, a memory, a touch sensor for detecting the position of the electronic pen 1, and a sensor controller. The measurement of the alternating magnetic field by such a measuring device 31 is performed as follows. That is, first, the measuring device 31 causes a specified current to flow through the touch sensor, thereby generating a magnetic field on the upper surface of the touch sensor. When the coil L enters the magnetic field, an induced current is generated in the coil L, and the resonant circuit in the electronic pen 1 resonates. An alternating magnetic field is thereby generated, and a current corresponding to the magnitude of the alternating magnetic field is generated in the touch sensor. The measuring device 31 measures the alternating magnetic field by measuring the current. In addition, as described in detail later, two resonant circuits (the first and second resonant circuits described later) with different reference resonant frequencies are exclusively provided in the electronic pen 1, and the effective resonant circuit is switched by operating the operating switch 4. Therefore, it is preferred that when measuring the reference resonant frequency, the operating switch 4 is appropriately operated according to which of the two resonant circuits is to be measured.
[0038] The measuring device 31 is further configured so that the CPU reads out and executes a program stored in the memory, thereby being able to perform various processes required for setting the electronic pen 1. The processes thus performed include the following processes: obtaining a current value of the reference resonant frequency of the resonant circuit in the electronic pen 1 based on the measurement result of the alternating magnetic field, and adjusting the capacitor array C through the adjusting device 32 and the integrated circuit 6 based on the obtained current value and the standard value. 1ARRAY , C 2ARRAY The reference resonant frequency of the resonant circuit in the electronic pen 1 is adjusted by adjusting the capacitance of the electronic pen 1. Figures 5 to 8 Provide detailed explanation.
[0039] The adjustment device 32 is a device composed of electronic components included in a printed circuit assembly (PCA) board, and is connected to the integrated circuit 6 via a probe 33. The adjustment device 32 receives a signal including a capacitor array C from the measurement device 31. 1ARRAY , C 2ARRAY The specific adjustment content of the capacitance (capacitance adjustment setting instruction) is indicated, and the capacitor bit area (described later) in the integrated circuit 6 is written according to the instruction, thereby performing the capacitor array C 1ARRAY , C 2ARRAY Capacitor adjustment.
[0040] Focusing on the inside of the electronic pen 1 again, the variable capacitance capacitor VC is a capacitor whose capacitance varies according to the writing pressure applied to the pen tip member 3. B1 , C B2 They are respectively connected in parallel to the variable capacitance capacitor VC, and play a role in adjusting the reference resonance frequency of the resonance circuit of the electronic pen 1 at the design stage.
[0041] The integrated circuit 6 is configured to include: a control circuit 10 including a memory 11; a switch 12; and two capacitor arrays C 1ARRAY , C 2ARRAY (internal capacitor array); terminals C1P, C1M, C2P, C2M connected to the resonant circuit; and various pins for receiving input of voltage, current, signal, and command from the external device 30 (external adjustment unit). Various pins and Figure 2The multiple pads 7 shown are connected one-to-one, and typically include: a power terminal VPP, which receives a supply of a potential VPP from an external device 30; a power terminal VDD, which receives a supply of a potential VDD (<VPP) from an external device 30; a ground terminal GND, which receives a supply of a ground potential GND (<VDD) from an external device 30; a data terminal SDAT, which receives a supply of arbitrary data SDAT (current) including instructions from an external device 30; a clock terminal SCLK, which receives a supply of an action clock signal SCLK from an external device 30; and a preparation terminal PIO. In addition, the preparation terminal PIO can be connected to the external device 30 or to other devices not shown in the figure. In addition, each terminal (including a pin) provided on the integrated circuit 6 is preferably an I according to the specification of the serial bus. 2 C terminal.
[0042] The terminal C1P is connected to one end of the variable capacitance capacitor VC and the fixed capacitance capacitor C B1 , C B2 One end of each is connected to one end of the coil L. In addition, the terminal C2P is short-circuited with the terminal C1P outside the integrated circuit 6. The terminal C1M is connected to the other end of the variable capacitance capacitor VC and the fixed capacitance capacitor C outside the integrated circuit 6. B1 The other end of the coil L and one end of the operating switch 4 are connected together. Terminal C2M is connected to the fixed capacitance capacitor C outside the integrated circuit 6. B2 The other end of and the other end of the operation switch 4 are connected together.
[0043] For the purpose of explanation, it is assumed that the terminals C1P and C1M and the terminals C2P and C2M in the integrated circuit 6 are open circuits. When the operating switch 4 is turned off, the variable capacitance capacitor VC and the fixed capacitance capacitor C B1 The first resonant circuit is connected in parallel with the coil L, and the combined capacitance thereof and the coil L form a resonant circuit. Hereinafter, this resonant circuit is sometimes referred to as the "first resonant circuit". Since the variable capacitance capacitor VC is included, the resonant frequency of the first resonant circuit changes according to the writing pressure. Therefore, by using the first resonant circuit, the writing pressure is transmitted as a displacement of the resonant frequency.
[0044] On the other hand, when the operation switch 4 is turned on, the variable capacitance capacitor VC and the fixed capacitance capacitor C B1 And fixed capacity capacitor C B2The coil L is connected in parallel with the capacitor VC, and a resonance circuit is formed by the combined capacitance and the coil L. Hereinafter, this resonance circuit is sometimes referred to as the "second resonance circuit". Since the variable capacitance capacitor VC is included, the resonance frequency of the second resonance circuit also changes according to the writing pressure. Therefore, by using the second resonance circuit, it is also possible to transmit the writing pressure as a displacement of the resonance frequency.
[0045] In addition, the second resonance circuit is a circuit in which a fixed capacitance capacitor C is added to the first resonance circuit. B2 Therefore, the displacement range of the resonance frequency corresponding to the writing pressure is different in the second resonance circuit and the first resonance circuit. Therefore, by switching the first and second resonance circuits according to the on / off state of the operation switch 4, it is also possible to transmit the switch information as the displacement of the resonance frequency.
[0046] Capacitor array C 1ARRAY The structure is formed by connecting a plurality of capacitor elements CD in parallel between the terminals C1P and C1M. The plurality of capacitor elements CD are connected by switches S a 、Capacitor C a And switch S b Each capacitor C is connected in series. a The capacitor array C is connected in parallel between the terminals C1P and C1M. 1ARRAY It constitutes a part of each of the first and second resonance circuits.
[0047] In addition, the capacitor array C 2ARRAY The structure has a plurality of capacitor elements CD connected in parallel between the terminals C2P and C2M. The plurality of capacitor elements CD are connected by switches S a 、Capacitor C a And switch S b Each capacitor C is connected in series. a The capacitor array C is connected in parallel between the terminals C2P and C2M. 2ARRAY Forms part of the second resonant circuit.
[0048] More specifically, the capacitor array C 1ARRAY , C 2ARRAY Each capacitor C a By respectively dividing a plurality of capacitors of a predetermined capacitance (hereinafter referred to as “minimum capacitance unit C MIN ”) are connected in parallel. Therefore, each capacitor C a The capacitance value becomes the minimum capacitance unit C MIN The capacitance value of each minimum capacitance unit C MIN They are formed on the same substrate using the same process and therefore can be considered to have the same physical properties.
[0049] Figure 4 is the minimum capacitance unit C MIN As shown in the figure, the minimum capacitance unit C MIN It has a structure in which an insulating film 21, a floating gate 22, and a gate electrode 23 are sequentially stacked on a substrate 20. This structure is similar to a floating gate flash memory, but it is different from a flash memory in that it may or may not have a source and a drain.
[0050] The substrate 20 is made of an n-type semiconductor such as a silicon substrate doped with n-type impurities. The insulating film 21 is made of an insulating material such as silicon oxide or silicon nitride. The gate electrode 23 is made of a conductive material such as a conductive metal.
[0051] The floating gate 22 is composed of an n-type semiconductor such as polysilicon doped with n-type impurities. However, in the stage before adjusting the resonance frequency, the floating gate 22 is in a state where no charge is injected (initial state) due to depletion. Therefore, when the minimum capacitance unit C in the stage before adjusting the reference resonance frequency is MIN When the electrostatic capacitance of is set to C0, C0 is expressed by the following formula (1). OX is the electrostatic capacitance of the insulating film 21 .
[0052] [Formula 1]
[0053] C0=C OX …(1)
[0054] In addition, switch S a The structure is to have: a capacitor C corresponding to the structure a More than one minimum capacitance unit C MIN The gate electrodes 23 of the switches 23 are connected to a common terminal; a first selection terminal connected to the terminal C1P or the terminal C2P; and a second selection terminal to which the potential Vc is supplied. b The structure is to have: a capacitor C corresponding to the structure a More than one minimum capacitance unit C MIN The switch S has a common terminal connected to the substrate 20 (so-called back gate); a first selection terminal connected to the terminal C1M or the terminal C2M; and a second selection terminal supplied with the ground potential GND. In this embodiment, the potential Vc is a potential higher than the ground potential GND. a , S b In the initial state, the common terminal and the first selection terminal are connected to each other.
[0055] return Figure 3 The control circuit 10 adjusts the capacitor array C according to the instruction from the external device 30. 1ARRAY , C 2ARRAYSpecifically, according to the instruction from the external device 30, the capacitor array C is changed by using the control signal BC1. 1ARRAY The state of each capacitive element CD in the capacitor array C is adjusted 1ARRAY The reference resonant frequencies of the first and second resonant circuits are adjusted by adjusting the capacitance of the capacitor array C according to the instruction from the external device 30, and the control signal BC2 is used to change the capacitor array C 2ARRAY The state of each capacitive element CD in the capacitor array C is adjusted 2ARRAY The capacitance of the second resonant circuit is adjusted by adjusting the reference resonant frequency of the second resonant circuit. The capacitance element CD is a control unit for the state change performed by the control circuit 10. In this embodiment, the state of each capacitance element CD is changed by changing one or more minimum capacitance units C constituting the capacitance element CD. MIN The capacitance of each capacitor is changed from the above-mentioned C0 (initial state) to C1 (changed state) to be described later. The details of the changed state will be described later.
[0056] In the memory 11 of the control circuit 10, a capacitor bit area is provided for each capacitor element CD to store a value indicating whether to change its state. This value is written into the capacitor bit area by the external device 30 using the above-mentioned data SDAT. The control circuit 10 is configured to generate control signals BC1 and BC2 based on the values stored in the capacitor bit area and supply them to the capacitor array C. 1ARRAY , C 2ARRAY .
[0057] The control circuit 10 is configured to have a function of generating a potential Vc based on a potential VPP or a potential VDD supplied from an external device 30. When the control circuit 10 starts changing the reference resonant frequency, it starts to supply the potential Vc generated in this way to each switch S. a The second selection terminal is supplied, and with respect to each switch S b The supply of the ground potential GND supplied from the external device 30 is started.
[0058] When the reference resonant frequency is changed, the control circuit 10 controls the capacitor array C 1ARRAY Among the plurality of capacitance elements CD included, the capacitance element CD storing the value indicating the change state in the capacitor bit region generates a value for switching the corresponding switch S a , S b The control signal BC1 is respectively switched to the second selection terminal side and supplied to the corresponding switch S a , S b Then, after a specified time, a corresponding switch S is generated. a , S bThe control signal BC1 is respectively switched to the first selection terminal side and supplied to the corresponding switch S a , S b .
[0059] In addition, the control circuit 10 controls the capacitor array C 2ARRAY Among the plurality of capacitance elements CD included, the capacitance element CD storing the value indicating the change state in the capacitor bit region generates a value for switching the corresponding switch S a , S b The control signal BC2 is respectively switched to the second selection terminal side and supplied to the corresponding switch S a , S b Then, after a specified time, a corresponding switch S is generated. a , S b The control signal BC2 is respectively switched to the first selection terminal side and supplied to the corresponding switch S a , S b .
[0060] The control circuit 10 generates and supplies the control signals BC1 and BC2 as described above, thereby controlling the capacitor C in the capacitive element CD storing a value indicating a change state in the capacitor bit region. a , apply potential Vc within a specified time.
[0061] Here again, refer to Figure 4 When the potential Vc is applied, the electrons existing in the substrate 20 are attracted to the vicinity of the boundary with the insulating film 21, and some of them move to the floating gate 22 due to the tunnel effect. The electrons accumulated in the floating gate 22 remain in the floating gate 22 even after the application of the potential Vc ends. That is, the floating gate 22 is in a state where charges are injected. As a result, a depletion layer is formed in the floating gate 22. Therefore, if the electrostatic capacitance of the depletion layer is set to C D , then the minimum capacitance unit C MIN The capacitance change is a value C1 represented by the following equation (2). In this way, the state change of the capacitive element CD is achieved.
[0062] [Formula 2]
[0063]
[0064] From the formula (2), it can be seen that the value C1 is the electrostatic capacitance C of the insulating film 21. OX and the electrostatic capacitance C of the depletion layer D The value corresponding to the series connection. In addition, the electrostatic capacitance C of the depletion layer DThe potential Vc varies depending on the width of the depletion layer, but can be stabilized at a constant value by injecting sufficient charges to completely deplete the floating gate 22. Therefore, it is preferable to continue applying the potential Vc until the floating gate 22 is completely depleted.
[0065] As mentioned above, the capacitor array C 1ARRAY Therefore, by forming a portion of each of the first and second resonant circuits, the capacitor array C 1ARRAY Each capacitor C a More than one minimum capacitance unit C MIN Electrons are injected into the floating gates 22 individually, thereby switching the state of each capacitive element CD from the initial state to the changed state individually, thereby changing the reference resonance frequencies of the first and second resonance circuits.
[0066] In addition, as mentioned above, the capacitor array C 2ARRAY Therefore, the reference resonant frequency of the second resonant circuit is also changed as follows: As described above, the reference resonant frequency of the second resonant circuit is changed to the capacitor array C 2ARRAY Each capacitor C a More than one minimum capacitance unit C MIN Electrons are injected into the floating gates 22 individually, thereby individually switching the state of each capacitor element CD from the initial state described above to the changed state described above.
[0067] Other processing performed by the control circuit 10 is described. The control circuit 10 also has a function of controlling the validity / invalidity of the operation switch 4 according to the instruction from the external device 30 supplied using the above-mentioned data SDAT. Specifically, first, the switch 12 is connected between the terminal C1M and the terminal C2M. When the control circuit 10 is instructed to invalidate the operation switch 4, it generates an enable signal SSWEN for turning on the switch 12 and supplies it to the switch 12. As a result, the terminal C1M and the terminal C2M are short-circuited inside the integrated circuit 6, so the operation switch 4 becomes invalid. In addition, when the control circuit 10 is instructed to validate the operation switch 4, it generates an enable signal SSWEN for turning off the switch 12 and supplies it to the switch 12. As a result, the terminal C1M and the terminal C2M are disconnected inside the integrated circuit 6, so the operation switch 4 becomes valid.
[0068] In addition, the free area in the memory 11 is an area for storing a pen ID and other information for distinguishing the electronic pen 1 from other electronic pens. The information stored in the free area is also written by the external device 30 using the above-mentioned data SDAT. In addition, the electronic pen 1 can also send the pen ID stored in the free area in the memory 11 to the position detection device as part of the pen information. Thereby, the position detection device can perform different processing for each electronic pen 1 (for example, processing for changing the drawing color for each electronic pen 1).
[0069] Next, refer to Figures 5 to 8 The processing performed by the external device 30 to adjust the reference resonant frequencies of the first and second resonant circuits will be described in detail. 1ARRAY The case where the reference resonant frequency of the first resonant circuit is adjusted by adjusting the capacitance value is described.
[0070] Figure 5 (a) represents the capacitor array C 1ARRAY The capacitor array C shown in the figure is a specific example of the structure. 1ARRAY The structure is composed of 10 capacitors C aTB , C a1 ~C a9 As capacitor C a In addition, Figure 5 In (a), only Figure 3 The structure of the electronic pen 1 shown in FIG. 1ARRAY The relevant parts are extracted, but the actual structure is as follows Figure 3 shown.
[0071] Figure 5 (b) represents the capacitor C aTB , C a1 ~ Ca9 For each of the above, the rated value, maximum value, minimum value and manufacturing error of the capacitance change (=|C1-C0|) caused by the application of the potential Vc are shown in the figure. MIN The rated value of the capacitance change is set to 0.5fF, so the capacitor C aTB , C a1 ~C a9 The rated value of the capacitance change is an integer multiple of 0.5fF. aTB , C a1 ~C a9 The respective capacitance change amounts are set to different values from each other.
[0072] More specifically, if Figure 5 As shown in (b), capacitor Ca(9-k) The rated value of the capacitance change (k is an integer from 0 to 8) is set to the minimum capacitance unit C MIN The value is obtained by multiplying the rated value of the capacitance change of 0.5fF by approximately 2 to the kth power. This is to make the capacitor array C as efficient as possible over a wide range. 1ARRAY On the other hand, the capacitor C aTB The rated value of the capacitance change is set as capacitor C a1 ~C a9 The capacitance change is the middle value between the maximum and minimum values (for example, 10fF). The details will be explained below. aTB To estimate the capacitor C a1 ~C a9 The capacitance variation caused by the manufacturing error is reduced by aTB Setting the rated value of to such a value can improve the estimation accuracy.
[0073] Figure 6 (a) represents the capacitance of each capacitor C a A graph showing the relationship between the rated value of the capacitance change caused by the application of the potential Vc and the actual capacitance change caused by the application of the potential Vc, Figure 6 (b) is to Figure 6 As mentioned above, capacitor C aTB , C a1 ~C a9 Each of the at least one minimum capacitor unit C is formed on the same substrate 20 by the same process. MIN Therefore, the capacitor C aTB , C a1 ~C a9 The manufacturing errors generated in each are substantially the same value. For example, if the capacitor C aTB The manufacturing error of +15% is generated in the capacitor C a1 ~C a9 There is also a +15% manufacturing error in each. In addition, for example, in the capacitor C aTB The manufacturing error of -15% is generated in the capacitor C a1 ~C a9 There is a -15% manufacturing error in each. Figure 6 (a) and Figure 6 As shown in (b), each capacitor C a The relationship between the rated value of the capacitance change caused by the application of the potential Vc and the actual capacitance change caused by the application of the potential Vc is plotted on a straight line having a slope corresponding to the magnitude of the manufacturing error. Hereinafter, the slope of the straight line is referred to as the "capacitance change gradient".
[0074] The external device 30 utilizes such a capacitor C aTB , C a1 ~C a9 The properties of the capacitor C are estimated with high accuracy a1 ~C a9 The capacitance change amount of the external device 30 is calculated, and the reference resonance frequency of the first resonance circuit is adjusted based on the estimated capacitance change amount. The processing performed by the external device 30 will be specifically described below with reference to the processing flow chart.
[0075] Figure 7 1 is a flowchart showing a process of adjusting the reference resonance frequency of the first resonance circuit by the external device 30. This process is performed as part of the manufacturing process of the electronic pen 1. In the following description, the capacitor C aTB The capacitive element CD is called the "test bit" and will contain capacitors C a1 ~C a9 The multiple capacitive elements CD are respectively called “adjustment bits”.
[0076] First, if Figure 7 As shown, the external device 30 measures the reference resonant frequency of the first resonant circuit (step S1. first measurement step). Next, the external device 30 changes the state of the test bit (a predetermined portion of the capacitor element CD) by writing to the above-mentioned capacitor bit area and causing the control circuit 10 to perform a predetermined process (step S2. state change step). In the present embodiment, the predetermined process is to apply a potential Vc to the capacitor C included in the capacitor element CD. a The floating gate 22 (refer to Figure 4 ) injects charge, so that the capacitor C a Then, the reference resonant frequency of the first resonant circuit is measured again (step S3. The second measurement step), and the actual capacitance change of the test bit is estimated based on the reference resonant frequencies (the reference resonant frequencies before and after the state change of the test bit) respectively measured in steps S1 and S3 (step S4. The first estimation step). Specifically, based on the following formula (3), the actual capacitance change C of the test bit is calculated. aTBr Wherein, L in formula (3) is Figure 3 The inductance of the coil L is shown. In addition, f1 is the reference resonance frequency measured in step S1, and f2 is the reference resonance frequency measured in step S3.
[0077] [Formula 3]
[0078]
[0079] Next, the external device 30 calculates the reference voltage based on the estimated capacitance change of the test bit and the rated value of the capacitance change of the test bit. Figure 6 The capacitance change gradient described (i.e., the manufacturing error common to the test bit and the plurality of adjustment bits). For example, if the estimated capacitance change of the test bit is 15% greater than the rated value of the capacitance change of the test bit, the capacitance change gradient is calculated to be 1.15. Then, based on the calculated capacitance change gradient, the actual capacitance change of each adjustment bit is estimated (step S5. second estimation step). For example, if the calculated capacitance change gradient is 1.15, it is estimated that the capacitor C having a rated value of 30 fF including the capacitance change a3 Capacitor components (refer to Figure 5 The actual capacitance change of (b) is 30×1.15=34.5 fF. Then, the external device 30 performs a reference resonant frequency adjustment process for adjusting the reference resonant frequency of the first resonant circuit based on the actual capacitance change of each adjustment position estimated by step S6 (step S6. Adjustment step)
[0080] Figure 8 It means in Figure 7 Flowchart showing the details of the reference resonant frequency adjustment process performed in step S6 of . In this process, the following process is performed by the external device 30: when the difference between the reference resonant frequencies before and after the state change of the test bit is relatively large, one or more capacitor elements CD to be the object of the state change are selected so that the total rated value of the capacitance change amount of one or more capacitor elements CD whose state is changed becomes smaller than when the difference is relatively small, and the state of the selected one or more capacitor elements CD (part or all of the adjustment bits) is changed. Specifically, as Figure 8 As shown, the external device 30 first determines whether the last measured reference resonance frequency is within the adjustment target range (step S10). In addition, the adjustment target range is the range of the reference resonance frequency values required for normal communication with the position detection device, which is determined by the specifications of the electronic pen. If the determination result of step S10 is positive, the external device 30 returns adjustment OK and ends the process.
[0081] On the other hand, if the determination result of step S10 is negative, the external device 30 determines whether the reference resonant frequency can be adjusted in a manner that converges to the adjustment target range (step S11). Specifically, the capacitance change amount of each adjustment position estimated in step S6 is used to estimate the reference resonant frequency obtained when the potential Vc is applied to all adjustment positions. Then, if the reference resonant frequency measured in step S3 and the estimated reference resonant frequency include at least a part of the adjustment target range, it is determined that adjustment is possible, otherwise it is determined that adjustment is not possible. In the case of obtaining a determination result that adjustment is not possible, the external device 30 returns adjustment NG and ends the processing. In this case, the electronic pen 1 that is the processing object becomes a defective product and becomes an object of disposal.
[0082] The external device 30 that has obtained the judgment result that adjustment is possible in step S11 selects the adjustment bit whose state is changed for rough adjustment based on the capacitance change amount of each adjustment bit (the value estimated in step S6) and the difference between the last measured reference resonant frequency and the adjustment target (for example, the value closest to the last measured reference resonant frequency among the values included in the adjustment target range) (step S12). This selection, for example, only changes the state of the adjustment bit with a relatively large capacitance change amount (for example, each including capacitor C a1 ~C a4 The four capacitive elements CD) are selected as the selection objects, and are executed in a manner as close to the adjustment target as possible within a range in which the reference resonant frequency does not exceed the adjustment target.
[0083] Next, the external device 30 determines whether one or more adjustment bits of a changed state are selected in step S12 (step S13). As a result, it is determined that one or more adjustment bits are selected by the external device 30, which writes to the capacitor bit area, thereby causing the control circuit 10 to perform the above-mentioned predetermined processing, thereby changing the state of the selected adjustment bit (step S14). Then, the reference resonant frequency of the first resonant circuit is measured again (step S15).
[0084] When step S15 is completed, or when it is determined in step S13 that no adjustment is selected, the external device 30 selects the adjustment bit to be changed for fine adjustment based on the capacitance change of each adjustment bit (the value estimated in step S6) and the difference between the last measured reference resonant frequency and the adjustment target (step S16). This selection is performed, for example, by changing only the adjustment bits with relatively small capacitance change (for example, each including capacitor C a5 ~C a9The 5 capacitor elements CD) are selected as the object of selection and are performed in a manner as close to the adjustment target as possible. In addition, the coarse adjustment of steps S12 to S14 and the fine adjustment of steps S16 to S18 are performed separately because it is difficult to accurately predict the reference resonant frequency obtained as a result of the change at the stage before the state of the capacitor element is actually changed.
[0085] Next, the external device 30 determines whether one or more adjustment bits of a changed state are selected in step S16 (step S17). As a result, it is determined that one or more adjustment bits are selected by the external device 30, which writes to the capacitor bit area, thereby causing the control circuit 10 to perform the above-mentioned predetermined processing, thereby changing the state of the selected adjustment bit (step S18). Then, the reference resonant frequency of the first resonant circuit is measured again (step S19).
[0086] When step S19 is completed, or when it is determined in step S17 that no one has been selected, the external device 30 returns the process to step S10. Thus, the above-mentioned process is repeated, and the process ends with either adjustment OK or adjustment NG as the result.
[0087] Here, in the description so far, the capacitor array C 1ARRAY The reference resonant frequency of the first resonant circuit is adjusted by adjusting the capacitance value of the capacitor array C. However, after the reference resonant frequency of the first resonant circuit is adjusted, the capacitor array C 2ARRAY The reference resonant frequency of the second resonant circuit can be adjusted by adjusting the capacitance value of 2ARRAY Multiple minimum capacitance units C MIN The capacitor array C 1ARRAY Multiple minimum capacitance units C MIN Since it is formed on the same substrate using the same process, it does not need to be repeated Figure 7 In steps S1 to S5, the reference resonant frequency of the first resonant circuit is adjusted using Figure 7 The capacitance change gradient calculated in step S5 is based on the capacitor array C 2ARRAY Each capacitor element CD is the object of Figure 8 The reference resonant frequency adjustment process shown in the figure is sufficient. There is no need to add capacitor array C 2ARRAY However, it is of course possible to set the test bit in the capacitor array C 2ARRAY The test bit is set in the internal circuit so as to adjust the reference resonant frequency of the second resonant circuit separately from the reference resonant frequency of the first resonant circuit. Figure 7 Steps S1 to S5.
[0088] As described above, according to the method for manufacturing the electronic pen 1 of this embodiment, in the case of using the capacitor C having a floating gate a When each capacitive element CD is configured in this manner, the reference resonant frequency can be adjusted based on the capacitance change amount of each of the plurality of adjustment bits estimated using the test bit, so that the reference resonant frequencies of the first and second resonant circuits can be adjusted appropriately.
[0089] In addition, according to the integrated circuit 6 of this embodiment, in the capacitor array C 1ARRAY , C 2ARRAY The plurality of capacitor elements CD include the capacitor element CD for testing which must be switched to a changed state in the manufacturing stage, so the capacitance change amount of each of the plurality of adjustment bits can be estimated.
[0090] In addition, in this embodiment, an example in which the floating gate 22 is formed of an n-type semiconductor is described, but the floating gate 22 may be formed of a p-type semiconductor such as polysilicon doped with p-type impurities. Fig. 9 Provide explanation.
[0091] Fig. 9 The minimum capacitance unit C of the modified example of the first embodiment of the present invention is MIN The example shown in this figure is different from the example in that the substrate 20 is composed of a silicon substrate doped with p-type impurities (p-type semiconductor), the floating gate 22 is composed of polycrystalline silicon doped with p-type impurities (p-type semiconductor), and the potential Vc is a potential lower than the ground potential GND. Figure 4 The examples shown are different.
[0092] Based on Fig. 9 Example of the minimum capacitance unit C MIN In the case where the potential Vc is applied for a predetermined time, as described above, the holes (positive holes) existing in the substrate 20 are attracted to the vicinity of the boundary with the insulating film 21, and part of them move to the floating gate 22 due to the tunnel effect. Furthermore, the holes accumulated in the floating gate 22 remain in the floating gate 22 even after the application of the potential Vc ends. Therefore, since the floating gate 22 is depleted, the Figure 4 Example of the minimum capacitance unit C MIN Similarly, the minimum capacitance unit C can be changed by the control circuit 10 MIN In this case, the above-mentioned predetermined processing is also to apply the potential Vc to the capacitor C included in the capacitive element CD. a The floating gate 22 injects charge, thereby making the capacitor C a In addition, Fig. 9In the example of FIG. 1 , it is also preferable to continue the application of the potential Vc until the floating gate 22 is completely depleted to stabilize the electrostatic capacitance of the depletion layer.
[0093] In addition, instead of using a floating gate flash memory, a structure similar to a charge trap flash memory may be used to form the minimum capacitance unit C. MIN In this case, the above-mentioned predetermined process is a process of injecting charges into the charge trap insulating film of the capacitor included in the capacitance element CD by applying a predetermined potential, thereby changing the capacitance value of the capacitor.
[0094] Next, a second embodiment of the present invention will be described. In this embodiment, each capacitive element CD includes a fuse element H instead of a switch S. a , S b This point is different from the first embodiment, and other points are the same as the first embodiment. Therefore, the same reference numerals are given to the same structures, and the following description focuses on the differences from the first embodiment.
[0095] Fig.10 1 is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 according to the present embodiment. As shown in the diagram, the capacitive element CD of the present embodiment has a capacitor C b The capacitor C and the fuse element H are connected in series. b The specific type is not particularly limited, and various capacitors generated in the semiconductor manufacturing process such as MIM (Metal-Insulator-Metal) and MOM (Metal-Oxide-Metal) can be used as the capacitor C b .
[0096] In the present embodiment, the change of the state of the capacitor element CD is performed by applying a predetermined voltage to the fuse element H included in the capacitor element CD, thereby changing the fuse element H from a state that has not been cut (initial state) to a cut state (changed state). That is, the above-mentioned predetermined processing in the present embodiment is a processing of cutting the fuse element H included in the capacitor element CD as a processing object.
[0097] Specifically, the external device 30 Figure 7 Step S2, or Figure 8 When the state of a specific capacitor element CD is to be changed in steps S14 and S18, the control circuit 10 is controlled to supply a control signal BC1 for cutting off the fuse element H in the capacitor element CD. As a result, the fuse element H is cut off and the corresponding capacitor CD is disconnected. bThe fuse element H is disconnected from the circuit, so the state of the corresponding capacitor element CD is changed. The capacitance change of the capacitor element CD caused by the disconnection of the fuse element H becomes the capacitance of the capacitor C b of electrostatic capacitance.
[0098] In this embodiment, the capacitor array C 1ARRAY , C 2ARRAY Therefore, according to the manufacturing method of the electronic pen 1 of this embodiment, in the case of including the capacitor C b When each capacitive element CD is formed by a series-connected fuse element H, the reference resonant frequency can be adjusted based on the estimated capacitance change amount of each of the plurality of adjustment bits using the test bit, so that the reference resonant frequency of the first and second resonant circuits can be appropriately adjusted.
[0099] In addition, according to the integrated circuit 6 of this embodiment, in the capacitor array C 1ARRAY , C 2ARRAY The plurality of capacitor elements CD include the capacitor element CD for testing which must be switched to a changed state in the manufacturing stage, so the capacitance change amount of each of the plurality of adjustment bits can be estimated.
[0100] In addition, in this embodiment, the capacitors C b This example shows an example of connecting the fuse element H in series, but it can also be applied to other types of elements. For example, the anti-fuse element can be connected to each capacitor C b A MEMS switch such as a MEMS (Micro Electro Mechanical Systems) cantilever may be used for the series connection.
[0101] The anti-fuse element is opposite to the fuse element H, and is an element that is not conductive in the initial state, but becomes conductive (changed state) by applying a voltage greater than a predetermined value. Therefore, the control circuit 10 can change the state of each capacitor element CD by turning on the anti-fuse element in each capacitor element CD. In this case, the above-mentioned predetermined processing becomes a processing for turning on the anti-fuse element included in the capacitor element CD as the processing object.
[0102] In addition, the MEMS switch is an element that can be switched on or off by applying a voltage. Either the state in which the MEMS switch is on or off can be used as the initial state, and the control circuit 10 can change the state of each capacitor element CD by switching the on and off state of the MEMS switch in each capacitor element CD. In this case, the above-mentioned predetermined processing becomes a processing of switching the on or off of the MEMS switch included in the capacitor element CD as the processing object.
[0103] Next, the third embodiment of the present invention is described. This embodiment is different from the first embodiment in that pen information is transmitted based on the difference of the resonant frequency of the resonant circuit in the electronic pen 1 rather than the resonant frequency itself, and that the capacitance of the variable capacitance capacitor can be changed. 1ARRAY , C 2ARRAY The point that one or more test bits are included is the same as that of the first embodiment. Therefore, the same reference numerals are given to the same structures below, and the description will be focused on the differences from the first embodiment.
[0104] Fig.11 1 is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 according to the present embodiment. As shown in the diagram, the electronic pen 1 according to the present embodiment is further configured to include a variable capacitance capacitor VC DPH . Variable capacitance capacitor VC DPH Similar to the variable capacitance capacitor VC, the capacitance is configured to be proportional to the voltage applied to the pen tip member 3 (see Figure 1 ) of the pen pressure. In addition, the integrated circuit 6 is configured to further include switches 13, 14, a fixed capacitance capacitor C MD , terminals DPHC and DPHI connected to the resonant circuit.
[0105] First, focusing on the outside of the integrated circuit 6, the other end of the variable capacitance capacitor VC of this embodiment is not connected to the terminal C1M but to the terminal DPHC. DPH Connect between terminals DPHC and DPHI.
[0106] Next, focusing on the inside of the integrated circuit 6, the switch 13 is provided between the terminal C1M and the common terminal of the switch 14. In addition, the switch 14 is configured to have a common terminal connected to one end of the switch 13, a first selection terminal connected to the terminal DPHC, and a fixed capacitance capacitor C1M. MD A second selection terminal connected to the terminal DPHI.
[0107] The control circuit 10 is configured to have the following functions: a function of controlling the on / off state of the switch 13 by a control signal DPHEN1 according to an instruction from the position detection device; and a function of controlling the selection state of the switch 14 by a control signal DPHEN2 according to an instruction from the position detection device.
[0108] The position detection device corresponding to the electronic pen 1 of the present embodiment is configured to receive pen information sent by the electronic pen 1 based on the difference between the resonant frequency of the resonant circuit including the variable capacitance capacitor VC (the first and second resonant circuits described above) (hereinafter referred to as the "first resonant frequency") and the resonant frequency of the resonant circuit not including the variable capacitance capacitor VC (the resonant circuit after the variable capacitance capacitor VC is removed from the first and second resonant circuits) (hereinafter referred to as the "second resonant frequency").
[0109] Specifically, the position detection device first instructs the electronic pen 1 to turn on the switch 13 and connect the switch 14 to the first selection terminal side. This instruction can be performed, for example, by changing the duration of the transmission of the magnetic field transmitted from the sensor coil not shown (for details, refer to Patent Document 2). In the case where the electronic pen 1 and the position detection device correspond to other communication units (for example, short-range wireless communication such as Bluetooth (registered trademark)), this communication unit can also be used. This is also the same for other instructions described later. After the instruction is performed, the resonant frequency detected by the position detection device becomes the first resonant frequency reflecting the state of the pen pressure and the operation switch 4.
[0110] Next, the position detection device instructs the electronic pen 1 to turn off the switch 13. After this instruction, the resonance frequency detected by the position detection device becomes the second resonance frequency that does not reflect the writing pressure.
[0111] The position detection device obtains the difference between the first and second resonance frequencies detected in this way, and obtains the pen information based on the obtained difference. By obtaining the pen information in this way, even if the reference resonance frequencies of the first and second resonance circuits, which are values equal to the standard values at the time of shipment, vary due to the proximity of metal, temperature changes, aging changes, etc., the variation is offset by obtaining the difference, so that the position detection device can correctly detect the pen information.
[0112] The position detection device corresponding to the digital pen 1 of the present embodiment is configured to change the writing pressure curve of the digital pen 1 (the curve indicating the relationship between the writing pressure applied to the pen tip member 3 and the amount of change in the resonance frequency) based on a user operation.
[0113] Specifically, the electronic pen 1 of the present embodiment corresponds to a variable capacitance capacitor VC DPH And fixed capacity capacitor C MD The first pen pressure curve corresponding to the state where the first and second resonance circuits are disconnected and the variable capacitance capacitor VC DPH And fixed capacity capacitor C MDThe position detection device is configured to select one of the first and second pressure curves based on the user operation, and when the first pressure curve is selected, instruct the electronic pen 1 to turn on the switch 13 and connect the switch 14 to the first selection terminal side, and when the second pressure curve is selected, instruct the electronic pen 1 to turn on the switch 13 and connect the switch 14 to the second selection terminal side. The electronic pen 1 controls the states of the switches 13 and 14 according to the instruction. In this way, the pressure curve of the electronic pen 1 can be changed according to the user operation, and as a result, the writing feeling (drawing feeling) of the electronic pen 1 can be changed in two stages.
[0114] As described above, according to the integrated circuit 6 and the electronic pen 1 of the present embodiment, in addition to the same effects as those of the first and second embodiments, the following effects are obtained: even if there is a change in the reference resonance frequency due to the proximity of metal, temperature change, aging change, etc. after the reference resonance frequency is adjusted, the pen information can be correctly detected on the position detection device side. In addition, as a result, the accuracy of the pen pressure is improved, so the position detection device can set the threshold value (on load) of the pen pressure for determining whether the electronic pen 1 is in contact with the touch surface to a smaller value.
[0115] Furthermore, according to the integrated circuit 6 and the electronic pen 1 of the present embodiment, it is possible to change the writing feeling (drawing feeling) of the electronic pen 1 in two stages according to the user operation.
[0116] As mentioned above, although the preferred embodiment of the present invention has been described, the present invention is not limited to such embodiment at all, and the present invention can be implemented in various forms within the scope not departing from the gist of the present invention.
[0117] For example, in the above-mentioned embodiments, the case where pen information is transmitted by shifting the resonance frequency is cited, but the present invention can also be applied to the case where pen information is transmitted as digital information by turning on or off the supply of a signal to a resonance circuit according to the content of the pen information. That is, in this case, it is also possible to change the reference resonance frequency of the resonance circuit by preparing a plurality of capacitance elements connected in parallel with the capacitor constituting the resonance circuit in advance in the integrated circuit and changing the state of each capacitance element individually.
[0118] In the above-described embodiments, an example in which a tablet terminal is used as the measuring device 31 is described. However, the measuring device 31 may be constituted by one or more other devices such as an oscilloscope, an impedance analyzer, and a personal computer.
[0119] In addition, in the above-mentioned embodiments, the present invention is applied to an electronic pen used in an electromagnetic resonance (EMR) input system, but it can also be applied to a card for near field communication (NFC) or an EM pen that does not receive power but uses its own power supply to operate a resonance circuit. When the present invention is applied to an EM pen, a measuring device 31 that does not have a function of generating a magnetic field can be used.
[0120] Description of symbols
[0121] 1 Electronic pen
[0122] 2 Housing
[0123] 3. Nib Parts
[0124] 4 Operation switch
[0125] 5. 20 substrate
[0126] 6 Integrated Circuits
[0127] 7 Pads
[0128] 10 Control Circuit
[0129] 11 Memory
[0130] 12, 13, 14 Switch
[0131] 21 Insulation film
[0132] 22 Floating Gate
[0133] 23. Gate electrode
[0134] 30 External devices
[0135] 31. Measurement device
[0136] 32 Adjustment device
[0137] 33 Probe
[0138] BC1, BC2 control signals
[0139] C 1ARRAY , C 2ARRAY Capacitor Array
[0140] C1P, C1M, C2P, C2M terminals
[0141] C a , C aTB , C a1 ~C a9 , C b Capacitors
[0142] CaTBr Capacitance change
[0143] C B1 , C B2 , C MD Fixed Capacitors
[0144] CD capacitor element
[0145] C MIN Minimum capacitance unit
[0146] DPHC, DPHI terminals
[0147] DPHEN1, DPHEN2 control signals
[0148] GND Ground terminal, ground potential
[0149] H Fuse element
[0150] L Coil, inductor
[0151] PIO preparation terminal
[0152] S a , S b switch
[0153] SCLK clock terminal, action clock signal
[0154] SDAT data terminal, data
[0155] SSWEN Enable signal
[0156] VC, VC DPH Variable Capacitors
[0157] Vc potential
[0158] VDD power supply terminal, potential
[0159] VPP Power supply terminal, potential
Claims
1. A method for adjusting the resonant frequency of a resonant circuit included in an electronic pen, wherein: The electronic pen comprises: Coil; External capacitors; and An integrated circuit comprising an internal capacitor array formed by connecting a plurality of capacitive elements in parallel, The coil, the external capacitor and the internal capacitor array constitute the resonant circuit. The method comprises the following steps performed using an adjusting unit for adjusting the capacitance of the internal capacitor array and a measuring unit for measuring the alternating magnetic field generated by the resonant circuit: (1) a state changing step of changing the state of a predetermined portion of the plurality of capacitive elements constituting the internal capacitor array; and (2) An adjustment step of changing the state of part or all of one or more capacitor elements other than the part of capacitor elements among the plurality of capacitor elements constituting the internal capacitor array, based on a reference resonance frequency before and after the state of the resonance circuit changed by the change.
2. The method according to claim 1, wherein: In the adjustment step, when the difference in reference resonant frequency before and after the state change is relatively large, one or more of the capacitor elements that are the objects of the state change are selected in such a manner that the total of the rated values of the capacitance change amounts of the one or more capacitor elements whose states are changed becomes smaller than when the difference is relatively small.
3. The method according to claim 1, wherein: In the adjustment step, a common manufacturing error among the plurality of capacitor elements is calculated based on the reference resonance frequency before and after the state change, and the state of part or all of the one or more capacitor elements is changed based on the calculated manufacturing error.
4. The method according to claim 1, wherein: The adjustment unit is arranged inside the integrated circuit. The measuring unit is a device different from the electronic pen and includes a fixing unit that fixes the electronic pen at a predetermined position.
5. The method according to any one of claims 1 to 4, wherein: The capacitor included in each of the plurality of capacitive elements includes a floating gate formed above a substrate, In the state changing step, charge is injected into the floating gate of the capacitor included in the part of the capacitive elements to change the capacitance value of the capacitor, thereby changing the state of the part of the capacitive elements.
6. The method according to any one of claims 1 to 4, wherein: The capacitor included in each of the plurality of capacitive elements includes a charge trapping insulating film formed above a substrate, In the state changing step, charges are injected into the charge trap insulating film of the capacitor included in the part of the capacitive elements to change the capacitance value of the capacitor, thereby changing the state of the part of the capacitive elements.
7. The method according to any one of claims 1 to 4, wherein: The plurality of capacitance elements respectively include a fuse element connected in series with the corresponding capacitor, In the state changing step, the state of the part of the capacitor elements is changed by cutting the fuse element included in the part of the capacitor elements.
8. The method according to any one of claims 1 to 4, wherein: The plurality of capacitance elements respectively include an anti-fuse element connected in series with the corresponding capacitor, In the state changing step, the state of the part of the capacitive elements is changed by turning on the anti-fuse elements included in the part of the capacitive elements.
9. The method according to any one of claims 1 to 4, wherein: The plurality of capacitive elements respectively include a MEMS switch connected in series with the corresponding capacitor, In the state changing step, the state of the part of the capacitive elements is changed by switching the MEMS switches included in the part of the capacitive elements on or off.
10. An electronic pen, comprising: Coil; External capacitor; and An integrated circuit comprising an internal capacitor array formed by connecting a plurality of capacitive elements in parallel, The internal capacitor array is composed of a mixture of some capacitor elements whose states are changed by a predetermined process and the remaining capacitor elements whose states are not changed. The electronic pen is configured to transmit a signal using a resonance circuit formed by the coil, the external capacitor, and the remaining capacitive element.
11. The electronic pen according to claim 10, wherein: The integrated circuit includes a pin for receiving input of voltage, current, signal, or command from an external adjustment unit, and the external adjustment unit is used to adjust the capacitance of the internal capacitor array.
12. The electronic pen according to claim 10, wherein: the capacitance changes of the plurality of capacitive elements caused by the predetermined processing are different from each other, Each of the plurality of capacitive elements is a unit for controlling a state change caused by the predetermined process.
13. The electronic pen according to claim 12, wherein: The part of the capacitive elements includes a capacitive element whose capacitance change amount caused by the predetermined process is not the smallest among the plurality of capacitive elements.
14. The electronic pen according to any one of claims 10 to 13, wherein: The plurality of capacitance elements each include a capacitor having a floating gate formed above a substrate, The predetermined processing is processing for changing the capacitance value of the capacitor by injecting charge into the floating gate of the capacitor included in the capacitive element as a processing target.
15. The electronic pen according to any one of claims 10 to 13, wherein: The plurality of capacitance elements each include a capacitor having a charge trapping insulating film formed above a substrate, The predetermined processing is processing for changing the capacitance value of the capacitor by injecting charges into the charge trap insulating film of the capacitor included in the capacitive element as a processing target.
16. The electronic pen according to any one of claims 10 to 13, wherein: The plurality of capacitive elements respectively include capacitors and fuse elements connected in series, The predetermined process is a process of disconnecting the fuse element included in the capacitor element as a process target.
17. The electronic pen according to any one of claims 10 to 13, wherein: The plurality of capacitive elements respectively include capacitors and anti-fuse elements connected in series, The predetermined process is a process of turning on the anti-fuse element included in the capacitor element as a process target.
18. The electronic pen according to any one of claims 10 to 13, wherein: The plurality of capacitive elements respectively include capacitors and MEMS switches connected in series, The predetermined processing is processing of switching the MEMS switch included in the capacitive element as a processing target on or off.
19. A method, wherein: The electronic pen according to any one of claims 10 to 18 is produced by performing the method according to any one of claims 1 to 9 .
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