Digital Pin Calibration Method, System and Automatic Test Equipment of Automatic Test Equipment

Abstract

The present invention provides a digital pin calibration method, system and automatic test equipment for an automatic test equipment. By short-circuiting each digital pin to a time calibration kit and driving the digital drive signal of each digital pin to the time calibration kit; measuring the time-domain reflection signal of the digital signal corresponding to each digital pin based on a preset time output delay; performing voltage sampling on the time-domain reflection signal according to the sampling voltage to determine the sampling moment corresponding to each sampling voltage; judging whether the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is the same; when they are the same, determining the calibration time output delay of the current digital pin based on the preset time output delay. The current digital pin is calibrated by comparing the duration of the sampling moment from the sampling moment of the working voltage intermediate band, and each digital pin can be calibrated with only two iterations. The process is simple and fast, improving the calibration efficiency of the digital pins of the automatic test equipment.

Description

Technical Field

[0001] The present invention relates to the field of detection technology, and particularly to a digital pin calibration method, system and automatic test equipment for an automatic test equipment. Background Art

[0002] For an automatic test equipment (referred to as ATE) constructed using integrated circuits, before it is used for a device under test, if the distances from the pins to the summing points of the wires are different due to differences in integrated circuit design, the digital signals will exhibit output skew. And such differences in the integrated circuit will prevent the signals of the automatic test equipment from reaching the device under test (referred to as DUT) at the same time stamp, thus making it impossible to perform device testing. Therefore, it is necessary to calibrate the output skew of the digital pins in the automatic test equipment.

[0003] In the related art, one way to calibrate the output skew of digital pins is to perform skew measurement and calibration by using a mechanical probe. However, since an automatic test equipment often has hundreds or thousands of pins, if calibrated one by one, it is very time-consuming and the mechanical probe is expensive. Another way is to perform skew measurement and calibration by generating a residual signal for analysis by combining reflected signals, generating a linear equation from the observed time delay, and injecting a modulated carrier frequency into the circuit for frequency analysis. It requires measuring multiple forward-backward reflections of various types in the integrated circuit and also requires comparison with an analog delay model, and the calibration method implementation process is complex and inefficient.

[0004] Therefore, how to simply and quickly perform accurate calibration on the skew caused by differences in integrated circuits has become an urgent technical problem to be solved. Summary of the Invention

[0005] In view of this, embodiments of the present invention provide a digital pin calibration method, system and automatic test equipment for an automatic test equipment, which solve the problems of complex implementation and low working efficiency in the prior art for calibrating the output skew of digital pins.

[0006] According to a first aspect, an embodiment of the present invention provides a digital pin calibration method for an automatic test equipment, where the automatic test equipment includes an integrated circuit having a plurality of digital pins, and the method includes:

[0007] Short-circuit each digital pin to a time calibration kit, and drive the digital drive signal of each digital pin to the time calibration kit;

[0008] Based on the preset time output delay of the time calibration kit, measure the time-domain reflection signal of the digital signal corresponding to each digital pin;

[0009] Voltage sample the time-domain reflection signal according to the sampling voltage, and determine the sampling time corresponding to each sampling voltage. The sampling voltage includes an arithmetic progression composed of a first sampling voltage, a second sampling voltage, and a third sampling voltage. Among them, the second sampling voltage is half of the operating voltage of the automatic test equipment.

[0010] Judge whether the first sampling duration between the sampling times corresponding to two adjacent sampling voltages of the current digital pin is the same.

[0011] When the first sampling duration between the sampling times corresponding to two adjacent sampling voltages of the current digital pin is the same, determine the calibration time output delay of the current digital pin based on the preset time output delay.

[0012] Optionally, when the first sampling duration between the sampling times corresponding to two adjacent sampling voltages of the current digital pin is different, the method further includes:

[0013] Obtain the first time-domain reflection time when the current digital pin is disconnected, and the second sampling duration between the first sampling voltage and the third sampling voltage corresponding to each digital pin.

[0014] Sort the second sampling durations to determine the third sampling duration with the shortest duration.

[0015] Based on the third sampling duration, the preset time output delay, the first time-domain reflection time, and the maximum time-domain reflection time allowed by the automatic test equipment, update the preset time output delay, and based on the updated preset time output delay, re-measure the time-domain reflection signal of the digital signal corresponding to the current digital pin.

[0016] Optionally, the updating of the preset time output delay based on the third sampling duration, the preset time output delay, the first time-domain reflection time, and the maximum time-domain reflection time allowed by the automatic test equipment includes:

[0017] Update the preset time output delay according to the following formula:

[0018] T = T0 + T1 - T2 - T3,

[0019] Wherein, T represents the updated preset time output delay, T0 represents the preset time output delay before update, T1 represents the maximum time-domain reflection time allowed by the automatic test equipment, T2 represents the third sampling duration, and T3 represents the first time-domain reflection time.

[0020] Optionally, the method further includes:

[0021] Store the calibrated time output delay in the flash memory of the automatic test equipment, so that the automatic test equipment calibrates the current digital pin according to the calibrated time output delay.

[0022] Optionally, the initial value of the preset time output delay is 0.

[0023] According to a second aspect, an embodiment of the present invention provides a digital pin calibration system for an automatic test equipment. The automatic test equipment includes an integrated circuit having a plurality of digital pins. The system includes:

[0024] A first processing module, configured to short-circuit each digital pin to a time calibration kit and drive the digital drive signal of each digital pin to the time calibration kit;

[0025] A second processing module, configured to measure the time-domain reflection signal of the digital signal corresponding to each digital pin based on the preset time output delay of the time calibration kit;

[0026] A third processing module, configured to perform voltage sampling on the time-domain reflection signal according to the sampling voltage, and determine the sampling moment corresponding to each sampling voltage. The sampling voltage includes an arithmetic progression composed of a first sampling voltage, a second sampling voltage, and a third sampling voltage, where the second sampling voltage is half of the working voltage of the automatic test equipment;

[0027] A fourth processing module, configured to determine whether the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is the same;

[0028] A fifth processing module, configured to, when the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is the same, determine the calibrated time output delay of the current digital pin based on the preset time output delay.

[0029] Optionally, the system further includes:

[0030] A sixth processing module, configured to, when the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is different, obtain the first time-domain reflection time when the current digital pin is disconnected and the second sampling duration between the first sampling voltage and the third sampling voltage corresponding to each digital pin;

[0031] A seventh processing module, configured to sort the second sampling durations and determine the third sampling duration with the shortest duration;

[0032] An eighth processing module, configured to update the preset time output delay based on the third sampling duration, the preset time output delay, the first time domain reflection time, and the maximum time domain reflection time allowed by the automatic test equipment, and trigger the second processing module to re-measure the time domain reflection signal of the digital signal corresponding to the current digital pin based on the updated preset time output delay.

[0033] Optionally, the system further includes:

[0034] A ninth processing module, configured to store the calibrated time output delay in the flash memory of the automatic test equipment, so that the automatic test equipment calibrates the current digital pin according to the calibrated time output delay.

[0035] According to a third aspect, an embodiment of the present invention provides a non-transitory computer-readable storage medium storing computer instructions, and when the computer instructions are executed by a processor, the method according to the first aspect of the present invention and any one of its optional manners is implemented.

[0036] According to a fourth aspect, an embodiment of the present invention provides an electronic device, including: a time calibration kit; an integrated circuit having a plurality of digital pins; and a memory and a processor, which are communicatively connected to each other, wherein the memory stores computer instructions, and the processor executes the computer instructions to execute the method according to the first aspect of the present invention and any one of its optional manners.

[0037] The technical solution of the present invention has the following advantages:

[0038] The embodiment of the present invention provides a digital pin calibration method, system and automatic test equipment for an automatic test equipment. By shorting each digital pin to a time calibration kit and driving the digital drive signal of each digital pin to the time calibration kit; based on the preset time output delay of the time calibration kit, measuring the time-domain reflection signal of the digital signal corresponding to each digital pin; performing voltage sampling on the time-domain reflection signal according to the sampling voltage to determine the sampling time corresponding to each sampling voltage; judging whether the first sampling duration between the sampling times corresponding to two adjacent sampling voltages of the current digital pin is the same; when the first sampling duration between the sampling times corresponding to two adjacent sampling voltages of the current digital pin is the same, determining the calibration time output delay of the current digital pin based on the preset time output delay. Thus, by using the characteristic that digital signals have the same time-delay reflection measurement, when the pin is disconnected and reflected from the time calibration kit, it will have the same output skew characteristic to calibrate the required voltage band. Sampling is performed with a first voltage and a third voltage that are the same voltage above and below the middle band of the operating voltage. Thus, the calibration of the current digital pin is achieved by comparing the duration of the sampling time from the sampling time of the middle band of the operating voltage, and the calibration process of each digital pin can be achieved with only two iterations. The calibration process is simple and fast, improving the calibration efficiency of the digital pins of the automatic test equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the specific embodiments or the prior art. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0040] Figure 1 It is a flowchart of the digital pin calibration method for the automatic test equipment in the embodiment of the present invention;

[0041] Figure 2 It is a schematic diagram of the sampling voltage in the embodiment of the present invention;

[0042] Figure 3 It is a schematic structural diagram of the digital pin calibration device for the automatic test equipment in the embodiment of the present invention;

[0043] Figure 4 It is a schematic structural diagram of the automatic test equipment in the embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0044] The technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0045] In addition, the technical features involved in different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0046] For an automatic test equipment (hereinafter referred to as ATE) constructed by integrated circuits, before it is used for the device under test, if the distance of the wire from the pin to the summing point is different due to the differences in integrated circuit design, the digital signal will have an output skew, and such differences in the integrated circuit will prevent the signals of the device under test (hereinafter referred to as DUT) from reaching the automatic test equipment at the same time stamp, thus making it impossible to perform device testing. Therefore, it is necessary to calibrate the output skew of the digital pins in the automatic test equipment.

[0047] In the related art, one way to calibrate the output skew of digital pins is to perform skew measurement and calibration by using a mechanical probe. However, since an automatic test equipment often has hundreds or thousands of pins, if calibrated one by one, it is very time-consuming and the mechanical probe is expensive. Another way is to perform skew measurement and calibration by combining the reflected signals to generate residual signals for analysis, generating a linear equation from the observed time delay, and injecting a modulated carrier frequency into the circuit for frequency analysis. It requires measuring multiple forward-backward reflections of various types in the integrated circuit and also needs to be compared with an analog delay model, and the calibration method is complex and inefficient in the implementation process.

[0048] Based on the above problems, the embodiments of the present invention provide a method for calibrating digital pins of an automatic test equipment, and the automatic test equipment includes an integrated circuit having a plurality of digital pins, as Figure 1 shown, the method for calibrating digital pins of the automatic test equipment specifically includes the following steps:

[0049] Step S101: Short each digital pin to a time calibration kit, and drive the digital drive signal of each digital pin to the time calibration kit.

[0050] Wherein, the time calibration kit is used to simulate shorting the digital pin to the summing point, and perform delay processing on the digital signal by setting different time output delays to achieve the purpose of time calibration.

[0051] Step S102: Measure the time-domain reflection signal of the digital signal corresponding to each digital pin based on the preset time output delay of the time calibration kit.

[0052] Among them, the initial value of the preset time output delay is 0, that is, no delay processing is performed on the digital signal. The time-domain reflection signal is the time-domain reflection signal measured after the digital signal is processed by the time calibration kit.

[0053] Step S103: Perform voltage sampling on the time-domain reflection signal according to the sampling voltage to determine the sampling moment corresponding to each sampling voltage.

[0054] Among them, the sampling voltage includes an arithmetic progression composed of a first sampling voltage, a second sampling voltage, and a third sampling voltage. Among them, the second sampling voltage is half of the working voltage of the automatic test equipment. Specifically, assuming the working voltage is 1V, the second sampling voltage is 0.5V, and the voltage difference between the second sampling voltage and the first sampling voltage is the same as the voltage difference between the third sampling voltage and the second sampling voltage. For example, when the first sampling voltage is 0.25V, the third sampling voltage is 0.75V. Thus, the intermediate band voltage of the working voltage is used as the voltage sampling reference point, and the corresponding sampling voltage is set to avoid the problem that the sampling voltage is set too large (such as exceeding the working voltage) and the sampling result is unstable, which in turn affects the accuracy of the subsequent calibration result.

[0055] Step S104: Determine whether the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is the same.

[0056] Specifically, by calculating the duration from the sampling moment corresponding to the first sampling voltage to the sampling moment corresponding to the second sampling voltage and the duration from the sampling moment corresponding to the third sampling voltage to the sampling moment corresponding to the second sampling voltage respectively, the method of determining whether these two durations are the same is used to determine whether the digital pin is the same before and after being shorted to the summing point. If they are the same, execute step S105; otherwise, it indicates that there is an output skew in the current digital pin, and the preset time output delay set by the time calibration kit needs to be readjusted to perform skew calibration on the digital pin.

[0057] Step S105: When the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is the same, determine the calibrated time output delay of the current digital pin based on the preset time output delay.

[0058] Specifically, if the durations before and after the digital pin is shorted to the summing point are the same, it indicates that there is no output skew in the digital pin under the current preset time output delay. Therefore, the current preset time output delay can be determined as the calibrated time output delay of the current digital pin. In particular, when the current preset time output delay is 0, it indicates that there is no output skew in the current digital pin itself, and thus no calibration is required.

[0059] By performing the above steps, the digital pin calibration method of the automatic test equipment provided by the embodiments of the present invention calibrates the required voltage band by utilizing the characteristic that digital signals have the same time delay reflection measurement. When the pin is disconnected and reflected from the time calibration kit, it will have the same output skew. Sampling is performed at a first voltage and a third voltage that are the same voltage above and below the middle band of the operating voltage. Thus, the calibration of the current digital pin is achieved by comparing the duration between the sampling moment and the sampling moment of the middle band of the operating voltage. Moreover, each digital pin calibration process can be achieved with only two iterations. The calibration process is simple and fast, improving the calibration efficiency of the digital pins of the automatic test equipment.

[0060] Specifically, in one embodiment, when the first sampling durations between the sampling moments corresponding to the adjacent two sampling voltages of the current digital pin are different, the digital pin calibration method of the above automatic test equipment further includes the following steps:

[0061] Step S106: Obtain the first time-domain reflection time when the current digital pin is disconnected and the second sampling duration between the first sampling voltage and the third sampling voltage corresponding to each digital pin.

[0062] Specifically, by disconnecting the current digital pin and measuring the corresponding time-domain reflection time, as Figure 2 shown, when the first sampling voltage V1 is 0.25V, the second sampling voltage V2 is 0.5V, and the third sampling voltage V3 is 0.75V, the time difference between the t3 moment and the t1 moment in the figure is the above-mentioned second sampling duration t.

[0063] Step S107: Sort the second sampling durations to determine the third sampling duration with the shortest duration.

[0064] Specifically, this third sampling duration is the timing duration corresponding to the digital pin with the slowest digital signal transmission, that is, this digital pin does not require delay. For other digital pins with durations longer than this duration, since their transmission time is faster than it, delay processing is required to make the transmission times of the digital signals of all digital pins the same, so as to achieve the calibration of the output skew caused by the integrated circuit.

[0065] Step S108: Update the preset time output delay based on the third sampling duration, the preset time output delay, the first time-domain reflection time, and the maximum time-domain reflection time allowed by the automatic test equipment. And based on the updated preset time output delay, re-measure the time-domain reflection signal of the digital signal corresponding to the current digital pin.

[0066] Specifically, after the preset time output delay is updated, the time-domain reflection signal of the digital signal corresponding to the current digital pin will also change accordingly. After re-collecting the time-domain reflection signal of the digital signal corresponding to the current digital pin and performing voltage sampling according to the above step S103, it is re-determined whether the first sampling duration between the sampling times corresponding to the adjacent two sampling voltages of the current digital pin is the same. In practical applications, since the preset time output delay has been updated based on the duration of the slowest digital pin, the updated preset time output delay can ensure that the arrival time of the digital signal of the current digital pin is the same as that of the slowest digital pin after delay processing. Therefore, the first sampling duration between the sampling times corresponding to the adjacent two sampling voltages of the updated current digital pin must be the same, that is, the calibration of the current digital pin can be completed by using the updated preset time output delay.

[0067] Specifically, in one embodiment, the preset time output delay is updated according to the following formula (1):

[0068] T = T0 + T1 - T2 - T3 (1)

[0069] Wherein, T represents the updated preset time output delay, T0 represents the preset time output delay before update, T1 represents the maximum time-domain reflection time allowed by the automatic test equipment, T2 represents the third sampling duration, and T3 represents the first time-domain reflection time.

[0070] Specifically, in one embodiment, the digital pin calibration method of the above automatic test equipment further includes the following steps:

[0071] Step S109: Store the calibrated time output delay in the flash memory of the automatic test equipment, so that the automatic test equipment calibrates the current digital pin according to the calibrated time output delay.

[0072] Specifically, digital pins at different distances from the "summation point" have different output skews, and thus correspond to different calibrated time output delays. Therefore, by storing the calibrated time output delays corresponding to different digital pins, it is convenient for the automatic test equipment to calibrate the digital pins of the automatic test equipment according to the stored calibrated time output delays during operation, so as to quickly eliminate the skew caused by the differences in the integrated circuit.

[0073] By performing the above steps, the digital pin calibration method of the automatic test equipment provided by the embodiments of the present invention calibrates the required voltage band by taking advantage of the characteristic that digital signals have the same time delay reflection measurement, and when the pins are disconnected and reflected from the time calibration kit, they will have the same output skew. Sampling is performed with a first voltage and a third voltage that are the same voltage above and below the middle band of the operating voltage, so as to calibrate the current digital pin by comparing the duration between the sampling moment and the sampling moment of the middle band of the operating voltage. Moreover, each digital pin calibration process can be achieved with only two iterations, and the calibration process is simple and fast, improving the calibration efficiency of the digital pins of the automatic test equipment.

[0074] Next, a specific application example will be used to describe in detail the digital pin calibration method of the automatic test equipment provided by the embodiments of the present invention.

[0075] Step 1: Measure the time-domain reflection when each pin integrated circuit is disconnected.

[0076] Step 2: Short each pin integrated circuit to the time calibration kit.

[0077] Step 3: Set the time output delay of the pin integrated circuit to 0.

[0078] Step 4: Drive the digital signal of each pin integrated circuit to the time calibration kit.

[0079] Step 5: Measure the time-domain reflection of each digital signal.

[0080] Step 6: Sample at a predetermined percentage (i.e., 50%) above the middle band of the voltage (i.e., if the operating voltage is 1V, 50% above the middle band is 0.75V).

[0081] Step 7: Sample at the same predetermined percentage (i.e., 50%) below the middle band of the voltage (i.e., if the operating voltage is 1V, 50% below the middle band is 0.25V).

[0082] Step 8: Obtain the duration between the two sampling values of each pin integrated circuit.

[0083] Step 9: Determine whether the duration at the voltage middle band (i.e., if the operating voltage is 1V, the middle band is 0.50V) between the two sampling values of each pin integrated circuit is the same before and after shorting to the summing point. If different, execute Step 10; if the same, execute Step 12.

[0084] Step 10: Determine the minimum duration between the two sampling values of all pin integrated circuits.

[0085] Step 11: Calculate and apply a new output time delay for the pin integrated circuit to be calibrated according to the above formula (1).

[0086] Step 12: Repeat the calibration step again, but set the timing output delay of the integrated circuit of the pin to be calibrated to a new output timing delay, and then store the final new output time delay of the pin to be calibrated in the flash memory as the calibrated time output delay of the pin to be calibrated. Repeat the above steps until all pin integrated circuits are calibrated.

[0087] The above technical solution of the present invention can not only quickly calibrate the digital pins of an automatic test equipment, but also ensure that when the pins are disconnected and reflected from the "summation point", the digital signals with the same time delay reflection measurement will have the same output skew.

[0088] The embodiment of the present invention also provides a digital pin calibration device for an automatic test equipment. The automatic test equipment includes an integrated circuit with a plurality of digital pins, as Figure 3 shown. The digital pin calibration device of the automatic test equipment specifically includes:

[0089] A first processing module 101, configured to short-circuit each digital pin to a time calibration kit and drive the digital drive signal of each digital pin to the time calibration kit. For the detailed content, refer to the relevant description of step S101 in the above method embodiment, and details will not be described here again.

[0090] A second processing module 102, configured to measure the time domain reflection signal of the digital signal corresponding to each digital pin based on the preset time output delay of the time calibration kit. For the detailed content, refer to the relevant description of step S102 in the above method embodiment, and details will not be described here again.

[0091] A third processing module 103, configured to perform voltage sampling on the time domain reflection signal according to the sampling voltage, and determine the sampling moment corresponding to each sampling voltage. The sampling voltage includes an arithmetic progression composed of a first sampling voltage, a second sampling voltage, and a third sampling voltage, where the second sampling voltage is half of the working voltage of the automatic test equipment. For the detailed content, refer to the relevant description of step S103 in the above method embodiment, and details will not be described here again.

[0092] A fourth processing module 104, configured to determine whether the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is the same. For the detailed content, refer to the relevant description of step S104 in the above method embodiment, and details will not be described here again.

[0093] A fifth processing module 105, configured to determine the calibrated time output delay of the current digital pin based on the preset time output delay when the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is the same. For the detailed content, refer to the relevant description of step S105 in the above method embodiment, and details will not be described here again.

[0094] Through the collaborative cooperation of the above-mentioned various components, the digital pin calibration device of the automatic test equipment provided by the embodiment of the present invention calibrates the required voltage band by utilizing the characteristic that digital signals have the same time-delay reflection measurement and will have the same output skew when the pins are disconnected and reflected from the time calibration kit. Sampling is performed with a first voltage and a third voltage that are the same voltage above and below the middle band of the operating voltage, so as to calibrate the current digital pin by comparing the duration between the sampling moment and the sampling moment of the middle band of the operating voltage. And each digital pin calibration process can be achieved with only two iterations. The calibration process is simple and fast, improving the calibration efficiency of the digital pins of the automatic test equipment.

[0095] Specifically, in one embodiment, the digital pin calibration device of the above-mentioned automatic test equipment further includes:

[0096] A sixth processing module, configured to obtain the first time-domain reflection time when the current digital pin is disconnected and the second sampling duration between the first sampling voltage and the third sampling voltage corresponding to each digital pin when the first sampling durations between the sampling moments corresponding to the adjacent two sampling voltages of the current digital pin are different. For the detailed content, refer to the relevant description of step S106 in the above method embodiment, and details will not be repeated here.

[0097] A seventh processing module, configured to sort the second sampling durations and determine the third sampling duration with the shortest duration. For the detailed content, refer to the relevant description of step S107 in the above method embodiment, and details will not be repeated here.

[0098] An eighth processing module, configured to update the preset time output delay based on the third sampling duration, the preset time output delay, the first time-domain reflection time, and the maximum time-domain reflection time allowed by the automatic test equipment, and trigger the second processing module to re-measure the time-domain reflection signal of the digital signal corresponding to the current digital pin based on the updated preset time output delay. For the detailed content, refer to the relevant description of step S108 in the above method embodiment, and details will not be repeated here.

[0099] A ninth processing module, configured to store the calibrated time output delay in the flash memory of the automatic test equipment, so that the automatic test equipment calibrates the current digital pin according to the calibrated time output delay. For the detailed content, refer to the relevant description of step S109 in the above method embodiment, and details will not be repeated here.

[0100] The further function descriptions of the above-mentioned various modules are the same as those in the corresponding method embodiments above, and details will not be repeated here.

[0101] The embodiment of the present invention also provides an automatic test equipment, such as Figure 4As shown, the automatic test equipment includes: a time calibration kit 801; an integrated circuit 802 with a number of digital pins, a processor 901 and a memory 902, where the processor 901 and the memory 902 can be connected through a bus or other means. Figure 4 Take the connection through the bus as an example.

[0102] The processor 901 can be a Central Processing Unit (CPU). The processor 901 can also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field-Programmable Gate Arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. chips, or a combination of the above types of chips.

[0103] As a non-transitory computer-readable storage medium, the memory 902 can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, such as the program instructions / modules corresponding to the methods in the embodiments of the present invention. The processor 901 executes various functional applications and data processing of the processor by running the non-transitory software programs, instructions, and modules stored in the memory 902, that is, implements the above methods.

[0104] The memory 902 can include a program storage area and a data storage area. Among them, the program storage area can store an operating system and application programs required for at least one function; the data storage area can store data created by the processor 901, etc. In addition, the memory 902 can include high-speed random access memory, and can also include non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some embodiments, the memory 902 optionally includes a memory remotely set relative to the processor 901, and these remote memories can be connected to the processor 901 through a network. Examples of the above networks include but are not limited to the Internet, enterprise intranets, local area networks, mobile communication networks, and combinations thereof.

[0105] One or more modules are stored in the memory 902 and, when executed by the processor 901, execute the above methods.

[0106] For the specific details of the above electronic device, reference can be made to the corresponding relevant descriptions and effects in the above method embodiments for understanding, and details are not described herein again.

[0107] Those skilled in the art can understand that to implement all or part of the processes in the above-mentioned embodiment methods, it can be completed by instructing relevant hardware through a computer program. The implemented program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the above-mentioned method embodiments. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM), a random access memory (RAM), a flash memory, a hard disk drive (HDD), or a solid-state drive (SSD), etc.; the storage medium can also include a combination of the above-mentioned types of memories.

[0108] The above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications or equivalent replacements can still be made to the specific implementation manners of the present invention, and any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of the claims of the present invention.

Claims

1. A digital pin calibration method for an automatic test device, the automatic test device including an integrated circuit having a plurality of digital pins, characterized in that, The method includes: Short-circuiting each digital pin to a time calibration kit and driving the digital drive signal of each digital pin to the time calibration kit; Measuring the time-domain reflection signal of the digital signal corresponding to each digital pin based on the preset time output delay of the time calibration kit; Performing voltage sampling on the time-domain reflection signal according to the sampling voltage, determining the sampling moment corresponding to each sampling voltage, where the sampling voltage includes an arithmetic progression composed of a first sampling voltage, a second sampling voltage, and a third sampling voltage, and the second sampling voltage is half of the operating voltage of the automatic test equipment; Judging whether the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is the same; When the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is the same, determining the calibration time output delay of the current digital pin based on the preset time output delay; 2. The method according to claim 1, wherein When the first sampling duration between the sampling moments corresponding to two adjacent sampling voltages of the current digital pin is different, the method further includes: Obtaining the first time-domain reflection time when the current digital pin is disconnected and the second sampling duration between the first sampling voltage and the third sampling voltage corresponding to each digital pin; Sorting the second sampling durations to determine the third sampling duration with the shortest duration; Updating the preset time output delay based on the third sampling duration, the preset time output delay, the first time-domain reflection time, and the maximum time-domain reflection time allowed by the automatic test equipment, and re-measuring the time-domain reflection signal of the digital signal corresponding to the current digital pin based on the updated preset time output delay; 3. The method according to claim 2, wherein The updating the preset time output delay based on the third sampling duration, the preset time output delay, the first time-domain reflection time, and the maximum time-domain reflection time allowed by the automatic test equipment includes: Updating the preset time output delay according to the following formula: T = T0 + T1 - T2 - T3, where T represents the updated preset time output delay, T0 represents the preset time output delay before updating, T1 represents the maximum time-domain reflection time allowed by the automatic test equipment, T2 represents the third sampling duration, and T3 represents the first time-domain reflection time; 4. The method according to claim 1, characterized in that It further includes: Storing the calibration time output delay into the flash memory of the automatic test equipment so that the automatic test equipment calibrates the current digital pin according to the calibration time output delay; 5. The method according to claim 1, wherein The initial value of the preset time output delay is 0; 6. A digital pin calibration system for an automatic test equipment, the automatic test equipment including an integrated circuit having a plurality of digital pins, characterized in that, The system includes: A first processing module for short-circuiting each digital pin to a time calibration kit and driving the digital drive signal of each digital pin to the time calibration kit; A second processing module for measuring the time-domain reflection signal of the digital signal corresponding to each digital pin based on the preset time output delay of the time calibration kit; A third processing module, configured to perform voltage sampling on the time-domain reflection signal according to the sampling voltages, and determine the sampling time corresponding to each sampling voltage, where the sampling voltages include an arithmetic progression composed of a first sampling voltage, a second sampling voltage, and a third sampling voltage, and the second sampling voltage is half of the operating voltage of the automatic test equipment; A fourth processing module, configured to determine whether a first sampling duration between sampling times corresponding to two adjacent sampling voltages of the current digital pin is the same; A fifth processing module, configured to determine a calibration time output delay of the current digital pin based on the preset time output delay when the first sampling duration between sampling times corresponding to two adjacent sampling voltages of the current digital pin is the same.

7. The system according to claim 6, wherein Further included: A sixth processing module, configured to, when the first sampling duration between sampling times corresponding to two adjacent sampling voltages of the current digital pin is different, obtain a first time-domain reflection time when the current digital pin is disconnected and a second sampling duration between the first sampling voltage and the third sampling voltage corresponding to each digital pin; A seventh processing module, configured to sort the second sampling durations and determine a third sampling duration with the shortest duration; An eighth processing module, configured to update the preset time output delay based on the third sampling duration, the preset time output delay, the first time-domain reflection time, and the maximum time-domain reflection time allowed by the automatic test equipment, and trigger the second processing module to re-measure the time-domain reflection signal of the digital signal corresponding to the current digital pin based on the updated preset time output delay.

8. The system according to claim 6, characterized in that, Further included: A ninth processing module, configured to store the calibration time output delay in the flash memory of the automatic test equipment, so that the automatic test equipment calibrates the current digital pin according to the calibration time output delay.

9. A non-transitory computer-readable storage medium, characterized in that, The non-transitory computer-readable storage medium stores computer instructions, and when the computer instructions are executed by a processor, the method described in any one of claims 1-5 is implemented.

10. An automatic test device, characterized in that, Including: A time calibration kit; An integrated circuit having a plurality of digital pins; And a memory and a processor, which are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to execute the method described in any one of claims 1-5.

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