Test board testing device and testing system

Abstract

This invention discloses a testing device and system for a test board. The testing device includes a first selector switch, a second selector switch, a Type-C interface, and a controller. The controller outputs a first switch control signal to the selector pin of the first selector switch and a second switch control signal to the selector pin of the second selector switch. The Type-C interface is connected to the test board through the first and second selector switches, and selects whether to connect the CC pin to the first CC test pin or the second CC test pin according to the first switch control signal, and to connect the differential signal pin to the first differential signal test pin or the second differential test signal pin according to the second switch control signal. This invention avoids the need for manual repeated plugging and unplugging of USB devices, extends the test life of the Type-C interface, reduces the hardware design and manufacturing cost of the test board, saves testing time, achieves automated testing, and improves test reliability.

Description

Technical Field

[0001] This invention relates to the field of interface testing technology, and in particular to a testing device and testing system for a test board. Background Technology

[0002] Type-C (also known as USB Type-C, a USB interface standard) is a connection interface for USB (Universal Serial Bus). It's generally understood that Type-C interfaces have a correct insertion orientation (positive or negative) for standard wiring. This orientation is identified through the pinout of the CC1 pin within the Type-C interface. The USB Type-C interface contains eight differential signal pins: TX1-, TX1+, RX1-, RX1+, TX2-, TX2+, RX2-, and RX2+, supporting both forward and reverse insertion. When a USB device is inserted into the Type-C interface, the orientation is automatically detected and switched. When the USB device is inserted correctly, the CC1 pin detects the signal and uses the TX1-, TX1+, RX1-, and RX1+ pins for communication. When the USB device is inserted incorrectly, the CC2 pin detects the signal and uses the TX2-, TX2+, RX2-, and RX2+ pins for communication. With the rapid development of modern technology, the application of Type-C interface has become mainstream and is widely used in mobile phones and computers. Therefore, for test boards with Type-C function, the test of the Type-C interface's forward and reverse insertion function has become an important step.

[0003] For test boards with Type-C interfaces, the test board has functional pins corresponding to the Type-C interface pins. During the reliability testing process before the test board leaves the factory, the connectivity of the USB_CC1, USB_CC2, USB_TX1-, USB_TX1+, USB_RX1-, USB_RX1+, USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ pins on the test board needs to be tested. The connection input signal through the Type-C interface is detected by checking the correct insertion through the CC1 pin or the reverse insertion through the CC2 pin. Thus, by manually inserting the USB device in the correct and reverse directions, the USB_CC1, USB_CC2, USB_TX1-, USB_TX1+, USB_RX1-, USB_RX1+, USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ pins are tested respectively.

[0004] Currently, most existing test solutions for Type-C interface test boards focus on application-oriented technologies such as Type-C reversible connectors, reversible double-sided test structures, and reversible data cables. However, hardware circuit implementations for Type-C interface reliability testing are relatively scarce. A common existing test solution involves directly connecting the test board's pins USB_CC1, USB_CC2, USB_D+, and USB_D- to the Type-C interface's input terminals. The pins USB_TX1-, USB_TX1+, USB_RX1-, USB_RX1+, USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ are then connected to the corresponding TX and RX pins of the Type-C interface for reversible connections, respectively, to achieve the required testing.

[0005] Typically, if we follow the design above and directly connect all the pins of the test board—USB_TX1-, USB_TX1+, USB_RX1-, USB_RX1+, USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+—to the Type-C interface, then during functional and performance testing, we manually insert the USB device into the Type-C interface in both forward and reverse orientations to read the test board's recognition status. While this manual reversal testing achieves functional detection, it causes numerous inconveniences and additional testing costs on the production line. Furthermore, the excessive manual intervention in the entire testing process lacks error-proofing, results in longer testing times, hinders automated testing on the production line, reduces the lifespan of the test interfaces, generates additional hardware design and manufacturing costs, and significantly reduces test reliability as test fatigue increases. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art in the testing process of test boards, such as excessive manual intervention, lack of error prevention, long testing time, which is not conducive to automated testing on the production line, reduced lifespan of test interfaces, additional hardware design and manufacturing costs, and greatly reduced test reliability as test fatigue increases. The present invention provides a test board testing device and testing system.

[0007] The present invention solves the above-mentioned technical problems through the following technical solution:

[0008] In a first aspect, a testing device for a test board is provided, the testing device including a first gating switch, a second gating switch, a Type-C interface, and a controller; the Type-C interface includes a CC pin and a differential signal pin, and the test board includes a first CC test pin, a second CC test pin, a first differential signal test pin, and a second differential signal test pin;

[0009] The controller is used to output a first switch control signal to the selection pin of the first gating switch and a second switch control signal to the selection pin of the second gating switch.

[0010] The Type-C interface is connected to the test board via the first strobe switch and the second strobe switch, respectively. The CC pin is connected to the first CC test pin or the second CC test pin according to the first switch control signal, and the differential signal pin is connected to the first differential signal test pin or the second differential test signal pin according to the second switch control signal.

[0011] The testing device for the test board of the present invention selectively connects the CC pin of the Type-C interface to the first CC test pin or the second CC test pin of the test board by controlling a first gating switch, and selectively connects the differential signal pin of the Type-C interface to the first differential signal test pin or the second differential signal test pin of the test board by controlling a second gating switch. This eliminates the need to insert USB devices into the Type-C interface in both forward and reverse orientations; testing of the first CC test pin, the second CC test pin, the first differential signal test pin, and the second differential signal test pin can be performed with a single insertion of the USB device, thereby enabling the testing of the test board's functionality. This avoids the need for repeated manual plugging and unplugging of USB devices into the Type-C interface, extends the test lifespan of the Type-C interface, reduces the hardware design and manufacturing costs of the test board, saves testing time, achieves automated testing, and improves test reliability.

[0012] Preferably, the controller is further configured to output a first enable signal to the enable pin of the first gating switch.

[0013] The testing device of the test board of the present invention controls the operation of the first gating switch by outputting a first enable signal to the enable pin of the first gating switch, thereby realizing the control of the working state of the first gating switch and facilitating the operation of the first gating switch in conjunction with the test board and the Type-C interface.

[0014] Preferably, the controller is further configured to output a second enable signal to the enable pin of the second gating switch.

[0015] The testing device of the test board of the present invention controls the operation of the second gating switch by outputting a second enable signal to the enable pin of the second gating switch, thereby realizing the control of the working state of the second gating switch and facilitating the operation of the second gating switch in conjunction with the test board and the Type-C interface.

[0016] Preferably, the Type-C interface is used to connect to a USB device via a Type-A interface.

[0017] The testing device for the test board of the present invention connects the Type-C interface to a USB device with a Type-A interface standard via a Type-A interface, which facilitates the testing of the test board function using a USB device with a Type-A interface standard, and allows for timely replacement if the USB device is damaged.

[0018] Preferably, the first selection switch is a double-pole double-throw switch.

[0019] The testing device of the test board of the present invention has a first selection switch as a double-pole double-throw switch. Through the double-pole double-throw switch, bidirectional communication between the Type-C interface and the first selection switch is realized, the selection and switching of the first CC test pin and the second CC test pin of the test board are realized, and the functional testing of the test board is realized.

[0020] Preferably, the second gating switch is a signal conversion switch.

[0021] The detection device of the test board of the present invention has a second selection switch as a signal conversion switch. Through the signal conversion switch, the differential signal pin of the Type-C interface is selectively connected to the first differential signal test pin or the second differential signal test pin of the test board, thereby realizing the functional detection of the test board.

[0022] Preferably, the detection device further includes a first resistor, one end of which is grounded and the other end is connected to the power supply pin of the Type-C interface; and / or,

[0023] The detection device further includes a second resistor, and the first differential signal test pin includes a first receive signal test pin and a first transmit signal test pin, wherein the first receive signal test pin is grounded through the second resistor; and / or

[0024] The detection device further includes a third resistor, and the second differential signal test pin includes a second receive signal test pin and a second transmit signal test pin, with the second receive signal test pin grounded through the third resistor.

[0025] The testing device of the test board of the present invention ensures the normal operation of the Type-C interface through the current limiting effect of the first resistor; and / or ensures the normal operation of the second gating switch through the current limiting effect of the second resistor; and / or ensures the normal operation of the second gating switch through the current limiting effect of the third resistor.

[0026] Preferably, the detection device further includes a first capacitor, one end of which is grounded and the other end is connected to the power supply pin of the first selection switch;

[0027] And / or, the detection device further includes a second capacitor, one end of which is grounded and the other end is connected to the power supply pin of the Type-C interface;

[0028] And / or, the detection device further includes a third capacitor, one end of which is grounded and the other end is connected to the power supply pin of the second selection switch.

[0029] The testing device of the test board of the present invention ensures the normal operation of the first gating switch through the filtering effect of the first capacitor; and / or ensures the normal operation of the Type-C interface through the filtering effect of the second capacitor; and / or ensures the normal operation of the second gating switch through the filtering effect of the third capacitor.

[0030] Preferably, the detection device further includes a fourth capacitor, through which the first differential signal test pin is connected to the second gating switch; and / or,

[0031] The detection device also includes a fifth capacitor, and the second differential signal test pin is connected to the second gating switch through the fifth capacitor.

[0032] The detection device of the test board of the present invention ensures the normal operation of the second selection switch by means of the fourth capacitor and / or the fifth capacitor blocking DC and increasing the high-frequency signal transmission capability.

[0033] Secondly, a testing system for a test board is provided, the testing system comprising a test board and any of the testing devices described above.

[0034] The testing system of the test board of the present invention detects the pin connectivity of the first CC test pin, the second CC test pin, the first differential signal test pin, and the second differential signal test pin of the test board through the test board testing device, thereby realizing the testing of the test board function, avoiding manual repeated plugging and unplugging of USB devices with Type-C interface, extending the test life of Type-C interface, reducing the hardware design and manufacturing cost of the test board, saving testing time, realizing automated testing, and improving testing reliability.

[0035] The positive and progressive effects of this invention are as follows:

[0036] The testing device for the test board of the present invention selectively connects the CC pin of the Type-C interface to the first CC test pin or the second CC test pin of the test board by controlling a first gating switch, and selectively connects the differential signal pin of the Type-C interface to the first differential signal test pin or the second differential signal test pin of the test board by controlling a second gating switch. This eliminates the need to insert USB devices into the Type-C interface in both forward and reverse orientations; testing of the first CC test pin, the second CC test pin, the first differential signal test pin, and the second differential signal test pin can be performed with a single insertion of the USB device, thereby enabling the testing of the test board's functionality. This avoids the need for repeated manual plugging and unplugging of USB devices into the Type-C interface, extends the test lifespan of the Type-C interface, reduces the hardware design and manufacturing costs of the test board, saves testing time, achieves automated testing, and improves test reliability. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of the signal relationship of a test board detection device provided in Embodiment 1 of the present invention.

[0038] Figure 2 This is a circuit diagram of the first selector switch of a testing device for a test board provided in Embodiment 1 of the present invention.

[0039] Figure 3 This is a schematic diagram of the Type-C interface circuit of a testing device for a test board provided in Embodiment 1 of the present invention.

[0040] Figure 4 This is a schematic diagram of the second gate switch circuit of a testing device for a test board provided in Embodiment 1 of the present invention.

[0041] Figure 5 This is a schematic diagram of a testing device for a test board provided in Embodiment 1 of the present invention. Detailed Implementation

[0042] The present invention will be further illustrated by way of embodiments below, but the present invention is not limited to the scope of the embodiments described herein.

[0043] Example 1

[0044] This embodiment provides a testing device for a test board. Figure 1This is a schematic diagram of the signal relationship of a testing device for a test board according to Embodiment 1 of the present invention. The testing device includes a first selector switch 1, a second selector switch 2, a Type-C interface 3, and a controller. The Type-C interface 3 includes a CC pin 31 and a differential signal pin 32. The test board 4 includes a first CC test pin 41, a second CC test pin 42, a first differential signal test pin 43, and a second differential signal test pin 44. The controller is used to output a first switch control signal to the selector pin 11 of the first selector switch 1 and a second switch control signal to the selector pin 21 of the second selector switch 2. The Type-C interface 3 is connected to the test board 4 through the first selector switch 1 and the second selector switch 2, and selects to connect the CC pin 31 to the first CC test pin 41 or the second CC test pin 42 according to the first switch control signal, and connects the differential signal pin 32 to the first differential signal test pin 43 or the second differential test signal pin 44 according to the second switch control signal.

[0045] In this embodiment, the controller outputs a first switch control signal to the selection pin 11 of the first selection switch 1. The first selection switch 1 selectively connects the CC pin 31 of the Type-C interface 3 to the first CC test pin 41 or the second CC test pin 42 of the test board according to the first switch control signal.

[0046] The controller outputs a second switch control signal to the selection pin 21 of the second selector switch 2. The second selector switch 2 selectively connects the differential signal pin 32 of the Type-C interface 3 to the first differential signal test pin 43 or the second differential test signal pin 44 of the test board 4 according to the second switch control signal.

[0047] The controller determines whether the functions on the test board are normal based on the signals output from the first CC test pin 41, the second CC test pin 42, the first differential signal test pin 43, and the second differential test signal pin 44 of the test board 4.

[0048] The Type-C interface has 24 pins. Pins A1-A12 are, in order: GND, TX1+, TX1-, VBUS, CC1, D+, D-, SUB1, VBUS, RX2-, RX2+, GND. Pins B1-B12 are, in order: GND, TX2+, TX2-, VBUS, CC2, D+, D-, SUB2, VBUS, RX1-, RX1+, GND. The CC pins of the Type-C interface include CC1 and CC2; the differential signal pins include TX1+, TX1-, RX2-, RX2+, TX2+, TX2-, RX1-, and RX1+.

[0049] The test board has pins corresponding to the pins of the Type-C interface, specifically including: USB_CC1, USB_CC2, USB_D+, USB_D-, USB_VBUS, USB_GND, USB_TX1-, USB_TX1+, USB_RX1-, USB_RX1+, USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ pins, used to detect and receive the corresponding signals transmitted by the Type-C interface pins. The first CC test pin of the test board includes the USB_CC1 pin, the second CC test pin includes the USB_CC2 pin, the first differential signal test pins include the USB_TX1+, USB_TX1-, USB_RX1-, and USB_RX1+ pins, and the second differential signal test pins include the USB_TX2+, USB_TX2-, USB_RX2-, and USB_RX2+ pins. The first differential signal test pin includes a first transmit signal test pin and a first receive signal test pin; the second differential signal test pin includes a second transmit signal test pin and a second receive signal test pin; the first receive signal test pin includes USB_RX1- and USB_RX1+ pins; the first transmit signal test pin includes USB_TX1+ and USB_TX1- pins; the second receive signal test pin includes USB_RX2- and USB_RX2+ pins; and the second transmit signal test pin includes USB_TX2+ and USB_TX2- pins.

[0050] During use, the testing device of the test board in this embodiment requires a USB device to be inserted into the Type-C interface. The USB device can be a USB device with a Type-C interface standard so that the USB device can connect and communicate with the Type-C interface.

[0051] In the testing device of the test board in this embodiment, the CC pin of the Type-C interface is selectively connected to the first CC test pin or the second CC test pin of the test board by controlling the first gating switch, and the differential signal pin of the Type-C interface is selectively connected to the first differential signal test pin or the second differential signal test pin of the test board by controlling the second gating switch. This eliminates the need to insert the USB device into the Type-C interface in both forward and reverse orientations. With a single insertion of the USB device, the first CC test pin, the second CC test pin, the first differential signal test pin, and the second differential signal test pin can be tested, thereby enabling the testing of the test board's functionality. This avoids repeated manual insertion and removal of the USB device, extends the test life of the Type-C interface, reduces the hardware design and manufacturing costs of the test board, saves testing time, achieves automated testing, and improves test reliability.

[0052] In an optional implementation, both the first and second gating switches include enable pins. The controller outputs a first enable signal to the enable pin of the first gating switch to control its operation (conduction), and outputs a second enable signal to the enable pin of the second gating switch to control its operation (conduction). When the first gating switch is active, the Type-C interface connects its CC pin to either the first or second CC test pin of the test board according to the first switch control signal. When the second gating switch is active, the Type-C interface connects its differential signal pin to either the first or second differential test signal pin of the test board according to the second switch control signal.

[0053] The working principle of the Type-C interface will be introduced below. For the CC1 and CC2 pins of the Type-C interface, after the test board starts up and runs normally, if no USB device is inserted into the Type-C interface, the output of the CC1 and CC2 pins of the Type-C interface is a square wave signal of about 4V.

[0054] When the Type-C interface detects that a USB device is inserted in the forward orientation (i.e. connected to the CC1 pin), the output of the CC1 pin is a constant voltage of 0.4V, and the voltage of the CC2 pin is 0V.

[0055] When the Type-C interface detects that a USB device is inserted in reverse (i.e. connected to the CC2 pin), the output of the CC2 pin is a constant voltage of 0.4V, and the voltage of the CC1 pin is 0V.

[0056] It should be noted that when a USB device is plugged into a Type-C port, it can only be inserted in either the forward or reverse orientation.

[0057] In a specific example, let's take the case of a USB device being inserted correctly into a Type-C port. Figure 2 A circuit diagram of the first selection switch in the testing device of the test board provided in this embodiment; Figure 3 This embodiment provides a schematic diagram of the Type-C interface circuit of a testing device for a test board. Figure 4 This is a schematic diagram of the second gate switch circuit of a testing device for a test board provided in this embodiment.

[0058] like Figure 2 , 3As shown in Figure 4, the enable pin 2S of the first gating switch is connected to the USB_SEL pin of the controller to receive the first enable signal; the gating pin 1S of the first gating switch is connected to the GPIO_86 pin of the controller to receive the first switch control signal; and the 3B0 pin of the first gating switch is connected to the CC1 pin of the Type-C interface.

[0059] The enable pin / OE of the second gating switch is connected to the GPIO_92 pin of the controller to receive the second enable signal. The gating pin S of the second gating switch is connected to the GPIO_28 pin of the controller to receive the second switch control signal. The STCOM- pin of the second gating switch is connected to the TX1- pin of the Type-C interface, the STCOM+ pin of the second gating switch is connected to the TX1+ pin of the Type-C interface, the SRCOM- pin of the second gating switch is connected to the RX1- pin of the Type-C interface, and the SRCOM+ pin of the second gating switch is connected to the RX1+ pin of the Type-C interface.

[0060] The USB_CC1 pin of the test board is connected to the 1B0 pin of the first gating switch, and the USB_CC2 pin of the test board is connected to the 1B1 pin of the first gating switch; the USB_TX1- pin of the test board is connected to the ST1- pin of the second gating switch, the USB_TX1+ pin of the test board is connected to the ST1+ pin of the second gating switch, the USB_RX1- pin of the test board is connected to the SR1- pin of the second gating switch, the USB_RX1+ pin of the test board is connected to the SR1+ pin of the second gating switch, the USB_TX2- pin of the test board is connected to the ST2- pin of the second gating switch, the USB_TX2+ pin of the test board is connected to the ST2+ pin of the second gating switch, the USB_RX2- pin of the test board is connected to the SR2- pin of the second gating switch, and the USB_RX2+ pin of the test board is connected to the SR2+ pin of the second gating switch.

[0061] The working principle of the present invention will be explained below. The enable pin 2S of the first gating switch operates based on the first enable signal. The gating pin 1S of the first gating switch can selectively connect the 3B0 pin and the 1B1 pin of the first gating switch based on the first switch control signal to connect the CC1 pin of the Type-C interface to the USB_CC2 pin of the test board, or selectively connect the 3B0 pin and the 1B0 pin of the first gating switch to connect the CC1 pin of the Type-C interface to the USB_CC1 pin of the test board. The enable pin / OE of the second gating switch operates based on the second enable signal. The gating pin S of the second gating switch can selectively connect the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface to the USB_TX1-, USB_TX1+, USB_RX1-, and USB_RX1+ pins of the test board, respectively, based on the second switch control signal; or selectively connect the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface to the USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ pins of the test board, respectively.

[0062] Specifically, the first gating switch operates based on the signal from the USB_SEL pin, and then selects whether to connect the CC1 pin of the Type-C interface to the USB_CC1 pin or the USB_CC2 pin of the test board based on the signal from the GPIO_86 pin. Specifically, the first gating switch operates when the USB_SEL pin signal is low. If the GPIO_86 pin signal is low at this time, pins 3B0 and 1B0 of the first gating switch are connected, and the CC1 pin of the Type-C interface is connected to the USB_CC1 pin of the test board. If the GPIO_86 pin signal is high at this time, pins 3B0 and 1B1 of the first gating switch are connected, and the CC1 pin of the Type-C interface is connected to the USB_CC2 pin of the test board.

[0063] The second gating switch operates based on the signal from the GPIO_92 pin, and then selects to connect the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface to the USB_TX1-, USB_TX1+, USB_RX1-, and USB_RX1+ pins of the test board, respectively, or to connect the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface to the USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ pins of the test board, respectively. The second gating switch can be activated when the GPIO_92 pin is low. If the GPIO_28 pin is low at this time, the second gating switch will connect the differential signal pins TX1-, TX1+, RX1-, and RX1+ of the Type-C interface to the USB_TX1-, USB_TX1+, USB_RX1-, and USB_RX1+ of the test board, respectively. If the GPIO_28 pin is high at this time, the second gating switch will connect the TX1-, TX1+, RX1-, and RX1+ of the Type-C interface to the USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ of the test board, respectively.

[0064] The low and high levels in this embodiment are merely exemplary. Those skilled in the art can set the corresponding level values ​​of the first switch control signal, the second switch control signal, the first enable signal, and the second enable signal according to actual needs. The first switch control signal can be active low or active high, as long as the control logic of the controller corresponds accordingly.

[0065] Table 1 is a level logic control table for a testing device of a test board provided in Embodiment 1 of the present invention.

[0066] The working principle of the present invention will be further explained below with reference to Table 1.

[0067] Specifically, the level of the GPIO_86 pin controls the first switch control signal, the level of the GPIO_28 pin controls the second switch control signal, the level of the USB_SEL pin controls the first enable signal, and the level of the GPIO_92 pin controls the second enable signal. 0 represents low level, 1 represents high level, and X represents either high or low level.

[0068] When both the USB_SEL pin and the GPIO_86 pin are low, the first gating switch is activated and selects to connect the CC1 pin of the Type-C interface to the USB_CC1 pin of the test board. If the GPIO_92 pin is high at this time, the second gating switch is deactivated.

[0069] When the USB_SEL pin is low and the GPIO_86 pin is high, the first gating switch is activated and selects to connect the CC1 pin of the Type-C interface to the USB_CC2 pin of the test board. If the GPIO_92 pin is high at this time, the second gating switch is deactivated.

[0070]

[0071] Table 1: Level Logic Control Table for the Testing Device of the Test Board

[0072] When both the USB_SEL pin and the GPIO_86 pin are low, the first gating switch is activated, connecting the CC1 pin of the Type-C interface to the USB_CC1 pin of the test board. If both the GPIO_92 pin and the GPIO_28 pin are low, the second gating switch is activated, connecting the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface to the USB_TX1-, USB_TX1+, USB_RX1-, and USB_RX1+ pins of the test board, respectively.

[0073] When both the USB_SEL pin and the GPIO_86 pin are low, the first gating switch is activated, connecting the CC1 pin of the Type-C interface to the USB_CC1 pin of the test board. If the GPIO_92 pin is low and the GPIO_28 pin is high, the second gating switch is activated, connecting the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface to the USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ pins of the test board, respectively.

[0074] When the USB_SEL pin is low and the GPIO_86 pin is high, the first gating switch is activated, connecting the CC1 pin of the Type-C interface to the USB_CC2 pin of the test board. If both the GPIO_92 and GPIO_28 pins are low, the second gating switch is activated, connecting the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface to the USB_TX1-, USB_TX1+, USB_RX1-, and USB_RX1+ pins of the test board, respectively.

[0075] When the USB_SEL pin is low and the GPIO_86 pin is high, the first gating switch is activated, connecting the CC1 pin of the Type-C interface to the USB_CC2 pin of the test board. If the GPIO_92 pin is low and the GPIO_28 pin is high, the second gating switch is activated, connecting the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface to the USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ pins of the test board, respectively.

[0076] In the testing device of the test board in this embodiment, the operation of the first gating switch is controlled by outputting a first enable signal to the enable pin of the first gating switch; the operation of the second gating switch is controlled by outputting a second enable signal to the enable pin of the second gating switch; the operation states of the first gating switch and the second gating switch are controlled, which facilitates the operation of the first gating switch and the second gating switch in conjunction with the test board and the Type-C interface.

[0077] In another optional implementation, taking the reverse insertion of a USB device into a Type-C interface as an example, the CC pin of the Type-C interface is the CC2 pin, and the differential signal pins of the Type-C interface are TX2-, TX2+, RX2-, and RX2+ pins. Specifically, the CC2 pin of the Type-C interface is connected to the 3B0 pin of the first gating switch, and the TX2-, TX2+, RX2-, and RX2+ pins of the Type-C interface are respectively connected to the STCOM-, STCOM+, SRCOM-, and SRCOM+ pins of the second gating switch. Those skilled in the art can choose according to their needs, as long as the control logic of the controller corresponds.

[0078] In an alternative implementation, the Type-C interface connects to a USB device via a Type-A interface. Figure 5 This is a schematic diagram of a testing device for a test board provided in this embodiment, as shown below. Figure 5 As shown, the testing device of the test board also includes a Type-A interface, and the Type-C interface is connected to the USB device through the Type-A interface.

[0079] The Type-A interface is the most widely used interface standard in computers and electronic accessories. Most mice, USB flash drives, and data cables use this interface. The most commonly used interface for USB devices is also the Type-A interface. The USB device in this embodiment is a USB device with a Type-A interface standard, which facilitates the connection and communication between the USB device and the Type-A interface.

[0080] In the testing device for the test board in this embodiment, the Type-C interface is connected to a USB device with a Type-A interface standard via a Type-A interface. This facilitates the testing of the test board's functions using a USB device with a Type-A interface standard, and allows for timely replacement of the USB device if it is damaged.

[0081] In an alternative implementation, the first gating switch is a double-pole double-throw switch.

[0082] A double-pole double-throw (DPD) switch is an analog switch composed of a dual-channel single-pole double-throw (SPD) switch or a four-channel SPD switch. Taking a DPD switch composed of four SPD switches as an example, it features low on-resistance, low voltage, and low power consumption. It has four channels and two control input terminals (gating pins), which can be used for logic control to switch signals as needed. It can also function as a dual differential 2-to-1 multiplexer. For example, by controlling the first switch control signal through the GPIO_86 pin, the DPD switch's gating pin can change the current or voltage direction according to the first switch control signal, thereby selectively connecting the CC1 pin of the Type-C interface to either the USB_CC1 pin or the USB_CC2 pin of the test board.

[0083] The first selector switch and the Type-C interface can communicate bidirectionally. After the entire testing device is powered on, the CC1 pin of the Type-C interface can be connected to either the USB_CC1 pin or the USB_CC2 pin of the test board. If the CC1 pin of the Type-C interface is connected to the USB_CC1 pin of the test board, then the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface are connected to the USB_TX1-, USB_TX1+, USB_RX1-, and USB_RX1+ pins of the test board for signal transmission and detection, respectively. After the detection is completed, the controller outputs the first switch control signal to perform level conversion, and then the CC1 pin of the Type-C interface is connected to the USB_CC2 pin of the test board, and the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface are connected to the USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ pins of the test board for signal transmission and detection, respectively.

[0084] In the testing device of the test board in this embodiment, the first gating switch is a double-pole double-throw switch. Through the double-pole double-throw switch, bidirectional communication between the Type-C interface and the first gating switch is realized, the selection and switching of the first CC test pin and the second CC test pin of the test board are realized, and the functional testing of the test board is realized.

[0085] In an optional implementation, the second gating switch is a signal switching switch.

[0086] The second gating switch selectively connects the TX1-, TX1+, RX1-, and RX1+ pins of the Type-C interface to the USB_TX1-, USB_TX1+, USB_RX1-, and USB_RX1+ pins or the USB_TX2-, USB_TX2+, USB_RX2-, and USB_RX2+ pins of the test board, respectively. Therefore, the main function of the second gating switch is signal selection. The USB device corresponding to the test board supports high-speed signals (signals with a transmission bandwidth greater than 500MB / s) that support communication protocols above USB 3.0 (USB 3.0 has a transmission bandwidth of up to 5.0Gbps, i.e., 500MB / s). Therefore, the second gating switch can also be called a high-speed signal conversion switch.

[0087] In the testing device of the test board in this embodiment, the second selection switch is a signal conversion switch. Through the signal conversion switch, the differential signal pin of the Type-C interface is selectively connected to the first differential signal test pin or the second differential signal test pin of the test board, thereby realizing the functional testing of the test board.

[0088] In an optional embodiment, the detection device further includes a first resistor, one end of which is grounded and the other end is connected to the power supply pin of the Type-C interface.

[0089] like Figure 3 As shown, the first resistor includes resistor R415. One end of resistor R415 is grounded, and the other end is connected to the power supply pin VUBS of the Type-C interface. R415 is the power supply terminal's resistance to ground and serves as a current limiter.

[0090] In another optional embodiment, the detection device further includes a second resistor, and the first differential signal test pin includes a first receive signal test pin and a first transmit signal test pin, with the first receive signal test pin grounded through the second resistor.

[0091] like Figure 4 As shown, the second resistor includes resistor R416 and resistor R417, and the first receive signal test pin includes USB_RX1- and USB_RX1+ pins. The USB_RX1- pin is grounded through resistor R416, and the USB_RX1+ pin is grounded through resistor R417. Resistors R416 and R417 are resistances to ground and serve as current limiting devices.

[0092] In another optional embodiment, the detection device further includes a third resistor, and the second differential signal test pin includes a second receive signal test pin and a second transmit signal test pin, with the second receive signal test pin grounded through the third resistor.

[0093] like Figure 4As shown, the third resistor includes resistors R423 and R424, and the second receive signal test pin includes USB_RX2- and USB_RX2+ pins. The USB_RX2- pin is grounded through resistor R424, and the USB_RX2+ pin is grounded through resistor R423. Resistors R423 and R424 are resistances to ground and serve as current limiting devices.

[0094] In the testing device of the test board in this embodiment, the normal operation of the Type-C interface is ensured by the current limiting effect of the first resistor; and / or the normal operation of the second gating switch is ensured by the current limiting effect of the second resistor; and / or the normal operation of the second gating switch is ensured by the current limiting effect of the third resistor.

[0095] In an optional implementation, the detection device further includes a fourth resistor, such as... Figure 2 As shown, the fourth resistor includes resistors R410, R411, R412, and R413. The USB_CC1 pin of the test board is connected to pin 1B0 of the first selector switch via resistor R410; the USB_CC2 pin of the test board is connected to pin 1B1 of the first selector switch via resistor R411; the select pin 1S of the first selector switch is connected to pin GPIO_86 of the controller via resistor R412; and the enable pin 2S of the first selector switch is connected to pin USB_SEL of the controller via resistor R413. Resistors R410, R411, R412, and R413 are all reserved for future functional changes to facilitate subsequent control signal jumper modifications.

[0096] In an optional embodiment, the detection device further includes a fifth resistor, such as... Figure 3 As shown, the fifth resistor includes resistor R414. One end of resistor R414 is connected to the power supply pin VUBS of the Type-C interface, and the other end is connected to the power supply pin USB_VBUS of the test board to receive the power supply signal. Resistor R414 is reserved for future use; if the power supply network needs to be changed later, it can be done by jumper.

[0097] In an optional implementation, the detection device further includes a sixth resistor, such as Figure 4 As shown, the sixth resistor includes resistors R426 and R427. One end of resistor R426 is connected to the select pin S of the second selector switch, and the other end is connected to the GPIO28 pin of the controller. One end of resistor R427 is connected to the enable pin / OE of the second selector switch, and the other end is connected to the GPIO92 pin of the controller. Resistors R426 and R427 are reserved for future use, which will facilitate the subsequent changes to the jumpers of the control signal lines.

[0098] In an optional embodiment, the detection device further includes a first capacitor, one end of which is grounded and the other end is connected to the power supply pin of the first selection switch. Figure 2 As shown, the first capacitor includes capacitor C404. One end of capacitor C404 is grounded, and the other end is connected to the power supply pin VCC of the first selector switch to receive the power supply signal from the VDD_3V3 pin. Capacitor C404 plays a filtering role.

[0099] In another optional embodiment, the detection device further includes a second capacitor, one end of which is grounded and the other end is connected to the power supply pin of the Type-C interface. Figure 3 As shown, the second capacitor includes capacitors C405 and C406. One end of each capacitor C405 and C406 is grounded, and the other end is connected to the power supply pin VBUS of the Type-C interface to receive the power supply signal from the power supply pin USB_VBUS of the test board. Capacitors C405 and C406 play a filtering role.

[0100] In another optional embodiment, the detection device further includes a third capacitor, one end of which is grounded and the other end is connected to the power supply pin of the second selection switch. Figure 4 As shown, the third capacitor includes capacitor C417. One end of capacitor C417 is grounded, and the other end is connected to the power supply pin VDD of the second selector switch to receive the power supply signal of the corresponding power supply pin VDD_3V3. Capacitor C417 plays a filtering role.

[0101] In the testing device of the test board in this embodiment, the filtering effect of the first capacitor ensures the normal operation of the first gating switch; and / or the filtering effect of the second capacitor ensures the normal operation of the Type-C interface; and / or the filtering effect of the third capacitor ensures the normal operation of the second gating switch.

[0102] In an optional embodiment, the detection device further includes a fourth capacitor, through which the first differential signal test pin is connected to a second gating switch.

[0103] like Figure 4 As shown, the fourth capacitor includes capacitors C407, C408, C409, and C410. The first differential signal test pins include USB_TX1-, USB_TX1+, USB_RX1-, and USB_RX1+ pins. The USB_TX1- pin is connected to the ST1- pin of the second gating switch through capacitor C407; the USB_TX1+ pin is connected to the ST1+ pin of the second gating switch through capacitor C409; the USB_RX1- pin is connected to the SR1- pin of the second gating switch through capacitor C410; and the USB_RX1+ pin is connected to the SR1+ pin of the second gating switch through capacitor C408.

[0104] Capacitors C407, C408, C409, and C410 all serve to block DC and increase the transmission capacity of high-frequency signals (signals with frequencies between 3MHz and 30MHz).

[0105] In an optional embodiment, the detection device further includes a fifth capacitor, through which the second differential signal test pin is connected to a second gating switch.

[0106] like Figure 4 As shown, the fifth capacitor includes capacitors C411, C412, C413, and C414. The second differential signal test pins include USB_TX2-, USB_TX2+, USB_RX2-, and SB_RX2+ pins. The USB_TX2- pin is connected to the ST2- pin of the second gating switch through capacitor C412; the USB_TX2+ pin is connected to the ST2+ pin of the second gating switch through capacitor C414; the USB_RX2- pin is connected to the SR2- pin of the second gating switch through capacitor C411; and the USB_RX2+ pin is connected to the SR2+ pin of the second gating switch through capacitor C413.

[0107] Capacitors C411, C412, C413, and C414 all serve to block DC and increase the transmission capacity of high-frequency signals.

[0108] In the testing device of the test board in this embodiment, the normal operation of the second selection switch is ensured by the function of the fourth capacitor and / or the fifth capacitor in blocking DC and increasing the high-frequency signal transmission capability.

[0109] In an optional implementation, the detection device further includes a diode, such as Figure 3 As shown, both diodes D403 and DZ400 are grounded at one end and connected to the VBUS power supply pin of the Type-C interface at the other end to receive the power supply signal from the USB_VBUS power supply pin of the test board. Diodes D403 and DZ400 can absorb instantaneous large currents and protect the subsequent circuits.

[0110] Example 2

[0111] This embodiment provides a testing system for a test board, which includes a test board and any of the testing devices in Embodiment 1.

[0112] In the test board testing system of this embodiment, the function of the test board is tested by the test board testing device. With a single insertion of a USB device, the first CC test pin, the second CC test pin, the first differential signal test pin, and the second differential signal test pin of the test board can be tested, thereby realizing the testing of the test board function. This avoids manual repeated plugging and unplugging of USB devices, extends the test life of the Type-C interface, reduces the hardware design and manufacturing cost of the test board, saves testing time, realizes automated testing, and improves test reliability.

[0113] While specific embodiments of the present invention have been described above, those skilled in the art should understand that these are merely illustrative examples, and the scope of protection of the present invention is defined by the appended claims. Those skilled in the art can make various changes or modifications to these embodiments without departing from the principles and essence of the present invention, but all such changes and modifications fall within the scope of protection of the present invention.

Claims

1. A testing device for a test board, characterized in that, The detection device includes a first gating switch, a second gating switch, a Type-C interface, and a controller; the Type-C interface includes a CC pin and a differential signal pin, and the test board includes a first CC test pin, a second CC test pin, a first differential signal test pin, and a second differential signal test pin; The controller is used to output a first switch control signal to the selection pin of the first gating switch and a second switch control signal to the selection pin of the second gating switch. The Type-C interface is connected to the test board via the first selection switch and the second selection switch, and selects to connect the CC pin to the first CC test pin or the second CC test pin according to the first switch control signal, and connects the differential signal pin to the first differential signal test pin or the second differential signal test pin according to the second switch control signal. The first selection switch is a double-pole double-throw switch; The second selection switch is a signal conversion switch.

2. The detection device according to claim 1, characterized in that, The controller is also configured to output a first enable signal to the enable pin of the first gating switch.

3. The detection device according to claim 1, characterized in that, The controller is also configured to output a second enable signal to the enable pin of the second gating switch.

4. The detection device according to claim 1, characterized in that, The Type-C interface is used to connect to USB devices via the Type-A interface.

5. The detection device according to claim 1, characterized in that, The detection device further includes a first resistor, one end of which is grounded and the other end is connected to the power supply pin of the Type-C interface; and / or, The detection device further includes a second resistor, and the first differential signal test pin includes a first receive signal test pin and a first transmit signal test pin, wherein the first receive signal test pin is grounded through the second resistor; and / or The detection device further includes a third resistor, and the second differential signal test pin includes a second receive signal test pin and a second transmit signal test pin, with the second receive signal test pin grounded through the third resistor.

6. The detection device according to claim 5, characterized in that, The detection device further includes a first capacitor, one end of which is grounded and the other end is connected to the power supply pin of the first selection switch. And / or, the detection device further includes a second capacitor, one end of which is grounded and the other end is connected to the power supply pin of the Type-C interface; And / or, the detection device further includes a third capacitor, one end of which is grounded and the other end is connected to the power supply pin of the second selection switch.

7. The detection device according to any one of claims 1-6, characterized in that, The detection device further includes a fourth capacitor, and the first differential signal test pin is connected to the second gating switch through the fourth capacitor; and / or The detection device also includes a fifth capacitor, and the second differential signal test pin is connected to the second gating switch through the fifth capacitor.

Images