Method for managing a storage space, chip, microcontrol unit, device and medium

Abstract

The embodiment of the present application discloses a kind of management methods of storage space, method includes: in response to the address application request from the first data processing module in multiple data processing modules, based on the address of the discontinuous free physical storage space of on-chip memory, the address mapping relationship between free physical storage space and a continuous virtual space is established, and the address of continuous virtual space is sent to the first data processing module;In response to the access request of the address of continuous virtual space by the first data processing module, the physical address corresponding to the address of continuous virtual space is determined based on address mapping relationship;Based on physical address, on-chip memory is accessed to read or write the data of first data processing module.The embodiment of the present application also discloses a kind of data processing chip, micro control unit, electronic equipment and storage medium.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a method for managing storage space, a data processing chip, a microcontroller unit, an electronic device, and a storage medium. Background Technology

[0002] With the development of artificial intelligence technology, general-purpose artificial intelligence processors, such as general-purpose neural network processing units (NPUs), are designed to perform superimposed processing of multiple different algorithms in a single scenario, referencing... Figure 1 As shown, the internal architecture of a general-purpose NPU includes multiple data processing engines, such as the NPU and a digital signal processor (DSP), so that different algorithms can be mapped to different data processing engines for processing. Here, for the internal architecture of the general-purpose NPU, on-chip memory (OCM) is externally connected to the bus for data storage. Each data processing engine needs to read and write data from the on-chip memory when processing different algorithms.

[0003] One method for managing on-chip memory (ISP) space in related technologies is static allocation. This involves allocating a fixed area of ​​memory to each data processing engine within the ISP, ensuring that each engine has its own independent storage space to guarantee data reading and writing. However, while this method facilitates ISP space management, it suffers from a limitation: the storage spaces of different data processing engines cannot access each other, leading to low overall ISP space utilization. Summary of the Invention

[0004] This application aims to provide a storage space management method, a data processing chip, a microcontroller unit, an electronic device, and a storage medium to solve the problem in related technologies where the storage spaces of various data processing engines cannot access each other, resulting in low overall on-chip memory storage space utilization. The storage space management method provided by this application has at least the following beneficial effects: When multiple data processing modules share a single on-chip memory, in response to the access request of the first data processing module for the address of a contiguous virtual space, by establishing an address mapping relationship between the non-contiguous free physical storage space of the on-chip memory and a contiguous virtual space, storage space is allocated on the on-chip memory for the data of the first data processing module, thereby improving the space utilization of the on-chip memory and also improving data processing efficiency.

[0005] The technical solution of this application is implemented as follows:

[0006] A method for managing storage space, the method comprising:

[0007] In response to an address request from the first data processing module among multiple data processing modules, an address mapping relationship between the free physical storage space and a continuous virtual space is established based on the address of the non-contiguous free physical storage space of the on-chip memory, and the address of the continuous virtual space is sent to the first data processing module.

[0008] In response to the first data processing module's access request for the address of the continuous virtual space, the physical address corresponding to the address of the continuous virtual space is determined based on the address mapping relationship.

[0009] Access the on-chip memory based on the physical address to read or write data from the first data processing module.

[0010] A data processing chip, the data processing chip comprising:

[0011] The microcontroller unit is used to respond to an address request from a first data processing module among multiple data processing modules, establish an address mapping relationship between the free physical storage space and a continuous virtual space based on the address of the non-contiguous free physical storage space of the on-chip memory, and send the address of the continuous virtual space to the first data processing module.

[0012] The first data processing module is used to receive the addresses of the continuous virtual space, generate an access request for the addresses of the continuous virtual space, and send the access request for the addresses of the continuous virtual space to the microcontroller unit.

[0013] The microcontroller unit is configured to respond to an access request from the first data processing module for an address in the continuous virtual space, determine the physical address corresponding to the address in the continuous virtual space based on the address mapping relationship, and access the on-chip memory based on the physical address to read or write data from the first data processing module.

[0014] A microcontroller unit is configured to, in response to an address request from a first data processing module among a plurality of data processing modules, establish an address mapping relationship between the free physical storage space and a contiguous virtual space based on the address of the non-contiguous free physical storage space of the on-chip memory; and send the address of the contiguous virtual space to the first data processing module.

[0015] The microcontroller unit is further configured to receive an access request for an address in the continuous virtual space sent by the first data processing module, and in response to the access request, determine the physical address corresponding to the address in the continuous virtual space based on the address mapping relationship; and access the on-chip memory based on the physical address to read or write data from the first data processing module.

[0016] An electronic device, comprising: a processor, a memory, and a communication bus;

[0017] The communication bus is used to realize the communication connection between the processor and the memory;

[0018] The processor is used to execute a management program for the storage space stored in the memory, so as to implement the above-mentioned storage space management method.

[0019] A storage medium storing one or more programs, which can be executed by one or more processors to implement the above-described storage space management method.

[0020] The storage space management method, data processing chip, microcontroller unit, electronic device, and storage medium provided in this application embodiment, in response to address request requests from a first data processing module among multiple data processing modules, establishes an address mapping relationship between the free physical storage space and a contiguous virtual space based on the addresses of the non-contiguous free physical storage space of the on-chip memory, and sends the addresses of the contiguous virtual space to the first data processing module; in response to the first data processing module's access request for the addresses of the contiguous virtual space, determines the physical address corresponding to the addresses of the contiguous virtual space based on the address mapping relationship; and accesses the on-chip memory based on the physical address to read or write data of the first data processing module; thus, in the case where multiple data processing modules share a single on-chip memory, in response to the first data processing module's access request for the addresses of the contiguous virtual space, by establishing the address mapping relationship between the non-contiguous free physical storage space and the contiguous virtual space of the on-chip memory, storage space is allocated on the on-chip memory for the data of the first data processing module, improving the space utilization of the on-chip memory and also improving data processing efficiency. Attached Figure Description

[0021] Figure 1 A structural block diagram of the internal architecture of a general-purpose NPU provided in related technologies;

[0022] Figure 2 A schematic diagram illustrating the process of statically allocating storage space as provided in related technologies;

[0023] Figure 3An optional flowchart illustrating a storage space management method provided in an embodiment of this application;

[0024] Figure 4 A structural block diagram of a general-purpose NPU internal dynamic storage space provided in this application embodiment;

[0025] Figure 5 An optional flowchart illustrating a storage space management method provided in an embodiment of this application;

[0026] Figure 6 A schematic diagram illustrating an optional storage space allocation process for a storage space management method provided in an embodiment of this application;

[0027] Figure 7 An optional schematic diagram illustrating the correspondence between a continuous virtual space and multiple physical storage spaces provided in an embodiment of this application;

[0028] Figure 8 An optional flowchart illustrating a storage space management method provided in an embodiment of this application;

[0029] Figure 9 This is an optional structural block diagram for transmitting data from on-chip memory to off-chip memory, as provided in an embodiment of this application.

[0030] Figure 10 An optional flowchart illustrating a storage space management method provided in an embodiment of this application;

[0031] Figure 11 This is an optional structural diagram of the data processing chip provided in an embodiment of this application;

[0032] Figure 12 This is an optional structural schematic diagram of an electronic device provided in an embodiment of this application. Detailed Implementation

[0033] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0034] It should be understood that the phrases "embodiments of this application" or "foreign embodiments" throughout the specification mean that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, "embodiments of this application" or "in the foreign embodiments" appearing throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. In the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0035] The method for managing the storage space of on-chip memory mentioned in the background art is exemplarily described with reference to... Figure 1 and Figure 2 As shown, the data processing modules in the internal architecture of the general-purpose NPU include data processing module 1, data processing module 2, and data processing module 3. Taking data processing module 1 as an example, corresponding to an audio digital signal processor (Audio DSP), data processing module 2 as a video digital signal processor (Video DSP), and data processing module 3 as an embedded neural network processor (NPU), the on-chip memory in the internal architecture of the general-purpose NPU has an address storage space of 16 megabytes (MB). Here, 5MB of on-chip memory is allocated to the Audio DSP, 5MB to the Video DSP, and 6MB to the NPU. It should be noted that each data processing engine can only access the memory space allocated to its own. At time T0, each of the three data processing engines successfully requested 4MB of memory space within its allocated memory space. At time T1, the Audio DSP and Video DSP need to request another 2MB of memory. Since only 1MB of memory remains available in each of the Audio DSP and Video DSP at this time, the allocation fails. The new address can only be allocated after the memory space corresponding to the Audio DSP is released at time T2. Similarly, the 2MB of memory requested by the Video DSP can only be requested after the space is released at time T3. Therefore, while the static allocation method used in the background technology provides each data processing engine with independent memory space and facilitates management of on-chip memory, the inability of the memory spaces of different data processing engines to access each other leads to low overall on-chip memory utilization.

[0036] This application provides a storage space management method, which is applied to electronic devices, with reference to... Figure 3 As shown, the method includes the following steps:

[0037] Step 101: In response to the address request from the first data processing module among multiple data processing modules, establish an address mapping relationship between the free physical storage space and a continuous virtual space based on the address of the non-contiguous free physical storage space of the on-chip memory, and send the address of the continuous virtual space to the first data processing module.

[0038] In this embodiment, the data processing module generally processes tasks in memory. The address request is a request sent by the data processing module to the microcontroller unit when processing tasks, which requests the allocation of a certain amount of storage space in memory to process tasks. Here, the address request carries the address of the target size of physical storage space required by the data processing module when processing tasks.

[0039] In this embodiment, the non-contiguous free physical storage space of the on-chip memory refers to the unoccupied or unallocated physical storage space within the on-chip memory, and at least a portion of the unoccupied or unallocated physical storage space has non-contiguous addresses. Here, the on-chip memory can also be Static Random Access Memory (SRAM).

[0040] In this embodiment of the application, the size of a continuous virtual space is equal to the size of the physical storage space required by the data processing module when processing tasks, which is carried in the address request of the data processing module. Therefore, a continuous virtual space has a start address and an end address.

[0041] In this embodiment, the addresses of contiguous virtual memory spaces are used to point to the physical addresses of on-chip or off-chip memory. The addresses of contiguous virtual memory spaces can be either the starting address or the ending address; this application does not impose any specific limitations.

[0042] In this embodiment, the address mapping relationship between the non-contiguous free physical storage space of the on-chip memory and a contiguous virtual space can include the mapping relationship between the physical address in the non-contiguous free physical storage space of the on-chip memory and the starting address of the contiguous virtual space; the address mapping relationship between the non-contiguous free physical storage space of the on-chip memory and a contiguous virtual space can also include the mapping relationship between the physical address in the non-contiguous free physical storage space of the on-chip memory and the ending address of the contiguous virtual space, which is not limited in this application. Here, the address mapping relationship between the non-contiguous free physical storage space of the on-chip memory and a contiguous virtual space is maintained and updated by the microcontroller unit. It should be noted that after establishing the address mapping relationship between the non-contiguous free physical storage space of the on-chip memory and a contiguous virtual space, an address mapping table between the free physical storage space of the on-chip memory and a contiguous virtual space can also be generated, so as to quickly obtain the physical address of the physical storage space corresponding to the address of the contiguous virtual space by looking up the table.

[0043] In practical applications, a microcontroller unit (MCU) is a unit that integrates a central processing unit, memory, timer / counter, and various input / output interfaces.

[0044] In this embodiment, the data processing module includes a digital signal processing module and an embedded neural network processing module. It may also include other processing modules with data processing capabilities; this application does not impose specific limitations on these. Here, the digital signal processing module is used to process digital signals and can be widely applied in image processing, audio processing, and other fields. The embedded neural network processing module adopts a data-driven parallel computing architecture and is used to process massive amounts of multimedia data such as video and images. Here, the data processing module is also referred to as a data processing engine, computing engine, or hardware execution unit, and can be represented by "Host".

[0045] In this embodiment of the application, the first data processing module is any one of a plurality of data processing modules.

[0046] In this embodiment, before the first data processing module processes a task, it generates an address request and sends it to the microcontroller unit. The microcontroller unit responds to the address request from the first data processing module and establishes an address mapping relationship between the free physical storage space and a contiguous virtual space based on the addresses of the non-contiguous free physical storage space in the on-chip memory. Simultaneously, the microcontroller unit sends the addresses of the contiguous virtual space to the first data processing module.

[0047] In this embodiment, the electronic device may include a microcontroller unit, and may further include a microcontroller unit and a data processing module. The electronic device may be a device containing a general-purpose artificial intelligence processor, such as a general-purpose embedded neural network processing unit (Generic NPU). Since general-purpose artificial intelligence processors need to consider both flexibility and computational performance, their architecture requires a combination of dedicated acceleration circuitry and a general-purpose signal processor. Because their internal storage units, i.e., on-chip memory, are typically small, efficient utilization of on-chip memory space is crucial when processing tasks. It should be noted that the data processing module in the aforementioned general-purpose embedded neural network processor is equipped with an artificial intelligence acceleration circuitry processing module.

[0048] Step 102: In response to the access request from the first data processing module for the address of the continuous virtual space, determine the physical address corresponding to the address of the continuous virtual space based on the address mapping relationship.

[0049] In this embodiment of the application, the access request can be understood as a request generated by the first data processing module for the address of a continuous virtual space.

[0050] In this embodiment, the electronic device, through a microcontroller unit, responds to an address request from a first data processing module among multiple data processing modules. Based on the addresses of the non-contiguous free physical storage space of the on-chip memory, it establishes an address mapping relationship between the free physical storage space and a contiguous virtual space. After sending the addresses of the contiguous virtual space to the first data processing module, the electronic device receives the addresses of the contiguous virtual space through the first data processing module, generates an access request for the addresses of the contiguous virtual space, and sends the access request to the microcontroller unit. Further, in response to the access request, the microcontroller unit determines the physical address corresponding to the address of the contiguous virtual space based on the address mapping relationship.

[0051] In other embodiments of this application, step 102, in response to the first data processing module's access request for addresses in a continuous virtual space, determines the physical address corresponding to the address in the continuous virtual space based on the address mapping relationship. This can also be achieved in the following way:

[0052] Step 1: In response to the first data processing module's access request for addresses in a continuous virtual space, the specific address mapping relationship configured for the first data processing module in the address mapping module is invoked.

[0053] The address mapping relationship includes specific address mapping relationships. It should be noted that after the electronic device establishes the address mapping relationship between the non-contiguous free physical storage space of the on-chip memory and a contiguous virtual space through the microcontroller unit, it generates an address mapping table between the free physical storage space of the on-chip memory and the contiguous virtual space. Similarly, after the electronic device, through the microcontroller unit for the first data processing module, establishes a specific address mapping relationship between the non-contiguous free physical storage space of the on-chip memory and a contiguous virtual space, it generates an address mapping sub-table configured for the first data processing module, between the free physical storage space of the on-chip memory and the contiguous virtual space. Here, the address mapping table includes the address mapping sub-table, and both the address mapping table and the address mapping sub-table are stored in the on-chip memory.

[0054] It should be noted that the address mapping sub-table is characterized by its small data volume, and it is a mapping table configured by the microcontroller for the first data processing module. Here, the address mapping sub-table is updated simultaneously with the address mapping table by the microcontroller.

[0055] In this embodiment of the application, the address mapping sub-table can be updated based on the usage frequency of the addresses in each consecutive virtual space in the table.

[0056] Step 2: Based on the specific address mapping relationship, determine the physical address corresponding to the address in the continuous virtual space.

[0057] In this embodiment, the electronic device, through a microcontroller unit, responds to the access request from the first data processing module for addresses in a continuous virtual space. After calling the specific address mapping relationship configured for the first data processing module in the address mapping module, it determines the physical address corresponding to the address in the continuous virtual space based on the specific address mapping relationship. That is, it searches for the physical address that has a mapping relationship with the address in the continuous virtual space in the address mapping sub-table. Since an address mapping sub-table is configured for each data processing module, and the amount of data in the address mapping sub-table is small, the microcontroller unit can quickly find the physical address that has a mapping relationship with the address in the continuous virtual space, thus improving the query speed and query efficiency.

[0058] In other embodiments of this application, if the microcontroller determines that there are no consecutive virtual space addresses in the address mapping sub-table, a physical address that has a mapping relationship with the consecutive virtual space addresses is determined from the address mapping table. Thus, a physical address that has a mapping relationship with the consecutive virtual space addresses is only searched in the address mapping table when there are no consecutive virtual space addresses in the address mapping sub-table.

[0059] Step 103: Access the on-chip memory based on the physical address to read or write data from the first data processing module.

[0060] In this embodiment, the electronic device, in response to an access request from the first data processing module for addresses in a continuous virtual space, determines the physical address corresponding to the address in the continuous virtual space based on the address mapping relationship. Then, the electronic device, through the microcontroller unit, allocates storage space to the first data processing module using the on-chip memory based on the physical address. Furthermore, the microcontroller unit can then write or read data from the storage space allocated to the first data processing module.

[0061] In a feasible application scenario, refer to Figure 4 As shown, Figure 4 This is a structural block diagram of a general NPU internal dynamic memory space allocation architecture provided in an embodiment of this application. The first data processing module can be any one of data processing module 1, data processing module 2, and data processing module 3. The first data processing module sends an address request to the microcontroller unit. In response to the address request, the microcontroller unit establishes an address mapping relationship between the free physical memory space and a contiguous virtual space based on the addresses of the non-contiguous free physical memory space of the on-chip memory, and sends the addresses of the contiguous virtual space to the first data processing module. Then, the first data processing module generates an access request for the addresses of the contiguous virtual space.

[0062] In one scenario, the microcontroller receives an access request from the first data processing module and responds to the access request by calling the specific address mapping relationship configured for the first data processing module in the address mapping table associated with the on-chip memory to determine the physical address corresponding to the address in the continuous virtual space. Finally, the microcontroller accesses the on-chip memory based on the physical address to read or write data from the first data processing module.

[0063] In another scenario, the first data processing module obtains the address mapping sub-table associated with the on-chip memory in advance, and the address mapping sub-table only includes all the address mapping relationships configured for the first data processing module. Based on the access request, the first data processing module calls the specific address mapping relationship configured for the first data processing module in the address mapping sub-table to determine the physical address corresponding to the address in the continuous virtual space. Finally, the first data processing module accesses the on-chip memory based on the physical address to read or write the data of the first data processing module.

[0064] The storage space management method provided in this application embodiment, in response to an address request from a first data processing module among multiple data processing modules, establishes an address mapping relationship between the free physical storage space and a contiguous virtual space based on the addresses of the non-contiguous free physical storage space of the on-chip memory, and sends the addresses of the contiguous virtual space to the first data processing module; in response to an access request from the first data processing module for the addresses of the contiguous virtual space, determines the physical address corresponding to the addresses of the contiguous virtual space based on the address mapping relationship; and accesses the on-chip memory based on the physical address to read or write data of the first data processing module; thus, in the case where multiple data processing modules share a single on-chip memory, in response to an access request from the first data processing module for the addresses of the contiguous virtual space, by establishing the address mapping relationship between the non-contiguous free physical storage space and the contiguous virtual space of the on-chip memory, storage space is allocated on the on-chip memory for the data of the first data processing module, thereby improving the space utilization of the on-chip memory and also improving data processing efficiency.

[0065] This application provides a storage space management method, which is applied to electronic devices, with reference to... Figure 5 As shown, the method includes the following steps:

[0066] Step 201: In response to an address request from the first data processing module among multiple data processing modules, if there is no contiguous physical storage space address of the target size required by the address request in the non-contiguous free physical storage space address of the on-chip memory, select multiple physical storage space addresses from the free physical storage space addresses.

[0067] Among them, the sum of the sizes of the multiple physical storage spaces corresponding to the addresses of the selected multiple physical storage spaces is greater than or equal to the target size; at least some of the addresses of the selected multiple physical storage spaces are not contiguous.

[0068] The target size is the physical storage space required by the first data processing module carried in the address request.

[0069] In this embodiment, before the first data processing module in the electronic device processes a task, it generates an address request and sends it to the microcontroller unit of the electronic device. The electronic device responds to the address request from the first data processing module via the microcontroller unit and checks the addresses of non-contiguous free physical memory space in the on-chip memory. Then, two scenarios can be considered: In one scenario, the electronic device determines, via the microcontroller unit, that there exists a contiguous physical memory space address of the target size required by the address request among the addresses of the free physical memory space. Based on the contiguous physical memory space addresses, the electronic device establishes an address mapping relationship between the contiguous physical memory space and a contiguous virtual space. In the other scenario, the electronic device determines, via the microcontroller unit, that there is no contiguous physical memory space address of the target size required by the address request among the addresses of the free physical memory space. The microcontroller unit then filters out multiple physical memory space addresses from the free physical memory space addresses, and the sum of the sizes of the multiple physical memory spaces corresponding to the filtered addresses is greater than or equal to the target size.

[0070] In this embodiment of the application, at least some of the addresses of the selected multiple physical storage spaces are not contiguous. This can be understood as the absence of contiguous physical storage space addresses among all the selected physical storage space addresses; or the presence of at least a portion of contiguous physical storage space addresses among all the selected physical storage space addresses, with the remainder being non-contiguous physical storage space addresses.

[0071] Step 202: Based on the addresses of the selected multiple physical storage spaces, establish an address mapping relationship between the free physical storage space and a continuous virtual space, and send the address of the continuous virtual space to the first data processing module.

[0072] In this embodiment, the electronic device filters out the addresses of multiple physical storage spaces from the addresses of the free physical storage space through the microcontroller unit, links the filtered addresses of the multiple physical storage spaces, establishes the address mapping relationship between the multiple physical storage spaces in the free physical storage space and a continuous virtual space, obtains the address of the continuous virtual space, and sends the address of the continuous virtual space to the first data processing module.

[0073] In one feasible application scenario, see Figure 6 and Figure 7 , Figure 6 This is a schematic diagram illustrating an optional storage space allocation process of the storage space management method provided in this application embodiment. Figure 7This is an optional schematic diagram illustrating the correspondence between the addresses of consecutive virtual spaces and the addresses of multiple physical storage spaces provided in this application embodiment.

[0074] The electronic device contains multiple data processing modules, including data processing module 1, data processing module 2, and data processing module 3. Taking data processing module 1 as corresponding to the Audio DSP module, data processing module 2 as corresponding to the Video DSP module, and data processing module 3 as corresponding to the NPU module as an example: At time T0, the Audio DSP module, Video DSP module, and NPU module each successfully requested 4MB of storage space in the total on-chip memory, and this entire storage space is visible to all three modules. At time T1, the Audio DSP module and Video DSP module each need to request another 2MB of storage space from the remaining on-chip memory. Since there is still 4MB of remaining storage space, the MCU allocates the remaining 4MB of storage space to the Audio DSP module and Video DSP module. At time T2, the Audio DSP module and the Video DSP module send address space release requests to the MCU. At this time, the MCU updates the address mapping table and releases the 4MB of memory space corresponding to the Audio DSP module and the 2MB of memory space corresponding to the Video DSP module based on the release requests. At time T3, the NPU needs to request 6MB of memory space. At time T4, the Audio DSP module and the Video DSP module send address space release requests to the MCU. At this time, the MCU updates the address mapping table and releases the 2MB of memory space corresponding to the Audio DSP module and the 4MB of memory space corresponding to the Video DSP module based on the release requests. Here, there is no contiguous 6MB of free physical memory space. Therefore, the MCU filters out multiple scattered physical memory spaces from the free physical memory space and links the addresses of these scattered physical memory spaces. Then, it establishes an address mapping relationship between the multiple physical memory spaces in the free physical memory space and a contiguous virtual space to obtain the address of the contiguous virtual space. It should be noted that because a dynamic allocation strategy is used, the space allocated each time during the address allocation process is of varying size and is constantly being allocated and released, resulting in many fragmented physical storage spaces. Therefore, at time Tn, if the data processing module needs to request a physical address for on-chip memory, it needs to link multiple fragmented physical storage spaces through the microcontroller unit, establish an address mapping relationship between the linked physical storage spaces and a contiguous virtual space, and inform the data processing module of the start or end address of the contiguous virtual space.In this way, multiple data processing modules can share a single on-chip memory, linking fragmented physical storage spaces and determining the address of a contiguous virtual space through the established address mapping relationship; thus, the space utilization of on-chip memory is greatly improved.

[0075] In one application scenario, due to the use of a dynamic memory space allocation mechanism, there will inevitably be a lot of fragmented physical memory space on the on-chip memory. In this case, the setting of the smallest address division granularity in the on-chip memory is relatively important.

[0076] In one scenario, if the minimum address granularity is set to a small value, such as 1 kilobyte (KB), and there are many fragmented addresses in the on-chip memory, a large number of fragmented addresses need to be linked during address allocation, resulting in a deeper address table. Although data processing speed and efficiency are somewhat affected, the storage space utilization of the on-chip memory is high. For example, if 80KB of storage space needs to be requested, and 1KB is used as the minimum address granularity, then 80 minimum address granularities are needed to link them to meet the required physical storage space; thus, the space utilization of the on-chip memory reaches 100%.

[0077] In another scenario, if the minimum address granularity is set to a larger value, such as 64KB, fewer fragmented addresses need to be linked during address allocation, resulting in a shallower address table and more efficient storage management. However, the overall on-chip memory utilization is relatively low. For example, if 80KB of storage space needs to be requested using a 64KB minimum address granularity, only two 64KB minimum address granularities need to be linked to meet the required physical storage space. However, since only 16KB of the second 64KB storage space is used, the remaining 48KB is unused, resulting in wasted storage space and consequently, relatively low overall on-chip memory space utilization. Therefore, designers set the granularity of the minimum space allocation in on-chip memory according to actual needs. This application does not impose specific limitations on this.

[0078] Step 203: In response to the first data processing module's access request for the address of the continuous virtual space, determine the physical address corresponding to the address of the continuous virtual space based on the address mapping relationship.

[0079] Step 204: Access the on-chip memory based on the physical address to read or write data from the first data processing module.

[0080] As described above, in this embodiment, when the electronic device determines that the address of the free physical storage space satisfies the address of the target size physical storage space required by the address request sent by the first data processing module among multiple data processing modules, but there is no consecutive physical storage space address of the target size required by the address request; firstly, the electronic device, through the microcontroller unit, filters out the addresses of multiple physical storage spaces whose sum of storage space sizes is greater than or equal to the target size from the addresses of the free physical storage space; secondly, the electronic device links the addresses of the multiple physical storage spaces selected, establishes an address mapping relationship between the multiple physical storage spaces in the free physical storage space and a consecutive virtual space, obtains the address of the consecutive virtual space, and sends the address of the consecutive virtual space to the first data processing module. Then, in response to the access request of the first data processing module for the address of the consecutive virtual space, the microcontroller unit determines the physical address corresponding to the address of the consecutive virtual space based on the address mapping relationship. Finally, the on-chip memory is accessed based on the physical address to read or write data from the first data processing module. In this way, based on multiple data processing modules sharing a single on-chip memory, a dynamic allocation strategy is used to link fragmented storage spaces and establish an address mapping relationship between fragmented physical storage spaces and a contiguous virtual space to allocate storage space for the data of the first data processing module on the on-chip memory; thus, the space utilization of the on-chip memory is greatly improved.

[0081] It should be noted that the descriptions of the same steps and contents as in other embodiments in this embodiment can be found in the descriptions in other embodiments, and will not be repeated here.

[0082] This application provides a storage space management method, which is applied to electronic devices, with reference to... Figure 8 As shown, the method includes the following steps:

[0083] Step 301: In response to the address request from the first data processing module among multiple data processing modules, if there are tasks in the on-chip memory with a priority lower than that processed by the first data processing module, determine that the sum of the sizes of the free physical storage space is less than the target size.

[0084] The target size is the physical storage space required by the first data processing module carried in the address request.

[0085] In this embodiment, there are tasks in the on-chip memory with a lower priority than those processed by the first data processing module. This can be understood as the priority of the tasks processed by the first data processing module being higher than the priority of other tasks in the on-chip memory. Similarly, the priority of other tasks is lower than the priority of the tasks processed by the first data processing module. It should be noted that other tasks can be processed by the first data processing module, or they can be processed by a separate data processing module that is different from the first data processing module.

[0086] In this embodiment, before the first data processing module in the electronic device processes a task, it generates an address request and sends it to the microcontroller unit of the electronic device. The electronic device responds to the address request from the first data processing module via the microcontroller unit. If there are addresses in the on-chip memory with a priority lower than the priority of the task being processed by the first data processing module, it checks the addresses of discontinuous free physical storage space in the on-chip memory and further determines that the sum of the sizes of the free physical storage spaces is less than the target size.

[0087] Step 302: Call the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory in order to release the physical storage space corresponding to at least a portion of the data.

[0088] In this embodiment of the application, at least a portion of the data in the on-chip memory includes partial data of other tasks in the on-chip memory, or all data of other tasks in the on-chip memory, wherein the priority of other tasks is lower than the priority of the task processed by the first data processing module.

[0089] In this embodiment of the application, the off-chip memory can be Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM).

[0090] In this embodiment of the application, the direct memory access module has the function of data transmission or data transfer. That is, after the direct memory access module (DMA) transmits data from the remote end to the destination end, further processing of the data needs to be performed by the destination end.

[0091] In this embodiment, the electronic device calls the direct memory access module to send part or all of the data of other tasks in the on-chip memory that have a lower priority than the task processed by the first data processing module to the off-chip memory, thereby allocating the data resources in the on-chip memory to the off-chip memory and releasing the physical storage space corresponding to at least part of the data.

[0092] In this embodiment of the application, the electronic device may be a device comprising a general-purpose embedded neural network processing unit (Generic NPU) and off-chip memory. See also... Figure 9 As shown, Figure 9 This is an optional structural block diagram of sending data from on-chip memory to off-chip memory provided in the embodiments of this application.

[0093] In this embodiment of the application, step 302, which calls the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory, can also be implemented through the following process:

[0094] S1. Stop responding to the target access request.

[0095] Among them, the priority of the task corresponding to the target access request is lower than the priority of the task processed by the first data processing module.

[0096] S2. Call the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory.

[0097] At least a portion of the data in the on-chip memory includes data for the task corresponding to the target access request.

[0098] In this embodiment, the target access request can be an access request sent by the first data processing module, or it can be an access request sent by another data processing module different from the first data processing module. The timing of the target access request includes, but is not limited to, the following three types: First, the target access request can be received by the microcontroller unit before it receives and responds to the address request from the first data processing module, and the processing task corresponding to the target access request has already begun processing. Second, the target access request can be received by the microcontroller unit simultaneously with the address request from the first data processing module. Third, the access request from the second data processing module can also be received by the microcontroller unit after it has received the address request from the first data processing module.

[0099] In this embodiment, when the microcontroller receives an address request from the first data processing module among multiple data processing modules, and the priority of the task corresponding to the target access request is lower than the priority of the task processed by the first data processing module, firstly, the electronic device stops responding to the target access request corresponding to the low-priority task through the microcontroller; secondly, the electronic device calls the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory. In this way, the data resources currently running in the on-chip memory are allocated to the off-chip memory so that the higher-priority task can be completed in the shortest possible time.

[0100] In one feasible scenario, electronic devices can analyze data streams through a microcontroller unit and appropriately assign tasks to different data processing modules, reducing their workload. This avoids excessive on-chip memory usage when a data processing module handles many tasks, thus triggering the data processing module to access off-chip memory. Furthermore, if the data processing engine needs to process a higher-priority task and the on-chip memory is insufficient, the data currently running on the on-chip memory still needs to be sent to off-chip memory. This allows the data processing module handling the high-priority task to exclusively occupy the on-chip memory space, thereby improving the processing efficiency of high-priority tasks.

[0101] In this embodiment of the application, after step 302 calls the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory, it is also necessary to re-establish the address mapping relationship between the free physical storage space and a continuous virtual space, as well as the specific address mapping relationship configured for each data processing module.

[0102] In other embodiments of this application, after step 302 calls the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory, the following steps can also be performed: continue processing the target access request by accessing at least a portion of the data from the off-chip memory.

[0103] In this embodiment, the electronic device stops responding to target access requests corresponding to low-priority tasks via the microcontroller unit and calls the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory. Then, it continues processing the target access request by accessing at least a portion of the data from the off-chip memory. Specifically, the electronic device, through the microcontroller unit, establishes an address mapping relationship between the free physical storage space of the off-chip memory and a contiguous virtual space based on the address of the free physical storage space, and sends the address of the contiguous virtual space to the second data processing module. Further, the electronic device continues responding to target access requests corresponding to low-priority tasks by accessing at least a portion of the data from the off-chip memory, and determines the physical address corresponding to the address of the contiguous virtual space based on the address mapping relationship. Finally, the electronic device, through the microcontroller unit, accesses the off-chip memory based on the physical address to read or write at least a portion of the data of the low-priority task. Thus, without occupying the storage space of the physical address in the on-chip memory, data processing for each data processing module is achieved through the off-chip memory.

[0104] In other embodiments of this application, refer to Figure 10 As shown, after step 302 calls the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory, the following steps can also be performed:

[0105] Step A1: In response to the address space release request from the first data processing module, the direct memory access module is invoked to send at least a portion of the data in the off-chip memory to the on-chip memory.

[0106] Step A2: Continue processing the target access request by accessing at least part of the data from the on-chip memory.

[0107] In this embodiment, if the electronic device responds to an address space release request from the first data processing module via the microcontroller unit, firstly, the electronic device calls the direct memory access module via the microcontroller unit to move at least a portion of the data moved to off-chip memory back to on-chip memory. Secondly, the electronic device continues to process the target access request corresponding to the low-priority task by accessing at least a portion of the data from the on-chip memory. The process is as follows: based on the address of the non-contiguous free physical storage space of the on-chip memory, at least a portion of the data moved to off-chip memory is moved back to the on-chip memory, and the address mapping relationship between the free physical storage space of the on-chip memory and a contiguous virtual space is re-established. The address of the contiguous virtual space is then sent to the data processing module that processes the low-priority task. Furthermore, the data processing module for low-priority tasks generates access requests for addresses in a contiguous virtual space and sends these requests to the microcontroller unit. The electronic device then responds to these requests via the microcontroller unit, determining the physical address corresponding to the address in the contiguous virtual space based on the re-established address mapping between the available physical storage space of the on-chip memory and the contiguous virtual space. Finally, the microcontroller unit accesses the on-chip memory based on the physical address to continue reading or writing data corresponding to the low-priority tasks. This process moves data from off-chip memory to on-chip memory to complete write and / or read operations, thereby improving the processing speed and efficiency of data write and / or read operations.

[0108] In a feasible application scenario, refer to Figure 9As shown, for example, multiple data processing modules in an electronic device include data processing module 1, data processing module 2, and data processing module 3. Taking data processing module 1 as corresponding to the Audio DSP module, data processing module 2 as corresponding to the Video DSP module, and data processing module 3 as corresponding to the NPU module as an example, firstly, when the microcontroller unit (MCU) receives an address request from the NPU module, the MCU responds to the address request and determines that among the non-contiguous free physical storage addresses, there is no address for the physical storage space of the target size required by the address request, and the task processed by the NPU module corresponding to the address request has a higher priority, that is, the priority of the task processed by the NPU module corresponding to the address request is higher than the priority of other tasks. For example, the priority of other tasks can be the tasks currently being processed by the Audio DSP module and the Video DSP module. Secondly, the MCU pauses the tasks currently being processed by the Audio DSP and Video DSP modules, and then starts the DMA module on the internal bus to move at least a portion of the data from the on-chip memory to the off-chip memory. It should be noted that after moving at least a portion of the data from the on-chip memory, the address of the remaining free physical storage space in the on-chip memory must include at least the address of the target size physical storage space. Further, based on the address of the free physical storage space in the on-chip memory, the MCU establishes an address mapping relationship between the free physical storage space in the on-chip memory and a contiguous virtual space, i.e., an address mapping table, as well as a specific address mapping relationship configured for the NPU module, i.e., address mapping sub-table 3. Further, the addresses of the physical storage spaces containing the data corresponding to the tasks to be processed by the Audio DSP and Video DSP modules are updated, remapping them to the addresses of the storage spaces in the off-chip memory. The address mapping sub-table 1 configured for the Audio DSP module and the address mapping sub-table 2 configured for the Video DSP module are also updated.

[0109] Finally, if the microcontroller responds to an address space release request from the NPU module, the following two processing methods can be used to handle at least a portion of the data moved to off-chip memory by the AudioDSP module and VideoDSP module:

[0110] Processing Method 1: In response to the address space release request from the NPU module, the DMA module is invoked to send at least a portion of the data from the off-chip memory to the on-chip memory. By accessing at least a portion of the data from the on-chip memory, the target access requests from the Audio DSP module and the Video DSP module continue to be processed. This achieves the transfer of data from off-chip memory to on-chip memory to complete data write and / or read operations, thereby improving the processing speed and efficiency of data write and / or read operations.

[0111] Processing Method 2: Continue processing the target access requests of the Audio DSP module and / or the Video DSP module by accessing at least a portion of the data from off-chip memory.

[0112] In this embodiment, the electronic device, through a microcontroller unit, accesses at least a portion of data from off-chip memory to continue processing target access requests from the Audio DSP module and / or the Video DSP module. Specifically, based on the addresses of the free physical storage space in the off-chip memory, an address mapping relationship (i.e., an address mapping table) is established between the free physical storage space in the off-chip memory and a contiguous virtual space, and the addresses of the contiguous virtual space are sent to the Audio DSP module or the Video DSP module. Further, the electronic device, through the Audio DSP module or the Video DSP module, generates target access requests for the addresses of the contiguous virtual space and sends these requests to the microcontroller unit. Further, in response to the target access requests for the addresses of the contiguous virtual space from the Audio DSP module or the Video DSP module, the microcontroller unit determines the physical address corresponding to the address of the contiguous virtual space based on the address mapping table. Finally, the electronic device, through the microcontroller unit, accesses the off-chip memory based on the physical address to read or write data to the Audio DSP module or the Video DSP module. At least a portion of the data from the DSP module. Thus, data processing for each data processing module is achieved via off-chip memory without occupying physical address space in the on-chip memory.

[0113] Step 303: Based on the address of the free physical storage space of the on-chip memory after at least some of the data has been released, establish an address mapping relationship between the free physical storage space and a continuous virtual space.

[0114] Among them, the sum of the sizes of the free physical storage space of the on-chip memory after releasing at least part of the physical storage space corresponding to the data is greater than or equal to the target size.

[0115] In this embodiment, the electronic device, through a microcontroller unit, calls a direct memory access module to send at least a portion of the data corresponding to low-priority tasks in the on-chip memory to off-chip memory. After releasing the physical storage space corresponding to at least a portion of the data, the electronic device first obtains the address of the free physical storage space in the on-chip memory after the release of the physical storage space corresponding to at least a portion of the data through the microcontroller unit. Here, the free physical storage space in the on-chip memory after the release of the physical storage space corresponding to at least a portion of the data is not occupied or allocated, and the sum of the sizes of the free physical storage spaces in the on-chip memory at this time is greater than or equal to the target size of the physical storage space address required in the address request of the first data processing module. Secondly, the electronic device, through the microcontroller unit, establishes an address mapping relationship between the free physical storage space and a continuous virtual space based on the address of the free physical storage space in the on-chip memory after the release of the physical storage space corresponding to at least a portion of the data.

[0116] In one implementation scenario, firstly, the electronic device, through the microcontroller unit, calls the direct memory access module to send at least a portion of the data corresponding to low-priority tasks in the on-chip memory to off-chip memory, thereby freeing up the physical storage space corresponding to at least a portion of the data. Secondly, the electronic device, through the microcontroller unit, obtains the address of the free physical storage space in the on-chip memory after the release of the physical storage space corresponding to at least a portion of the data, and confirms that the free physical storage space in the on-chip memory contains addresses of contiguous physical storage spaces of the target size required for the address request. Finally, based on the addresses of the contiguous physical storage spaces, the electronic device updates the established address mapping relationship between the free physical storage spaces and the contiguous virtual spaces, and sends the addresses of the contiguous virtual spaces to the first data processing module. In this way, the storage space of the on-chip memory can be exclusively occupied by the data processing module that processes high-priority tasks, improving the processing efficiency of high-priority tasks.

[0117] In another implementation scenario, firstly, the electronic device, through the microcontroller unit, calls the direct memory access module to send at least a portion of the data corresponding to low-priority tasks in the on-chip memory to off-chip memory, thereby freeing up the physical storage space corresponding to at least a portion of the data. Secondly, the electronic device, through the microcontroller unit, obtains the address of the free physical storage space in the on-chip memory after the release of the physical storage space corresponding to at least a portion of the data, and confirms that there are no consecutive physical storage space addresses of the target size required for the address request in the free physical storage space after the release of the physical storage space corresponding to at least a portion of the data. Then, the electronic device, through the microcontroller unit, filters out multiple physical storage space addresses from the free physical storage space addresses. Finally, based on the filtered multiple physical storage space addresses, the electronic device updates the established address mapping relationship between the free physical storage space and the consecutive virtual space, and sends the addresses of the consecutive virtual space to the first data processing module.

[0118] As can be seen from the above, in the embodiments of this application, when there is insufficient storage memory in the on-chip memory, and multiple tasks need to be executed, the data processing module for processing high-priority tasks is determined by setting the priority of the tasks. If it is determined that the data processing module for processing high-priority tasks needs to exclusively occupy on-chip storage units or occupy a large amount of on-chip storage units, the microcontroller unit calls the direct memory access module to move the data resources required by the tasks processed by other data processing modules running on the on-chip memory to off-chip memory and update the address mapping relationship between the established free physical storage space and the contiguous virtual space, so that high-priority tasks can be processed quickly. In this way, while ensuring flexible execution of tasks, the processing efficiency of high-priority tasks is improved.

[0119] Step 304: In response to the first data processing module's access request for the address of the continuous virtual space, determine the physical address corresponding to the address of the continuous virtual space based on the address mapping relationship.

[0120] Step 305: Access the on-chip memory based on the physical address to read or write data from the first data processing module.

[0121] Step 306: In response to the address space release request from the first data processing module, release the physical storage space corresponding to the physical address of the on-chip memory.

[0122] In this embodiment, after the first data processing module finishes processing its task, it sends an address space release request to the microcontroller unit. The microcontroller unit responds to the release request, releasing the physical storage space allocated to the first data processing module. This allows the released addresses to be reallocated to new address requests, thereby improving the overall utilization of the on-chip memory.

[0123] It should be noted that the descriptions of the same steps and contents as in other embodiments in this embodiment can be found in the descriptions in other embodiments, and will not be repeated here.

[0124] Embodiments of this application provide a data processing chip for implementing... Figure 3 , Figure 5 , Figure 8 and Figure 10 A corresponding embodiment provides a storage space management method, referring to... Figure 11 As shown, the data processing chip 11 includes:

[0125] The microcontroller unit 1101 is used to respond to an address request from the first data processing module among multiple data processing modules, establish an address mapping relationship between the free physical storage space and a continuous virtual space based on the address of the non-contiguous free physical storage space of the on-chip memory, and send the address of the continuous virtual space to the first data processing module.

[0126] The first data processing module 1102 is used to receive the addresses of the continuous virtual space, generate access requests for the addresses of the continuous virtual space, and send the access requests for the addresses of the continuous virtual space to the microcontroller unit.

[0127] The microcontroller unit 1101 is used to respond to the access request of the first data processing module for the address of the continuous virtual space, determine the physical address corresponding to the address of the continuous virtual space based on the address mapping relationship, and access the on-chip memory based on the physical address to read or write data of the first data processing module.

[0128] In other embodiments of this application, the microcontroller unit 1101 is configured to, when there are no consecutive physical storage space addresses of the target size required by the address application request in the address space, filter out the addresses of multiple physical storage spaces from the addresses of the free physical storage space; wherein the sum of the sizes of the multiple physical storage spaces corresponding to the addresses of the filtered multiple physical storage spaces is greater than or equal to the target size; at least some of the addresses of the filtered multiple physical storage spaces are not consecutive; and based on the addresses of the filtered multiple physical storage spaces, establish an address mapping relationship between the free physical storage space and a continuous virtual space.

[0129] In other embodiments of this application, the microcontroller unit 1101 is configured to: determine that the sum of the sizes of the free physical storage spaces is less than a target size when there are tasks in the on-chip memory with a priority lower than that processed by the first data processing module; call the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory to release the physical storage space corresponding to at least a portion of the data; and establish an address mapping relationship between the free physical storage space and a continuous virtual space based on the address of the free physical storage space in the on-chip memory after the release of the physical storage space corresponding to at least a portion of the data; wherein the sum of the sizes of the free physical storage spaces in the on-chip memory after the release of the physical storage space corresponding to at least a portion of the data is greater than or equal to the target size.

[0130] In other embodiments of this application, the microcontroller unit 1101 is used to stop responding to a target access request, wherein the priority of the task corresponding to the target access request is lower than the priority of the task processed by the first data processing module; and to call the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory, wherein the at least a portion of the data in the on-chip memory includes the data of the task corresponding to the target access request.

[0131] In other embodiments of this application, the microcontroller unit 1101 is configured to continue processing the target access request by accessing at least a portion of the data from off-chip memory.

[0132] In other embodiments of this application, the microcontroller unit 1101 is configured to, in response to a release request from the address space of the first data processing module, invoke the direct memory access module to send at least a portion of the data in the off-chip memory to the on-chip memory; and continue processing the target access request by accessing at least a portion of the data from the on-chip memory.

[0133] In other embodiments of this application, the microcontroller unit 1101 is configured to release the physical storage space corresponding to the physical address of the on-chip memory in response to a release request from the address space of the first data processing module.

[0134] It should be noted that the descriptions of the same steps and contents as in other embodiments in this embodiment can be found in the descriptions in other embodiments, and will not be repeated here.

[0135] Based on the foregoing embodiments, the embodiments of this application provide a microcontroller unit, characterized in that the microcontroller unit is configured to, in response to an address request from a first data processing module among a plurality of data processing modules, establish an address mapping relationship between the free physical storage space and a continuous virtual space based on the addresses of the non-contiguous free physical storage space of the on-chip memory; and send the addresses of the continuous virtual space to the first data processing module.

[0136] The microcontroller unit is also used to receive access requests for addresses in a continuous virtual space sent by the first data processing module, and in response to the access requests, determine the physical addresses corresponding to the addresses in the continuous virtual space based on the address mapping relationship; and access the on-chip memory based on the physical addresses to read or write data from the first data processing module.

[0137] The microcontroller unit provided in this application embodiment, in response to an address request from a first data processing module among multiple data processing modules, establishes an address mapping relationship between the free physical storage space and a contiguous virtual space based on the addresses of the non-contiguous free physical storage space of the on-chip memory, and sends the addresses of the contiguous virtual space to the first data processing module; in response to an access request from the first data processing module for the addresses of the contiguous virtual space, determines the physical address corresponding to the addresses of the contiguous virtual space based on the address mapping relationship; and accesses the on-chip memory based on the physical address to read or write data of the first data processing module; thus, in the case where multiple data processing modules share a single on-chip memory, in response to an access request from the first data processing module for the addresses of the contiguous virtual space, by establishing the address mapping relationship between the non-contiguous free physical storage space and the contiguous virtual space of the on-chip memory, storage space is allocated on the on-chip memory for the data of the first data processing module, thereby improving the space utilization of the on-chip memory and also improving data processing efficiency.

[0138] Based on the foregoing embodiments, embodiments of this application provide an electronic device for implementing... Figure 3 , Figure 5 , Figure 8 and Figure 10 A corresponding embodiment provides a storage space management method, referring to... Figure 12 As shown, the electronic device 12 ( Figure 12 Electronic device 12 and Figure 11 The data processing chip 11 in the middle includes: a processor 1201, a memory 1202, and a communication bus 1203, wherein:

[0139] Communication bus 1203 is used to realize the communication connection between processor 1201 and memory 1202;

[0140] The processor 1201 is used to execute a management program for the storage space stored in the memory 1202 to perform the following steps:

[0141] In response to an address request from the first data processing module among multiple data processing modules, an address mapping relationship between the free physical storage space and a continuous virtual space is established based on the address of the non-contiguous free physical storage space of the on-chip memory, and the address of the continuous virtual space is sent to the first data processing module.

[0142] In response to the first data processing module's access request for addresses in a continuous virtual space, the physical address corresponding to the address in the continuous virtual space is determined based on the address mapping relationship.

[0143] Accessing on-chip memory based on physical addresses to read or write data from the first data processing module.

[0144] In other embodiments of this application, the processor 1201 is used to execute a management program for the storage space stored in the memory 1202 to implement the following steps:

[0145] If there are no contiguous physical storage space addresses of the target size required by the address request in the available physical storage space addresses, multiple physical storage space addresses are selected from the available physical storage space addresses. Among these, the sum of the sizes of the multiple physical storage space addresses corresponding to the selected physical storage space addresses is greater than or equal to the target size. At least some of the selected physical storage space addresses are not contiguous. Based on the selected physical storage space addresses, an address mapping relationship is established between the available physical storage space and a contiguous virtual space.

[0146] In other embodiments of this application, the processor 1201 is used to execute a management program for the storage space stored in the memory 1202 to implement the following steps:

[0147] If there are tasks in the on-chip memory with a priority lower than that processed by the first data processing module, it is determined that the sum of the sizes of the free physical storage spaces is less than the target size, and the task processed by the first data processing module corresponding to the address request has the highest priority; the direct memory access module is invoked to send at least a portion of the data in the on-chip memory to the off-chip memory to release the physical storage space corresponding to at least a portion of the data; based on the address of the free physical storage space in the on-chip memory after the release of the physical storage space corresponding to at least a portion of the data, an address mapping relationship is established between the free physical storage space and a continuous virtual space; wherein, the sum of the sizes of the free physical storage spaces in the on-chip memory after the release of the physical storage space corresponding to at least a portion of the data is greater than or equal to the target size.

[0148] In other embodiments of this application, the processor 1201 is used to execute a management program for the storage space stored in the memory 1202 to implement the following steps:

[0149] Stop the target access request, where the priority of the task corresponding to the target access request is lower than the priority of the task processed by the first data processing module; call the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory, where at least a portion of the data in the on-chip memory includes the data of the task corresponding to the target access request.

[0150] In other embodiments of this application, the processor 1201 is used to execute a management program for the storage space stored in the memory 1202 to implement the following steps:

[0151] The target access request is then processed by accessing at least a portion of the data from off-chip memory.

[0152] In other embodiments of this application, the processor 1201 is used to execute a management program for the storage space stored in the memory 1202 to implement the following steps:

[0153] In response to a request to release the address space from the first data processing module, the direct memory access module is invoked to send at least a portion of the data in the off-chip memory to the on-chip memory; the target access request is then processed by accessing at least a portion of the data from the on-chip memory.

[0154] In other embodiments of this application, the processor 1201 is used to execute a management program for the storage space stored in the memory 1202 to implement the following steps:

[0155] In response to a release request from the address space of the first data processing module, the physical storage space corresponding to the physical address of the on-chip memory is released.

[0156] Based on the foregoing embodiments, embodiments of this application provide a computer storage medium storing one or more programs, which can be executed by one or more processors using the methods provided in the embodiments of this application, for example... Figure 3 , Figure 5 , Figure 8 and Figure 10 The method shown.

[0157] It should be noted that the descriptions of the same steps and contents as in other embodiments in this embodiment can be found in the descriptions in other embodiments, and will not be repeated here.

[0158] It should be noted that the aforementioned computer storage media / memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disc, or compact disc read-only memory (CD-ROM), etc.; it can also be various terminals that include one or any combination of the above-mentioned memory, such as mobile phones, computers, tablet devices, personal digital assistants, etc.

[0159] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0160] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or some of them may be selected to achieve the purpose of this embodiment according to actual needs.

[0161] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing module, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units. Those skilled in the art will understand that implementing or part of the steps of the above method embodiments can be accomplished by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium, and when the program is executed, it performs the steps of the above method embodiments; the aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0162] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.

[0163] The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.

[0164] The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method or device embodiments.

[0165] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method of managing storage space, characterized by, The method includes: In response to an address request from a first data processing module among multiple data processing modules, an address mapping relationship is established between the non-contiguous free physical storage space of the on-chip memory and a contiguous virtual space based on the address of the non-contiguous free physical storage space, and the address of the contiguous virtual space is sent to the first data processing module; the address request is used to allocate storage space on the on-chip memory for the first data processing module to process tasks; the first data processing module is any one of the multiple data processing modules; the multiple data processing modules share one on-chip memory; In response to the first data processing module's access request for the address of the continuous virtual space, the physical address corresponding to the address of the continuous virtual space is determined based on the address mapping relationship. Access the on-chip memory based on the physical address to read or write data from the first data processing module; The process of establishing an address mapping relationship between the non-contiguous free physical storage space based on the addresses of the on-chip memory and a contiguous virtual space includes: If there are tasks with lower priority than those processed by the first data processing module in the on-chip memory, it is determined that the sum of the sizes of the free physical storage space is less than the target size; The direct memory access module is invoked to send at least a portion of the data in the on-chip memory to the off-chip memory in order to release the physical storage space corresponding to the at least a portion of the data; Based on the address of the free physical storage space of the on-chip memory after the physical storage space corresponding to at least a portion of the data has been released, an address mapping relationship is established between the free physical storage space and a contiguous virtual space; wherein, the sum of the sizes of the free physical storage spaces of the on-chip memory after the physical storage space corresponding to at least a portion of the data has been released is greater than or equal to the target size.

2. The method according to claim 1, characterized in that, The method of establishing an address mapping relationship between the non-contiguous free physical storage space based on the address of the on-chip memory and a contiguous virtual space also includes: If there are no consecutive physical storage space addresses of the target size required by the address request in the available physical storage space addresses, multiple physical storage space addresses are selected from the available physical storage space addresses; wherein the sum of the sizes of the multiple physical storage space addresses corresponding to the selected multiple physical storage space addresses is greater than or equal to the target size; and at least some of the physical storage space addresses among the selected multiple physical storage space addresses are not consecutive. Based on the addresses of the selected multiple physical storage spaces, an address mapping relationship is established between the free physical storage space and a continuous virtual space.

3. The method according to claim 1, characterized in that, The invocation of the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory includes: Stop responding to the target access request, where the priority of the task corresponding to the target access request is lower than the priority of the task processed by the first data processing module; The direct memory access module is invoked to send at least a portion of the data in the on-chip memory to the off-chip memory, wherein the at least a portion of the data in the on-chip memory includes the data of the task corresponding to the target access request.

4. The method according to claim 3, characterized in that, After invoking the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory, the method includes: The target access request is further processed by accessing at least a portion of the data from the off-chip memory.

5. The method according to claim 3, characterized in that, After invoking the direct memory access module to send at least a portion of the data in the on-chip memory to the off-chip memory, the method includes: In response to an address space release request from the first data processing module, the direct memory access module is invoked to send at least a portion of the data in the off-chip memory to the on-chip memory. The target access request is further processed by accessing at least a portion of the data from the on-chip memory.

6. The method according to any one of claims 1 to 5, characterized in that, After accessing the on-chip memory based on the physical address to read or write data from the first data processing module, the method includes: In response to a release request from the address space of the first data processing module, the physical storage space corresponding to the physical address of the on-chip memory is released.

7. A data processing chip, characterized in that, The data processing chip includes: A microcontroller unit is configured to respond to an address request from a first data processing module among multiple data processing modules, establish an address mapping relationship between the free physical storage space and a contiguous virtual space based on the addresses of the non-contiguous free physical storage space of the on-chip memory, and send the addresses of the contiguous virtual space to the first data processing module; the address request is used to allocate storage space on the on-chip memory for the first data processing module to process tasks; the first data processing module is any one of the multiple data processing modules; the multiple data processing modules share a single on-chip memory; The first data processing module is used to receive the addresses of the continuous virtual space, generate an access request for the addresses of the continuous virtual space, and send the access request for the addresses of the continuous virtual space to the microcontroller unit. The microcontroller unit is configured to respond to the first data processing module's access request for the address of the continuous virtual space, determine the physical address corresponding to the address of the continuous virtual space based on the address mapping relationship, and access the on-chip memory based on the physical address to read or write data of the first data processing module. The microcontroller unit is configured to, when there are tasks in the on-chip memory with a priority lower than that processed by the first data processing module, determine that the sum of the sizes of the free physical storage spaces is less than a target size; invoke the direct memory access module to send at least a portion of the data in the on-chip memory to off-chip memory to release the physical storage space corresponding to the at least a portion of the data; and establish an address mapping relationship between the free physical storage space and a contiguous virtual space based on the address of the free physical storage space in the on-chip memory after the release of the physical storage space corresponding to the at least a portion of the data; wherein the sum of the sizes of the free physical storage spaces in the on-chip memory after the release of the physical storage space corresponding to the at least a portion of the data is greater than or equal to the target size.

8. A microcontroller unit, characterized in that, The microcontroller unit includes a central processing unit, a memory, a timer / counter, and an input / output interface; the microcontroller unit is connected to multiple data processing modules and an on-chip memory; The microcontroller unit is configured to, in response to an address request from a first data processing module among a plurality of data processing modules, establish an address mapping relationship between the free physical storage space and a contiguous virtual space based on the addresses of the non-contiguous free physical storage space of the on-chip memory; and send the address of the contiguous virtual space to the first data processing module; the address request is used to allocate storage space on the on-chip memory for the first data processing module to process tasks; the first data processing module is any one of the plurality of data processing modules; the plurality of data processing modules share a single on-chip memory; The microcontroller unit is further configured to receive an access request for an address in the continuous virtual space sent by the first data processing module, and in response to the access request, determine the physical address corresponding to the address in the continuous virtual space based on the address mapping relationship; and access the on-chip memory based on the physical address to read or write data from the first data processing module. The microcontroller unit is further configured to determine, when there are tasks in the on-chip memory with a priority lower than that processed by the first data processing module, that the sum of the sizes of the free physical storage space is less than the target size; The Direct Memory Access (DMI) module is invoked to send at least a portion of the data in the on-chip memory to the off-chip memory, thereby freeing up the physical storage space corresponding to the at least a portion of the data. Based on the address of the free physical storage space in the on-chip memory after the release of the physical storage space corresponding to the at least a portion of the data, an address mapping relationship is established between the free physical storage space and a contiguous virtual space. Wherein, the sum of the sizes of the free physical storage spaces in the on-chip memory after the release of the physical storage space corresponding to the at least a portion of the data is greater than or equal to the target size.

9. An electronic device, characterized in that, The electronic device includes: a processor, a memory, and a communication bus; The communication bus is used to realize the communication connection between the processor and the memory; The processor is used to execute a management program for the storage space stored in the memory, so as to implement the storage space management method as described in any one of claims 1 to 6.

10. A storage medium, characterized in that, The storage medium stores one or more programs, which can be executed by one or more processors to implement the storage space management method as described in any one of claims 1 to 6.

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