Data processing method and device, processor, and storage medium

Abstract

The present application provides a data processing method and device, a processor, and a storage medium. The device includes: a data writing end is provided with a write counter, and a data reading end is provided with a read counter; the write counter is used to synchronously update a first buffered data amount using a write data amount corresponding to a data write operation each time the data writing end performs a data write operation, so that the data writing end can determine the next write data amount based on the first buffered data amount recorded in the write counter when the data writing end next requests to perform a data write operation; and the read counter is used to synchronously update a second buffered data amount using a read data amount corresponding to a data read operation each time the data reading end performs a data read operation, so that the data reading end can determine the next read data amount based on the second buffered data amount recorded in the read counter when the data reading end next requests to perform a data read operation.

Description

Technical Field

[0001] The present application relates to the field of communication technologies, and in particular to a data processing method and device, a processor, and a storage medium. Background Art

[0002] From an algorithmic perspective, an AI network consists of multiple computing nodes, each of which is also called a computing layer. The input of each computing layer is derived from the output of the previous layer. Computational layers can include operations such as convolution, pooling, activation, and scaling. As the exploration of AI networks deepens, their structures are becoming more diverse, and the data exchange between computing layers is becoming more complex. Therefore, a unified data transmission mechanism is needed for AI networks.

[0003] Currently, a Mailbox mechanism can be used to manage the writing and reading of buffer data. The Mailbox mechanism provides feedback on the current buffer's data storage status based on the current clock cycle, thereby controlling the data writer to write data into the buffer and the data reader to read data from the buffer. However, if the data writer and data reader are far from the buffer, buffer data read and write operations may not be updated to the Mailbox in a timely manner. Consequently, continued buffer data read and write operations may lead to data read and write overflows. Summary of the Invention

[0004] Embodiments of the present application provide a data processing method and device, a processor, and a storage medium, which can avoid data read and write overflow problems when performing buffer data read and write operations.

[0005] The technical solution of this application is achieved as follows:

[0006] In a first aspect, an embodiment of the present application provides a data processing device, comprising: a data writing end and a data reading end; the data writing end is provided with a write counter, and the data reading end is provided with a read counter; wherein,

[0007] The write counter is configured to synchronously update the first buffered data amount using the amount of written data corresponding to each data write operation performed by the data write end, so that the data write end can determine the next write data amount based on the first buffered data amount recorded in the write counter when the data write end requests to perform a data write operation next time;

[0008] The read counter is used to synchronously update the second buffered data amount using the read data amount corresponding to the data read operation each time the data reading end performs a data read operation, so that the data reading end can determine the next read data amount based on the second buffered data amount recorded in the read counter when the data reading end requests to perform a data read operation next time.

[0009] In a second aspect, an embodiment of the present application provides a data processing method, which is applied to the above-mentioned data processing device, and the method includes:

[0010] When the data writing end requests to perform a data writing operation, the data writing end determines the current write data amount according to the first buffered data amount recorded in the write counter; and when the data writing end sends the current write data amount to the buffer unit, the first buffered data amount recorded in the write counter is synchronously updated with the current write data amount;

[0011] When the data reading end requests to perform a data reading operation, the data reading end determines the current read data amount based on the second buffered data amount recorded in the read counter; when the data reading end reads the current read data amount from the buffer unit, the current read data amount is used to synchronously update the second buffered data amount recorded in the read counter.

[0012] In a third aspect, an embodiment of the present application provides a cache device, comprising: a buffer unit, the above-mentioned data writing end, and a data reading end; the data writing end is connected to the input end of the buffer unit, and the data reading end is connected to the output end of the buffer unit;

[0013] The data writing end is used to write data into the buffer unit;

[0014] The data reading end is used to read data from the buffer unit.

[0015] In a fourth aspect, an embodiment of the present application proposes a neural network processor, which includes: a computing unit for performing neural network calculations and the above-mentioned cache device.

[0016] In a fifth aspect, an embodiment of the present application proposes a storage medium on which a computer program is stored, and the computer program implements the above-mentioned data processing method when executed.

[0017] An embodiment of the present application provides a data processing method and device, a processor, and a storage medium, wherein the device includes: a data writing end and a data reading end; the data writing end is provided with a write counter, and the data reading end is provided with a read counter; wherein the write counter is used to synchronously update a first buffered data amount using a write data amount corresponding to a data write operation each time the data writing end performs a data write operation, so that the data writing end can determine the next write data amount according to the first buffered data amount recorded in the write counter when the data writing end requests to perform a data write operation next time; and the read counter is used to synchronously update a second buffered data amount using a read data amount corresponding to a data read operation each time the data reading end performs a data read operation, so that the data reading end can determine the next read data amount according to the second buffered data amount recorded in the read counter when the data reading end requests to perform a data read operation next time. By adopting the above-mentioned implementation scheme, the present application sets counters near the data writing end and the data reading end, which can timely synchronize the data writing operation of the data writing end and the data reading operation of the data reading end. When a subsequent request is made to perform a data writing operation and / or a data reading operation, the data status in the buffer can be determined in time based on the counters of the data writing end and the data reading end, thereby avoiding the problem of data reading and writing overflow. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is the data flow diagram of the current Mailbox mechanism;

[0019] Figure 2 The data flow diagram of the Mailbox mechanism in the current long-distance situation;

[0020] Figure 3 A schematic diagram of the structure of a data processing device provided in an embodiment of the present application;

[0021] Figure 4 A schematic diagram of an exemplary design scheme of a first counter behavior provided in an embodiment of the present application;

[0022] Figure 5 A schematic diagram of an exemplary design scheme of a second counter behavior provided in an embodiment of the present application;

[0023] Figure 6 A schematic diagram of an exemplary design scheme of a third counter behavior provided in an embodiment of the present application;

[0024] Figure 7 A flowchart of a data processing method provided in an embodiment of the present application;

[0025] Figure 8 A schematic diagram of the structure of a cache device provided in an embodiment of the present application;

[0026] Figure 9 A schematic diagram of the structure of a neural network processor provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to enable a more detailed understanding of the features and technical contents of the embodiments of the present application, the implementation of the embodiments of the present application is described in detail below with reference to the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present application.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein are for the purpose of describing the embodiments of this application only and are not intended to limit this application.

[0029] In the following description, reference is made to "some embodiments," which describe a subset of all possible embodiments. However, it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict. It should also be noted that the terms "first, second, and third" in the embodiments of the present application are only used to distinguish similar objects and do not represent a specific ordering of the objects. It is understood that "first, second, and third" may be interchanged in a specific order or sequential order where permitted, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0030] The current data flow of the Mailbox mechanism is as follows Figure 1As shown, the data writing (producer) end is responsible for generating data and writing the data into the buffer. Each time data needs to be written into the buffer, the producer end needs to check the data occupancy status in the buffer. At this time, the producer end sends a psync signal to the Mailbox end to inform it of the operation of writing data into the buffer. When the Mailbox evaluates that the producer end can write data into the buffer, it sends a psts signal to the producer end, and the producer end writes data into the buffer according to the psts signal; the data reading (consumer) end is responsible for reading data from the buffer. Each time data needs to be read from the buffer, the consumer end needs to check the data occupancy status in the buffer. At this time, the consumer end sends a csync signal to the Mailbox to inform it of the operation of reading data from the buffer. When the Mailbox evaluates that the consumer end can read data from the buffer, it sends a csts signal to the consumer end, and the consumer end reads data from the buffer according to the csts signal. For data interaction between a data writer and a data reader that is relatively simple and close in distance, the above mechanism can be used to complete data interaction management.

[0031] Taking the total capacity of the buffer as 100 data as an example, for the producer side, the data status of the buffer storage during the data writing process is shown in Table 1.

[0032] Table 1 Status table corresponding to the Mailbox mechanism during data writing

[0033] clock cycle 0 1 2 3 4 5 6 7 psts √ √ √ √ × × × × psync √ √ √ √ × × × × pnum 20 20 20 40 0 0 0 0 buff-data 20 40 60 100 100 100 100 100

[0034] The psts in Table 1 indicates whether there is still free space in the current buffer for the producer to write data. The amount of data written by the producer is represented by pnum, and buffer_data represents the amount of valid data in the current buffer. Therefore, it can be seen from Table 1 that from clock cycle 0 to clock cycle 2, 20 data items are written to the buffer in each clock cycle until the third cycle, when the producer writes 40 data items. The mailbox's psts returns a positive number from clock cycle 0 to clock cycle 3. At this time, the amount of data stored in the buffer is full, so the mailbox's psts returns an error number in the fourth clock cycle, indicating that the buffer is full and can no longer be written. Assuming that the consumer has not consumed the data in the buffer throughout the entire process, then until the end, psts will prevent the producer from writing data starting from the fourth clock cycle.

[0035] Taking the total capacity of the buffer as 100 data as an example, for the consumer side, the data status of the buffer storage during the data reading process is shown in Table 2.

[0036] Table 2 Status table corresponding to the Mailbox mechanism during data reading

[0037] clock cycle 0 1 2 3 4 5 6 7 csts √ √ √ √ × × × × csync √ √ √ √ × × × × cnum 20 20 20 40 0 0 0 0 buff-data 80 60 60 0 0 0 0 0

[0038] The csts in Table 2 indicates whether there is valid data in the current buffer for the consumer to read. The amount of data read by the consumer is represented by cnum, and buffer_data indicates the amount of valid data in the current buffer. Therefore, it can be seen from Table 2 that from clock cycle 0 to clock cycle 2, 20 data items are read from the buffer in each clock cycle until the third cycle, when the producer writes 40 data items. The mailbox's csts returns a positive number from clock cycle 0 to clock cycle 3. At this time, the amount of data stored in the buffer is empty, so the mailbox's csts returns an error number in the fourth clock cycle, indicating that the buffer is empty and can no longer be read. Assuming that the producer has not written any data throughout the entire process, then until the end, csts will prevent the consumer from reading data starting from the fourth clock cycle.

[0039] From the above analysis, it can be seen that whether the mailbox feeds back ptst to the producer or ctst to the consumer, it does so based on the current clock cycle. For scenarios where the producer, consumer, and buffer are close together, the existing Mailbox mechanism can provide timely feedback on the current buffer status. However, when the producer, consumer, and buffer are far apart, the transmission path between them becomes longer, e.g. Figure 2 As shown, at this time, the mailbox's ptst signal and ctst signal require several clock cycles to reach the producer and consumer ends.

[0040] Taking the total capacity of the buffer as 100 data as an example, for the producer side, the data status of the buffer storage during the data writing process is shown in Table 3.

[0041] Table 3 Status table corresponding to the Mailbox mechanism during data writing

[0042] clock cycle 0 1 2 3 4 5 6 7 psts √ √ √ √ √ √ √ × psync √ √ √ √ √ √ √ × pnum 20 20 20 40 20 20 20 0 buff-data 20 40 60 100 overflow overflow overflow

[0043] From clock cycle 0 to clock cycle 3, the producer side has been writing data to the buffer. Since the Mailbox's psts signal requires several clock cycles to inform the producer side of the current data status in the buffer, the producer side does not receive the current data status of the buffer in time during clock cycle 4, so psts continues to transmit valid signals. As a result, the psts received by the producer side is still valid, but in fact, the producer side has already written 100 data at clock cycle 3. Therefore, starting from clock cycle 4, no more data can be written. Therefore, starting from clock cycle 4, the data written by the producer side will cause the buffer to overflow.

[0044] Taking the total capacity of the buffer as 100 data as an example, for the consumer side, the data status of the buffer storage during the data reading process is shown in Table 4.

[0045] Table 4 Status table corresponding to the Mailbox mechanism during data reading

[0046] clock cycle 0 1 2 3 4 5 6 7 csts √ √ √ √ √ √ √ × csync √ √ √ √ √ √ √ × cnum 20 20 20 40 20 20 20 0 buff-data 80 60 60 0 Underflow underflow underflow 0

[0047] From clock cycles 0 to 3, the consumer continues to read data from the buffer. Since the Mailbox's csts signal requires several clock cycles to inform the consumer of the current data status in the buffer, the consumer doesn't receive the buffer empty signal in time during clock cycle 4, so csts continues to transmit valid signals. As a result, the csts signal received by the consumer remains valid. However, the consumer has already read 100 data items during clock cycle 3, so starting from clock cycle 4, it can no longer read data. Therefore, any data read by the consumer from clock cycle 4 onwards will cause the buffer to underflow.

[0048] In order to solve the above problems, the present invention provides a data processing device 1, such as Figure 3 As shown, the device 1 may include: a data writing end 10 and a data reading end 11; the data writing end 10 is provided with a write counter 100, and the data reading end 11 is provided with a read counter 110; wherein,

[0049] The write counter 100 is configured to synchronously update the first buffered data amount using the amount of written data corresponding to each data write operation performed by the data write end 10, so that the data write end 10 can determine the next write data amount based on the first buffered data amount recorded in the write counter 100 when the data write end 10 requests to perform a data write operation next time.

[0050] The read counter 110 is used to synchronously update the second buffered data amount using the read data amount corresponding to the data read operation each time the data reading end 11 performs a data read operation, so that the data reading end 11 can determine the next read data amount based on the second buffered data amount recorded in the read counter 110 when the data reading end 11 requests to perform a data read operation next time.

[0051] A data processing device proposed in an embodiment of the present application is suitable for scenarios where data cache management is performed on a buffer.

[0052] In an embodiment of the present application, both the data reading end and the data writing end are provided with a counter, wherein the write counter of the data writing end increases quickly and decreases slowly; each time the data writing end performs a data write operation, the write counter can promptly record the amount of written data. When the data writing end next requests to perform a data write operation, the write counter can promptly determine the amount of data in the buffer after writing through the write counter, and then determine whether the next data write operation can be performed, thereby avoiding write overflow. The read counter of the data reading end increases slowly and decreases quickly; each time the data reading end performs a data read operation, the read counter can promptly record the amount of read data. When the data reading end next requests to perform a data read operation, the read counter can promptly determine the amount of data remaining in the buffer after reading through the read counter, and then determine whether the next data read operation can be performed, thereby avoiding read overflow.

[0053] In the embodiment of the present application, the number of write counters is one, two or more, and the specific number can be selected according to actual conditions. The embodiment of the present application does not make any specific limitation.

[0054] In the embodiment of the present application, the number of read counters is one, two or more, and the specific number can be selected according to actual conditions. The embodiment of the present application does not make any specific limitation.

[0055] It should be noted that the function of timely notifying the data reader and data writer of the amount of stored data in the buffer can be achieved by designing different counter behaviors for the read counter of the data reader and the write timer of the data writer.

[0056] The embodiment of the present application designs three counter behaviors. Through the following specific description, it should be noted that the following three are only optional counter behaviors proposed in the embodiment of the present application. The present application does not limit the specific optional counter behaviors. The specific ones can be selected according to actual conditions. The embodiment of the present application does not make specific limitations.

[0057] In an optional embodiment, the first buffered data amount is an accumulated amount of written data, and the second buffered data amount is an accumulated amount of read data;

[0058] The write counter is further configured to synchronously add the amount of data written once to the accumulated amount of written data each time the data write end performs a data write operation; and transmit the accumulated amount of written data to the data reading end after a delay of at least one clock cycle;

[0059] The read counter is used to synchronously add the read data amount to the read data accumulation amount each time the data read end performs a data read operation; and transmit the read data accumulation amount to the data write end after at least one clock cycle delay.

[0060] In an embodiment of the present application, the data reading end includes a read counter, and the data writing end includes a write counter, wherein the read counter records the accumulated amount of read data, and the write counter records the accumulated amount of written data.

[0061] Each time a data writer writes data to a buffer, a write counter performs an accumulation operation. Each accumulation is based on the amount of data written corresponding to that write operation. The write counter is an accumulator that only performs addition operations and does not perform subtraction operations. It represents the total amount of data written to the buffer by the data writer. The accumulated amount of written data in the write counter is then transmitted to the data reader via at least one trigger. The data reader is configured to determine the next amount of data to be read based on the accumulated amount of read data recorded in the read counter and the accumulated amount of written data received after a delay, upon the next request to perform a data read operation.

[0062] Specifically, the data reader further includes a third subtractor connected to the data reader, the write counter, and the read counter, respectively. The third subtractor is configured to subtract the accumulated amount of delayed write data from the accumulated amount of read data recorded in the read counter to obtain a second buffer storage amount. Upon the next data read request, the data reader determines the next data read amount based on the second buffer storage amount.

[0063] It should be noted that each time the third subtractor receives data from the data reading end and / or the write counter, the third subtractor performs a subtraction operation to obtain a second buffer storage amount, where the second buffer storage amount represents the amount of data remaining in the buffer. The third subtractor transmits the second buffer storage amount to the data reading end. When the data reading end requests to perform a data read operation, the next data read amount is determined based on the second buffer storage amount. If the second buffer storage amount is 0, the data reading end is prohibited from continuing to perform the data read operation. If the second buffer storage amount is greater than 0, the determined next data read amount must be less than the second buffer storage amount.

[0064] Each time the data reader reads data from the buffer, the read timer performs an accumulation operation. The granularity of each accumulation is the amount of data read corresponding to each data read operation. The read counter is also an accumulator that only performs addition operations and does not subtract operations. It represents the total amount of data read from the buffer by the data reader. The accumulated amount of read data in the read timer is then transmitted to the data writer via at least one trigger. The data writer is used to determine the next write data amount based on the accumulated amount of write data recorded in the write counter and the accumulated amount of read data received after a delay, when a data write operation is requested.

[0065] Specifically, the data writing end also includes a second subtractor, which is used to perform a subtraction operation on the accumulated amount of read data received late and the accumulated amount of write data recorded in the write counter to obtain a first buffer storage amount; when the data writing end requests to perform a data write operation next time, the data writing end determines the next write data amount based on the first buffer storage amount.

[0066] It should be noted that each time the second subtractor receives data from the data reading end and / or the write counter, the second subtractor performs a subtraction operation to obtain a first buffer storage capacity, where the first buffer storage capacity represents the amount of data currently stored in the buffer. The second subtractor transmits the first buffer storage capacity to the data writing end. When the data writing end requests to perform a data write operation, the next write data capacity is determined based on the first buffer storage capacity, that is, the remaining bufferable data capacity is obtained by subtracting the first buffer storage capacity from the total buffer capacity. If the remaining bufferable data capacity is 0, the data writing end is prohibited from continuing to perform the data write operation. If the remaining bufferable data capacity is greater than 0, the determined next write data capacity must be less than the remaining bufferable data capacity.

[0067] For example, Figure 4In the design scheme of the first counter behavior, the producer end includes counter1 and subtractor 1, and the consumer end includes counter2 and subtractor 2. Counter1 is connected to the producer end and subtractor 1 respectively, and counter1 is also connected to subtractor 2 via multiple triggers D. Counter2 is connected to subtractor 2 and the consumer end respectively, and counter2 is also connected to subtractor 1 via multiple triggers D. Subtractor 1 is also connected to the producer end, and subtractor 2 is also connected to the consumer end. The producer side can write data to the buffer through multiple triggers D; whenever the producer side writes p-num data to the buffer, the producer side transfers p-num to counter1 for accumulation, and transfers the accumulated result 1 to subtractor 2 through multiple triggers D. Subtractor 2 subtracts the accumulated result 1 from the accumulated result 2 in counter2, and transfers the subtraction result to the consumer side; correspondingly, the consumer side can read data from the buffer through multiple triggers D; whenever the consumer side reads c-num data from the buffer, the consumer side transfers c-num to counter2 for accumulation, and transfers the accumulated result 2 to subtractor 1 through multiple triggers D. Subtractor 1 subtracts the accumulated result 2 from the accumulated result 1 in counter1, and transfers the subtraction result to the producer side.

[0068] In another optional embodiment, the first buffered data amount is a first buffer storage amount, and the second buffered data amount is a second buffer storage amount;

[0069] The write counter is further configured to synchronously add a written data amount to the first buffer storage amount each time the data write end performs a data write operation; and to reduce a read data amount in the first buffer storage amount each time the read data amount sent by the data read end is received with delay;

[0070] The read counter is further configured to synchronously reduce the read data amount in the second buffer storage each time the data reading end performs a data read operation; and to accumulate the write data amount to the second buffer storage each time the write data amount sent by the data writing end is received with delay.

[0071] In an embodiment of the present application, the data reading end includes a read counter, and the data writing end includes a write counter, wherein the write counter records the first buffer storage amount, and the read counter records the second buffer storage amount.

[0072] Each time a data writer writes data to a buffer, a write timer performs an accumulation operation, with the granularity of each accumulation being the amount of data written corresponding to each data write operation. Simultaneously, the data writer transmits the amount of data written to the data reader via at least one trigger. Each time a write counter receives the amount of data read from the data reader, the write counter subtracts the amount of data read from the first buffer storage capacity to obtain a new first buffer storage capacity. When the data writer next requests a data write operation, the write counter subtracts the first buffer storage capacity recorded in the write counter from the total buffer storage capacity to obtain a remaining buffer storage capacity, and uses the remaining buffer storage capacity to determine the amount of data to be written next.

[0073] It should be noted that if the remaining buffer storage capacity is 0, the data writing end is prohibited from continuing to perform data writing operations. If the remaining buffer storage capacity is greater than 0, the determined next write data amount must be less than the remaining buffer storage capacity.

[0074] Each time the data reader reads data from the buffer, a read counter performs a decrement operation. The granularity of each decrement operation is the amount of data read corresponding to the data read operation. Simultaneously, the data reader transmits the amount of data read to the data writer via at least one trigger. Each time the read counter receives the amount of data written transmitted by the data writer, the read counter adds the amount of data written to the second buffer storage capacity to obtain a new second buffer storage capacity. The data reader uses the second buffer storage capacity recorded in the read counter to determine the next amount of data to be read when it next requests to perform a data read operation.

[0075] It should be noted that if the second buffer storage capacity is 0, the data reading end is prohibited from continuing to perform data reading operations. If the second buffer storage capacity is greater than 0, the determined next read data capacity must be less than the second buffer storage capacity.

[0076] For example, Figure 5In the design of the second counter behavior, the producer side includes counter1, and the consumer side includes counter2. Counter1 is connected to the producer side and the consumer side respectively. The producer side is further connected to counter2 via multiple triggers D. Counter2 is connected to the producer side and the consumer side respectively. The consumer side is further connected to counter2 via multiple triggers D. The producer side can write data to the buffer via multiple triggers D. Whenever the producer side writes data of p-num to the buffer, the producer side transfers p-num to counter1 for accumulation, and transfers p-num to counter2 via multiple triggers D for accumulation. Whenever the consumer side reads data of c-num from the buffer, the consumer side transfers c-num to counter2 for subtraction, and transfers c-num to counter1 via multiple triggers D for subtraction.

[0077] In another optional embodiment, the first buffered data amount is a first buffer storage amount, and the second buffered data amount is a second buffer storage amount; the write counter includes a first write counter and a second write counter, and the read counter includes a first read counter and a second read counter; and the data reading end further includes a first subtractor;

[0078] The first write counter is configured to synchronously add the amount of written data to the accumulated amount of written data each time the data write end performs a data write operation; and transmit the updated accumulated amount of written data to the first read counter and the first subtractor after being delayed by at least one clock cycle;

[0079] The second write counter is used to synchronously accumulate the amount of written data into the first buffer storage each time the data write end performs a data write operation;

[0080] The first read counter is configured to replace the accumulated amount of written data recorded in the first read counter with the updated accumulated amount of written data;

[0081] The first subtractor is configured to subtract the updated accumulated amount of written data from the accumulated amount of written data recorded in the first read counter to obtain the amount of data written once;

[0082] The second read counter is used to accumulate the amount of data written once into the second buffer storage amount; and when the data reading end performs a data read operation once, the amount of data read once is reduced in the second buffer storage amount;

[0083] The second write counter is further configured to reduce the amount of read data in the first buffer storage when the amount of read data transmitted by the read counter is received with delay.

[0084] In an embodiment of the present application, the data reading end includes two read counters, a first read counter and a second read counter, and a first subtractor, and the data writing end includes two write counters, a first write counter and a second write counter, wherein the first write counter records the accumulated amount of written data; the second write counter records the first buffer storage amount, the first read counter records the last accumulated amount of written data, and the second read counter records the second buffer storage amount.

[0085] Whenever the data writer writes data to the buffer, both the first write counter and the second write counter perform an accumulation operation, with the granularity of each accumulation being the amount of data written per data write operation. Simultaneously, the updated accumulated amount of written data in the first write counter is transmitted to the first read counter and a first subtractor via at least one trigger. The first read counter compares the updated accumulated amount of written data with its own recorded accumulated amount of written data. If the updated accumulated amount of written data differs from the accumulated amount of written data recorded by itself, the first read counter replaces the content recorded by the first read counter with the updated accumulated amount of written data. The first subtractor subtracts the updated accumulated amount of written data from the accumulated amount of written data recorded by the first read counter to obtain the amount of written data, which is then accumulated into the second buffer storage amount in the second read counter. The data reader, when requesting to perform a data read operation next time, uses the second buffer storage amount recorded in the read counter to determine the amount of data to be read next time.

[0086] It should be noted that if the second buffer storage capacity is 0, the data reading end is prohibited from continuing to perform data reading operations. If the second buffer storage capacity is greater than 0, the determined next read data capacity must be less than the second buffer storage capacity.

[0087] Each time the data reader reads data from the buffer, the second read counter performs a decrement operation. The granularity of each decrement operation is the amount of data read corresponding to the data read operation. Simultaneously, the data reader transmits the amount of data read to the second write counter via at least one trigger. Each time the second write counter receives the amount of data read transmitted by the data reader, the second write counter subtracts the amount of data written from the first buffer storage capacity. When the data writer requests to perform a next data write operation, the writer subtracts the total buffer storage capacity from the first buffer storage capacity recorded in the write counter to obtain a remaining buffer storage capacity. The remaining buffer storage capacity is then used to determine the amount of data to be written next time.

[0088] It should be noted that if the remaining buffer storage capacity is 0, the data writing end is prohibited from continuing to perform data writing operations. If the remaining buffer storage capacity is greater than 0, the determined next write data amount must be less than the remaining buffer storage capacity.

[0089] For example, Figure 6 This is a design scheme for the third counter behavior. The producer end includes counter1 and counter4, and the consumer end includes counter2, counter3 and subtractor 1. Among them, counter1 is connected to the producer end, and is also connected to counter2 and subtractor 1 respectively through multiple triggers D. Subtractor 1 is also connected to counter2 and counter3 respectively. Counter3 is also connected to the consumer end. Counter3 is also connected to counter4 respectively through multiple triggers D. Counter4 is also connected to the producer end. Whenever the producer side writes data of p-num into the buffer, the producer side transfers p-num to counter1 and counter4 for accumulation. The accumulation result 1 in counter1 is also transferred to counter2 and subtractor 1 through multiple triggers D. When counter2 determines that the accumulation result 1 is different from the accumulation result 2 recorded by itself, it updates its own record to the accumulation result 1. The subtractor subtracts the accumulation result 2 from the accumulation result 1 to obtain p-num, and counter3 accumulates p-num into the second buffer storage capacity; whenever the consumer side reads data of c-num from the buffer, the consumer side transfers c-num to counter3 for subtraction operation, and transfers c-num to counter4 through multiple triggers D for subtraction operation.

[0090] based on Figure 6For example, in the initial stage, the initial values ​​of the four counters are all 0. Assuming the buffer capacity is 100 data, the producer end writes 20 data into the buffer. The producer end will synchronously update counter1 and counter4 to 20. Next, the accumulated value of counter1 will be transmitted to the input of counter2 through multiple triggers D. At this time, because the transmitted value of counter1 is different from the current value of counter2, counter2 updates the data of counter1. At the same time, subtractor 1 subtracts the current value of counter2 (0) from the transmitted value of counter1 (20), resulting in 20. This value is then sent to counter3 for accumulation.

[0091] Whenever the value of counter1 is different from the value of counter2, it means that the producer has new data in the buffer. The value in counter3 indicates the amount of data that can be consumed in the buffer for the consumer. The value in counter3 is synchronously fed back to the consumer to inform the consumer of the amount of data in the buffer that can be consumed. The consumer decides whether to read the data in the buffer based on this status. If the consumer decides to read the data in the buffer at this time, it needs to inform the amount of data to be consumed this time, c_num, while reading the buffer data, and synchronize c_num to counter3. Counter3 needs to subtract the value of c_num as the new value. At the same time, the generated c_num signal is transmitted to the input end of counter4 through multiple triggers D. After obtaining the c_num value, counter4 subtracts the current value in counter4 from c_num. The difference represents the amount of data stored in the current buffer for the producer side. The value of counter4 will be synchronously fed back to the producer side. The producer side calculates the remaining storage capacity in the current buffer and decides whether to continue writing data to the buffer based on the remaining storage capacity.

[0092] Next, we analyze an extreme case. For example, the maximum data capacity of the buffer is 100. At the first moment, the producer writes 100 data to the buffer. At the same time, the values ​​of counter1 and counter4 are updated to 100. Counter4 synchronously feeds back to the producer that the current buffer is full and no more data can be written. Therefore, the data write on the producer side is back-pressured. When the value 100 in counter1 is propagated to the consumer side, counter2 is updated to 100 and counter3 is updated to 100. At this time, the consumer side can consume the data or choose to wait. If it chooses to wait, it means that c_num is always 0. Then, after c_num is propagated to the producer side, the data in counter4 remains unchanged and remains at 100, and the producer side cannot write. If the consumer chooses to consume 20 data at this time, then c_num will indicate the amount of data consumed this time, 20, and c_num will be fed back to counter4. After subtraction, the data in counter4 becomes 80, indicating that the current amount of data in the buffer is 80, and there is 20 remaining storage capacity for the producer to generate and write new data to the buffer.

[0093] Another extreme case is when the consumer consumes all the data in the buffer at once. For example, the current counter3 = 50, indicating that there are 50 data items available for consumption in the buffer. At this time, the consumer consumes 50 data items at once, c_num = 50, and then counter3 must be quickly updated to 50-50=0. In this way, the consumer can promptly know that the data in the buffer has been consumed and can no longer read data. Until the producer writes data to the buffer again, counter3 will be updated to a non-zero value, which means that the consumer can issue a data read request again.

[0094] The above analysis shows that counter4 on the producer side increases quickly but decreases slowly. This is because each time the producer writes data to the buffer, counter4 is immediately incremented. However, subtraction operations require several clock cycles for the consumer to pass c_num to counter4. This serves to inform the producer in advance whether the buffer will be full after the data is written. On the consumer side, counter3 is an accumulator that increments slowly but decrements quickly. After each data consumption, counter3 is immediately decremented, providing a forewarning to the consumer whether the buffer will be empty. However, addition operations on counter3 require several clock cycles for the value of counter1 to be transmitted from the producer before being sent to the consumer. Therefore, the producer can be informed in advance of write overflows and the consumer can be informed in advance of read overflows.

[0095] It can be understood that the present application is equipped with counters near the data writing end and the data reading end, which can timely synchronize the data writing operation of the data writing end and the data reading operation of the data reading end. When a subsequent request is made to perform a data writing operation and / or a data reading operation, the data status in the buffer can be determined in time based on the counters of the data writing end and the data reading end, thereby avoiding the problem of data reading and writing overflow.

[0096] Based on the data processing device proposed in the above embodiment, the embodiment of the present application also proposes a data processing method, such as Figure 7 As shown, the method may include:

[0097] S101. When the data writing end requests to perform a data writing operation, the data writing end determines the amount of data written this time based on the first buffered data amount recorded in the write counter; and when the data writing end sends the amount of data written this time to the buffer unit, the first buffered data amount recorded in the write counter is synchronously updated using the amount of data written this time.

[0098] In an embodiment of the present application, when the data writing end requests to perform a data writing operation, if the data writing end determines that the value of the amount of data written this time is not greater than zero, the data writing end is prohibited from performing the data writing operation.

[0099] In the example of the present application, when the data writing end delays in receiving the read data amount transmitted by the data reading end, the data writing end uses the read data amount to update the first buffered data amount recorded in the write counter; or, when the data writing end delays in receiving the second buffered data amount transmitted by the data reading end, the data writing end records the second buffered data amount; and when the data writing end requests to perform a data write operation, the data writing end determines the write data amount based on the first buffered data amount and the second buffered data amount recorded in the write counter.

[0100] S102. When the data reading end requests to perform a data reading operation, the data reading end determines the current read data amount based on the second buffered data amount recorded in the read counter; when the data reading end reads the current read data amount from the buffer unit, the current read data amount is used to synchronously update the second buffered data amount recorded in the read counter.

[0101] In an embodiment of the present application, when the data reading end requests to perform a data reading operation, if the data reading end determines that the value of the data amount to be read this time is not greater than zero, the data reading end is prohibited from performing the data reading operation.

[0102] In an embodiment of the present application, when the data reading end delays receiving the amount of write data transmitted by the data writing end, the data reading end uses the amount of write data to update the second buffered data amount recorded in the read counter; or, when the data reading end delays receiving the first buffered data amount transmitted by the data writing end, the data reading end records the first buffered data amount; and when the data reading end requests to perform a data read operation, the data reading end determines the amount of read data based on the second buffered data amount and the first buffered data amount recorded in the read counter.

[0103] It can be understood that the present application is equipped with counters near the data writing end and the data reading end, which can timely synchronize the data writing operation of the data writing end and the data reading operation of the data reading end. When a subsequent request is made to perform a data writing operation and / or a data reading operation, the data status in the buffer can be determined in time based on the counters of the data writing end and the data reading end, thereby avoiding the problem of data reading and writing overflow.

[0104] Based on the above embodiment, the present application also proposes a cache device 2, such as Figure 8 As shown, the cache device 2 includes: a buffer unit 20, a data writing terminal 10 and a data reading terminal 11; the data writing terminal 10 is connected to the input terminal of the buffer unit 20, and the data reading terminal 11 is connected to the output terminal of the buffer unit 20;

[0105] The data writing end 10 is used to write data into the buffer unit;

[0106] The data reading end 11 is used to read data from the buffer unit.

[0107] Based on the above embodiments, the present application also proposes a neural network processor 3, such as Figure 9 As shown, the neural network processor 3 includes: a computing unit 30 for performing neural network calculations and a cache device 2;

[0108] The computing unit 30 is used to perform neural network calculations;

[0109] The cache device 2 is used to buffer input data and / or output data of the computing unit.

[0110] An embodiment of the present application provides a storage medium on which a computer program is stored. The computer-readable storage medium stores one or more programs. The one or more programs can be executed by one or more data processing devices. The computer program implements the data processing method as described above.

[0111] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0112] Through the description of the above embodiments, those skilled in the art can clearly understand that the above embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better embodiment. Based on this understanding, the technical solution of the present disclosure, or the part that contributes to the relevant technology, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling an image display device (which can be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of the present disclosure.

[0113] The above description is merely a preferred embodiment of the present application and is not intended to limit the scope of protection of the present application.

Claims

1. A data processing device, characterized in that: The device comprises: a data writing end and a data reading end; the data writing end is provided with a writing counter, and the data reading end is provided with a reading counter; wherein, The write counter is configured to synchronously update a first buffered data amount using a write data amount corresponding to each data write operation performed by the data write end, and transmit the first buffered data amount or the write data amount to the data read end after a delay of at least one clock cycle; so that the data write end can determine a next write data amount based on the first buffered data amount recorded in the write counter when it requests to perform a data write operation next time; The read counter is used to synchronously update the second buffered data amount using the read data amount corresponding to the data read operation each time the data read end performs a data read operation, and transmit the second buffered data amount or the read data amount to the data write end after at least one clock cycle delay; so that the data read end can determine the next read data amount based on the second buffered data amount recorded in the read counter when it requests to perform a data read operation next time.

2. The device according to claim 1, characterized in that The first buffered data amount is the accumulated amount of written data, and the second buffered data amount is the accumulated amount of read data; The write counter is further configured to synchronously add the amount of data written once to the accumulated amount of written data each time the data write end performs a data write operation; and transmit the accumulated amount of written data to the data reading end after a delay of at least one clock cycle; The read counter is used to synchronously add the read data amount to the read data accumulation amount each time the data reading end performs a data reading operation; The accumulated amount of read data is transmitted to the data writing end after being delayed by at least one clock cycle.

3. The device according to claim 1, characterized in that The first buffered data amount is a first buffer storage amount, and the second buffered data amount is a second buffer storage amount; The write counter is further configured to synchronously add a written data amount to the first buffer storage amount each time the data write end performs a data write operation; and to reduce a read data amount in the first buffer storage amount each time the read data amount sent by the data read end is received with delay; The read counter is further configured to synchronously reduce the read data amount in the second buffer storage each time the data reading end performs a data read operation; and to accumulate the write data amount to the second buffer storage each time the write data amount sent by the data writing end is received with delay.

4. The device according to claim 1, characterized in that The first buffered data amount is a first buffer storage amount, and the second buffered data amount is a second buffer storage amount; the write counter includes a first write counter and a second write counter, and the read counter includes a first read counter and a second read counter; the data reading end further includes a first subtractor; The first write counter is used to synchronously add the amount of written data to the accumulated amount of written data each time the data write end performs a data write operation; and transmitting the updated accumulated amount of write data to the first read counter and the first subtractor after at least one clock cycle delay; The second write counter is used to synchronously accumulate the amount of written data into the first buffer storage each time the data write end performs a data write operation; The first read counter is configured to replace the accumulated amount of written data recorded in the first read counter with the updated accumulated amount of written data; The first subtractor is configured to subtract the updated accumulated amount of written data from the accumulated amount of written data recorded in the first read counter to obtain the amount of data written once; The second read counter is used to accumulate the amount of data written once into the second buffer storage amount; When the data reading end performs a data reading operation once, reducing the read data amount in the second buffer storage amount; The second write counter is further configured to reduce the amount of read data in the first buffer storage when the amount of read data transmitted by the read counter is received with delay.

5. The device according to claim 3 or 4, characterized in that The data writing end is configured to, when a data writing operation is requested next time, subtract the first buffer storage capacity recorded in the write counter from the total buffer storage capacity to obtain a remaining buffer storage capacity; and using the remaining buffer storage capacity to determine the amount of data to be written next time; The data reading end is used to determine the next read data amount using the second buffer storage amount recorded in the read counter when a data read operation is requested to be performed next time.

6. The device according to claim 2, characterized in that The data writing end is used to determine the next write data amount according to the accumulated amount of write data recorded in the write counter and the accumulated amount of read data received in a delayed manner when a data write operation is requested next time; The data reading end is used to determine the next read data amount according to the accumulated amount of read data recorded in the read counter and the accumulated amount of delayed received write data when a data read operation is requested next time.

7. The device according to claim 6, characterized in that The data writing end further includes a second subtractor, and the data reading end further includes a third subtractor; The second subtractor is configured to perform a subtraction operation on the accumulated amount of read data received in a delayed manner and the accumulated amount of write data recorded in the write counter to obtain a first buffer storage amount; The data writing end is configured to determine the next data writing amount according to the first buffer storage amount when a data writing operation is requested next time; The third subtractor is configured to perform a subtraction operation on the accumulated amount of delayed received write data and the accumulated amount of read data recorded in the read counter to obtain a second buffer storage amount; The data reading end is used to determine the next data reading amount according to the second buffer storage amount when a data reading operation is requested to be performed next time.

8. A data processing method, characterized in that: Applied to the data processing device according to any one of claims 1 to 7, the method comprises: When the data writing end requests to perform a data writing operation, the data writing end determines the current write data amount according to the first buffered data amount recorded in the write counter; and when the data writing end sends the current write data amount to the buffer unit, the data writing end synchronously updates the first buffered data amount recorded in the write counter using the current write data amount; and transmits the current write data amount or the first buffered data amount to the data reading end after a delay of at least one clock cycle; When the data reading end requests to perform a data reading operation, the data reading end determines the current read data amount based on the second buffered data amount recorded in the read counter; when the data reading end reads the current read data amount from the buffer unit, the current read data amount is used to synchronously update the second buffered data amount recorded in the read counter; and the current read data amount or the second buffered data amount will be transmitted to the data writing end after at least one clock cycle delay.

9. The method according to claim 8, characterized in that The method further comprises: When the data writing end requests to perform a data writing operation, if the data writing end determines that the value of the data amount written this time is not greater than zero, prohibiting the data writing end from performing the data writing operation; In the case where the data reading end requests to perform a data reading operation, if the data reading end determines that the value of the data amount read this time is not greater than zero, the data reading end is prohibited from performing the data reading operation.

10. The method according to claim 8, characterized in that The method further comprises: In a case where the data writing end receives the current read data amount transmitted by the data reading end with delay, the data writing end updates the first buffered data amount recorded in the write counter using the current read data amount; Or, when the data writing end delays receiving the second buffered data amount transmitted by the data reading end, the data writing end records the second buffered data amount; and when the data writing end requests to perform a data writing operation, the data writing end determines the data amount to be written this time based on the first buffered data amount and the second buffered data amount recorded in the write counter.

11. The method according to claim 8, characterized in that The method further comprises: In a case where the data reading end receives the current write data amount transmitted by the data writing end with delay, the data reading end updates the second buffered data amount recorded in the read counter using the current write data amount; Or, when the data reading end delays receiving the first buffered data amount transmitted by the data writing end, the data reading end records the first buffered data amount; and when the data reading end requests to perform a data reading operation, the data reading end determines the data amount read this time based on the second buffered data amount recorded in the read counter and the first buffered data amount.

12. A cache device, characterized in that: The cache device comprises: a buffer unit, a data writing end and a data reading end according to any one of claims 1 to 7; the data writing end is connected to the input end of the buffer unit, and the data reading end is connected to the output end of the buffer unit; The data writing end is used to write data into the buffer unit; The data reading end is used to read data from the buffer unit.

13. A neural network processor, characterized in that: The processor comprises: a computing unit for performing neural network calculations and a cache device as claimed in claim 12.

14. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed, the method according to any one of claims 8 to 11 is implemented.

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