Fan-out filter packaging structure based on flip-chip alignment bonding and manufacturing method thereof

Abstract

The present invention discloses a fan-out filter packaging structure based on flip-chip alignment bonding and a manufacturing method thereof. The packaging structure includes a filter chip and a molding compound layer. Bumps and a surrounding layer are provided above the chip pads of the filter chip. The surface of the surrounding layer and the bumps away from the filter chip are flush and provided with a redistribution layer and a passivation layer. The passivation layer is provided with a first through hole for accommodating the redistribution layer, and the surrounding layer is provided with a second through hole corresponding to the first through hole. The bumps are embedded in the second through holes. One end of the bumps is connected to the chip pads, and the other end of the bumps is connected to the redistribution layer. The molding compound layer covers the sides and the back of the filter chip and the surrounding layer and makes the surface of the molding compound layer flush with the surface of the surrounding layer, and an external connection part is provided on the surface of the redistribution layer away from the filter chip. Alignment can be achieved through the second through holes on the surrounding layer, which can effectively improve the limitations of chip offset, wafer warping, and cavities, and the substrate can be omitted to achieve ultra-thin packaging, with more excellent performance.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor packaging, and particularly to a fan-out filter packaging structure based on flip-chip alignment bonding and a manufacturing method thereof. Background Art

[0002] Filters have the advantages of small size, light weight, low loss, and good frequency selectivity. The filter market has been growing rapidly with the increase in wireless communication frequency bands. Filters are widely used in radio frequency front-end chips, and the core components inside duplexers and multiplexers are also surface acoustic wave filters (SAW). Currently, the main packaging technologies for surface acoustic wave filters are still in the forms of wire bonding ceramic, metal, plastic packaging, surface mounting, and flip-chip soldering. The existing packaging forms and structures of such filters have the following disadvantages:

[0003] 1. The existing packaging has strict requirements for the flatness of the substrate and the sealing cover, which easily causes product reliability failures.

[0004] 2. A series of uncertainties such as the installation accuracy of the device and the influence of the welding angle of the signal wire cause inconsistent device performance and even damage to the filter.

[0005] 3. The existing packaging substrates are relatively large in size and do not meet the current requirements for miniaturization.

[0006] 4. Some of the existing packaging forms are relatively thick and do not meet the requirements of current radio frequency modules.

[0007] Especially for the CSP (Chip Scale Package) packaging technology, the existing technologies first fix the chip on the packaging substrate by means of flip-chip, then attach a layer of encapsulant on the back of the chip, and then use vacuum laminating to press the encapsulant into the cutting channels and around the chip; the overall solution has more substrate layers, complex processes, and a relatively large overall thickness, making it impossible to achieve ultra-thin packaging, and too much encapsulant enters the cavity formed by the packaging, affecting the IDT performance; the above problems restrict the performance and production capacity of SAW filters and need to be solved urgently. Summary of the Invention

[0008] The purpose of the present invention is to overcome the deficiencies existing in the prior art and provide a fan-out filter packaging structure based on flip-chip alignment bonding and a manufacturing method thereof for realizing ultra-thin packaging and improving performance.

[0009] To achieve the above purposes, the technical solution of the present invention is as follows:

[0010] A fan-out filter package structure based on flip-chip alignment bonding, comprising a filter chip and a molding layer. The filter chip includes a resonant region and a non-resonant region outside the resonant region. Chip pads are provided on the non-resonant region. Above the chip pads of the filter chip, bumps and a surrounding layer are provided. The surfaces of the surrounding layer and the bumps away from the filter chip are flush and provided with a redistribution layer and a passivation layer. The passivation layer is provided with a first through hole for accommodating the redistribution layer. The surrounding layer is provided with a second through hole corresponding to the first through hole. The bumps are embedded in the second through holes. One end of the bumps is connected to the chip pads, and the other end of the bumps is connected to the redistribution layer. A cavity is provided between the resonant region of the filter chip and the passivation layer. The molding layer covers the sides and the back of the filter chip and the surrounding layer and makes the surface of the molding layer flush with the surface of the surrounding layer. An external connection part is provided on the surface of the redistribution layer away from the filter chip.

[0011] Preferably, the surrounding layer is provided with a third through hole, and the side wall of the third through hole, the passivation layer and the surface of the filter chip form the cavity.

[0012] Preferably, the external connection part is an output pad or a solder ball, and a strengthening layer covering the periphery of the solder ball is further provided above the passivation layer.

[0013] Preferably, the material of the passivation layer is dry film, glass or glue. The surface of the passivation layer is flush with the surface of the redistribution layer and their thicknesses are both 5 - 50 μm.

[0014] Preferably, the material of the redistribution layer is photoresist, dry film and packaging material. The material of the surrounding layer is photoresist or dry film, and the thickness range of the surrounding layer is 10 - 40 μm.

[0015] Preferably, the material of the bumps is metal posts or solder balls, and the thickness of the bumps is 10 - 60 μm.

[0016] Preferably, the distance between the surface of the filter chip and the surface of the surrounding layer is 10 - 20 μm.

[0017] A manufacturing method of the fan-out filter package structure based on the above flip-chip alignment bonding includes the following steps:

[0018] 1) Provide a filter chip, which includes a resonant region and a non-resonant region outside the resonant region. Chip pads are provided on the non-resonant region, and bumps are provided on the chip pads;

[0019] 2) Provide a carrier wafer, the surface of the carrier wafer is covered with an adhesive layer, a passivation layer and a redistribution layer are fabricated above the adhesive layer, a first through hole for accommodating the redistribution layer is formed on the passivation layer, a surrounding layer is fabricated on the surfaces of the passivation layer and the redistribution layer, and patterning is performed at a position corresponding to the first through hole on the surrounding layer to form a second through hole;

[0020] 3) Bond the bumps of the filter chip to the second through hole of the carrier wafer in alignment to form a cavity above the resonant region;

[0021] 4) Fabricate a molding compound layer above the adhesive layer of the carrier wafer, and the molding compound layer covers the back and side surfaces of the filter chip and the surrounding layer;

[0022] 5) Remove the adhesive layer and the carrier wafer, and fabricate an external connection portion above the exposed redistribution layer.

[0023] Preferably, the step of fabricating the passivation layer and the redistribution layer above the adhesive layer in step 2 specifically includes: fabricating the redistribution layer above the adhesive layer, coating the passivation layer covering the redistribution layer above the adhesive layer, and planarizing the surface of the passivation layer to expose the redistribution layer and make the surfaces of the passivation layer and the redistribution layer flush.

[0024] Preferably, step 2 further includes: performing patterning at a position corresponding to the resonant region of the filter chip on the surrounding layer to form a third through hole, and the third through hole forms the cavity after the filter chip and the carrier wafer are bonded.

[0025] Preferably, the external connection portion is an output pad, and the step of fabricating the external connection portion above the exposed redistribution layer in step 5 specifically includes: fabricating an output pad above the redistribution layer.

[0026] Preferably, the external connection portion is a solder ball, and the step of fabricating the external connection portion above the exposed redistribution layer in step 5 specifically includes: fabricating a solder ball above the redistribution layer and a strengthening layer around the solder ball.

[0027] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0028] (1) The present invention adopts a fan-out package form to first form a redistribution layer on a carrier wafer, then make bumps on the chip pads of the filter chip and flip-chip the cut filter chip onto the redistribution layer for encapsulation. The redistribution layer is formed first and then encapsulated, and finally wafer-level packaging is performed. Compared with the prior art, the substrate is omitted in the structure, and the fan-out package form can reduce the size and thickness of the package, and has good heat dissipation and electrical performance.

[0029] (2) The fan-out filter package structure based on flip-chip alignment bonding of the present invention fabricates the redistribution layer and the enclosure layer first and then encapsulates the filter chip, which can effectively solve the yield loss caused by the lithography alignment of the enclosure layer in the post-process due to the offset and warping of the chip encapsulation.

[0030] (3) The fan-out filter package structure based on flip-chip alignment bonding of the present invention forms a cavity by using bumps and a passivation layer, has excellent anti-molding performance, can be applied to the field of products with large cavity requirements, and greatly improves the limitations of the cavity; and due to the presence of the enclosure layer, it can effectively prevent the encapsulation material from entering the formed cavity and affecting the device performance. Description of the Drawings

[0031] Figure 1 It is a schematic structural diagram of the fan-out filter package structure based on flip-chip alignment bonding of Embodiment 1 of the present invention;

[0032] Figures 2a-2g It is a schematic flow diagram of the manufacturing method of the fan-out filter package structure based on flip-chip alignment bonding of Embodiment 1 of the present invention;

[0033] Figure 3 It is a schematic structural diagram of the fan-out filter package structure based on flip-chip alignment bonding of Embodiment 2 of the present invention. Detailed Embodiments

[0034] The following further explains the present invention in conjunction with the drawings and specific embodiments. The drawings of the present invention are only schematic for easier understanding of the present invention, and their specific proportions can be adjusted according to design requirements. The definitions of the up-down relationship and the front / back of the relative components in the figures described in the text should be understood by those skilled in the art as referring to the relative positions of the components, so they can all be flipped to present the same components, and this should all fall within the scope disclosed in this specification.

[0035] Embodiment 1

[0036] Reference Figure 1, embodiments of the present application propose a fan-out filter packaging structure based on flip-chip alignment bonding, including a filter chip 401 and a molding layer 501. The filter chip 401 includes a resonant region 402 and a non-resonant region outside the resonant region 402. Chip pads 403 are provided on the non-resonant region. Above the chip pads 403 of the filter chip 401, bumps 405 and a surrounding layer 404 are provided. The surrounding layer 404 is arranged around the bumps 405. The material of the surrounding layer 404 is photoresist or dry film. The thickness range of the surrounding layer 404 is 10 - 40um, and the height of the bumps 405 is 10 - 60um. The material of the bumps 405 is metal pillars or solder balls. Therefore, the distance between the surface of the filter chip 401 and the surface of the surrounding layer 404 is 10 - 20um, which can prevent the molding layer from flowing into the chip functional area. The surfaces of the surrounding layer 404 and the bumps 405 away from the filter chip 401 are flush. There is a height difference between the surfaces of the surrounding layer 404 and the bumps 405 close to the filter chip 401 because the height of the bumps 405 is different from the thickness of the surrounding layer 404. A redistribution layer 302 and a passivation layer 301 are provided on the surfaces of the surrounding layer 404 and the bumps 405 away from the filter chip 401. The thicknesses of the passivation layer 301 and the redistribution layer 302 are the same and their upper and lower surfaces are flush. The material of the passivation layer 301 is dry film or glue. The thickness range of the passivation layer 301 is 5 - 50um. The material of the redistribution layer 302 is copper blocks or other conductive metals or compounds, and its thickness is the same as that of the passivation layer 301.

[0037] In a specific embodiment, the passivation layer 301 is provided with a first through hole 304 for accommodating the redistribution layer 302. A second through hole 406 corresponding to the first through hole 304 is provided on the enclosure layer 404. The bump 405 is embedded in the second through hole 406. One end of the bump 405 is connected to the chip pad 403, and the other end of the bump 405 is connected to the redistribution layer 302. Therefore, the electrical connection between the chip pad 403, the bump 405 and the redistribution layer 302 can be realized. A cavity 303 is provided between the resonant region 402 of the filter chip 401 and the passivation layer 301. Specifically, a third through hole is provided on the enclosure layer 404, and the side wall of the third through hole, the passivation layer 301 and the surface of the filter chip 401 form the cavity 303. The bump 405 combined with the enclosure layer 404 can adjust the height of the cavity 303 and can be applied to the field of products requiring a large cavity. The encapsulation layer 501 covers the side and back surfaces of the filter chip 401 and the enclosure layer 404 and makes the surface of the encapsulation layer 501 flush with the surface of the enclosure layer 404. The encapsulation layer 501 forms the encapsulation of the filter chip 401 and can protect the surface of the filter chip 401 from external environmental pollution. In addition, a solder ball 601 is provided above the redistribution layer 302, and a strengthening layer 701 covering the periphery of the solder ball 601 is provided above the passivation layer 301.

[0038] The surface of the carrier wafer is covered with an adhesive layer. A passivation layer and a redistribution layer are fabricated above the adhesive layer. The passivation layer has a first through hole for accommodating the redistribution layer. An enclosure layer is fabricated on the surfaces of the passivation layer and the redistribution layer, and patterning is performed at a position corresponding to the chip pad on the enclosure layer to form a second through hole;

[0039] Reference Figures 2a-2g , corresponding to the above flip-chip alignment bonding-based fan-out filter package structure, an embodiment of the present application also proposes a manufacturing method of a flip-chip alignment bonding-based fan-out filter package structure, including the following steps:

[0040] (1) Reference Figure 2a , provide a filter chip 401. The filter chip 401 includes a resonant region 402 and a non-resonant region outside the resonant region 402. A chip pad 403 is provided on the non-resonant region. Bumps 405 are provided on the chip pads 403 on the filter wafer, and then the filter wafer is diced into individual filter chips 401 with bumps 405.

[0041] (2) Reference Figure 2b and 2cA carrier wafer 101 is provided, the surface of the carrier wafer 101 is covered with an adhesive layer 201 with a thickness of about 100um, the material of the adhesive layer 201 is a thermal foam film, a redistribution layer 302 is provided at a position corresponding to the pad on the adhesive layer 201, a passivation layer 301 with a thickness of 5-50um is made around the redistribution layer 302 above the adhesive layer 201, the passivation layer 301 is first made on the adhesive layer 201 and covers the redistribution layer 302, and the passivation layer 301 is planarized so that the surface of the passivation layer 301 is flush with the surface of the redistribution layer 302. Specifically, the material of the passivation layer 301 is photoresist, dry film and plastic packaging material, and the redistribution layer 302 can be a copper block or other conductive metal or compound.

[0042] (3)Reference Figure 2d , a retaining layer 404 is made on the surface of the passivation layer 301 and the redistribution layer 302, and the retaining layer 404 is patterned to form a second through hole exposing the redistribution layer 302 and a third through hole exposing the resonance region of the filter chip. Specifically, the material of the retaining layer 404 is photoresist or dry film, and the thickness of the retaining layer 404 ranges from 10-40um. The positions of the redistribution layer 302 and the second through hole correspond to the chip pad 403 of the filter chip, and the second through hole formed on the retaining layer 404 can realize the alignment function to avoid the filter chip 401 from being offset when the filter chip 401 is aligned with the carrier wafer 101 or when it is plastic-sealed.

[0043] (4)Reference Figure 2e , the bump 405 of the filter chip 401 is aligned and bonded to the second through hole of the carrier wafer 101, and the third through hole forms a cavity 303 after the filter chip 401 is bonded to the carrier wafer 101. The filter chip 401 and the redistribution layer 302 are electrically interconnected through the bump 405 on the surface of the chip pad 403. The material of the bump 405 can be a solder ball, and the bonding can be performed using reflow soldering technology. The height of the bump 405 after bonding is 10-60um. Of course, the bump 405 can also be made of other bonding materials, and the bonding method can also be selected according to demand. After bonding, the distance between the surface of the filter chip 401 and the surface of the enclosure layer 404 is 10-20um, which can prevent the plastic sealing layer from flowing into the chip functional area.

[0044] (5)Reference Figure 2f A plastic sealing layer 501 is formed by plastic sealing or laminating above the adhesive layer 201 of the carrier wafer 101. The material of the plastic sealing layer 501 is a plastic sealing material or a dry film. The plastic sealing layer 501 covers the back and sides of the filter chip 401 and the surrounding layer 301. The plastic sealing layer 501 enables the filter chip 401 to complete plastic sealing or laminating, and can protect the surface of the filter chip 401 from being polluted by the external environment.

[0045] (6)Reference Figure 2g, the adhesive layer 201 and the carrier wafer 101 are removed. Since the material of the adhesive layer 201 is a thermal foaming film, the adhesive layer 201 is foamed by heating to remove the carrier wafer 101. After removal, the surface of the encapsulation layer 501 is flush with the surface of the enclosure layer 301. After removing the adhesive layer 201 and the carrier wafer 101, the redistribution layer 302 is exposed.

[0046] (7) Refer to Figure 1 , an external connection part is fabricated above the exposed redistribution layer 302. The external connection part is a solder ball 601. Therefore, the solder ball 601 can also be fabricated at any position on the redistribution layer 302 to achieve fan-out packaging. On the back of the filter chip 401, an encapsulation layer 501 about 10 - 50 um thick and a fan-out structure are formed by encapsulation or film lamination to protect the back and edges of the filter chip 401. The single-sided fan-out size is only about 30 - 100 um; the material of the protective layer 701 includes dry film, photoresist or glass. The protective layer 701 covers around the solder ball 601 to play a role in anti-molding and increase the compressive strength above the device.

[0047] Embodiment 2

[0048] The difference between Embodiment 2 and Embodiment 1 of this application lies in: Refer to Figure 3 , the external connection part of Embodiment 2 is a lead pad 801 instead of a solder ball, and the protective layer 701 may not be provided either, thus achieving ultra-thin packaging and meeting different external connection requirements. In step 5, an external connection part is fabricated above the exposed redistribution layer 302, specifically including: fabricating a lead pad 801 above the redistribution layer 302. The rest is the same as Embodiment 1.

[0049] The fan-out filter packaging structure based on flip-chip alignment bonding of the present invention has the advantages of small volume, good radio frequency filtering performance and high reliability. At the same time, it can greatly optimize the production process flow and reduce the product cost.

[0050] The above embodiments are only used to further illustrate a fan-out filter packaging structure based on flip-chip alignment bonding of the present invention and its manufacturing method, but the present invention is not limited to the embodiments. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A fan-out filter package structure based on flip-chip alignment bonding, characterized in that: It includes a filter chip and a plastic package layer. The filter chip includes a resonant region and a non-resonant region outside the resonant region. Chip pads are provided on the non-resonant region. Above the chip pads of the filter chip, bumps and a surrounding layer are provided. The surfaces of the surrounding layer and the bumps away from the filter chip are flush and provided with a redistribution layer and a passivation layer. The passivation layer is provided with a first through hole for accommodating the redistribution layer. The surrounding layer is provided with a second through hole corresponding to the first through hole. The bumps are embedded in the second through holes. One end of the bump is connected to the chip pad, and the other end of the bump is connected to the redistribution layer. A cavity is provided between the resonant region of the filter chip and the passivation layer. The plastic package layer covers the side and back surfaces of the filter chip and the surrounding layer and makes the surface of the plastic package layer flush with the surface of the surrounding layer. An external connection part is provided on the surface of the redistribution layer away from the filter chip. Its manufacturing method includes the following steps: 1) Provide a filter chip, which includes a resonant region and a non-resonant region outside the resonant region. Chip pads are provided on the non-resonant region, and bumps are provided on the chip pads. 2) Provide a carrier wafer. The surface of the carrier wafer is covered with an adhesive layer. A passivation layer and a redistribution layer are fabricated above the adhesive layer. The passivation layer has a first through hole for accommodating the redistribution layer. A surrounding layer is fabricated on the surfaces of the passivation layer and the redistribution layer. Patterning treatment is performed at a position corresponding to the first through hole on the surrounding layer to form a second through hole. 3) Bond the bumps of the filter chip to the second through holes of the carrier wafer in alignment to form a cavity above the resonant region. 4) Fabricate a plastic package layer above the adhesive layer of the carrier wafer. The plastic package layer covers the back and side surfaces of the filter chip and the surrounding layer. 5) Remove the adhesive layer and the carrier wafer, and fabricate an external connection part above the exposed redistribution layer.

2. The fan-out filter package structure based on flip-chip alignment bonding according to claim 1, wherein: The surrounding layer is provided with a third through hole. The side wall of the third through hole, the passivation layer, and the surface of the filter chip form the cavity.

3. The fan-out filter package structure based on flip-chip alignment bonding according to claim 1, characterized in that: The external connection part is an output pad or a solder ball. A strengthening layer covering around the solder ball is further provided above the passivation layer.

4. The fan-out filter package structure based on flip-chip alignment bonding according to claim 1, wherein: The material of the passivation layer is dry film, glass, or glue. The surfaces of the passivation layer and the redistribution layer are flush and their thicknesses are both 5 - 50 μm.

5. The fan-out filter package structure based on flip-chip alignment bonding according to claim 1, wherein: The material of the redistribution layer is photoresist, dry film, and plastic package material. The material of the surrounding layer is photoresist or dry film. The thickness range of the surrounding layer is 10 - 40 μm.

6. The fan-out filter packaging structure based on flip-chip alignment bonding according to claim 1, wherein: The material of the bump is a metal column or a solder ball. The thickness of the bump is 10 - 60 μm.

7. The fan-out filter package structure based on flip-chip alignment bonding according to claim 1, characterized in that: The distance between the surface of the filter chip and the surface of the surrounding layer is 10 - 20 μm.

8. The fan-out filter packaging structure based on flip-chip alignment bonding according to claim 1, wherein: The specific steps of fabricating a passivation layer and a redistribution layer above the bonding layer in step 2 include: fabricating the redistribution layer above the bonding layer, coating the passivation layer covering the redistribution layer above the bonding layer, and planarizing the surface of the passivation layer to expose the redistribution layer and make the surface of the passivation layer flush with that of the redistribution layer.

9. The fan-out filter package structure based on flip-chip alignment bonding according to claim 1, wherein: Step 2 further includes: performing patterning on the enclosure layer at a position corresponding to the resonant region of the filter chip to form a third via hole, and the third via hole forms the cavity after the filter chip is bonded to the carrier wafer.

10. The fan-out filter package structure based on flip-chip alignment bonding according to claim 1, wherein: The external connection part is an extraction pad. The specific steps of fabricating the external connection part above the exposed redistribution layer in step 5 include: fabricating an extraction pad above the redistribution layer.

11. The fan-out filter package structure based on flip-chip alignment bonding according to claim 1, wherein: The external connection part is a solder ball. The specific steps of fabricating the external connection part above the exposed redistribution layer in step 5 include: fabricating a solder ball above the redistribution layer and a strengthening layer around the solder ball.

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