Sensor system and method for detecting a fault in a sensor system

Abstract

Provided are a sensor system capable of detecting a failure of a DA converter and a method for detecting a failure of the sensor system. The sensor system includes: a sensor element to which a control current is input; a DA converter that outputs the control current; and a control unit that generates a control current indication value and inputs the same to the DAC, and further includes: an indication value generation unit that sequentially generates, at a generation period, an inspection current indication value that replaces the control current indication value input to the DAC; an inspection current detection unit that detects an inspection current value of the inspection current; an estimated value calculation unit that calculates an estimated value of the inspection current value, i.e., an inspection current estimated value; a difference acquisition unit that acquires a difference between the inspection current value and the inspection current estimated value; and a failure detection unit that detects bits belonging to a lower order bit group in the DA converter by performing frequency analysis on the change in the difference over time.

Description

Technical Field

[0001] The present invention relates to a sensor system and a method for detecting a failure of the sensor system. The sensor system includes a sensor element, a DA (digital-to-analog) converter that outputs a control current to the sensor element, and a control unit that generates a control current indication value corresponding to the magnitude of the control current and inputs the control current indication value to the DA converter. Background Art

[0002] Conventionally, there are known an air-fuel ratio sensor system mounted on a vehicle or the like for detecting the oxygen concentration in exhaust gas to detect the air-fuel ratio of an internal combustion engine, a NOx sensor system for detecting the NOx gas concentration in exhaust gas, and the like.

[0003] Conventionally, there are known an air-fuel ratio sensor system mounted on a vehicle or the like, which uses a gas sensor element having two units, an oxygen pump unit and an oxygen concentration detection unit, for detecting the oxygen concentration in exhaust gas to detect the air-fuel ratio of an internal combustion engine, a NOx sensor system that uses a gas sensor element having the above two units and a unit for detecting the NOx gas concentration, and the like.

[0004] In such a sensor system, there is a type of sensor system in which, in order to simplify processing, control that was previously performed using an analog circuit is digitized. A control current indication value is generated by a control unit, and a control current is formed by a current DA converter and input to the sensor element. For example, as an example of such a sensor system, the gas sensor system described in Patent Document 1 can be cited. Further, in such a sensor system, when it is desired to know the magnitude of the control current input from the current DA converter to the sensor element, instead of measuring the actually flowing control current, the control current indication value as a digital value is regarded as the magnitude of the control current and used. For example, the control current indication value is sent to an ECU or the like as the magnitude of the control current. This is because the magnitude of the control current output from the current DA converter (hereinafter, also simply referred to as DA converter or DAC) corresponds to the control current indication value input to the DAC.

[0005] Here, the current digital-to-analog converter (DAC) is a DAC of the following type: it outputs a current value corresponding to the value of a binary number with a specified number of bits (binary code: for example, a 14-bit signed integer) input thereto. Further, regarding the output stage of the DAC, a number of current sources weighted according to bits and switching elements (FETs, transistors, etc.) corresponding to the resolution (bit depth, number of bits) of the DAC are connected in parallel. Thus, for example, in the case of a 12-bit unsigned integer DAC (resolution 12 bits), 12 (12 groups) of switching elements are provided in parallel in the output stage, but in the case of a 14-bit signed integer (1-bit sign + 13-bit mantissa part) DAC (resolution 13 bits), 13 pairs (13 groups) of switching elements and a positive current source and a negative current source for the switching elements are provided in parallel in the output stage.

[0006] Prior Art Documents

[0007] Patent Documents

[0008] Patent Document 1: Japanese Patent Application Laid-Open No. 2016-70882 Summary of the Invention

[0009] Problems to be Solved by the Invention

[0010] Further, sometimes a malfunction may occur in one of the switching elements constituting the output stage of the DAC. Specifically, sometimes an abnormal condition may occur in which one of the switching elements corresponding to each bit in the output stage is always turned on (hereinafter, also referred to as "on-fault"), or an abnormal condition in which it is always turned off (hereinafter, also referred to as "off-fault"). In this case, the control current output from the DAC becomes an abnormal value corresponding to the magnitude corresponding to the bit (digit) corresponding to the malfunctioning switching element. For example, a 4-bit unsigned integer DAC will be used for explanation.

[0011] For example, when control current indication values are input to the DAC in the order of (0000), (0010), and (1110), when the DAC has no faults, the magnitude of the output control current is the magnitude corresponding to the values of "0, 2, 14". However, for example, when the switching element corresponding to the 3rd bit (counting from the least significant bit. Hereinafter, the nth bit shall refer to the nth bit counted from the least significant bit) is in a "closed fault" state, the DAC operates as if control current indication values are input in the order of (0100), (0110), and (1110), that is, it outputs a control current with a magnitude corresponding to the values of "4, 6, 14". In addition, when a code with the faulty 3rd bit being "1" (e.g., the above (1110)) is input, it seems that the correct control current is output. On the contrary, for example, when the switching element corresponding to the 3rd bit is in an "open fault" state, contrary to the above "closed fault", the DAC operates as if control current indication values are input in the order of (0000), (0010), and (1010). That is, it outputs a control current with a magnitude corresponding to the values of "0, 2, 10".

[0012] However, in the sensor system described in Patent Document 1, even when a fault occurs in one of the switching elements constituting the output stage of the DAC (hereinafter, closed faults and open faults are collectively referred to as "bit faults"), the fault cannot be detected. This is because: the control current indication values input to the DAC and sent to the ECU etc. are normal values regardless of whether the DAC has faults or not.

[0013] The present invention has been completed in view of this problem, and provides a sensor system capable of detecting faults in a DA converter and a method for detecting faults in the sensor system. The sensor system includes a sensor element, a DA converter that outputs a control current to the sensor element, and a control unit that generates a control current indication value and inputs it to the DA converter.

[0014] Means for Solving the Problem

[0015] One aspect of the present invention is a sensor system including: a sensor element to which a control current is input; a DA converter that outputs the control current to the sensor element; and a control unit that generates a control current indication value corresponding to the magnitude of the control current and inputs the control current indication value to the DA converter. The sensor system further includes: an indication value generation unit that generates an inspection current indication value to be input to the DA converter, and sequentially generates the inspection current indication values that change by 1 LSB (Least Significant Bit) in magnitude from the initially generated first inspection current indication value to the finally generated last inspection current indication value at a predetermined generation period; an inspection current detection unit that detects an inspection current value of the inspection current output from the DA converter to which the inspection current indication value is input; an estimated value calculation unit that calculates an inspection current estimated value, which is an estimated value of the inspection current value that is estimated to be detected by the inspection current detection unit because the inspection current indication value is input to the DA converter; a difference acquisition unit that, corresponding to the same inspection current indication value, acquires the difference between the detected inspection current value and the calculated inspection current estimated value; and a failure detection unit that detects a failure of a bit of the DA converter by performing frequency analysis on the change over time of the sequentially obtained differences.

[0016] In addition, another aspect is a method for detecting a failure of a sensor system, the sensor system including: a sensor element to which a control current is input; a DA converter that outputs the control current to the sensor element; and a control unit that generates a control current indication value corresponding to the magnitude of the control current and inputs the control current indication value to the DA converter. The method for detecting a failure of the sensor system includes the following steps: an indication value generation step of sequentially generating inspection current indication values that change by 1 LSB in magnitude from the initially generated first inspection current indication value to the finally generated last inspection current indication value at a predetermined generation period; an input step of sequentially inputting the inspection current indication values to the DA converter; an inspection current detection step of detecting an inspection current value of the inspection current output from the DA converter; an estimated value calculation step of calculating an inspection current estimated value, which is an estimated value of the inspection current value that is estimated to be detected in the inspection current detection step because the inspection current indication value is input to the DA converter; a difference acquisition step of, corresponding to the same inspection current indication value, acquiring the difference between the detected inspection current value and the calculated inspection current estimated value; and a failure detection step of detecting a failure of a bit of the DA converter by performing frequency analysis on the change over time of the sequentially obtained differences.

[0017] In the above-described sensor system and the method for detecting a failure of the sensor system, instead of the control current indication value, the check current indication values generated in the indication value generation unit at each generation cycle in increments of 1 LSB are sequentially input to the DA converter that normally receives the control current indication value from the control unit, and the DA converter outputs a check current corresponding to the check current indication value. However, the case where the check current indication value is equal to the control current indication value is also allowed. Then, the value of the actually flowing check current is detected in the check current detection unit. On the other hand, in the predicted value calculation unit, a check current predicted value that is predicted to be detected by the check current detection unit is calculated. And, in the difference acquisition unit, the difference between the check current value and the check current predicted value is acquired.

[0018] When the DAC is normal, there is no difference between the check current value and the predicted check current value, and the difference is 0 (in an ideal case where noise can be ignored), or a small value within the measurement error near 0. This is the same when the check current indication values in increments of 1 LSB are sequentially input to the DAC at each generation cycle. That is, even as time passes, the difference remains 0 or a small value within the measurement error near 0. In addition, hereinafter, 0 or a small value within the measurement error near 0 is expressed as "0±", for example, expressed as "the difference is 0±", etc.

[0019] However, sometimes the switching element for turning on / off the current source of a certain bit constituting the DAC is in a "bit failure". That is, in the case where the DAC is, for example, an unsigned positive current DA converter, sometimes the switching elements of the positive current sources constituting each bit are in a bit failure. In addition, in the case where the DAC is a signed DA converter, sometimes the switching elements on the positive current source side or the negative current source side of each bit are in a bit failure.

[0020] In these cases, when the check current indication values in increments of 1 LSB are sequentially input to the DAC at each generation cycle, the timings at which the bit in a bit failure (hereinafter, this bit is also referred to as "faulty bit") changes "from 1 to 0" and "from 0 to 1" occur periodically. Therefore, when the difference between the check current value and the predicted check current value is obtained and the change of this difference over time is observed, the period during which the difference takes 0± and the period during which the difference takes a specified value alternate periodically. That is, a square wave pulse with a specified period can be obtained. Therefore, if the fundamental frequency (or fundamental period) of the square wave pulse is obtained by frequency analysis of the square wave pulse, it is possible to detect which bit is in a bit failure based on this fundamental frequency. In this way, a sensor system capable of detecting the presence or absence of a bit failure in the DAC, determining the faulty bit, etc., and a method for detecting a failure of the sensor system capable of appropriately detecting a failure are achieved.

[0021] In addition, in the case of having multiple fault bits, the shape of the square wave pulse obtained by using the change of the difference over time becomes complex. In this case, it is sometimes possible to study each frequency component contained in the square wave pulse through this frequency analysis, thereby detecting multiple fault bits.

[0022] In addition, if the positive or negative of the difference is determined, it is also possible to determine whether the fault bit is an "on fault" or an "off fault".

[0023] Here, generating in order "check current indication values that change by the size of 1 LSB each time from the initially generated starting check current indication value to the finally generated final check current indication value" means, for example: when the DAC is a signed 12-bit DA converter, and the highest-order bit (MSB) is set as the sign bit, and the resolution (bit depth) is 11 bits, for example, in a manner of increasing by the size of 1 LSB each time from (000000001000) to (000011111111), generate check current indication values in the order of (000000001000), (000000001001), (000000001010), …, (000011111111). In this case, the "starting check current indication value" is (000000001000), and the "final check current indication value" is (000011111111).

[0024] In addition, if in the indication value generation unit, a sequence of "check current indication values that change by the size of 1 LSB each time from the starting check current indication value to the final check current indication value" suitable for detecting whether a specific bit or a bit within a specific range is faulty is generated according to the bit to be detected for faults (for example, the 3rd bit) or the range of bits (for example, the range from the 1st bit to the 4th bit), the check time can be shortened, which is thus preferable.

[0025] In addition, FFT (Fast Fourier Transform) analysis can be adopted as a method for frequency analysis of the change of the difference over time in the fault detection unit.

[0026] In addition, as a sequence of "check current indication values that change by 1 LSB each time in order", it is possible to set the period of one clock as the generation period, like (000000000000), (000000000001), (000000000010), …, (111111111111), and generate check current indication values that change (increase or decrease) by 1 LSB each clock. Alternatively, it can also be like (000000000000), (000000000000), (000000000000), (000000000001), (000000000001), (000000000001), (000000000010), …, and use a sequence of check current indication values that change (increase or decrease) by 1 LSB every multiple clocks (in the above case, every 3 clocks). In this case, the period of 3 clocks corresponds to the generation period.

[0027] Moreover, in the check current detection unit, in order to detect the check current value of the check current, preferably, an AD (analog-to-digital) converter is used to read the voltage generated in a current conversion resistor with a known resistance value through which the check current flows, so as to obtain the check current value.

[0028] In addition, all bits of the check current indication value input to the DAC (in the case of using signed integers, all bits except the sign bit (the highest bit)) are divided into a low-order bit group close to the least significant bit (LSB) and a high-order bit group close to the most significant bit (for example, all 13 bits except the sign bit are divided into a group of bits from the 1st bit to the 7th bit and a group of bits from the 8th bit to the 13th bit). Then, preferably, for the bits belonging to the low-order bit group among them (for example, the bits belonging to the group of bits from the 1st bit to the 7th bit in the above example), this technology is used for fault detection.

[0029] That is, the above sensor system is preferably configured such that the bit for which the fault detection unit detects a fault is the bit belonging to the low-order bit group in the DA converter.

[0030] Alternatively, the fault detection method of the above sensor system is preferably configured such that the bit for which a fault is detected through the fault detection step is the bit belonging to the low-order bit group in the DA converter.

[0031] When the switching element of the bit belonging to the low-order bit group in the DAC is in a bit fault, the difference between the current value that should have been obtained and the actually obtained current value is small, so it is easily affected by noise during fault detection. Therefore, sometimes it is difficult to reliably determine the presence or absence of a bit fault (on-fault or off-fault) only by detecting the difference between the current value that should have been obtained and the actually obtained current value one or two times.

[0032] In contrast, according to the present technology, if a failure of a bit belonging to the lower-order bit group is detected, the frequency can be detected by frequency analysis. Therefore, frequency analysis can be performed after obtaining the difference between the originally expected current value and the actually obtained current value a considerable number of times, and the influence of noise can be suppressed, thereby appropriately detecting the presence or absence of a failure.

[0033] In addition, it is preferable to apply the present technology to detect the presence or absence of a bit failure in the bits belonging to the lower-order bit group, particularly in the first bit (the lowest-order bit) or the second bit where the difference between the originally expected current value and the actually obtained current value becomes small and is easily affected by noise.

[0034] Moreover, it is preferable that any one of the aforementioned sensor systems is configured as follows: the sensor element has a sensor output terminal that generates a sensor voltage, the sensor system further includes an AD converter that sequentially converts the sensor voltage generated by the sensor output terminal into a sensor voltage value, the control unit has a PID (Proportional Integral Derivative) operation unit that generates the control current indication value by using the sensor voltage value, the indication value generation unit has: an input unit that inputs a pre-determined input constant value instead of the sensor voltage value into the PID operation unit of the control unit; and an inspection coefficient setting unit that determines the coefficient Pc of the P term and the coefficient Dc of the D term in the PID operation in the PID operation unit to be 0, and determines the coefficient Ic of the I term to be the magnitude of the inspection current indication value that can be output from the PID operation unit and changes by 1 LSB each time in sequence.

[0035] Alternatively, it is preferable that the failure detection method of any one of the aforementioned sensor systems is configured as follows: in the sensor system, the sensor element has a sensor output terminal that generates a sensor voltage, the sensor system further includes an AD converter that sequentially converts the sensor voltage generated by the sensor output terminal into a sensor voltage value, the control unit has a PID operation unit that generates the control current indication value by using the sensor voltage value. In the indication value generation step, a pre-determined input constant value is input into the PID operation unit of the control unit instead of the sensor voltage value, and the coefficient Pc of the P term and the coefficient Dc of the D term in the PID operation are determined to be 0, and the coefficient Ic of the I term is determined to be the magnitude of the inspection current indication value that can be output from the PID operation unit and changes by 1 LSB each time in sequence, and the PID operation unit sequentially generates the inspection current indication value.

[0036] In these sensor systems and methods for detecting faults in sensor systems, in order to control the sensors, a PID operation is performed in the PID operation unit of the control unit using the sensor voltage value to generate a control current indication value. In addition, in the indication value generation unit, a check current indication value is generated in the PID operation unit by inputting a predetermined input constant value instead of the sensor voltage value, changing each coefficient Pc, etc. Therefore, it is not necessary to provide a circuit or the like for independently generating the check current indication value Chcmd in the operation in the PID operation unit 4C2, and a check current indication value that changes by 1 LSB in size each time in sequence can be easily obtained.

[0037] Furthermore, the method for detecting faults in the sensor system 1 described above is preferably set to: execute the method for detecting faults in the sensor system 1 during the stop period of the internal combustion engine ENG equipped with the sensor system 1.

[0038] In the present technology, the above-described method for detecting faults is executed during the stop period of the internal combustion engine equipped with the sensor system, rather than during the operation period of the internal combustion engine equipped with the sensor system (for example, during the driving period of a vehicle equipped with an internal combustion engine). Therefore, it is possible to detect faults in the sensor system without affecting the operation of the internal combustion engine. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 It is an explanatory diagram showing the overall structure in the case where the gas sensor system according to the embodiment is used for controlling an internal combustion engine of a vehicle.

[0040] Figure 2 It is an explanatory diagram showing the schematic structure of the gas sensor system according to the embodiment.

[0041] Figure 3 It is an explanatory diagram showing the schematic structure of the sensor element unit in the gas detection unit of the gas sensor system according to the embodiment.

[0042] Figure 4 It is a flowchart showing the processing flow of detecting faults in the DAC according to the embodiment.

[0043] Figure 5 It is a graph showing the relationship between the indicated pump current Ip and check current Ich and the actually obtained pump current Ip and check current Ich in the gas sensor system according to the embodiment, in the case where the DAC is normal and there is a short circuit fault or an open circuit fault on the positive current source side of the first bit in the output stage.

[0044] Figure 6 It is shown in Figure 5 The graph showing the change over time of the difference obtained in the case of. DETAILED DESCRIPTION OF THE EMBODIMENT

[0045] (Embodiment)

[0046] Next, embodiments of the present invention will be described with reference to the accompanying drawings. Figure 1 FIG. 1 is a diagram showing the overall structure in the case where the gas sensor system 1 according to the present embodiment is used for controlling an internal combustion engine of a vehicle. In addition, Figure 2 FIG. 2 is a diagram showing a schematic structure of the gas sensor system 1.

[0047] The gas sensor system 1 includes: a gas detection unit 3 installed in an exhaust pipe EP of an engine ENG of a vehicle (not shown); and an ECU 2 connected to the gas detection unit 3 via wirings L1 to L5, including a sensor control circuit unit 4 for controlling the gas detection unit 3, and having a built-in CPU 5. The ECU 2 performs electronic control of the vehicle and the engine ENG. The ECU 2 (CPU 5) is connected to a CAN bus CB of the vehicle via a connection bus 2B, and can transmit and receive data with other ECUs, various sensors, and actuators.

[0048] Among them, the gas detection unit 3 and the sensor control circuit unit 4 are air-fuel ratio sensors (full-range air-fuel ratio sensors) that linearly detect the oxygen concentration (air-fuel ratio) in exhaust gas EG (measured gas) and are used for air-fuel ratio feedback control in an internal combustion engine.

[0049] Among them, as will be described later, the sensor control circuit unit 4 housed in the ECU 2 and the CPU 5 also housed in the ECU 2 transmit and receive data such as a control current indication value Ipcmd and an inspection current indication value Chcmd(n) representing the oxygen concentration (air-fuel ratio) via a connection wiring 6 that connects a terminal 4T6 of the sensor control circuit unit 4 to a digital input terminal 5D of the CPU 5.

[0050] The sensor control circuit unit 4 is composed of an ASIC (Application Specific IC), and includes a control unit 4C for controlling a sensor element unit 3S provided in the gas detection unit 3 to detect the oxygen concentration (air-fuel ratio) and the like, a DA converter 42, a reference potential generation circuit 43, a second AD converter 44, a micro current supply circuit 45, and a heater unit control circuit 49 for controlling a heater unit 30 provided in the gas detection unit 3.

[0051] First, the structure of the gas detection unit 3 will be described. Figure 3 FIG. 3 is an explanatory diagram showing a schematic structure of the gas detection unit 3. The gas detection unit 3 is a laminate obtained by laminating an oxygen pump unit 14, a porous layer 18, and an oxygen concentration detection unit 24 in this order. And on one side of the sensor element unit 3 ( Figure 3Below (in the middle) is also stacked with a heater unit 30.

[0052] The oxygen pump unit 14 is based on an electrolyte layer 14c including a solid electrolyte body having oxygen ion conductivity, and a pair of electrodes 12 and 16 are formed on both sides of the electrolyte layer 14c. Similarly, the oxygen concentration detection unit 24 is also based on an electrolyte layer 24c including a solid electrolyte body having oxygen ion conductivity, and a pair of electrodes 22 and 28 (porous electrodes) are formed on both sides of the electrolyte layer 24c.

[0053] A porous layer 18 is sandwiched between the electrolyte layer 14c and the electrolyte layer 24c. Inside in the extending direction of the porous layer 18 ( Figure 3 Inside in the left - right direction in the middle), a hollow measurement chamber 20 is formed. The measurement chamber 20 is surrounded by the porous layer 18, the electrolyte layer 14c, and the electrolyte layer 24c, and exhaust gas EG can be introduced into the inside via the porous layer 18. In addition, the porous layer 18 is a diffusion rate - controlling layer that allows the exhaust gas EG to flow into the measurement chamber 20 and restricts its flow rate.

[0054] In the measurement chamber 20, the second pump electrode 16 of the oxygen pump unit 14 and the second detection electrode 22 of the oxygen concentration detection unit 24 are exposed. These electrodes 16 and 22 are electrically connected to each other and are connected to the COM terminal CT of the sensor element unit 3S. In addition, the first pump electrode 12 of the oxygen pump unit 14 is connected to the Ip + terminal IPT, and the first detection electrode 28 of the oxygen concentration detection unit 24 is connected to the Vs + terminal VST.

[0055] In addition, the entire first pump electrode 12 of the oxygen pump unit 14 is covered with a protective layer 15 for suppressing the poisoning of the first pump electrode 12. The protective layer 15 is formed of porous ceramics or the like, and the exhaust gas EG can pass through the protective layer 15 to reach the first pump electrode 12.

[0056] The heater unit 30 is stacked on top of the electrolyte layer 24c of the oxygen concentration detection unit 24. The heater unit 30 has a structure in which a heater resistor 37 formed of a conductor is sandwiched between a pair of alumina sheets 33 and 35. The heater resistor 37 is connected to heater terminals H1 and H2. By energizing the heater unit 30 to increase the temperature of the sensor element unit 3S, the electrolyte layers 14c and 24c of the sensor element unit 3S are activated. As a result, oxygen ions can move in the electrolyte layers 14c and 24c. On the contrary, before the temperature of the sensor element unit 3S becomes high enough, such as at the start of the vehicle (cold start), the electrolyte layers 14c and 24c are not activated, and it becomes a state where oxygen ions cannot move in the electrolyte layers 14c and 24c (a state with high resistance where the pump current Ip does not flow).

[0057] In addition, the alumina sheet 33 of the heater unit 30 covers the entire first detection electrode 28 of the oxygen concentration detection unit 24, thereby sealing the first detection electrode 28. Therefore, the space (holes) inside the first detection electrode 28 (porous electrode) constitutes the reference oxygen chamber 26, which functions as an internal oxygen reference source.

[0058] Next, the sensor control circuit unit 4 of the gas sensor 2 will be described with reference to Figure 2 The sensor control circuit unit 4 accommodated in the ECU 2 has terminals 4T1 to 4T5. These terminals 4T1 etc. are connected to the respective terminals IpT etc. of the sensor element unit 3S of the gas detection unit 3 and the heater terminals H1, H2 of the heater unit 30 via the terminals T1 to T5 of the ECU 2 and the first wiring L1 to the fifth wiring L5.

[0059] In addition to the control unit 4C, the sensor control circuit unit 4 also has a DAC 42 connected to the first terminal T1 through the terminal 4T1, a reference potential generation circuit 43 connected to the second terminal T2 through the terminal 4T2, and an A / D converter 44 and a micro current supply circuit 45 connected to the third terminal T3 through the terminal 4T3. Among them, the DAC 42 causes a pump current Ip of a magnitude obtained according to a control current indication value Ipcmd input from a later-described PID operation unit 4C2 in the control unit 4C to flow through the IPT terminal of the first terminal T1 and the sensor element unit 3S to the oxygen pump unit 14 of the sensor element unit 3S. In addition, the reference potential generation circuit 43 generates a reference potential Vref (2.5V in this example) through a buffer circuit using an operational amplifier, and applies this reference potential Vref to the second pump electrode 16 and the second detection electrode 22 via the second terminal T2 and the COM terminal CT of the sensor element unit 3S. The second A / D converter 44 detects a detection unit voltage (sensor voltage) Vs generated between the second detection electrode 22 and the first detection electrode 28 of the oxygen concentration detection unit 24 through the VS+ terminal VST of the sensor element unit 3S and the third terminal T3, performs AD conversion on it, and inputs it to the control unit 4C as a detection unit voltage value Vsv. In addition, the output of the micro current supply circuit 45 is also connected between the terminal 4T3 and the second A / D converter 44. The micro current supply circuit 45 includes a DA converter (DAC) that causes a fixed micro current Icp (=20 μA), which is used to detect the internal resistance, to flow into the oxygen concentration detection unit 24. The micro current Icp flowing into the oxygen concentration detection unit 24 serves to pump the oxygen in the measurement chamber 20 into the first detection electrode 28 (porous electrode) for the oxygen concentration detection unit 24. Thus, the reference oxygen chamber 26 functions as an internal oxygen reference source.

[0060] The control unit 4C causes such a fixed minute current Icp to flow through the oxygen concentration detection unit 24, and controls the magnitude of the pump current Ip flowing through the oxygen pump unit 14 so that the detection unit voltage Vs (the potential difference between the third terminal T3 and the second terminal T2 detected by the second AD converter 44) generated across the oxygen concentration detection unit 24 is a prescribed voltage. Thereby, the oxygen pump unit 14 pumps oxygen ions into or out of the measurement chamber 20 so that the oxygen concentration in the exhaust gas EG introduced into the measurement chamber 20 through the porous layer 18 is a prescribed concentration.

[0061] When performing this control, digital PID control is carried out in the control unit 4C. The current value and the direction of the current of the pump current Ip flowing through the oxygen pump unit 14 controlled by this PID control vary according to the oxygen concentration (air-fuel ratio) in the exhaust gas EG introduced into the measurement chamber 20 through the porous layer 18. Therefore, the oxygen concentration in the exhaust gas EG can be detected based on the magnitude of the pump current Ip. In addition, the sensor control circuit unit 4 performs drive control of the gas sensor 2 (sensor element unit 3S) by feedback control based on PID control of the pump current Ip flowing through the oxygen pump unit 14 so that the detection unit voltage Vs generated in the oxygen concentration detection unit 24 is a prescribed voltage.

[0062] In addition, the heater unit control circuit 49 of the sensor control circuit unit 4 is connected to the terminals 4T4 and 4T5, and these terminals 4T4 and 4T5 are connected to the heater terminals H1 and H2 of the heater unit 30 of the sensor element unit 3S via the fourth terminal T4, the fifth terminal T5, the fourth wiring L4, and the fifth wiring L5. In addition, the heater unit control circuit 49 is connected to the control unit 4C, and performs PWM control of the on / off of the energization to the heater unit 30 according to an instruction from the control unit 4C. In addition, the details of the PWM control of the heater unit 30 by the control unit 4C are omitted.

[0063] In addition, a third switch SW3 is connected between the terminal 4T2 and the terminal 4T3 in the sensor control circuit unit 4. This third switch SW3 is normally open (open circuit), but is turned on at the time of the failure check of the DAC 42 described later, short-circuits between the terminal 4T2 and the terminal 4T3, and forcibly sets the detection unit voltage Vs input to the second AD converter 44 to zero.

[0064] Explain the details of the feedback control based on PID control in the sensor control circuit unit 4. As Figure 2 shown, the detection unit voltage Vs of the oxygen concentration detection unit 24 is input to the sensor control circuit unit 4 through the terminals 4T2, 4T3, and the second terminal T2 and the third terminal T3, and is sequentially converted into a digital unit voltage value Vsv by the second AD converter 44.

[0065] In the differential section 4C4, the difference (ΔVs = OVs - Vsv: the deviation from the target) between the unit voltage value Vsv input to the control section 4C and the target Vs value OVs held by the target Vs value input section 4C3 is calculated. Then, the difference ΔVs (..., ΔVs(n - 1), ΔVs(n), ΔVs(n + 1),...) between the target Vs value OVs and the unit voltage value Vsv, that is, the difference value ΔVs, is sequentially input to the PID operation section 4C2 according to the clock. (In addition, n is a natural number.)

[0066] The PID operation section 4C2 includes a proportional operation section 4C2P for calculating the P term, an integral operation section 4C2I for calculating the I term, a differential operation section 4C2D for calculating the D term, and an addition section 4C2A for obtaining their sum. Each operation section 4C2P, etc. includes coefficient holding sections 4C2PC, 4C2IC, 4C2DC for holding the proportional coefficient Pc, integral coefficient Ic, and differential coefficient Dc used in the operation.

[0067] Among them, in the proportional operation section 4C2P, the value obtained by multiplying the proportional coefficient Pc by the difference ΔVs(n) is calculated. In the integral operation section 4C2I, the sum of the value obtained by multiplying the integral coefficient Ic by the difference ΔVs(n) and the previously obtained I term Iout(n - 1) is calculated. In addition, in the differential operation section 4C2D, the value obtained by multiplying the difference obtained by subtracting the previously obtained difference ΔVs(n - 1) from the current difference ΔVs(n) by the differential coefficient Dc is calculated. The PID operation value J(n) is the sum of these P term, I term, and D term, and when recorded using the difference ΔVs(n), etc., it is the following formula (1).

[0068] J(n) = Pout(n) + Iout(n) + Dout(n)...(1)

[0069] In addition, Pout(n) = Pc·ΔVs(n)

[0070] Iout(n) = Ic·ΔVs(n) + Iout(n - 1)

[0071] Dout(n) = Dc·(ΔVs(n) - ΔVs(n - 1))

[0072] The control section 4C inputs the PID operation value J(n) of a 14-bit signed integer obtained in this way as the control current indication value Ipcmd to the DAC 42. In the DAC 42, an analog pump current (control current) Ip of positive or negative magnitude corresponding to the control current indication value Ipcmd is output to the oxygen pump unit 14. In this way, the control section 4C of the sensor control circuit section 4 enables the sensor element section 3C to perform feedback control based on PID control.

[0073] In addition, the control current indication value Ipcmd represents the magnitude of the pump current (control current) Ip output from the DAC 42, that is, the oxygen concentration (air-fuel ratio) of the exhaust gas EG. Therefore, the control current indication value Ipcmd is not only input to the CPU 5 through the terminal 4T6, the connection wiring 6, and the digital input terminal 5D and used for the control of the engine ENG, etc., but also sent to the CAN bus through the input / output terminal 5E, the sixth terminal T6, and the connection bus 2B and transmitted to other devices.

[0074] As described above, the current DA converter 42 used in this embodiment is a type of DA converter that outputs a current value corresponding to a binary code of a specified number of bits (for example, a 14-bit signed integer) input thereto. Indication values such as the control current indication value Ipcmd input to the DAC 42 are displayed in the form of a sign-mantissa part. The highest-order bit (MSB, for example, the 14th bit) is the sign bit, which represents a positive value in the case of "0" and a negative value in the case of "1". On the other hand, the value (absolute value) is represented by the two's complement display using the 13 low-order bits constituting the mantissa part.

[0075] Corresponding to the bit depth (13 bits) of the DAC 42, a pair of a positive current source that outputs a positive current weighted according to each bit BI and a positive switch element connected in series to the positive current source and turning on and off the positive current, and a negative current source that outputs a negative current weighted according to each bit BI and a negative switch element connected in series to the negative current source and turning on and off the negative current, a total of 13 pairs (13 groups) are connected in parallel to the output stage of the DAC 42.

[0076] In addition, the switch elements for turning on and off the current sources corresponding to the respective bits BI all select operations according to the sign bit (the highest-order bit) in the input control current indication value Ipcmd and the check current indication value Chcmd.

[0077] Here, the bits BI forming the sign input to the DAC 42 are divided into a high-order bit group BU and a low-order bit group BL after removing the sign bit. For example, among the 2M - 1 bits after removing the sign bit in the signed 2M-bit sign, they are divided into a low-order bit group BL from the first bit (the lowest-order bit) to the Mth bit (the Mth bit) close to the first bit, and a high-order bit group BU from the (M + 1)th bit (the (M + 1)th bit) to the (2M - 1)th bit (the (2M - 1)th bit) close to the highest-order bit, that is, the 2Mth bit (in this embodiment, the 13 bits are divided into a low-order bit group BL from the first bit to the seventh bit and a high-order bit group BU from the eighth bit to the 13th bit). In this embodiment, for each bit BI belonging to the low-order bit group BL (specifically, the first bit to the seventh bit), the presence or absence of a bit failure is detected.

[0078] Next, the behavior of the pump current Ip in the case where the DAC 42 fails will be described. As described above, the DAC 42 outputs an analog positive and negative pump current Ip based on a binary code of a specified resolution (bit depth, which is 13 bits in this embodiment), specifically, a control current indication value Ipcmd represented by a 14-bit signed integer. However, this DAC 42 sometimes fails. As its failure mode, one of the switching elements for turning on and off the outputs of the positive current source or negative current source corresponding to each bit in the output stage of the DAC 42 sometimes has a "stuck-on fault" where it is always on, or a "stuck-off fault" where it is always off. Then, the following situation occurs: The magnitude of the pump current Ip becomes abnormal corresponding to the magnitude corresponding to the bit (digit position) of the failed switching element. Figure 5 is a graph showing the relationship between the (originally expected) pump current Ip indicating the output of the DAC 42 on the horizontal axis and the pump current Ip actually obtained in the DAC 42 on the vertical axis. The thick solid line extending stepwise from the origin to the upper right represents the case where the DAC 42 is normal. In addition, the dashed line represents the case where the positive switching element of the first bit has a "stuck-on fault" where it is always on, and the dash-dotted line represents the case where the same positive switching element of the first bit has a "stuck-off fault" where it is always off.

[0079] In Figure 5 the range of 0 or positive values where the sign bit (the highest bit) is set to 0 is shown. Only a part near the origin (the range of current values from 0 to about 9 μA) in the graph is enlarged when the range of an integer (0 to 8191) represented by a 13-bit mantissa part is made to correspond to the range of the pump current Ip or the check current Ich output by the DAC 42 and the range of current values from 0 to 8000 μA.

[0080] In addition, in Figure 5 vertical scale lines are provided at positions that are integer multiples of the output current Io corresponding to the magnitude of 1 LSB (specifically, Io = 0.98 μA), i.e., 0, 0.98, 1.96, 2.94, 3.92,... (μA). These current values correspond to the current values at which the sign of the first bit of the 14-bit indication value shown below the current value switches "from 0 to 1" or "from 1 to 0".

[0081] From the graph shown in Figure 5 it can be understood that in both the case of the "stuck-on fault" represented by the dashed line and the case of the "stuck-off fault" represented by the dash-dotted line, when the magnitude of the pump current Ip (control current indication value Ipcmd) is increased or decreased, the situation where the actual pump current Ip is the same as the normal value and the situation where the actual pump current Ip deviates significantly from the normal pump current will occur alternately. For example, asFigure 5 As shown, when the positive switching element at the first bit is in the "ON fault" state and the sign of the first bit of the control current indication value Ipcmd is 1, as shown by the dashed line, the pump current Ip of the same magnitude as in the normal case represented by the thick solid line is output. On the other hand, when the sign of the first bit of the control current indication value Ipcmd is 0, a pump current Ip larger than the normal case is output. This is because: corresponding to the amount of current output by the positive current source corresponding to the first bit, an excessive pump current Ip is output. Conversely, when the positive switching element at the first bit is in the "OFF fault" state, as shown by the dash-dotted line, when the sign of the first bit of the control current indication value Ipcmd is 0, the pump current Ip of the same magnitude as in the normal case represented by the thick solid line is output. On the other hand, when the sign of the first bit of the control current indication value Ipcmd is 1, a pump current Ip smaller than the normal case flows. This is because: a pump current Ip insufficient in the amount of current that the positive current source corresponding to the first bit should output is output. Therefore, as Figure 5 shown, the magnitude of the difference DIch generated between the actual pump current Ip and the pump current Ip in the normal state, i.e., the indicated pump current Ip, is fixed to the output current Io = 0.98 μA corresponding to the binary code (00000000000001) of 2M bits (specifically 14 bits) where only the first bit is 1.

[0082] Therefore, in the present embodiment, in order to detect a fault in the DAC 42, instead of the control current indication value Ipcmd, the inspection current indication value Chcmd input to the DAC 42 is set to the following value to detect a fault in the DAC 42. That is, for example, the inspection current indication value Chcmd(n) that changes by 1 LSB in sequence each time from the initial inspection current indication value Chcmds (e.g., (00000000000000)) to the final inspection current indication value Chcmdf (e.g., (00000001111111)) as shown by (00000000000000), (00000000000001), (00000000000010), …, (00000001111111) is generated at the generation period Tc as a 14-bit inspection current indication value Chcmd and input to the DAC 42. In addition, as will be described later, the generation of the inspection current indication value Chcmd(n) in this way at the generation period Tc is performed by the indication value generation unit 47 (specifically, the PID operation unit 4C2, etc.) in the control unit 4C.

[0083] Then, when no fault occurs in the DAC 42, as Figure 5As shown by the medium thick solid line, the inspection current Ich output from the DAC 42 rises stepwise and linearly from the starting inspection current indication value Chcmds (for example, (00000000000000): corresponding to 0 μA) to the final inspection current indication value Chcmdf (for example, (00000001111111): corresponding to 124 μA). In this way, even when the inspection current indication value Chcmd(n) is input to the DAC 42 to cause the DAC 42 to output the inspection current Ich, the relationship between the indicated inspection current Ich and the actually flowing inspection current Ich is Figure 5 the relationship shown. In addition, the inspection current indication value Chcmd(n) that changes by the size of 1 LSB each time in sequence is generated at the generation period Tc, so it is also possible to Figure 5 set the horizontal axis in Figure 5 as the horizontal axis representing the passage of time t as shown in the following paragraph, and

[0084] be understood as a graph of the change of the inspection current Ich actually obtained in the DAC 42 over time. In this case, the timing at which the first bit "switches from 0 to 1" or "switches from 1 to 0" arrives every generation period Tc. Figure 6 Therefore, when calculating the difference Dich generated between the actual inspection current Ich and the indicated inspection current Ich, its change over time is Figure 6 the result shown. That is, in the normal case represented by the thick solid line, the difference Dich is 0 or a tiny value within the measurement error at any timing (difference DIch = 0 ±). However, in the case where the positive switching element corresponding to the first bit is in "on failure" (dashed line) or "off failure" (dotted line), every time the time t passes Tc, the difference Dich is a square wave pulse waveform with a basic period TB (= 2Tc) and a basic frequency Fdi (= 1 / TB = 1 / 2Tc) that alternates between 0 μA and 0.98 μA (or 0 μA and -0.98 μA).

[0085] In addition, in Figure 5 and Figure 6 it is described that in the DAC 42 that inputs the control current indication value Ipcmd or the inspection current indication value Chcmd(n) of a 14-bit signed integer binary code, the positive switching element on the positive current source side of the first bit has "on failure" or "off failure".

[0086] However, it can be easily understood that the same result also occurs in the case where the positive switching element corresponding to the bit BI (any one of the first bit to the 13th bit) that constitutes the mantissa part after removing the sign bit has "on failure" or "off failure".

[0087] However, depending on which bit among the 1st to 13th bits is the fault bit, the magnitude of the difference Dich and the magnitudes of the basic period TB and the basic frequency Fdi are different. For example, when the positive switching element corresponding to the fourth bit is in an "on fault" or "off fault", every time the time t elapses the generation period Tc, the difference Dich alternates between 0 μA and 7.8 μA (or 0 μA and -7.8 μA), and has a waveform of a square wave pulse with a basic period TB (= 16Tc) and a basic frequency Fdi (= 1 / TB = 1 / 16Tc).

[0088] Therefore, if the change of the difference Dich over time (square wave pulse) is acquired and its basic frequency Fdi (= 1 / TB) or basic period TB is obtained through frequency analysis, it is possible to detect which bit of the DAC 42 the corresponding positive switching element is in an "on fault" or "off fault".

[0089] In addition, in Figure 5 and Figure 6 it is described that an "on fault" or "off fault" has occurred in the positive switching element of the 1st bit constituting the mantissa part in the DAC 42.

[0090] However, it is also possible to similarly consider the case where an "on fault" or "off fault" has occurred in the negative switching element corresponding to the 1st bit in the DAC 42. More specifically, a negative check current indication value Chcmd is input to the DAC 42, and the DAC 42 outputs a negative check current Ich. In this case, similar to Figure 6 it is also possible to obtain the change of the difference Dich over time. Therefore, if the change of the difference Dich over time (square wave pulse) is acquired and its basic frequency Fdi or basic period TB is obtained through frequency analysis, it is possible to detect which bit of the DAC 42 the corresponding negative switching element is in an "on fault" or "off fault".

[0091] Based on the above knowledge, in the gas sensor system 1 of the present embodiment, in the indication value generation unit 47 including the aforementioned PID operation unit 4C2, a sequence of the above-described check current indication values Chcmd(n) is generated. Specifically, this indication value generation unit 47 in the sensor control circuit unit 4 includes a short-circuit switch SW3 that shorts the second terminal T2 and the third terminal T3 (terminal 4T2 and terminal 4T3), a constant input unit 4C5 in the control unit 4C, a PID operation unit 4C2, a check time coefficient setting unit 4C6, and the like.

[0092] Then, in order to check the current converter 42, when generating the check current indication value Chcmd(n) in sequence, the short-circuit switch SW3 is turned on, thereby forcibly setting the detection unit voltage Vs input to the second AD converter 44 to zero. As a result, the detection unit voltage value Vsv, which is the output of the second AD converter 44, also becomes zero (Vsv = 0).

[0093] On the other hand, the switching unit 4C5K of the constant input unit 4C5 is switched so that the constant unit 4C5C is connected to the difference unit 4C4 instead of the target Vs value input unit 4C3. As a result, the predetermined input constant value N1 = 1 (when increasing by the size of 1 LSB each time) or N2 = -1 (when decreasing by the size of 1 LSB each time) is input to the PID operation unit 4C2 instead of the sensor voltage value Vsv. Then, the difference values ΔVs(n), ΔVs(n + 1),... output from the difference unit 4C4 are also fixed to ΔVs(n) = ΔVs(n + 1) = N1 = 1, or ΔVs(n) = ΔVs(n + 1) = N2 = -1.

[0094] In addition, the proportional coefficient Pc, integral coefficient Ic, and differential coefficient Dc held by the respective coefficient holding units 4C2PC, 4C2IC, and 4C2DC in the PID operation unit 4C2 are changed by the check-time coefficient setting unit 4C6. Specifically, the respective coefficients in the above-mentioned formula (1) are changed to Pc = 0, Ic = 1, and Dc = 0. Then, the above-mentioned formula (1) becomes J(n) = Iout(n) = ΔVs(n) + Iout(n - 1). Here, J(n - 1) = Iout(n - 1), so the formula (1) becomes J(n) = ΔVs(n) + J(n - 1).

[0095] Also, the number n representing the sequence is reset to n = 1, and the initial value J(0) of the PID operation value and the initial value Iout(0) of the I term are set to predetermined values. For example, they are set to J(0) = Iout(0) = -1 (when increasing by the size of 1 LSB each time), J(0) = Iout(0) = 0 (when decreasing by the size of 1 LSB each time).

[0096] Thus, initially, the starting inspection current indication value Chcmds is output from the PID operation unit 4C2 (for example, J(1) = Chcmd(1) = Chcmds = N1 + J(0) = 1 + (-1) = 0, or J(1) = Chcmd(1) = N2 + J(0) = -1 + 0 = -1) as the PID operation value J(1). After that, the inspection current indication value Chcmd(n) (Chcmd(n) = 1 + Chcmd(n - 1), or Chcmd(n) = -1 + Chcmd(n - 1)) composed of a signed 2M-bit (signed 14-bit) binary code with a size increasing (or decreasing) by 1 LSB each time is sequentially generated at a generation period Tc equivalent to the clock period as the PID operation value J(n).

[0097] In addition, if the generated inspection current indication value Chcmd(n) reaches the final inspection current indication value Chcmdf (Chcmd(n) = Chcmdf), the PID operation unit 4C2 stops generating the inspection current indication value Chcmd(n). Also, when N1 = 0.5 instead of N1 = 1 (similarly, Pc = Dc = 0, Ic = 1), the change speed of Chcmd(n) can be adjusted. For example, the value of Chcmd(n) increases by 1 LSB every 2Tc, etc.

[0098] When the inspection current indication value Chcmd(n) that changes (increases or decreases) by 1 LSB each time from the starting inspection current indication value Chcmds to the final inspection current indication value Chcmdf is sequentially input to the DAC 42, in the case where the DAC 42 has no fault, for example, as Figure 5 shown by the thick solid line in the figure, the stepped and linearly rising inspection current Ich corresponding to the inspection current indication value Chcmd(n) is output from the DAC 42.

[0099] In addition, the inspection current indication value Chcmd(n) is also input to the CPU 5 from the terminal 4T6 of the sensor control circuit unit 4 via the connection wiring 6 and the digital input terminal 5D.

[0100] Then, if, as in this embodiment, the input of the constant values N1 and N2 instead of the detection unit voltage value Vsv and the change of each coefficient Pc, etc. are performed, it is possible to obtain the inspection current indication value Chcmd(n) that changes by 1 LSB each time within the positive indication value range PCE from the starting inspection current indication value Chcmds to the final inspection current indication value Chcmdf easily without generating the inspection current indication value Chcmd independently of the operation in the PID operation unit 4C2.

[0101] Next, referring to Figure 2To illustrate the detection of the inspection current Ich. In the present embodiment, during the stop of the engine ENG, etc., in the high-impedance state where the sensor element unit 3S (oxygen pump unit 14) is not activated due to low temperature, that is, in the state where no inspection current Ich flows through the oxygen pump unit 14 (the state where the magnitude of the inspection current Ich branched at the branch node 7s and flowing into the oxygen pump unit 14 can be ignored), the failure detection of the DAC 42 is performed.

[0102] In addition, in the present embodiment, the inspection current detection unit 7 for detecting the magnitude of the inspection current Ich includes an inspection circuit unit 7K provided outside the sensor control circuit unit 4 in the ECU 2, switching switches SW1 and SW2 in the CPU 5, and a first AD converter 71. The inspection circuit unit 7K includes a branch wiring 7W, resistors 7R1 and 7Rp, and a protection capacitor 7Cp. Specifically, a branch wiring 7W through which the inspection current Ich flows is provided to extend from the branch node 7s in the connection wiring 5W1, and the connection wiring 5W1 connects the terminal 4T1 connected to the output terminal of the DAC 42 to the first terminal T1. The branch wiring 7W is connected to the GPIO terminal 5A of the CPU 5 via the first current detection resistor 7R1. The GPIO terminal 5A is connected to the ground potential via the switching switch SW1 in the CPU 5, and on the other hand, is connected to the power supply voltage Vcc via the switching switch SW2. In addition, the first current detection resistor 7R1 has a resistance value R1. Therefore, when inspecting the positive inspection current Ich, the switching switch SW1 is turned on in the state where the switching switch SW2 is turned off, so that the positive inspection current Ich flows from the DAC 42 through the first current detection resistor 7R1 to the GPIO terminal 5A. In this case, the branch wiring 7W is at a potential corresponding to the magnitude of the inspection current Ich, specifically, a potential of Ich·R1. On the other hand, when inspecting the negative inspection current Ich, the switching switch SW2 is turned on in the state where the switching switch SW1 is turned off, so that the negative inspection current Ich flows from the power supply potential Vcc through the GPIO terminal 5A and the first current detection resistor 7R1 to the DAC 42. In this case, the branch wiring 7W is also at a potential corresponding to the magnitude of the inspection current Ich, specifically, a potential of Vcc - Ich·R1 based on the power supply potential Vcc.

[0103] The analog input terminal 5C of the CPU 5 is connected to the branch wiring 7W via a protection resistor 5p and a protection capacitor Cp. The analog input terminal 5C is connected to the first AD converter 71 in the CPU 5. Therefore, the potential of the branch wiring 7W is detected by the first AD converter 71, and the inspection current value Ichv(n) is calculated and sequentially output considering the magnitude of the resistor R1 or the resistor R1 and the power supply potential Vcc.

[0104] Independently of this, as described above, the check current indication value Chcmd(n) output by the PID operation unit 4C2 that constitutes the indication value generation unit 47 is input to the CPU 5 through the connection wiring 6. Therefore, in the predicted value calculation unit 8 of the CPU 5, the check current predicted value IMchv(n) is sequentially calculated using the check current indication value Chcmd(n). This check current predicted value IMchv(n) is the predicted value of the check current value Ichv that is predicted to be detected by the first AD converter 71 of the check current detection unit 7 when there is no failure in the DAC 42. The check current predicted value IMchv(n) corresponds to Figure 5 the magnitude of the check current Ich obtained when the DAC 42 is normal, as shown by the thick solid line in

[0105] Next, in the difference acquisition unit 9 of the CPU 5, corresponding to the same check current indication value Chcmd(n), the difference DIch(n) between the check current value Ichv(n) detected by the check current detection unit 7 and the above-mentioned check current predicted value IMchv(n) calculated by the predicted value calculation unit 8 is sequentially acquired.

[0106] In addition, as already referred to Figure 5 and Figure 6 described, when there is no failure in the output stage of the DAC 42, the difference DIch(n) is always 0± (DIch(n) = 0±). On the other hand, when the switching element in the output stage of the DAC 42 is in the "on failure" or "off failure" state, the difference DIch(n) is a square wave pulse.

[0107] Therefore, in the frequency analysis unit 10FF of the failure detection unit 10, the change of the difference DIch(n) over time is frequency-analyzed by the FFT analysis method to obtain the fundamental frequency Fdi (or fundamental period TB) of the square wave pulse formed by this difference DIch(n). The magnitudes of the fundamental period TB and the fundamental frequency Fdi vary depending on the bit of the DAC 42 that is faulty. For example, as Figure 5 and Figure 6 shown, when the generation period of the check current indication value Chcmd(n) is set to Tc, when the first bit is faulty (on failure or off failure), the fundamental period TB of the square wave pulse formed by the difference DIch(n) is of the magnitude 2Tc (TB = 2Tc).

[0108] In addition, when the DAC 42 is normal, the difference DIch(n) is 0±, no square wave pulse is generated, and the fundamental period TB and the fundamental frequency Fdi cannot be obtained.

[0109] Therefore, in the failure determination unit 10D of the failure detection unit 10, the presence, absence, and magnitude of the basic period TB and the basic frequency Fdi can be detected, thereby detecting whether there is a failure in the DAC 42 and which switching element among the multiple bits constituting the mantissa part is in a "bit failure". When a positive inspection current indication value is input, for example, when the magnitude of the basic period TB is 2Tc (TB = 2Tc), it can be determined that the positive switching element of the first bit of the DAC 42 is in a bit failure (on failure or off failure).

[0110] In addition, according to Figure 6 it can be understood that when the square wave pulse formed by the difference DIch(n) is a square wave pulse that alternates between 0± and a positive value ( Figure 6 which is 0.98 μA in this case), it can be determined as an "off failure". On the contrary, when it is a square wave pulse that alternates between 0± and a negative value ( Figure 6 which is -0.98 μA in this case), it can be determined as an "on failure".

[0111] In this way, a sensor system 1 is formed that can detect whether there is a bit failure in the DAC 42 and determine the failure bit and other failures of the DAC 42.

[0112] In addition, when a certain bit BI in the lower bit group BL (in this embodiment, the first bit to the seventh bit) of the DAC 42 is in a bit failure, the difference between the originally obtained current value and the actual current value is small, so it is easily affected by noise during failure detection. For example, as described above, when the positive switching element of the first bit of the DAC 42 is in a bit failure, the difference between the originally obtained current value and the actual current value is an extremely small value of Io = 0.98 μA, so it is easily affected by noise during failure detection. Therefore, it is sometimes difficult to reliably determine the presence or absence of a bit failure (on failure or off failure) by detecting the difference between the originally obtained current value and the actually obtained current value one or two times. However, since the frequency can be detected by frequency analysis, after obtaining the difference between the originally obtained current value and the actually obtained current value a considerable number of times, frequency analysis is performed by the FFT analysis method in the frequency analysis unit 10FF as described above, thereby suppressing the influence of noise and appropriately detecting the presence or absence of a failure.

[0113] In addition, it is preferable to use the method of this embodiment to detect whether there is a bit failure in the bit BI belonging to the lower bit group BL, especially the first bit (the lowest bit) or the second bit where the difference between the originally obtained current value and the actual current value becomes small and is easily affected by noise.

[0114] Figure 4 is a flowchart showing the processing flow of failure detection of the DAC 42 in the gas sensor system 1. As shown in thisFigure 4 As shown, in this gas sensor system 1, when the system starts, in step S1, it is judged whether the sensor element part 3S of the gas sensor 2 is cooled. For example, it is a state where sufficient time has elapsed since the last engine drive stop so that the engine ENG (and thus the sensor element part 3S of the gas sensor 2 as well) is sufficiently cooled.

[0115] In the present embodiment, as described above, in a state where the inspection current Ich from the DAC 42 does not flow into the oxygen pump unit 14 via the first terminal T1 and the wiring L1 and the sensor element part 3S (oxygen pump unit 14) has a high impedance, the inspection current Ich is made to flow to the inspection current detection part 7 through the branch node 7s, thereby detecting a failure of the DAC 42. Therefore, in step S1, it is judged whether the sensor element part 3S (oxygen pump unit 14) is sufficiently cooled and in a high impedance state. When the sensor element part 3S (oxygen pump unit 14) is not in a high impedance state (in the case of "no"), the failure detection of the DAC 42 is not performed, and the process returns to the normal control of the gas sensor 2. On the other hand, when the sensor element part 3S (oxygen pump unit 14) is in a high impedance state (in the case of "yes"), the process proceeds to step S2.

[0116] As a method for judging whether the sensor element part 3S (oxygen pump unit 14) is in a high impedance state, for example, a method of judging whether a predetermined time (for example, 30 minutes) or more has elapsed since the last stop of the engine ENG and a method of judging using the temperature of the cooling water of the engine ENG are cited.

[0117] Next, in step S2, as described above, the third switch SW3 is turned on. In addition, the switching part 4C5K of the constant input part 4C5 is switched to connect the constant part 4C5C to the differential part 4C4, thereby fixing the difference values ΔVs(n), ΔVs(n + 1),... to ΔVs(n) = ΔVs(n + 1) = N1 = 1 or N2 = -1. And the coefficients Pc, Ic, Dc of the P term, I term, and D term held by the coefficient holding parts 4C2PC, 4C2IC, 4C2DC in the PID operation part 4C2 of the control part 4C are replaced with predetermined values (Pc = Dc = 0, Ic = 1) by the inspection time coefficient setting part 4C6. The number n indicating the order is reset to n = 1, and the initial value J(0) of the PID operation value is set to a predetermined value, for example, J(0) = -1 or J(0) = 0.

[0118] In the next indication value generation step S3, the PID operation part 4C2 generates an inspection current indication value Chcmd(n) that changes (increases or decreases) by 1 LSB in size for each clock in sequence at a generation cycle Tc.

[0119] If the inspection current indication value Chcmd(n) is generated in the PID operation unit 4C2 by changing each coefficient Pc or the like in this way, it is not necessary to provide a circuit or the like for generating the inspection current indication value Chcmd independently of the operation in the PID operation unit 4C2, and it is possible to easily obtain the inspection current indication value Chcmd(n) that changes by 1 LSB each time in sequence.

[0120] Moreover, in the input step S4, the generated inspection current indication value Chcmd(n) is sequentially input to the DAC 42, the inspection current Ich is output from the DAC 42, and this inspection current Ich is made to flow to the inspection circuit unit 7K. Further, as described above, since the oxygen pump unit 14 has a high impedance, the inspection current Ich does not flow to the oxygen pump unit 14.

[0121] Then, in the inspection current detection step S5, the inspection current value Ichv(n) of the inspection current Ich is detected by the first AD converter 71.

[0122] On the other hand, in the predicted value calculation step S6, based on the inspection current indication value Chcmd(n) generated in the indication value generation step S3, the inspection current predicted value IMchv(n) is sequentially calculated. This inspection current predicted value IMchv(n) is the predicted value of the inspection current value Ichv(n) that is predicted to be detected by the first AD converter 71.

[0123] Then, in the difference acquisition step S7, the difference DIch(n) between the inspection current value Ichv(n) and the inspection current predicted value IMchv(n) corresponding to the same inspection current indication value Chcmd(n) is sequentially calculated.

[0124] Furthermore, as described above, when the DAC 42 is normal, the difference DIch(n) is always 0 (DIch(n)=0). This is because there is no dissociation between the inspection current value Ichv(n) and the inspection current predicted value IMchv(n). On the other hand, when a bit failure occurs in each bit of the mantissa part constituting the DAC 42, the change of the difference DIch(n) over time is a square wave pulse (refer to Figure 6 ).

[0125] Therefore, in the frequency analysis step S8A in the failure detection step S8, the change of the difference DIch(n) over time is subjected to FFT analysis to obtain the fundamental frequency Fdi (or fundamental period TB) of the square wave pulse formed by the difference DIch(n).

[0126] Further, in the failure determination step S8B of the failure detection step S8, it is determined whether there is a failure in the DAC 42. When the basic frequency Fdi (or the basic period TB) is not obtained, it is determined that the DAC 42 is normal. On the other hand, when the basic frequency Fdi (or the basic period TB) is obtained, it is determined that a bit failure has occurred in the DAC 42. In addition, based on the magnitude of the basic frequency Fdi (or the basic period TB), it is detected which bit among the multiple bits constituting the mantissa part is the faulty bit (for example, in Figure 6 it is set as the first bit).

[0127] Then, when a failure of the DAC 42 is detected ("Yes"), it proceeds to the warning display step S9, and a warning indicating that the DAC 42 is in a bit failure and the faulty bit (such as a maintenance staff call) is displayed to the driver, and it returns to the normal control of the gas sensor 2. On the other hand, when a failure of the DAC 42 is not detected ("No"), it does not go through the warning display step S9 and returns to the normal control of the gas sensor 2.

[0128] In this way, it becomes a failure detection method of the sensor system 1 that can appropriately detect whether there is a bit failure in the DAC 42 and determine the faulty bit of the DAC 42 such as the faulty bit.

[0129] In particular, for a certain bit BI in the lower bit group BL (in this embodiment, the first bit to the seventh bit) in the DAC 42 that is vulnerable to noise, the influence of noise can be suppressed to appropriately detect whether there is a failure.

[0130] As described above, the present invention has been described based on the embodiments, but the present invention is not limited to the above embodiments, and can of course be appropriately changed and applied without departing from the gist thereof.

[0131] For example, in the embodiment, as the gas sensor 2, an example of using an air-fuel ratio sensor (full-range air-fuel ratio sensor) that detects the oxygen concentration (air-fuel ratio) in the exhaust gas EG is shown, but as the "gas sensor", it is not limited to the air-fuel ratio sensor, and it may also be a NOx sensor that detects the concentration of nitrogen oxides (NOx) as a specific gas concentration, etc. And it is not limited to the gas sensor, and it can also be applied to a sensor system including a sensor element to which a control current is input, a DAC that outputs the control current, and a control unit that inputs to the DAC.

[0132] In the foregoing embodiment, the following example is shown: when performing the failure detection of the gas sensor system 1, in step S1 (refer to Figure 4 ), it is determined whether the sensor element part 3S of the gas sensor 2 is cooled.

[0133] However, it is also possible that when performing fault detection on the sensor system, in the case of performing fault detection on a sensor system of other sensors that do not require consideration of sensor cooling, such as a part equivalent to the sensor element unit 3S, for example, as Figure 4 shown by the dashed line in, during the stop period of the engine ENG equipped with this sensor system (being "Yes" in step S1A), each of steps S2 to S9 is executed. In this case, instead of during the operation period of the engine ENG equipped with the sensor system, such as during the driving period of the vehicle equipped with the engine ENG, the fault detection method of the present technology is executed during the stop period of the engine ENG. Therefore, it is possible to perform fault detection on the sensor system without affecting the operation of the engine ENG.

[0134] Description of Reference Numerals

[0135] 1: Gas sensor system (sensor system); 2: ECU; 3: Gas detection unit (sensor); 3S: Sensor element unit (sensor element); 14: Oxygen pump unit; 22: Second detection electrode; 24: Oxygen concentration detection unit; Vs: Detection unit voltage (sensor voltage); Vsv: Detection unit voltage value (sensor voltage value); 4: Sensor control circuit unit; 4C: Control unit; Ipcmd: Control current indication value; Chcmd, Chcmd(n): Inspection current indication value; Chcmds: Initial inspection current indication value; Chcmdf: Final inspection current indication value; UL: Upper limit indication value (of the inspection current indication value); LL: Lower limit indication value (of the inspection current indication value); Tc: Generation period (period) (of the inspection current indication value); 42: DA converter; BI: Bit; BU: High-order bit group; BL: Low-order bit group; 44: Second AD converter (AD converter); 47: Indication value generation unit; 5: CPU; 7: Inspection current detection unit; 7K: Inspection circuit unit; Ich: Inspection current; Ichv: Inspection current value; 71: First AD converter (inspection current detection unit); ADR: Resolution (of the first AD converter); 8: Predicted value calculation unit; IMchv: Inspection current predicted value; 9: Difference acquisition unit; DIch: Difference (between the inspection current value and the inspection current predicted value); 10: Fault detection unit; 10FF: Frequency analysis unit; Fdi: Fundamental frequency (of the change of the difference over time); TB: Fundamental period (of the change of the difference over time); 10D: Fault determination unit; S3: Indication value generation step; S4: Input step; S5: Inspection current detection step; S6: Predicted value calculation step; S7: Difference acquisition step; S8: Fault detection step; S8A: Frequency analysis step (fault detection step); S8B: Fault determination step (fault detection step).

Claims

1. A sensor system comprising: A sensor element to which a control current is input; A digital-to-analog converter that outputs the control current to the sensor element; and A control unit that generates a control current indication value corresponding to the magnitude of the control current and inputs the control current indication value to the digital-to-analog converter, The sensor system further comprises: An indication value generation unit that generates an inspection current indication value to be input to the digital-to-analog converter, and sequentially generates the inspection current indication values that change by one least significant bit in magnitude from the first generated starting inspection current indication value to the last generated final inspection current indication value at a predetermined generation period; An inspection current detection unit that detects an inspection current value of the inspection current output from the digital-to-analog converter to which the inspection current indication value is input; An estimated value calculation unit that calculates an inspection current estimated value, which is an estimated value of the inspection current value that is expected to be detected by the inspection current detection unit due to the inspection current indication value being input to the digital-to-analog converter; A difference acquisition unit that, corresponding to the same inspection current indication value, acquires the difference between the detected inspection current value and the calculated inspection current estimated value; And A fault detection unit that detects a fault in the bits of the digital-to-analog converter by performing frequency analysis on the change over time of the sequentially obtained differences.

2. The sensor system according to claim 1, wherein The bit for which the fault is detected by the fault detection unit is a bit belonging to the lower bit group in the digital-to-analog converter.

3. The sensor system according to claim 1 or 2, wherein The sensor element has a sensor output terminal that generates a sensor voltage, The sensor system further comprises an analog-to-digital converter that sequentially converts the sensor voltage generated by the sensor output terminal into sensor voltage values, The control unit has: A PID operation unit that generates the control current indication value by performing PID operation using the sensor voltage value, The indication value generation unit has: An input unit that inputs a predetermined input constant value instead of the sensor voltage value to the PID operation unit of the control unit; and An inspection coefficient setting unit that sets the coefficient Pc of the P term and the coefficient Dc of the D term of the PID operation in the PID operation unit to 0, and sets the coefficient Ic of the I term to a magnitude such that the PID operation unit can output the inspection current indication values that change by one least significant bit in magnitude in sequence.

4. A method for detecting a fault in a sensor system, the sensor system comprising: A sensor element to which a control current is input; A digital-to-analog converter that outputs the control current to the sensor element; and A control unit that generates a control current indication value corresponding to the magnitude of the control current and inputs the control current indication value to the digital-to-analog converter, The method for detecting a fault in the sensor system includes the following steps: An indication value generation step of sequentially generating, at a predetermined generation cycle, inspection current indication values that change by one least significant bit in magnitude from an initially generated starting inspection current indication value to a finally generated final inspection current indication value; An input step of sequentially inputting the inspection current indication values to the digital-to-analog converter; An inspection current detection step of detecting an inspection current value of the inspection current output from the digital-to-analog converter; An estimated value calculation step of calculating an inspection current estimated value, which is an estimated value of the inspection current value detected in the inspection current detection step that is expected to result from inputting the inspection current indication value to the digital-to-analog converter; A difference acquisition step of acquiring, corresponding to the same inspection current indication value, the difference between the detected inspection current value and the calculated inspection current estimated value; and A fault detection step of detecting a fault in a bit of the digital-to-analog converter by performing frequency analysis on the change over time of the sequentially obtained differences.

5. The method for detecting a fault in a sensor system according to claim 4, wherein the bit in which a fault is detected in the fault detection step is a bit belonging to a lower bit group in the digital-to-analog converter.

6. The method for detecting a fault in a sensor system according to claim 4 or 5, wherein in the sensor system, the sensor element has a sensor output terminal that generates a sensor voltage, and further includes an analog-to-digital converter that sequentially converts the sensor voltage generated by the sensor output terminal into sensor voltage values, the control unit has a PID operation unit that generates the control current indication value by performing PID operation using the sensor voltage values, in the indication value generation step, a predetermined input constant value is input to the PID operation unit of the control unit instead of the sensor voltage value, and the coefficient Pc of the P term and the coefficient Dc of the D term of the PID operation are determined to be 0, and the coefficient Ic of the I term is determined to be a magnitude such that the inspection current indication values that change by one least significant bit in sequence can be output from the PID operation unit, and the PID operation unit sequentially generates the inspection current indication values.

7. The method for detecting a fault in a sensor system according to claim 4 or 5, wherein the method for detecting a fault in the sensor system is executed during a stop period of an internal combustion engine equipped with the sensor system.

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