Method, apparatus and device for storing data

Abstract

Provided are a method, device and equipment for storing data. The method comprises: obtaining a target operation result of a Montgomery modular multiplication operation; if the target operation result is a real operation result, storing the target operation result in a first memory or a second memory based on a target random number, the target random number being used to select a memory for storing the target operation result from the first memory and the second memory, the first memory being different from the second memory. By randomly storing the real operation result in the first memory or the second memory according to the target random number, the storage result of the real operation result can be randomized, so that an attacker cannot distinguish the storage position of the real operation result, thereby not only resisting side channel attacks, but also resisting electromagnetic attacks, and the security of the chip can be improved.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of data storage, and more particularly, to a method, apparatus and device for storing data. BACKGROUND

[0002] In a high-security chip, in order to improve the security of the public key algorithm, protective measures need to be increased. A common method is to randomly insert redundant modular multiplication and squaring operations in the modular exponentiation operation. In order to resist attacks in the modular exponentiation operation, a pseudo modular multiplication operation needs to be randomly inserted in the normal operation process to confuse the real modular multiplication operation, and the result of the pseudo modular multiplication operation also needs to be stored in the register file, otherwise, an attacker can analyze whether there is a register file write operation at the end of each modular multiplication operation through power consumption information, thereby determining whether this operation is a real operation.

[0003] So far, the operation result of the pseudo operation is directly stored in the register file, and the result of the pseudo modular multiplication operation is usually stored in a fixed address. In this case, the pseudo operation is easily identified by electromagnetic attacks.

[0004] Therefore, how to improve the security of the chip is still a technical problem urgently needed to be solved in the art. SUMMARY

[0005] A method, apparatus and device for storing data are provided, which can improve the security of the chip.

[0006] In a first aspect, a method for storing data is provided, comprising:

[0007] obtaining a target operation result of a Montgomery modular multiplication operation;

[0008] If the target operation result is a real operation result, storing the target operation result in a first memory or a second memory based on a target random number, the target random number being used to select a memory for storing the target operation result in the first memory and the second memory, the first memory being different from the second memory.

[0009] In a second aspect, a method for storing data is provided, comprising:

[0010] obtaining a target operation result of a Montgomery modular multiplication operation;

[0011] If the target operation result is a real operation result, storing the target operation result in a first register file, the first register file being dedicated to storing real operation results, the first register file and a second register file being physically confusedly arranged, the second register file being dedicated to storing pseudo operation results.

[0012] Thirdly, an apparatus for storing data is provided for performing the methods of any one of the first to second aspects or their respective implementations. Specifically, the apparatus may include functional modules for performing the methods of any one of the first to second aspects or their respective implementations.

[0013] Fourthly, a chip is provided for implementing the methods of any one of the first to second aspects or their respective implementations. Specifically, the chip includes a processor for calling and running a computer program from a memory, causing a device on which the chip is installed to perform the methods of any one of the first to second aspects or their respective implementations.

[0014] Fifthly, a computer-readable storage medium is provided for storing a computer program that causes a computer to perform the methods of any one of the first to second aspects or their respective implementations.

[0015] In a sixth aspect, a computer program product is provided, including computer program instructions that cause a computer to perform the methods of any one of the first to second aspects or their respective implementations.

[0016] Based on the above technical solution, since the target random number can be randomly generated and used to select the memory for storing the actual calculation result in the first memory and the second memory area, it is equivalent to randomly storing the actual calculation result into the first memory or the second memory according to the target random number. This randomizes the storage of the actual calculation result, making it impossible for attackers to distinguish the storage location of the actual calculation result. Therefore, it can resist not only side-channel attacks but also electromagnetic attacks, thus improving the chip's security. Attached Figure Description

[0017] Figure 1 This is a schematic flowchart illustrating the data storage method provided in the embodiments of this application.

[0018] Figure 2 and Figure 3 These are all schematic flowcharts of the data storage device provided in the embodiments of this application.

[0019] Figure 4 and Figure 5 These are all schematic block diagrams of the chips provided in the embodiments of this application. Detailed Implementation

[0020] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0021] It should be understood that the embodiments of the present application can be applied to the field of integrated circuit security chips, and specifically relate to the field of cryptographic algorithms and security chips. For example, the embodiments of the present application can be applied to a scenario of storing a result of a true-false operation. For example, the embodiments of the present application can be specifically applied to a scenario of storing a result of Montgomery modular multiplication operation.

[0022] For the convenience of understanding the scheme of the present application, the Montgomery modular multiplication operation is briefly described below.

[0023] The traditional modular multiplication is performed in two steps: first, calculate multiplication, that is, Y=A*B, and then calculate modulus, that is, T=A*B mod N. The modulus usually needs to use division, and the division operation has large overhead and slow speed, and is not suitable for hardware implementation.

[0024] The Montgomery modular multiplication operation is a modular multiplication operation without division, and is a core algorithm in the implementation of a public key algorithm, and its main function is to accelerate the modular multiplication operation.

[0025] The mathematical expression of the Montgomery modular multiplication operation is A*B*R -1 mod N.

[0026] In other words, the result of the Montgomery modular multiplication operation is not A*B mod N, but A*B*R -1 mod N. Or, the Montgomery modular multiplication operation uses A*B*R -1 mod N instead of A*B mod N.

[0027] In application, the multiplier needs to be converted into A′=A*R mod N and B′=B*R mod N in advance, and the modular multiplication result is T′=T*R mod N. Based on this, when continuous modular multiplication is performed, it can be ensured that the modular multiplication result is in the form of X*R mod N, and thus the modular multiplication result can finally be transformed back to the normal form through modular multiplication transformation.

[0028] It should be noted that the embodiments of the present application do not limit the specific implementation manner and principle of the Montgomery algorithm, and the present application aims to solve the problem of how to store the result of the Montgomery modular multiplication operation to ensure the security of the chip.

[0029] Figure 1 is a schematic flowchart of the method 100 for storing data provided by the embodiments of the present application.

[0030] S210, obtaining a target operation result of Montgomery modular multiplication operation;

[0031] S220, if the target operation result is a real operation result, storing the target operation result into the first memory or the second memory based on a target random number, the target random number being used to select a memory for storing the target operation result in the first memory and the second memory, the first memory being different from the second memory.

[0032] Since the target random number can be randomly generated and used to select a memory for storing the real operation result in the first memory and the second memory, in other words, the real operation result can be randomly stored into the first memory or the second memory according to the target random number, the storage result of the real operation result can be randomized, so that an attacker cannot distinguish the storage position of the real operation result, thereby not only resisting side-channel attacks but also resisting electromagnetic attacks, and the security of the chip can be improved.

[0033] In some embodiments of the present application, the method 200 can further include:

[0034] If the target operation result is a pseudo operation result, storing the target operation result into a memory in the first memory and the second memory and different from a memory used to store a previous real operation result of the target operation result, the pseudo operation result being a result calculated using the previous real operation result.

[0035] Storing the target operation result into a memory in the first memory and the second memory and different from a memory used to store a previous real operation result of the target operation result can prevent the pseudo operation result from covering the previous real operation result, and thus the correctness of the previous real operation result can be ensured.

[0036] In addition, since the previous real operation result is determined based on a random number, in other words, the pseudo operation result is also determined based on a random number, not only side-channel attacks can be resisted, but also electromagnetic attacks can be resisted, and the security of the chip can be improved.

[0037] In some embodiments of the present application, the S220 can include:

[0038] Obtaining the target random number, the target random number being updated based on a clock cycle;

[0039] If the target random number is a first preset value, storing the target operation result into the first memory, if the target random number is a second preset value, storing the target operation result into the second memory, the first preset value being different from the second preset value.

[0040] In other words, the target random number is a random number obtained for storing the target operation result in the case that the target operation result is a real operation result. Alternatively, the target random number is a random number of the target operation result.

[0041] Of course, in other alternative embodiments, the target operation result can be stored based on the target random number in other implementation manners, which are not limited in the embodiments of the present application.

[0042] For example, if the target random number is a first preset value, the target operation result is stored in the first memory, and if the target random number is not the first preset value, the target operation result is stored in the second memory.

[0043] In some embodiments of the present application, the method 200 can further include:

[0044] retrieving the real operation result based on the target random number;

[0045] obtaining a next real operation result by using the Montgomery modular multiplication operation based on the real operation result.

[0046] In other words, in the case that the next real operation result is calculated by using the Montgomery modular multiplication operation, the operation result in the corresponding memory can be read based on the target random number as an input for calculating the next real operation result.

[0047] The Montgomery modular exponentiation process of the embodiments of the present application will be described below in combination with Table 1.

[0048] Table 1. Montgomery modular exponentiation process

[0049]

[0050] As shown in Table 1, the Montgomery modular exponentiation can be performed based on the input A to obtain a target operation result, i.e., P.

[0051] As an example, in the Montgomery modular exponentiation, the exponent e can be stored in RAM_B, the base A can be stored in RAM_A, the constant R 2 modN can be stored in RAM_C, and the modulus N can be stored in RAM_N. The intermediate data can be stored in RAM_U, and the target operation result can be copied to RAM_A to realize the storage of data in the operation process.

[0052] In addition, steps 2, 3 and 5 in Table 1 all involve the Montgomery modular multiplication operation, and the input and output of the Montgomery modular multiplication operation will be described below in combination with Table 2.

[0053] Table 2. Input and output of Montgomery modular multiplication operation

[0054]

[0055]

[0056] As shown in Table 2, for each Montgomery modular multiplication operation, the corresponding memory needs to be stored. In addition, by introducing RAM_X, RAM_X and RAM_A can be understood as the first memory and the second memory in the embodiments of the present application, respectively.

[0057] As an example, the functions of the memories in Table 2 are described below.

[0058] Table 3. Functions of memories

[0059]

[0060]

[0061] As shown in Table 3, different types of data can be stored by different memories.

[0062] It should be noted that the first memory or the second memory involved in the embodiments of the present application can also be understood as a register, a register stack, a storage unit or even a storage address, which is not limited in the embodiments of the present application.

[0063] The way of storing the target operation result is described below by taking Table 4 as an example.

[0064] Table 4. Way of storing the target operation result

[0065]

[0066] As shown in Table 4, if the target random number is 1, the target operation result is stored in RAM_A, and if the target random number is 0, the target operation result is stored in RAM_X.

[0067] In other words, RAM_A and RAM_X are both used to store the operation result of Montgomery modular multiplication, but for modular exponentiation, Montgomery contains real operation results and pseudo operation results. For security considerations, modular exponentiation needs to store the real operation results randomly based on random numbers when calling Montgomery.

[0068] In addition, in the modular exponentiation algorithm, for the first Montgomery operation, the result C of step 2 is stored in RAM_C and remains unchanged throughout the entire modular exponentiation operation, as an operand P for real modular squaring operation in step 4.

[0069] In addition, in step 4, the storage address of the operation result of the first real Montgomery square operation is determined according to the random number to be stored in RAM_A or RAM_X, and the next operation result is still randomly stored in RAM_A or RAM_X according to the random number if it is a real operation result, but if it is a pseudo operation result, it needs to be stored in a different memory from the last result to avoid covering the last real operation result.

[0070] If the connection is a pseudo operation result for several times, the storage location of these times does not change, and the last pseudo operation result is covered each time.

[0071] If the next operation result is a real operation result, it is randomly stored in RAM_A or RAM_X according to the random number again. That is, the storage location of each real operation result is determined by the random number, and the random number is 1, and the storage location is RAM_A, and the random number is 0, and the storage location is RAM_X. The memory used to store the pseudo operation result each time is different from the memory used to store the last real operation result. That is, if the storage location of the last real operation result is RAM_A, the pseudo operation result is stored in RAM_X, and vice versa. Until a new real operation result is performed, the storage address of the real operation result is determined again by the random number.

[0072] Figure 2 is a schematic flowchart of the method 300 for storing data provided by the embodiments of the present application.

[0073] As shown in Figure 2 , the method 300 can include:

[0074] obtaining a target operation result of Montgomery modular multiplication operation;

[0075] If the target operation result is a real operation result, the target operation result is stored in a first register stack, and the first register stack is used to store real operation results, and the first register stack and a second register stack are physically confused, and the second register stack is used to store pseudo operation results.

[0076] By physically confusing the first register stack for storing real operation results and the second register stack for storing pseudo operation results, that is, uniformly arranging the registers in the first register stack and the second register stack, the consumption of hardware circuit resources is avoided, the cost of electric circuit is saved, and even the area and power consumption of the chip can be reduced.

[0077] In other words, if the area and power consumption of the chip are relatively tight, the physical confusion method can be considered.

[0078] In addition, by physically mixing the first register stack for storing the real operation result and the second register stack for storing the pseudo operation result, the attacker cannot distinguish the storage location of the real operation result, thereby resisting not only the side channel attack but also the electromagnetic attack, and improving the security of the chip.

[0079] For example, the first register stack and the second register stack can be determined by experiment or by an application program, so as to improve the mixing effect. Therefore, the storage area of the real operation result and the pseudo operation result can be mixed together without the need of hardware circuit design.

[0080] In other words, the first register stack and the second register stack can be distinguished by experiment or by an application program.

[0081] It should be noted that, in the embodiments of the present application, the physical mixing of the first register stack and the second register stack can be understood as that the first register and the second register are not distinguished in the physical aspect. That is, in the physical aspect, the register stack specially used for storing the pseudo operation result and the register stack specially used for storing the real operation result are not distinguished. For example, from the perspective of the hardware circuit, the first register and the second register are not distinguished. For another example, in the wiring stage of the chip, the first register and the second register are not distinguished.

[0082] In other words, the first register stack and the second register stack can be understood as one component or one device in the physical aspect, and the register stacks in the one component or one device are not distinguished based on whether they are used for storing the real operation result or the pseudo operation result.

[0083] In some embodiments of the present application, the method 300 can further include:

[0084] If the target operation result is the pseudo operation result, the target operation result is stored in the second register stack.

[0085] In some embodiments of the present application, the registers in the first register stack and the registers in the second register stack are mixed in the physical aspect.

[0086] For example, the registers in the first register stack and the registers in the second register stack are not distinguished in the physical aspect. That is, in the physical aspect, the registers in the register stack specially used for storing the pseudo operation result and the registers in the register stack specially used for storing the real operation result are not distinguished.

[0087] Of course, the size of the registers in the register stack involved in the embodiments of the present application can be set according to actual needs, which is not limited in the embodiments of the present application. For example, 1024 bits.

[0088] The preferred embodiments of the present application are described in detail above with reference to the drawings, but the present application is not limited to the specific details of the above-described embodiments. Various simple modifications can be made to the technical solutions of the present application within the technical concept of the present application, and these simple modifications all belong to the protection scope of the present application. For example, in the case where there is no contradiction, each specific technical feature described in the above-described specific embodiments can be combined in any appropriate manner. In order to avoid unnecessary repetition, various possible combination manners are not described again in the present application. For another example, any combination can be made between various different embodiments of the present application, as long as it does not deviate from the idea of the present application, and it should also be considered as the disclosed content of the present application.

[0089] In other words, the embodiments provided by the present application are only used to illustrate the present application, and the selection of the hardware platform architecture, the development environment, the development language, the message acquisition source and the like of the embodiments provided by the present application can be changed. On the basis of the technical solutions provided by the present application, any improvement and equivalent transformation to a certain part according to the principle of the present application should not be excluded from the protection scope of the present application.

[0090] It should also be understood that, in various method embodiments of the present application, the size of the serial number of each process does not mean the order of execution. The execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0091] The method embodiments of the present application are described in detail above in combination with Figure 1 and Figure 2 The device embodiments of the present application are described in detail below in combination with Figures 3 to 5 .

[0092] Figure 3 is a schematic block diagram of the device 300 for storing data provided by an embodiment of the present application.

[0093] As shown in Figure 3 , the device 300 can include:

[0094] The acquisition unit 310 is configured to acquire a target operation result of Montgomery modular multiplication operation.

[0095] The storage unit 320 is configured to, if the target operation result is a real operation result, store the target operation result into a first memory or a second memory based on a target random number, the target random number being used to select a memory for storing the target operation result from the first memory and the second memory, the first memory being different from the second memory.

[0096] In some embodiments of the present application, the storage unit 320 is further configured to:

[0097] If the target operation result is a pseudo operation result, the target operation result is stored in a memory different from a memory used to store a previous real operation result for storing the target operation result, the pseudo operation result being a result calculated using the previous real operation result.

[0098] In some embodiments of the present application, the storage unit 320 is specifically configured to:

[0099] obtain the target random number, the target random number being updated based on a clock cycle;

[0100] If the target random number is a first preset value, the target operation result is stored in the first memory, and if the target random number is a second preset value, the target operation result is stored in the second memory, the first preset value being different from the second preset value.

[0101] In some embodiments of the present application, the obtaining unit 310 is further configured to:

[0102] obtain the real operation result based on the target random number;

[0103] obtain a next real operation result using the Montgomery modular multiplication operation based on the real operation result.

[0104] Figure 4 is a schematic block diagram of a device 400 for storing data provided by an embodiment of the present application.

[0105] As shown in Figure 4 , the device 400 can include:

[0106] an obtaining unit 410, configured to obtain a target operation result of a Montgomery modular multiplication operation;

[0107] a storage unit 420, configured to, if the target operation result is a real operation result, store the target operation result in a first register file, the first register file being dedicated to storing real operation results, the first register file and a second register file being physically arranged in a confused manner, the second register file being dedicated to storing pseudo operation results.

[0108] In some embodiments of the present application, the storage unit 420 is further configured to:

[0109] If the target operation result is a pseudo operation result, the target operation result is stored in the second register file.

[0110] In some embodiments of the present application, the registers in the first register file and the registers in the second register file are physically obfuscatedly arranged.

[0111] It should be understood that the apparatus embodiments and the method embodiments can correspond to each other, and similar descriptions can be referred to the method embodiments. To avoid repetition, no further description is given here. Specifically, Figure 2 The apparatus 300 and Figure 3 The apparatus 400 shown can correspond to the respective subjects performing the methods 100 and 200 of the embodiments of the present application, respectively, and the foregoing and other operations and / or functions of the respective modules in the apparatus 300 or the apparatus 400 are respectively for realizing Figure 1 and Figure 2 the respective processes in the respective methods, for brevity, no further description is given here.

[0112] The apparatus 300 and the apparatus 400 of the embodiments of the present application are described above in connection with the drawings from the perspective of functional modules. It should be understood that the functional modules can be implemented in the form of hardware, or in the form of instructions of software, or in the form of a combination of hardware and software modules. Specifically, the steps of the method embodiments in the embodiments of the present application can be completed by the integrated logic circuit of hardware in the processor and / or the instructions of software, the steps of the method disclosed in the embodiments of the present application can be directly embodied as hardware code processing for execution by the processor, or executed by a combination of hardware and software modules in the code processing processor. Alternatively, the software modules can be located in the mature storage medium in the field, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps in the above-mentioned method embodiments in combination with the hardware thereof.

[0113] Figure 5 is a schematic block diagram of the chip 500 provided by the embodiments of the present application.

[0114] As Figure 5 shown, the chip 500 can include:

[0115] The memory 510 is used to store the computer program 511 and transmit the program code 511 to the processor 520. In other words, the processor 520 can call and run the computer program 511 from the memory 510 to realize the method in the embodiments of the present application.

[0116] For example, the processor 520 can be used to execute the steps in the above-mentioned method 200 according to the instructions in the computer program 511.

[0117] In some embodiments of the present application, the processor 520 can include but is not limited to:

[0118] The chip 500 can also include memory 510 that retains instructions for processing by the processor 520. As will be described in detail below, the memory 510 can be considered a non-transitory storage medium. Accordingly, the memory 510 can include a hard disk, or flash memory. Additionally or alternatively, the memory 510 can include a volatile memory, such as a random access memory (RAM) comprising a static RAM (SRAM) and / or a dynamic RAM (DRAM) such as synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and / or direct Rambus RAM (DR RAM). Further, the memory 510 can include a non-volatile memory, such as a read only memory (ROM) such as programmable ROM (PROM) and / or electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, etc. The memory 510 can also include a temporary non- volatile memory, such as a register, which can be a register including an array of single -edge transistors.

[0119] In some embodiments of the present application, the memory 510 includes, but is not limited to:

[0120] volatile memory and / or non-volatile memory. The non-volatile memory can be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically EPROM (EEPROM), or a flash memory. The volatile memory can be a Random Access Memory (RAM) used as an external cache. By way of example, and not limitation, many forms of RAM are available, such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), Synch link DRAM (SLDRAM), and Direct Rambus RAM (DR RAM).

[0121] In some embodiments of the present application, the computer program 511 can be divided into one or more modules, which are stored in the memory 510 and executed by the processor 520 to complete the method for storing data provided by the present application. The one or more modules can be a series of computer program instruction segments capable of completing a specific function, which are used to describe the execution process of the computer program 511 in the chip 500.

[0122] As Figure 5As shown, the chip 500 can further include:

[0123] The transceiver 530 can be connected to the processor 520 or the memory 510.

[0124] The processor 520 can control the transceiver 530 to communicate with other devices, specifically, can send information or data to other devices, or receive information or data sent by other devices. The transceiver 530 can include a transmitter and a receiver. The transceiver 530 can further include an antenna, and the number of antennas can be one or more.

[0125] It should be understood that various components in the chip 500 are connected through a bus system, wherein the bus system includes a data bus, a power supply bus, a control bus and a state signal bus in addition to the data bus.

[0126] It should also be understood that the chip 500 can be the apparatus 300 or the apparatus 400 of the embodiments of the present application, and the chip 500 can implement the corresponding processes implemented by the apparatus 300 or the apparatus 400 in the various methods of the embodiments of the present application, that is, the chip 500 of the embodiments of the present application can correspond to the subject performing the corresponding method according to the embodiments of the present application. In order to be brief, it will not be repeated here.

[0127] According to an aspect of the present application, a computer storage medium is provided, and the computer storage medium stores a computer program. The computer program is executed by a computer, so that the computer can execute the method of the method embodiment. Alternatively, the embodiments of the present application also provide a computer program product including instructions. The instructions are executed by a computer, so that the computer executes the method of the method embodiment.

[0128] According to another aspect of the present application, a computer program product or a computer program is provided, and the computer program product or the computer program includes computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions, so that the computer device executes the method of the method embodiment.

[0129] In other words, when implemented using software, the functions can be implemented in whole or in part using a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the whole or part of the flow or function according to the embodiments of the present application is generated. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions can be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) manner. The computer readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media sets. The available media can be magnetic media (such as floppy disk, hard disk, magnetic tape), optical media (such as digital video disc (DVD)), or semiconductor media (such as solid state disk (SSD)) and the like.

[0130] Those skilled in the art can realize that the modules and algorithm steps of the examples described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0131] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the above described device embodiments are only schematic, for example, the division of the modules is only a logical function division, and actual implementation can have another division manner, for example, a plurality of modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the shown or discussed mutual ones can be indirect coupling or communication connection through some interfaces, devices or modules, and can be electrical, mechanical or other forms.

[0132] The modules described as separate components may or may not be physically separate, and the components displayed as modules may or may not be physical modules, i.e., may be located in one place, or may be distributed to multiple network elements. Part or all of the modules can be selected as needed to achieve the purpose of the embodiments of the present application. For example, the functional modules in various embodiments of the present application can be integrated in one processing module, or each module can be physically present separately, or two or more modules can be integrated in one module.

[0133] The above is merely specific embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical scope disclosed by the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method of storing data, characterized by, The method comprises: obtaining a target operation result of Montgomery modular multiplication; if the target operation result is a real operation result, storing the target operation result into a first memory or a second memory based on a target random number, the target random number being used to select a memory for storing the target operation result in the first memory and the second memory, the first memory being different from the second memory; the method further comprises: if the target operation result is a false operation result, storing the target operation result into a memory in the first memory and the second memory, and different from a memory used for storing a previous real operation result of the target operation result, the false operation result being a result calculated using the previous real operation result; the target random number is updated based on a clock cycle.

2. The method of claim 1, wherein, The method of storing the target operation result into the first memory or the second memory based on the target random number if the target operation result is the real operation result comprises: obtaining the target random number; if the target random number is a first preset value, storing the target operation result into the first memory, and if the target random number is a second preset value, storing the target operation result into the second memory, the first preset value being different from the second preset value.

3. The method of claim 1, wherein, The method further comprises: calling the real operation result based on the target random number; obtaining a next real operation result using the Montgomery modular multiplication based on the real operation result.

4. A method of storing data, characterized by, The method comprises: obtaining a target operation result of Montgomery modular multiplication; if the target operation result is a real operation result, storing the target operation result into a first register stack, the first register stack being used for storing real operation results only, the first register stack and a second register stack being physically confusedly arranged, the second register stack being used for storing false operation results only; the method further comprises: if the target operation result is a false operation result, storing the target operation result into the second register stack.

5. The method of claim 4, wherein, The registers in the first register stack and the registers in the second register stack are physically confusedly arranged.

6. An apparatus for storing data, the apparatus configured to perform the method of any one of claims 1-3, wherein, The method comprises: an obtaining unit, configured to obtain a target operation result of Montgomery modular multiplication; a storing unit, configured to, if the target operation result is a real operation result, store the target operation result into a first memory or a second memory based on a target random number, the target random number being used to select a memory for storing the target operation result in the first memory and the second memory, the first memory being different from the second memory.

7. An apparatus for storing data, the apparatus configured to perform the method of any one of claims 4-5, wherein, The method comprises: an obtaining unit, configured to obtain a target operation result of Montgomery modular multiplication; a storing unit, configured to, if the target operation result is a real operation result, store the target operation result into a first register stack, the first register stack being used for storing real operation results only, the first register stack and a second register stack being physically confusedly arranged, the second register stack being used for storing false operation results only.

8. A chip, characterized by The method comprises: a processor and a memory for storing a computer program, the processor being configured to invoke and run the computer program stored in the memory to perform the method of any one of claims 1 to 3 or the method of any one of claims 4 to 5.

9. A computer-readable storage medium, characterized in that, a computer program for causing a computer to perform the method of any one of claims 1 to 3 or the method of any one of claims 4 to 5.

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