Current supply system and method of operation thereof, related integrated circuit and power supply system

Abstract

The invention relates to a current supply system and method of operation thereof, related integrated circuit and power supply system. A control circuit for a voltage source generates a reference signal for the voltage source, wherein the reference signal is indicative of a requested output voltage to be generated by the voltage source. A digital feedforward control circuit calculates a digital feedforward regulation value indicative of the requested output voltage by determining a maximum voltage drop at a string of solid state light sources. A digital feedback control circuit determines a minimum voltage drop for a current regulator / limiter of the string and determines a digital feedback correction value from the minimum voltage drop. The control circuit then sets the reference signal after start-up from the digital feedforward regulation value and corrects the reference signal from the digital feedback correction value.

Description

[0001] CLAIM

[0002] This application claims the priority benefit of Italian application No. 102020000027504 filed on November 17, 2020, the contents of which are incorporated herein in their entirety to the maximum extent legally permitted. TECHNICAL FIELD

[0003] Embodiments of the present disclosure relate to a solution for reducing power losses in a power supply system of a light emitting diode or similar solid state light source. BACKGROUND

[0004] Power supply circuits, such as AC / DC or DC / DC switching mode power supplies, are well known in the art. There are many types of electronic converters, which are mainly divided into isolated and non-isolated converters. For example, non-isolated electronic converters are “buck”, “boost”, “buck-boost”, “Cuk”, “Flyback”, “Forward”, “Half-bridge” and “Full-bridge” type converters. Conversely, isolated electronic converters are, for example, “Flyback”, “Forward”, “Half-bridge” and “Full-bridge” type converters. This type of converters is well known to the person skilled in the art, as demonstrated, for example, by the application note AN513 / 0393 “Topologies for Switching Mode Power Supplies”, L. Wuidart, 1999, STMicroelectronics (incorporated herein by reference).

[0005] FIG. 1 is a schematic diagram of a DC / DC electronic converter 20. In particular, the generic electronic converter 20 comprises two input terminals 200a and 200b for receiving a DC voltage Vin and two output terminals 202a and 202b for providing a DC voltage Vout. For example, the input voltage Vin can be provided by a DC voltage source 10, such as a battery, or can be obtained from an AC voltage by means of a rectifier circuit, such as a bridge rectifier, and possibly a filter circuit. Conversely, the output voltage Vout can be used to power a load 30.

[0006] As well known, the electronic converter comprises one or more reactive components, such as inductances and / or capacitances, and one or more electronic switches configured to control the current flow from the input terminals 200a and 200b to the one or more reactive components and / or from the one or more reactive components to the output terminals 202a and 202b.

[0007] For example, FIG. 2 ​A typical electronic converter 20a is shown. In particular, the electronic converter 20a comprises a switching stage / circuit 28 connected between input terminals 200a, 200b and output terminals 202a, 202b. Such switching stage 28 comprises one or more reactive components, e.g. one or more inductances L, e.g. inductors or transformers, and / or one or more capacitances C. Moreover, the switching stage 28 comprises one or more electronic switches, such as switches Q1 and Q2, configured to control one or more currents flowing through the one or more reactive components. For example, in a typical electronic converter, the one or more electronic switches are used to control a current flowing through an inductance L, e.g. an inductor (e.g. in the case of a boost, buck or buck-boost converter) or a transformer (e.g. in the case of a flyback, forward or half-bridge converter).

[0008] The electronic converter 20a typically further comprises a control circuit 22a configured to drive the switching of the one or more electronic switches so as to obtain a requested output voltage V out .

[0009] For this purpose, the electronic converter 20a can comprise, for example, a feedback (FBC) circuit 24, e.g. a voltage divider, configured to generate a feedback signal FB indicative of (and preferably proportional to) the output voltage V out , and the control circuit 22a is configured to generate the drive signals for the one or more electronic switches by comparing the feedback signal FB with a reference signal, e.g. a reference voltage V ref .

[0010] For example, as is well known in the art, the switching stage 28 can be configured so that the current flowing through the inductance L can be controlled (via the one or more electronic switches) in a continuous conduction mode (CCM), a discontinuous conduction mode (DCM) or a transitional mode (TM).

[0011] For example, in CCM, the control circuit 22a typically drives the electronic switches of the switching stage 28 (using a driver circuit 220) with a switching period comprising two switching phases, wherein: during a first phase, the current flowing through the inductance L increases; and during a second phase, the current flowing through the inductance L decreases.

[0012] Conversely, in DCM, the control circuit 22a typically drives the electronic switches of the switching stage 28 with a switching period comprising three switching phases, wherein: during a first phase, the current flowing through the inductance L increases; during a second phase, the current flowing through the inductance L decreases, wherein the second phase ends when the current flowing through the inductance L reaches zero; and during a third phase, the current flowing through the inductance L remains zero.

[0013] For example in DCM, the start of the third phase can be inherent to the converter topology (e.g. by using one or more diodes that automatically turn off when the current through the inductor L reaches zero), or as shown in FIG. 2 , by using a zero current detection (ZCD) circuit 26 that is configured to generate a zero current signal ZC by monitoring a signal CS indicative of (and preferably proportional to) the current through the inductor L.

[0014] Generally, a large number of drive schemes are known in the art. For example, in various known solutions, the duration of the switching period T SW can be constant, and the duration of the first phase can be determined via a proportional integral (PI) or proportional integral derivative (PID) regulator that is configured to regulate the difference between a reference signal V ref and a feedback signal FB provided by a feedback circuit 24. This is for example schematically shown by a PWM generator circuit 220 that is configured to generate a PWM signal DRV having a switching period T SW (e.g. having a fixed or predetermined time period), wherein the signal DRV is set to a first logic level (e.g. a high level) for a first duration T ON , and is set to a second logic level (e.g. a low level) for a second duration T OFF , wherein T SW = T ON + T OFF (see also FIG. 3 ). For example, the circuit 220 can be an analog and / or digital PI or PID regulator that is configured to vary the on duration T ON in order to regulate the difference between the reference signal V ref and the feedback signal FB to zero.

[0015] Hence, in the considered example, the electronic converter 20, 20a is a voltage source that is configured to provide a regulated output voltage V out . Such a voltage source can also be used to provide a constant current load. For example, FIG. 4A and FIG. 4B show typical cases in which the (regulated) voltage source 20 is used to power a given number n of parallel connected light emitting diode (LED) strings 34, wherein each LED string comprises a given number N of LEDs or similar solid state light sources L, such as laser diodes or OLEDs (organic light emitting diodes). For example, in FIG. 4A and FIG. 4BIn the example shown, four strings are shown, wherein: the first string comprises five light sources L; the second string comprises four light sources L; the third string comprises three light sources L; and the fourth string comprises two light sources L.

[0016] For example, such strings 34 can be used as background illumination for an LCD panel, or generally in any application where the current flowing through each string 34 has to be controlled individually.

[0017] Furthermore, as FIG. 5 is shown, the current flowing through each light source L of a given string 34 can also be controlled individually, generally. For this purpose, for example, each light source L can be connected in parallel to a respective electronic switch Sw, i.e. switches SW1,..., SWN for the light sources L1,..., LN of a given string 34, wherein each electronic switch is driven by a respective driving signal Sw_ctrl1,..., Sw_ctrlN. Thus, by also using individual control of the light sources L, the LED string can also be used as an active LED or OLED panel.

[0018] Thus, in many applications: the number N of solid state light sources of the individual strings 34 can be different; and / or the number of switched on solid state light sources L of one or more strings 34 can vary over time.

[0019] However, this means that the voltage drop at the individual parallel connected LED strings 34 can differ from each other and / or can vary over time. Furthermore, the voltage drop can also vary due to manufacturing tolerances, temperature (especially in case of OLED panels) and aging. For this reason, the LED strings are not usually supplied with a voltage V out directly via the voltage source 20, but a current regulator / limiter 32 is connected in series with each LED string 34.

[0020] For example, in FIG. 4A , the positive terminal of each LED string 34 is connected (e.g. directly connected) to the positive output terminal 202a, and the negative terminal of each LED string 34 is connected (e.g. directly connected) to the negative output terminal 202b via the respective current regulator / limiter 32 (i.e. current sink). FIG. 4B , the negative terminal of each LED string 34 is connected (e.g. directly connected) to the negative output terminal 202b, and the positive terminal of each LED string 34 is connected (e.g. directly connected) to the positive output terminal 202a via the respective current regulator / limiter 32 (i.e. current source).

[0021] Hence, each current regulator / limiter 32 is configured to set (in case of a regulator) or limit (in case of a current limiter) the value of the current flowing through the respective LED string 34 to, e.g., a value I1 for the first string, a value I2 for the second string, etc. For instance, typically each current regulator / limiter 32 is configured to set the respective current in accordance with a control signal CTRL, e.g., to zero, thereby switching off the respective LED string, or to a given (fixed or settable) value, thereby switching on (activating) the respective LED string, wherein the brightness of the light emitted by the respective LED string depends on the given value.

[0022] Typically, as is known, in this way, also the color of the light emitted by the LED strings can be set by controlling the intensity of the light emitted by the various light sources L.

[0023] For instance, for this purpose, each current regulator / limiter 32 can be configured to switch on or off the respective LED string and / or to set the value of the respective current in accordance with one or more (analog and / or digital) control signals, such as a control signal CTRL1 for the first current regulator / limiter 32, a control signal CTRL2 for the second current regulator / limiter 32, etc. Typically, in addition to the issues discussed before, also the setting of different values of the current flowing through the LED strings typically implies that the voltage drop at each light emitting element L can vary over time.

[0024] For instance, by using a pulse width modulated (PWM) signal for the control signal CTRL, the (average) intensity of the light emitted by the light sources of a given string 34 depends on the duty cycle of the respective PWM signal CTRL. Similarly, by using a PWM signal for the signals Sw_ctrl1,..., Sw_ctrlN, the (average) intensity of the light emitted by each light source of a given string 34 depends on the duty cycle of the respective PWM signal Sw_ctrl.

[0025] Hence, typically the given (maximum) value of the current regulator / limiter 32 is fixed, and the brightness of the light sources 34 is controlled via the PWM signals CTRL and / or Sw_CTRL, by switching on and off the strings 34 and / or the individual light sources L. In fact, the current regulator / limiter 32 is configured to set the value of the current flowing through each LED string 34. Additionally, optionally, also the various light sources of each LED string 34 can be individually switched on or off, whereby the current can flow only through a subset of the light sources, i.e., the current regulator / limiter 32 is configured to set a global current for the respective LED string, and additional switches can be used to disable the current flowing through one or more of the light sources of the string.

[0026] Typically, the current regulator / limiter 32 is a linear current regulator, which thus means that the voltage V out The difference between the voltage drop is applied to the current regulator / limiter 32, which basically dissipates the excess power, thus generating electrical losses.

[0027] For this reason, it is generally preferable to maintain the voltage V out slightly higher than the maximum voltage drop at the LED string. Thus, in the case of a voltage V out fixed, the voltage V out must be equal to (or greater than) the worst case that requires the maximum supply voltage. Conversely, adaptive systems are also known, for example from US patent application publication No. 2004 / 0233144 or 2010 / 0156315 or US patent No. 6,864,641, all incorporated herein by reference, in which the value of the output voltage V out varies according to the voltage drop at the LED string 34 or at the current regulator / limiter 32.

[0028] This solution typically includes a calibration phase in which the maximum voltage drop at the LED string 34 is determined. For this purpose, for example, the operating function of the LED panel is periodically interrupted by the calibration process itself, by switching on the LED strings one at a time or all at the same time.

[0029] However, in the case where the LEDs are used to signal a dangerous situation, for example in the automotive sector, for example in the case of rear lights that should be able to signal a sudden braking or direction indicator, these methods represent a significant limitation of the LED system. Moreover, for example, in the case of active LED panels, the number of active light sources per string can frequently change, whereby the hypothesis of the worst case still generates significant power losses.

[0030] In view of the above, there is a need in the art to provide a solution for dynamically adapting the output voltage of a voltage source based on the actual load demand. SUMMARY

[0031] According to one or more embodiments, a current supply system is provided. Embodiments also relate to related integrated circuits, power supply systems and methods of operating a current supply system.

[0032] Various embodiments of the present disclosure relate to a current supply system implemented, for example, in an integrated circuit.

[0033] In particular, in various embodiments, the current supply system comprises one or more first terminals configured to be connected to a first output terminal of the voltage source and a plurality of second terminals, wherein each of the second terminals is configured to be connected to a second output terminal of the voltage source via a respective string of solid state light sources.

[0034] In various embodiments, the current supply system comprises a plurality of current regulators or limiters, wherein each of the second terminals is connected to at least one of the one or more first terminals via a respective current regulator or limiter, wherein each of the current regulators or limiters is configured to limit the current flowing through the string of solid state light sources connected to the respective second terminal to a respective maximum value. Thus, the current supply system can be used to limit the current flow in a power supply system also comprising the voltage source and optionally the string of solid state light sources.

[0035] In various embodiments, the current supply system further comprises a third terminal configured to provide a reference signal to the voltage source, wherein the reference signal is indicative of a requested output voltage to be generated by the voltage source between the first output terminal and the second output terminal of the voltage source. Thus, the control circuit can be configured to generate this reference signal.

[0036] In particular, in various embodiments, the control circuit comprises at least one analog-to-digital converter and a digital-to-analog converter conversion circuit. In particular, the at least one analog-to-digital converter is configured to obtain digital samples of the voltage at the second terminals and of the voltage between the first output terminal and the second output terminal of the voltage source, i.e. the output voltage generated by the voltage source. The digital-to-analog converter conversion circuit is configured to receive the digital regulation value and to provide the reference signal at the output to the third terminal / voltage source.

[0037] For example, typically the reference signal can be used to set a reference voltage of the voltage source, e.g. the reference signal can be proportional to the requested output voltage to be generated by the voltage source. In this case, the digital-to-analog converter conversion circuit can comprise an analog-to-digital converter configured to directly generate the reference signal from the digital regulation value. However, the reference signal can also be used to change a feedback signal of the voltage source. For example, in this case, the third terminal can be coupled to a feedback terminal of the voltage source in order to change the feedback signal indicative of the output voltage generated by the voltage source.

[0038] In various embodiments, the control circuit comprises both a digital feedforward control circuit and a digital feedback control circuit.

[0039] In various embodiments, the feedforward control circuit is configured to determine a maximum voltage drop between the second terminal and the second output terminal of the voltage source (i.e. at the string of solid state light sources) from the digital samples and to calculate a digital feedforward adjustment value indicative of the requested output voltage by adding a given margin to the maximum voltage drop.

[0040] In contrast, in various embodiments, the feedback control circuit is configured to determine a minimum voltage drop at the plurality of current regulators or limiters from the digital samples and to determine a feedback correction value from a difference between the minimum voltage drop and the margin.

[0041] In various embodiments, the control circuit is configured to set the digital adjustment value to a first value indicative of a requested maximum output voltage in response to a start-up of the current supply system, i.e. initially the voltage source provides a maximum supply voltage.

[0042] In various embodiments, the control circuit is then configured to determine whether the digital adjustment value corresponds to the first (maximum) value. In this case, the control circuit sets the digital adjustment value in accordance with the feedforward value, e.g. sets the digital adjustment value to the feedforward value, whereby the voltage source "jumps" from the maximum value to a new output voltage corresponding to the feedforward value. In contrast, when the digital adjustment value does not correspond to the first value (e.g. because the feedforward value has already been used), the control circuit can add the feedback correction value to the digital adjustment value, thereby enabling a fine tuning of the output voltage.

[0043] Generally, the control circuit can also detect various events and set the digital adjustment value to the maximum value (thereby re-activating the feedforward control) or to the minimum value (thereby de-activating the current supply to the string of solid state light sources).

[0044] For example, in various embodiments, each of the current regulators or limiters is configured to receive at least one control signal from the control circuit indicative of at least a first operating mode and a second operating mode. For example, when the at least one control signal is indicative of the first operating mode, the respective current regulator or limiter can be configured to de-activate the current. In contrast, when the at least one control signal is indicative of the second operating mode, the respective current regulator or limiter can be configured to limit the current to a respective maximum value. For example, for this purpose, the at least one control signal can comprise a pulse width modulated signal, wherein a first logic level of the pulse width modulated signal is indicative of the first operating mode and a second logic level of the pulse width modulated signal is indicative of the second operating mode. Generally, the at least one control signal can also be indicative of the maximum value. For example, such a control signal can be used to selectively switch on or off the string and / or to perform dimming of the light emitted by the light source.

[0045] For example, in this case the control circuit can be configured to determine from the control signal whether all strings of solid state light sources should be switched off. For example, in case of a PWM signal the control circuit can determine whether the control signal indicates that all current regulators or limiters should be switched off for a complete PWM period or for a number of PWM periods (first mode of operation). In this case the control circuit can also (essentially) deactivate the voltage source by setting the digital regulation value to a second value indicative of the requested minimum output voltage.

[0046] In addition, the control circuit can be configured to determine from the control signal whether at least one string of solid state light sources should be switched on (second mode of operation). For example, in case of a PWM signal the control circuit can determine whether the control signal indicates that at least one current regulator or limiter should be switched on during the current PWM period.

[0047] In particular, in case the output voltage is deactivated, the control circuit can resume operation by starting a new feed-forward control action. In particular, in response to having determined that at least one current regulator or limiter should be switched on, the control circuit can verify whether the digital regulation value corresponds to the second (minimum) value (indicative of the output voltage having its minimum value). In this case the control circuit can set the digital regulation value to the first (maximum) value. Hence, in response to setting the digital regulation value to the first (maximum) value, the voltage source will provide the maximum output voltage and the control circuit will again set the digital regulation value in dependence of the feed-forward value (after a given time period).

[0048] In various embodiments, the control circuit can also determine whether the light source is indeed powered. For example, for this purpose the control circuit can determine whether the control signal indicates that at least one current regulator or limiter should use the second mode of operation. In this case the control circuit can determine whether a current is flowing through the at least one current regulator or limiter that should use the second mode of operation. For example, in response to determining that no current is flowing through at least one of the current regulators or limiters that should use the second mode of operation, the control circuit can change the digital regulation value so as to increase the requested output voltage. BRIEF DESCRIPTION OF DRAWINGS

[0049] Embodiments of the present disclosure will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which:

[0050] FIG. 1 a typical power supply system is shown;

[0051] FIG. 2 and FIG. 3 an example of a voltage source implemented with an electronic converter is shown;

[0052] FIG. 4A ,FIG. 4B and FIG. 5 An example of a power supply system is shown, in which a voltage source and a current supply system are used to supply a plurality of solid state light sources in series;

[0053] FIG. 6 and FIG. 7 An embodiment of a current supply system for a string of solid state light sources is shown;

[0054] FIG. 8 and FIG. 9 An embodiment of a control circuit for a current supply system for FIG. 6 and FIG. 7 is shown;

[0055] FIG. 10 and FIG. 11 An embodiment of the operation of a control circuit for FIG. 8 and FIG. 9 is shown;

[0056] FIG. 12 and FIG. 13 An embodiment is shown in which a plurality of current supply systems are connected to the same voltage source; and

[0057] FIG. 14 A further embodiment of a current supply system for a string of solid state light sources is shown. DETAILED DESCRIPTION

[0058] In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments. One or more of the described embodiments can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail in order to avoid obscuring aspects of the embodiments.

[0059] Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.

[0060] The headings provided herein are merely for convenience and do not interpret the scope or meaning of the embodiments.

[0061] In the following FIGS. 6 to 14 , it will be noted that reference has been made to FIG. 1 and FIG. 5The described components, elements or assemblies are denoted by the same reference numerals used previously in these figures; the description of these aforementioned elements will not be repeated below in order not to make this concrete embodiment too complex.

[0062] As previously mentioned, the present description relates to a solution for supplying current to a load, such as a string 34 of solid state light sources L as described with respect to FIG. 4A , FIG. 4B or FIG. 5 .

[0063] FIG. 6 A first embodiment is shown which is in line with the description of FIG. 4B , and FIG. 7 A first embodiment is shown which is in line with the description of FIG. 4B .

[0064] In particular, FIG. 6 and FIG. 7 Embodiments of a power supply system for a plurality of strings 34 of solid state light sources L, such as strings of LEDs or OLEDs, are shown.

[0065] In particular, in the considered embodiments, the power supply system comprises a variable voltage source 20 comprising: two input terminals (for example, the terminals 200a and 200b described with respect to FIG. 1 and FIG. 2 ) configured to receive an input voltage V in , and a positive output terminal 202a and a negative output terminal 202b configured to provide an (adjusted) output voltage V out .

[0066] In general, the voltage source 20 can be a linear regulator, or preferably a switched mode electronic converter as described with respect to FIG. 2 and FIG. 3 . For example, the voltage source 20 is schematically shown in FIG. 6 and FIG. 7 , which is configured to receive: a feedback signal FB indicative of the output voltage V out (and preferably proportional to the output voltage) from a feedback circuit 24, for example a voltage divider comprising at least two resistors R1 and R2; and a reference signal V out indicative of the requested output voltage V ref (and preferably proportional to the requested output voltage).

[0067] In various embodiments, the feedback circuit 24 can also be directly integrated in the voltage source 20.

[0068] In the considered embodiments, the power supply system further comprises a current supply system. In particular, the current supply system comprises:

[0069] one or more first terminals configured to be connected to a first output terminal of the voltage source 20, e.g. the positive output terminal 202a in FIG. 6 FIG. 7 the negative output terminal 202b in

[0070] a given number n of second terminals OUT1,..., OUTn (e.g. terminals OUT1,..., OUT4), wherein each second terminal OUT is configured to be connected to a second output terminal of the voltage source 20 via a respective string 34 of solid state light sources, e.g. the positive output terminal 202a in FIG. 6 FIG. 7 the negative output terminal 202b in

[0071] a given number N of current regulators / limiters 32, wherein a respective current regulator / limiter 32 is (directly) connected between a respective second terminal OUT and at least one of the one or more first terminals.

[0072] In particular, each current regulator / limiter 32 is configured to limit the current flowing through the current regulator / limiter 32 to a respective maximum value in dependence on a respective control signal CTRL (i.e. signals CTRL1,..., CTRLn), whereby each current regulator / limiter 32 is configured to limit the current flowing through the respective string 34 of solid state light sources to a respective maximum value. In particular, the current regulator / limiter 32 is a current sink in the embodiment shown in FIG. 6 FIG. 7 and a current source in the embodiment shown in

[0073] In the considered embodiment, the current supply system further comprises a further terminal for providing a reference signal V ref to the voltage source 20 and a control circuit 40 configured to generate the control signals CTRL1,..., CTRLn, to monitor the voltage at each of the second terminals OUT1,..., OUTn, and to generate the reference signal V ref at the further terminal, thereby setting the requested output voltage V out .

[0074] In various embodiments, the current supply system, in particular the current regulators / limiters 32 and the control circuit 40, can be implemented in the same integrated circuit. In various embodiments, also the control circuit 22 (see FIG. 2 ) of the voltage source 20 can be implemented in the same integrated circuit.

[0075] ​​​As mentioned before, in various embodiments the control signals CTRL can be binary signals, wherein each current regulator / limiter 32 is configured to limit the current flowing through the respective string 34 to zero when the signal CTRL has a first logic value and to a respective (constant) maximum value when the signal CTRL has a second logic value. However, the signals CTRL can also be analog signals capable of directly setting the maximum value or digital signals capable of setting a plurality of maximum values.

[0076] For example, in various embodiments the control circuit 40 is configured to generate the signals CTRL as pulse width modulated (PWM) signals, wherein the signals have the same switching period but each signal CTRL has a respective duty cycle.

[0077] In various embodiments, the strings 34 can also comprise a different number of light sources L (see description of FIG. 4A and FIG. 4B ). Additionally or alternatively, each light source L can also have an associated respective electronic switch configured to selectively short-circuit the light source L, thereby allowing individual control of the power supply of each light source (see description of FIG. 5 ).

[0078] Hence, each signal CTRL can also comprise a plurality of analog and / or digital signals, e.g. signals for setting the maximum value, and one or more PWM signals for switching on and off the respective LED string 34 and / or light source L or a subset of the respective LED string 34.

[0079] For example, in various embodiments the control circuit 40 can be configured to generate the signals CTRL and optionally drive signals Sw CTRL for additional electronic switches Sw in order to generate a requested illumination pattern of e.g. an active LED or OLED panel. For this purpose, the control circuit 40 can comprise a communication interface for receiving data identifying the requested illumination pattern, for example.

[0080] Hence, in various embodiments the number of activated strings 34 of solid state light sources can change over time. Moreover, in various embodiments the number of solid state light sources of a string 34 can differ (based on the application) or the number of activated solid state light sources of an activated string 34 can change over time, i.e. the voltage drop at an activated string 34 can change over time. Moreover, the voltage drop at an activated string 34 can also change due to other reasons, such as temperature changes and / or due to different settings of the maximum current flowing through the string.

[0081] In various embodiments, the control circuit 40 is configured to determine the voltage V OUT1..., V OUTn generating a reference signal V ref . Typically, the control circuit 40 can be configured to measure the voltage V out at the terminals OUT1,..., OUTn relative to the positive terminal 202a (i.e. V OUT1 ,..., V OUTn , preferably relative to the negative terminal 202b (i.e. ground). For example, in FIG. 6 , the control circuit 40 is configured to measure the voltage at the terminal OUT relative to one or more first terminals (connected to the negative terminal / ground 202b), thereby measuring the voltage drop at the respective current regulator / limiter 32. Conversely, in FIG. 7 , the control circuit 40 is configured to measure the voltage at the terminal OUT relative to the negative terminal / ground 202b, thereby measuring the voltage drop at the respective string of solid state light sources 34.

[0082] In particular, in various embodiments, the control circuit 40 is configured to determine the maximum voltage drop V LED_MAX at the string 34, and to set the output voltage V out (via the reference signal V ref ) to a value that is larger than a given amount V M . In various embodiments, this dynamic adaptation is performed without interrupting the current illumination pattern projected by the string 34. For example, this is particularly interesting in the automotive field, where the string 34 can be used to signal a warning situation or a dangerous situation. In various embodiments, the dynamic adaptation can also adjust the output voltage in order to adapt the output voltage to other variations that are particularly relevant for OLEDs, process spread and / or temperature, such as aging phenomena.

[0083] In various embodiments, the above operations are performed via digital processing within the control circuit 40. For example, this has the advantage that the control circuit 40 can also perform a series of further diagnostic and functional operations, such as:

[0084] - monitoring the load conditions, for example in order to determine temporary or permanent open circuit loads or short circuit conditions, which can for example be used to disable the respective string of light sources;

[0085] - monitoring one or more temperatures of the current regulator / limiter 32 and / or the string 34, which can be used to disable the respective current regulator 32 and string 34, or to reduce the respective maximum current;

[0086] - implementing a thermal derating model, wherein the maximum current is adapted based on a measurement of an excessive temperature of the light source.

[0087] As mentioned above, the current supply system typically comprises a given number n of current regulators / limiters 32 connected to respective terminals OUT1,..., OUTn, wherein each terminal OUT1,..., OUTn can be connected to an output terminal of the voltage source 20 via a respective string 34 of solid state light sources. Typically, the number of strings 32 actually connected to the n current regulators / limiters 32 can also be smaller than n. Moreover, each current regulator / limiter 32 can always be enabled, or preferably selectively enabled via a respective control signal CTRL1,..., CTRLn, i.e. the number of active strings 34 can be fixed or variable.

[0088] In various embodiments, the control circuit 40 is configured to determine the activated string 34 of solid state light sources, e.g. in dependence of the control signal CTRL1,..., CTRLn; and to determine a digital sample indicative of the maximum voltage drop (and preferably proportional to the maximum voltage drop) at the activated string 34 of solid state light sources.

[0089] As mentioned before, the control circuit 40 can be configured to directly monitor the voltage drop at the string 34 of solid state light sources. In this respect, the selection of the maximum voltage drop can be performed at an analog level (i.e. before analog-to-digital conversion) or at a digital level (i.e. after analog-to-digital conversion).

[0090] Alternatively, the control circuit 40 can be configured to monitor the voltage drop at the current regulator / limiter 32. In this case, the control circuit 40 can determine the maximum voltage drop at the current regulator / limiter 32 in dependence of the voltage drop at the current regulator / limiter 32 and the voltage V out The voltage drop at the string 34 of solid state light sources is calculated. Again in this case, one or more of the previous operations can be performed at an analog level (i.e. before analog-to-digital conversion), or all operations can be performed at a digital level (i.e. after analog-to-digital conversion).

[0091] For example, the control circuit 40 is configured to determine the maximum voltage drop at the string 34 of solid state light sources by determining the maximum voltage drop at the current regulator / limiter 32. FIG. 8 An embodiment of the control circuit 40 is shown, wherein the control circuit 40 is configured to monitor a voltage indicative of the voltage drop (and preferably proportional to the voltage drop) at the current regulator / limiter 32, e.g. by measuring the voltage at the terminal OUT with respect to the terminal 202b / GND in the FIG. 6

[0092] For example, in the considered embodiment, the control circuit 40 is configured to obtain digital samples V OUT1 ,..., V OUTn of the voltages V OUT1_ADC ,..., V OUTn_ADC at the terminals OUT1,..., OUTn, and to sum these digital samples V OUT1_ADC ,..., V OUTn_ADC ​to the memory 406. For example, as FIG. 8 As illustrated, for this purpose, the control circuit can comprise at least one analog-to-digital converter (ADC) 404 and, optionally, a multiplexer 402 configured to connect the one or more analog-to-digital converters 404 to the terminals OUT1,..., OUTn. Generally, the multiplexer 402 is entirely optional, since the control circuit 50 can also comprise n ADCs 404, i.e. one ADC per terminal OUT1,..., OUTn. For example, in various embodiments, the ADC(s) 404 have a resolution of 8, 12 or 16 bits.

[0093] Generally, the number of ADC(s) and the corresponding conversion speed should be chosen so as to ensure that the voltages V OUT1 ,..., V OUTn can be sampled at a sufficiently high frequency.

[0094] For example, as mentioned previously, the signals CTRL can be PWM signals, wherein each signal CTRL1,..., CTRLn is set to high level for a given on duration (the corresponding string is activated) and to low level for a given off duration (the corresponding string is deactivated). Generally, the signals CTRL1,..., CTRLn can also remain low during a complete PWM period, thereby deactivating the corresponding string, i.e. the duty cycle can be chosen in the range [0; 1].

[0095] Thus, the control circuit 40 can be configured to obtain one or more digital samples of the voltages V OUT1 ,..., V OUTn while the corresponding signal CTRL1,..., CTRLn is set to high level. For example, generally such PWM signals have a frequency between 200 and 1400 Hz. Thus, if the minimum on time of the PWM signal is greater than the ADC conversion time plus the multiplexing time for sampling all channels, a single ADC 404 can be used.

[0096] In different embodiments, the control circuit 40 can also introduce a phase shift between the different signals CTRL1,..., CTRLn, the phase shift allowing to sample different sequences of voltages. In various embodiments, the control circuit can also be configured to ensure, for a string 34 to be activated during a given PWM period, that the on time is greater than a given minimum allowing sampling via the ADC(s) 404.

[0097] Thus, in the considered embodiments, the samples V OUT1_ADC ,..., V OUTn_ADC are indicative of the voltage drop at the current regulator / limiter 32.

[0098] In the considered embodiment, the control circuit 40 is thus also configured to acquire (via the one or more ADCs 404 and the optional multiplexer 402) digital samples V out of the voltage V out_ADC at the terminal 202a and to store the samples V out_ADC to the memory 406.

[0099] In particular, in various embodiments, the control circuit 40 is configured to determine the maximum voltage drop V OUT1_ADC at the string 32 that is activated (e.g. the string 34 for which the respective signal CTRL1,..., CTRLn has been set to high during the current PWM period) from the digital samples V OUTn_ADC ,..., V out_ADC and this digital sample V LED_MAX .

[0100] For example, in the considered embodiment, the control circuit 40 first selects the minimum value V OUT1_ADC of the digital samples V OUTn_ADC ,..., V OUT_MIN , i.e. the minimum voltage drop at the current regulators / limiters 32, at the module / circuit 408 and then calculates the maximum voltage drop V LED_MAX at the module / circuit 410 according to the following formula:

[0101] V LED_MAX = V out_ADC - V OUT_MIN . (1)

[0102] On the contrary, FIG. 9 embodiments are shown in which the control circuit 40 is configured to directly monitor the voltage indicative of the voltage drop (and preferably proportional to the voltage drop) at the string 24, e.g. by measuring the voltage at the terminals OUT1,..., OUTn with respect to the terminal 202b / ground in FIG. 7 .

[0103] In this case, the samples V OUT1_ADC ,..., V OUTn_ADC stored to the memory 404 have thus been indicative of the voltage drop at the string 34 and the control circuit 40 is configured to determine the maximum voltage drop V OUT1_ADC by selecting the maximum value of the digital samples V OUTn_ADC ,..., V LED_MAX at the block / circuit 416.

[0104] In general, as previously mentioned, the selection at the block 408 or at the block 416 should only use the samples V OUT1_ADC ,..., VOUTn_ADC This can be achieved already during the AD conversion (i.e. by sampling only the values of the active current regulators / limiters) and / or by selecting a subset of the samples at block 408 or 416 according to the control signal CTRL.

[0105] Thus, in FIG. 8 and FIG. 9 the embodiment shown, the control circuit 40 is configured to obtain digital samples of the voltages at the terminals OUT1,..., OUTn and to determine the maximum voltage drop V LED_MAX at the string 34. As mentioned before, this can also include measuring the output voltage V out as FIG. 8 indicated.

[0106] Once the maximum voltage drop V LED_MAX is obtained, the control circuit can determine the requested output voltage V M by adding a given margin voltage V LED_MAX to the maximum voltage drop V out_req , i.e.:

[0107] V out_req = V LED_MAX + V M . (2)

[0108] For example, for typical current regulators / limiters, a margin voltage of 0.5V to 1.5V, e.g. between 0.5V and 1.0V, is sufficient.

[0109] For example, FIG. 8 and FIG. 9 the adder block / circuit 412 is schematically shown, the adder block / circuit being configured to generate the digital signal V M by adding the digital value V LED_MAX to the digital value V out_req .

[0110] Further, the control circuit 40 is configured to determine the value of the reference signal V out_req from the requested output voltage V ref . In particular, as mentioned before, in the various embodiments, the feedback signal FB is proportional to the output voltage and the voltage source 20 is configured to regulate the feedback signal FB to the reference signal V ref , i.e. the output voltage can be calculated as follows:

[0111]

[0112] For example, by using a voltage divider as FIG. 6 and FIG. 7 indicated, the output voltage can be calculated as follows:

[0113]

[0114] Therefore, by rephrasing equations (2) and (3), the value of the reference signal V ref can be calculated as:

[0115] V ref = K · (V LED_MAX + V M ). (5)

[0116] For example, in various embodiments, the value of the proportionality K can be fixed in the control circuit 40 and the feedback circuit 24 should be configured to use the same value of the proportionality K. Alternatively, the value K can be programmable.

[0117] For example, FIG. 8 and FIG. 9 shows a digital-to-analog converter (DAC) 418 configured to generate the reference signal V reg from the digital signal V ref , and a block / circuit 414 configured to generate V out_req from the digital signal V out_req , for example by scaling the signal V reg according to a coefficient. In practice, the circuit 414 can be configured to use a proportionality value which also takes into account the conversion rate of the DAC 418, so as to obtain the requested reference signal V ref as shown in equation (5).

[0118] Therefore, in various embodiments, the output voltage V out is set to the maximum voltage drop V LED_MAX at the string 34 activated during a given PWM period, plus an additional margin voltage V M , thus automatically optimizing the power supplied under all operating conditions.

[0119] However, in the case of activation of an additional string 34 during the next PWM period, this string 34 can have a voltage drop greater or less than the previous maximum voltage drop. For example, in the case of a greater voltage drop, the output voltage V out may be too small to power the light sources of this string 34, whereby the corresponding light sources are not switched on, thus leading to an open load condition.

[0120] In various embodiments, the control circuit 40 is configured to determine such open load conditions, for example on the basis of the values of the respective voltages V OUT1_ADC ,..., V OUTn_ADC or by using additional current sensors, and then to set the value V ref to a given maximum value V ref_MAX .

[0121] Additionally or alternatively, the control circuit 40 can be configured to store the respective value V OUT1_ADC ,..., V OUTn_ADC when a string 34 is activated, to keep the stored respective value V OUT1_ADC ,..., V OUTn_ADC when the string 34 is a string 34 that is deactivated, and to use the stored value in order to determine whether the stored value is greater than the previous maximum value V LED_MAX once a new string 34 is activated during a subsequent PWM period, and to set the value V ref to the given maximum value V ref_MAX in case the stored value is greater.

[0122] Thus, in case a string 34 with a voltage drop exceeding the previously calculated maximum value V LED_MAX is enabled, the control circuit 40 can immediately set the value of the output DAC 414 to the maximum value.

[0123] Thus, in the embodiments considered so far, an open loop / feed forward control of the reference signal V ref is used. In fact, the value of the coefficient K is fixed, or set within the control circuit 40, e.g. in the block 414, while the feedback circuit should be configured to use the same coefficient K, e.g. via the ratio R1 / R2. Thus, this type of control is particularly useful in case of significant variations of the maximum voltage drop V LED_MAX at the strings 34.

[0124] However, slight variations of the constant K and of the corresponding feedback ratio (e.g. the ratio R1 / R2) of the feedback circuit 24 due to expansion or temperature variations of the components can cause the regulated voltage V out to reach a value higher or lower than expected, with the result that the minimum voltage drop V M at the current regulator / limiter 32, which should correspond to the voltage V 32_MIN , is increased or decreased, thus affecting the optimization of the system in terms of increased power consumption in one case or not allowing a correct current supply in the other case.

[0125] Thus, in various embodiments, the previous feed forward control is used to set the reference signal V ref when the system is switched on (e.g. by temporarily switching on all strings 34), and optionally when one or more strings 34 are no longer activated during a subsequent PWM period and / or when one or more additional strings 34 are reactivated during a subsequent PWM period. Typically, as will be described in more detail below, the feed forward control can also be used in response to the detection of other events.

[0126] Conversely, an additional closed-loop control is used to adjust the reference signal V ref , so as to adjust the minimum voltage drop V 32_MIN at the current regulator / limiter 32 to a value V M (see also equation (5)).

[0127] For example, as schematically shown in FIG. 8 and FIG. 9 , this additional closed-loop adjustment can be implemented in a block / circuit 414, which can also receive the minimum voltage drop V 32_MIN and the value V M .

[0128] In general, the control circuit 40, e.g. via the ADC(s) 406 and the blocks 408 / 416, can be configured to determine the minimum voltage drop V 32 (see FIG. 8 ) at the current regulator / limiter 32 by directly measuring the voltage drop V out_ADC or by calculating the difference between the current output voltage V LED_MAX (measured in FIG. 9 ) and the maximum voltage V 32_MIN .

[0129] For example, in various embodiments, the control circuit 40, e.g. the block / circuit 414, can be configured to implement a (digital) regulator comprising integrated components, wherein the control circuit 40 is configured to vary (increase or decrease) the digital signal V reg provided to the DAC 418 until the minimum voltage drop V 32_MIN corresponds to the voltage V M .

[0130] Conversely, in various embodiments, the control circuit 40 is configured to use an approximate adjustment, wherein the value of the digital signal V reg is varied based on a table which has stored respective variations of the value V reg for a plurality of ranges of the minimum voltage drop V 32_MIN . For example, in various embodiments, the block / circuit 414 uses the following variations of the signal V reg , wherein the value OL_THR represents a lower threshold, e.g. a threshold indicative of an open load condition, e.g. 0.5V:

[0131] V 32_MIN ]]> V reg ]]> <OL_THR +16 [OL_THR; 0.71 V] +4 [0.71 V; 1.03 V] +1 [1.03 V; 1.19 V] 0 [1.19 V; 1.51 V] -1 [1.51 V; 1.91 V] -4 >1.91V -8

[0132] Hence, in this case, the voltage V 32_MIN is adjusted to a value in the range [1.03V; 1.19V]. Instead of storing values of the minimum voltage drop V 32_MIN , the table can also store values of the minimum voltage drop V 32_MINthe difference between the voltage V M and the voltage V reg .

[0133] Another exemplary regulation can use the following variations of the signal V reg :

[0134] V 32_MIN ]]> V reg ]]> <OL_THR +12 [OL_THR; 0.63 V] +4 [0.63 V; 1.25 V] +1 [1.25 V; 1.57 V] 0 [1.57 V; 1.88 V] -1 [1.88 V; 2.20 V] -4 >2.20V -4

[0135] Thus, in this case, the voltage V 32_MIN is regulated to a value in the range [1.25V; 1.57V].

[0136] Thus, even if the ratio between the reference voltage V ref and the output voltage V out is not exactly equal to 1 / K, the control circuit 40 is able to correct the minimum voltage drop V 32_MIN in very few steps, especially until V 32_MIN = V M .

[0137] For example, once the reference signal V reg is set in a given PWM period, the control block can use a closed loop control during the following PWM period in order to further regulate the minimum voltage drop V 32_MIN . Typically, based on the regulation speed of the voltage source 20, the control circuit 40 can change the reference signal V reg every PWM period or after a given number of PWM periods.

[0138] FIG. 10 A flowchart illustrating an embodiment of the operation of the control circuit 40.

[0139] In particular, after a start step 1000, the control circuit 40 sets the value V reg to a given maximum value MAX, for example 255, at step 1002, whereby the voltage source 20 provides a maximum output voltage V max . Next, the control circuit 40 proceeds to step 1004, where the control circuit 40 acquires samples of the voltages V OUT1_ADC ,..., V OUTn_ADC at the terminals OUT1,..., OUTn by the ADC(s) 404. At step 1006, the control circuit 40 then computes the requested digital signal V out_req , for example as described above (via the blocks 406, 408 and 410 in FIG. 8 , or the blocks 406 and 416 in FIG. 9 ).

[0140] In various embodiments, the control circuit 40 then proceeds to an optional exception handling routine 1008 which can analyze at least one of the following: the digital samples V OUT1_ADC ,..., V OUTn_ADC , the maximum voltage drop V LED_MAX at the string 34 and / or the minimum voltage drop V 32_MIN at the regulator 34; and the control signals CTRL1,..., CTRLn.

[0141] In case an exception is detected (output "Y" of step 1008), the control circuit proceeds to step 1020 in which the value V reg is set to a given value, which can depend on the detected exception. Conversely, in case no exception is detected (output "N" of step 1008), the control circuit proceeds to optional step 1022 in which the control circuit 40 can determine whether the value V reg is greater than a given minimum value MIN.

[0142] In case the value V reg corresponds to (or is lower than) the minimum value MIN (output "Y" of step 1022), the control circuit 40 sets the value V reg to the maximum value MAX at step 1024. Conversely, the value V reg is greater than the minimum value MIN (output "N" of step 1008), the control circuit proceeds to step 1022. As will be described in more detail below, the value V reg may be set to the minimum value MIN when all LED strings 32 are deactivated. Thus, steps 1022 and 1024 serve to reactivate the voltage source 20 when at least one LED string 32 should be reactivated.

[0143] In the considered embodiment, the control circuit 40 determines at step 1026 whether the value V reg corresponds to the maximum value MAX. In case the value V reg corresponds to (or is greater than) the maximum value MAX (output "Y" of step 1022), the control circuit 40 sets the value V reg to the requested digital signal V out_req at step 1028, thereby implementing a feedforward control. Thus, the feedforward control at step 1028 starts after start-up (as the value is set to MAX at step 1002), or can be selectively started by setting the value V reg to MAX at 1020 in response to an exception detected at step 1008.

[0144] Conversely, the value V regNot corresponding (or less than) to the maximum value MAX (output "N" of step 1026), the control circuit proceeds to step 1030, in which the open-loop control is used to set the value V 32_MIN the value V reg .

[0145] Therefore, once the value V reg has been set at one of the steps 1020, 1024, 1028 or 1030, the control circuit 40 can proceed to a waiting step 1036, which is used to set the update interval of the value V reg , and the control circuit can return to step 1004 to start a new cycle.

[0146] Therefore, in the considered embodiment, the steps 1008 and 1036 can be implemented within the circuit or module 414.

[0147] As previously mentioned, the control circuit can process various exceptions.

[0148] FIG. 11 An embodiment of the exception handling routine 1008 is illustrated in this respect.

[0149] In particular, in the considered embodiment, the exception handling routine can be configured to verify one or more of the following conditions:

[0150] - at step 1010, it is verified whether the automatic adaptation of the output voltage V out is enabled or disabled, e.g. according to a programmable flag;

[0151] - at step 1012, it is verified whether all the LED strings 34 are deactivated (e.g. during the current PWM cycle), e.g. according to the control signals CTRL1,..., CTRLn;

[0152] - at step 1014, it is verified whether a given LED string is activated for the first time since the system was powered on, e.g. according to the control signals CTRL1,..., CTRLn;

[0153] - at step 1016, it is verified whether there is a temporary open load condition, e.g. according to the values V OUT1_ADC ,..., V OUTn_ADC and the control signals CTRL1,..., CTRLn, e.g. by verifying whether one of the voltages V OUT1_ADC ,..., V OUTn_ADC indicates that the light source L of the corresponding string 32 is turned off (even if the corresponding control signal CTRL1,..., CTRLn indicates that the LED string is activated);

[0154] - at step 1018, it is verified, e.g. according to the control signals CTRL1,...,CTRLN, whether at least one of the control signals CTRL1,...,CTRLN has an on duration too short to allow sampling via the ADC(s) 404;

[0155] In various embodiments, as shown in Fig. 10, these steps can be arranged in sequence, e.g. from step 1010 to 1018, thereby allowing to handle various exceptions with a priority, e.g. highest priority for step 1010 to lowest priority for step 1018. FIG. 11

[0156] Thus, as previously mentioned, the value V reg may be set based on the detected exception.

[0157] For example, in various embodiments, the control circuit 40 can be configured to implement one or more of the following operations:

[0158] - in response to detecting at step 1010 that the auto-adaptation of the output voltage V out is disabled, setting the value V reg to the maximum value MAX at step 1020a;

[0159] - in response to detecting at step 1012 that all LED strings 34 are deactivated, setting the value V reg to the minimum value MIN at step 1020b;

[0160] - in response to detecting at step 1014 that a given LED string is activated for the first time after the system is powered on, setting the value V reg to the maximum value MAX at step 1020c;

[0161] - in response to detecting at step 1016 a temporary open-circuit load condition, increasing the value V reg , e.g. by setting the value V reg to the maximum value MAX or by adding a constant value, such as 12 or 16 as shown in the previous table, to the current value V reg ;

[0162] - in response to detecting at step 1018 that the on duration is too short to allow sampling via the ADC(s) 404, setting the value V reg to the maximum value MAX at step 1020e.

[0163] FIG. 11 It is also shown that the open-loop control at step 1030 can comprise a first step 1032 in which the value V 32_MIN ​compared to the various ranges (see table above), and a second step 1034 in which a correction factor is added to the current value V 32_MIN according to the detection range of the value V reg .

[0164] Thus, once one of the steps 1020a-1020e, 1024, 1028 or 1034 has updated the value Vreg, the control circuit 40 can proceed to a waiting step 1036.

[0165] In general, all updates can use the same waiting time, or as illustrated, different waiting steps can be used for different updates of the value V reg .

[0166] By way of example, in the considered embodiment, the steps 1020a, 1020b and 1020c proceed to a step 1038 in which the control circuit immediately provides the new value V reg to the DAC 418.

[0167] Conversely, the step 1020d can proceed to a step 1040 in which the control circuit updates the V reg provided to the DAC 418 for the next PWM period, or preferably a little bit in advance, for example 100us before the start of the next PWM period.

[0168] Finally, in the considered embodiment, the steps 1024, 1028 and 1034 proceed to a step 1042 in which the control circuit 40 waits for a given number of PWM cycles, for example the control circuit 40 can provide the new value V reg to the DAC 418 at the next PWM period after a given waiting time (for example chosen between 10 and 50ms). The waiting time can be chosen for example based on the response time of the regulator 20 for adjusting the voltage V out to the new value.

[0169] In general, since the step 1012 is used to substantially invalidate the output voltage V reg by setting the value V out to the minimum value MIN, this step can also be used to detect other conditions that can require invalidating the output voltage V out . For example, in various embodiments, the control circuit 40 is configured to proceed from the step 1012 to the step 1020b in response to detecting one or more of the following conditions: an over-temperature condition of the voltage source 20, the current regulator 32 and / or the light source L; and a failure of the ADC 404 and / or the DAC 414.

[0170] Thus, in various embodiments, the control circuit 40 can be configured to:

[0171] - Manage the startup of the device;

[0172] - When the control circuit does not receive data indicating the requested lighting mode, standby and fail-safe conditions are managed, for example, by shutting off the current supply to series 34;

[0173] -Manage temporary or permanent open-circuit load conditions;

[0174] - In the event of dangerous heating and / or thermal shutdown, such as when excessive power is dissipated by the current regulator / limiter 32 and / or when the current regulator / limiter 32 overheats, manage the current derating process on the LED;

[0175] - In the case of a battery system, low-power mode is managed, for example, by reducing the current flowing through the string and / or turning off the string 34;

[0176] - For example, managing possible short-circuit conditions by shutting down the corresponding string 34;

[0177] -Manage the given conditions of the control signal CTRL, for example, to ensure that the duty cycle is long enough to allow for the corresponding voltage V during the corresponding on-time period. OUT Perform sampling.

[0178] Therefore, in the previous embodiments, each current supply system can be used to supply up to N strings of light sources. However, in typical applications, the number of strings to be supplied can also be greater than 50, for example, more than 100 strings.

[0179] Therefore, in this case, the current supply system, such as the corresponding integrated circuit, would require a large number of current regulators / limiters 32, which would be quite useless if only a small number of strings 34 needed to be supplied. Alternatively, the strings 34 could be divided into subgroups, where each subgroup of strings 34 is powered via a corresponding voltage source 20 and a corresponding current supply system. However, this also involves additional costs because an additional voltage source must be used.

[0180] on the contrary, FIG. 12 This illustrates a modular system, in which a single voltage source 20 and multiple current supply systems (in...) FIG. 12 The figures are labeled 501, ..., 50. k (Indicated) is used to supply power to the series 34. For example, as mentioned earlier, such a current supply system can be implemented in a corresponding integrated circuit.

[0181] Specifically, as mentioned above, each current supply system 501, ..., 50 kcomprises N current regulators / limiters 32 connected to respective terminals OUT1,..., OUTN, and a control circuit 40 configured to set the reference signal V ref according to the voltage at the terminals OUT1,..., OUTN. In particular, the control circuit 40 is configured to set the reference signal V ref according to the maximum voltage drop at the string 34 and / or the minimum voltage drop at the current regulators / limiters 32.

[0182] In this regard, the inventors have observed that, by using an additional circuit configured to provide the maximum reference signal V k provided by the various control circuits 44 to the voltage source 20, the same voltage source 20 can be shared by a plurality of current supply systems 501,..., 50 ref .

[0183] In particular, as FIG. 12 illustrated, in this case the power supply system comprises a voltage source 20 and a given number k of current supply systems 501,..., 50 k connected to the same voltage source 20. For example, each current supply system 501,..., 50 k may also be configured to power N strings, thus enabling to power a total of k*N strings.

[0184] In particular, each current supply system 501,..., 50 k comprises a respective control circuit 40 which thus generates a respective reference signal V ref1 ,..., V refk . Thus, in various embodiments, the power supply system comprises a circuit 44 configured to determine the maximum of the reference signals V ref1 ,..., V refk and to provide this maximum to the voltage source 20 as the reference signal V ref .

[0185] In particular, FIG. 12 embodiments are illustrated in which this circuit 44 is implemented in a distributed manner by providing a sub-circuit 44 within each current supply system 501,..., 50 k . In particular, each current supply system 501,..., 50 k comprises a respective terminal 46 configured to be connected to a terminal V ref of the voltage source 20, i.e. in use these terminals 46 are connected together. Moreover, each sub-circuit 44 is configured to, when the respective reference signal V ref1 ,..., V refk is greater than the voltage at the respective terminal 46, set the respective reference signal V ref1 ,..., Vrefk is applied to the corresponding terminal 46.

[0186] For example, FIG. 13 A possible embodiment of the circuit 44 is shown.

[0187] In particular, in the considered embodiment, the circuit 44 comprises:

[0188] - a variable current source 442, such as a field effect transistor, configured to generate a positive current as a function of a control signal, wherein the current is provided to a resistor R, and wherein the voltage at the resistor R is applied to the terminal 46; and

[0189] - an operational amplifier 440 configured to receive at a first (positive / non-inverting) input a corresponding reference signal, indicated as V refk , and at a second (negative / inverting) input the voltage at the resistor R, wherein the output of the operational amplifier 440 controls the variable current source 442.

[0190] Therefore, in the considered embodiment, in case the voltage at the terminal 46 is less than the reference signal V refk , the operational amplifier 440 changes the current provided by the current source 442 until the voltage at the terminal 46 corresponds to the reference signal V refk . However, in case the voltage at the terminal 46 is greater than the reference signal V refk , the current source 442 will be disabled and the voltage at the terminal 46 will be maintained.

[0191] Therefore, in case of very large LED or OLED systems, a single voltage source 20 can be shared by different current supply systems 50 by allowing only the control circuit 40 with the highest reference value V ref to control the voltage source 20.

[0192] The inventors have observed that the reference voltage V ref of the voltage source 20 is not typically externally available.

[0193] However, as FIG. 14 shown, in this case the control circuit 40 can comprise or be associated with a feedback adaptation circuit 42 configured to adapt a feedback signal FB as a function of the reference signal V ref provided by the control circuit 40. For example, the feedback adaptation circuit 42 can be configured to:

[0194] - as FIG. 14 shown, adapt the reference voltage of said feedback circuit 24, for example, the resistors Rl and R2 can be connected in series at the voltage V out and the feedback signal FB is adapted by the feedback adaptation circuit 42 as a function of the reference signal V refbetween the provided voltages FB_OUT;

[0195] - injecting a current in the resistor R2, thereby changing the voltage drop at the resistor R2;

[0196] - changing the resistance of said resistor R1 and / or R2.

[0197] The claims are an integral part of the technical teaching provided herein of the present disclosure.

[0198] Of course, the details of construction and embodiments can be widely varied with respect to what is described and exemplified herein only by way of example, without thereby departing from the scope of the invention as defined by the appended claims, without thereby compromising the principles of the application.

Claims

1. A current supply system, comprising: one or more first terminals configured to be connected to first output terminals of a voltage source; a plurality of second terminals, wherein each of the second terminals is configured to be connected to second output terminals of the voltage source via a respective string of solid state light sources; a third terminal configured to provide a reference signal to the voltage source, the reference signal being indicative of a requested output voltage to be generated by the voltage source between the first output terminals and the second output terminals of the voltage source; a plurality of current regulators or limiters, wherein each of the second terminals is connected to at least one of the one or more first terminals via a respective current regulator or limiter, wherein each of the current regulators or limiters is configured to limit a current flowing through the string of solid state light sources connected to the respective second terminal to a respective maximum value; and a control circuit configured to generate the reference signal and comprising: at least one analog-to-digital converter configured to obtain first digital samples of a voltage at the second terminals and second digital samples of a voltage between the first output terminals and the second output terminals of the voltage source; digital-to-analog conversion circuitry configured to receive a digital regulation value and to provide the reference signal; feedforward control circuitry configured to calculate a feedforward regulation value indicative of the requested output voltage by determining a maximum voltage drop between the second terminals and the second output terminals of the voltage source from the first digital samples and the second digital samples and adding a given margin to the maximum voltage drop, and feedback control circuitry configured to determine a minimum voltage drop at the plurality of current regulators or limiters from the first digital samples and the second digital samples and to determine a feedback correction value from a difference between the minimum voltage drop and the margin; wherein the control circuit is configured to, in response to a start-up of the current supply system, set the digital regulation value to a first value indicative of a requested maximum output voltage and then to repeatedly: determine whether the digital regulation value corresponds to the first value; if the digital regulation value is greater than or equal to the first value, set the digital regulation value to the feedforward regulation value; and if the digital regulation value is less than the first value, add the feedback correction value to the digital regulation value.

2. The current supply system of claim 1, wherein each of the current regulators or limiters is configured to receive at least one control signal from the control circuit, the at least one control signal being indicative of at least a first operating mode and a second operating mode, wherein: wherein the respective current regulator or limiter is configured to invalidate the current if the at least one control signal is indicative of the first operating mode; and wherein the respective current regulator or limiter is configured to limit the current to the respective maximum value if the at least one control signal is indicative of the second operating mode. ​ 3. The current supply system of claim 2, wherein the at least one control signal comprises a pulse width modulation signal, wherein a first logic level of the pulse width modulation signal indicates the first mode of operation, and wherein a second logic level of the pulse width modulation signal indicates the second mode of operation.

4. The current supply system of claim 2, wherein the at least one control signal indicates the maximum value.

5. The current supply system of claim 2, wherein the control circuit is configured to: determine whether the control signal indicates that the current regulator or limiter should use the first mode of operation; and if the control signal indicates that the current regulator or limiter should use the first mode of operation, set the digital regulation value to a second value that indicates a requested minimum output voltage.

6. The current supply system of claim 5, wherein the control circuit is configured to: if the control signal indicates that at least one of the current regulators or limiters should use the second mode of operation, determine whether the digital regulation value corresponds to the second value; and if the digital regulation value corresponds to the second value, set the digital regulation value to the first value.

7. The current supply system of claim 2, wherein the control circuit is configured to: determine whether the control signal indicates that at least one current regulator or limiter should use the second mode of operation; if the control signal indicates that at least one current regulator or limiter should use the second mode of operation, determine whether current is flowing through the at least one current regulator or limiter that should use the second mode of operation; and if no current is flowing through at least one of the current regulators or limiters that should use the second mode of operation, change the digital regulation value so as to increase the output voltage requested.

8. The current supply system of claim 1, wherein the reference signal is proportional to the output voltage requested to be generated by the voltage source, and wherein the digital-to- analog converter conversion circuit comprises an analog-to-digital converter configured to generate the reference signal according to the digital regulation value.

9. The current supply system of claim 1, wherein the third terminal is configured to be coupled to a feedback terminal of the voltage source so as to change a feedback signal indicative of the output voltage generated by the voltage source.

10. An integrated circuit comprising the current supply system of claim 1.

11. A power supply system comprising: a voltage source configured to generate an output voltage between a first output terminal and a second output terminal of the voltage source, wherein the voltage source is configured to generate the output voltage according to a reference signal; and the current supply system of claim 1.

12. The power supply system of claim 11, comprising: a plurality of strings of solid state light sources, wherein each string of solid state light sources is connected between a respective second terminal and the second output terminal of the voltage source.

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