Enhanced punched and low-density parity-check (LDPC) code structure

Abstract

Certain aspects of this disclosure generally relate to techniques for enhanced puncturing and low-density parity-check (LDPC) code structures. A method for wireless communication by a transmitting device is provided. This method generally includes: encoding a set of information bits based on an LDPC code to generate a codeword, the LDPC code being defined by a basic matrix having a first number of variable nodes and a second number of parity nodes; puncturing the codeword according to a puncturing pattern designed to puncture bits corresponding to at least two of the variable nodes to generate a punctured codeword; adding at least one additional parity bit to the punctured at least two variable nodes; and transmitting the punctured codeword.

Description

[0001] This application is a divisional application of the invention patent application filed on May 12, 2017, with application number 201780028926.3 and entitled "Enhanced Punch and Low-Density Parity-Check (LDPC) Code Structure".

[0002] Cross-reference and priority claims of related applications

[0003] This application claims priority to U.S. Application No. 15 / 593,035, filed May 11, 2017, which in turn claims the benefit and priority to U.S. Provisional Patent Application No. 62 / 335,163, filed May 12, 2016. The entire contents of the aforementioned applications are incorporated herein by reference for all applicable purposes. Technical Field

[0004] The techniques discussed below generally relate to wireless communication and the detection and / or correction of errors in binary data, specifically to methods and apparatus for enhanced punctured and low-density parity-check (LDPC) code structures. Certain aspects can enable improved performance of punctured LDPC codes. Background Technology

[0005] Wireless communication systems are widely deployed to provide various types of communication content, such as voice, video, data, messaging, and broadcasting. These systems can employ multiple access technologies that enable communication with multiple users by sharing available system resources (e.g., bandwidth and transmit power). Examples of such multiple access systems include Code Division Multiple Access (CDMA) systems, Time Division Multiple Access (TDMA) systems, Time Division Synchronous CDMA (TD-SCDMA) systems, Frequency Division Multiple Access (FDMA) systems, Single Carrier FDMA (SC-FDMA) systems, 3GPP Long Term Evolution (LTE) systems, LTE Advanced (LTE-A) systems, and Orthogonal Frequency Division Multiple Access (OFDMA) systems.

[0006] Various access technologies have been adopted in various telecommunications standards to provide a common protocol that enables different wireless devices to communicate at the municipal, national, regional, and even global levels. An example of an emerging telecommunications standard is New Radio (NR), such as 5G Radio Access. NR is a set of enhancements to the LTE mobile standard released by 3GPP. It is designed to better support mobile broadband network access by improving spectrum efficiency, reducing costs, improving service, utilizing new spectrum, and using OFDMA with cyclic prefixes (CP) on both downlink (DL) and uplink (UL) and supporting beamforming, multiple-input multiple-output (MIMO) antenna technology and carrier aggregation for better integration with other open standards.

[0007] Typically, a wireless multiple access communication system can support communication from multiple wireless nodes simultaneously. Each node communicates with one or more base stations via forward and reverse links. The forward link (or downlink) is the communication link from the base station to the node, and the reverse link (or uplink) is the communication link from the node to the base station. Communication links can be established using single-input single-output, multiple-input single-output, or multiple-input multiple-output (MIMO) systems.

[0008] A wireless multiple access communication system may include multiple base stations (BSs), each of which simultaneously supports communication for multiple communication devices, also known as user equipment (UEs). In LTE or LTE-A networks, a set of one or more BSs may define an e-node B (eNB). In other examples (e.g., in next-generation NR or 5G networks), a wireless multiple access communication system may include multiple distributed units (DUs) (e.g., side units (EUs), side nodes (ENs), radio heads (RHs), smart radio heads (SRHs), transmit-receive points (TRPs), etc.) communicating with multiple central units (CUs) (e.g., central nodes (CNs), access node controllers (ANCs), etc.), wherein a group or multiple DUs communicating with the CUs may define access nodes (e.g., BSs, NR BSs, 5G BSs, NBs, eNBs, NRNBs, 5G NBs, access points (APs), network nodes, gNBs, TRPs, etc.). A BS, AN, or DU may communicate with a UE or a group of UEs on downlink channels (e.g., for transmissions from a BS or UE) and uplink channels (e.g., for transmissions from a UE to a BS, AN, or DU).

[0009] Binary values ​​(e.g., 1 and 0) are used to represent and transmit various types of information, such as video, audio, statistics, etc. Unfortunately, errors can be unintentionally introduced during the storage, transmission, and / or processing of binary data; for example, a "1" might become a "0", and vice versa.

[0010] Typically, in data transmission, the receiver observes each received bit in the presence of noise or distortion, and only an indication of the value of that bit is obtained. In these cases, the observed value is interpreted as the source of a "soft" bit. A soft bit indicates a preferred estimate of the bit's value (e.g., 1 or 0) and some indication of the reliability of that estimate. While the number of errors may be relatively low, even a small level of error or distortion can render the data unusable, or may require retransmission in the event of a transmission error. To provide a mechanism for checking for and, in some cases, correcting errors, binary data can be encoded to introduce carefully designed redundancy. The encoding of data units produces a result commonly referred to as a codeword. Due to its redundancy, a codeword will typically contain more bits than the input data unit from which it was generated.

[0011] Redundant bits are added by an encoder to the transmitted bitstream to create codewords. When a signal generated from the transmitted codewords is received or processed, the redundant information included in the codewords and observed in the signal can be used to identify and / or correct errors from the received signal or to remove distortion from the received signal in order to recover the original data units. This error checking and / or correction can be implemented as part of the decoding process. In the absence of errors, or in the presence of correctable errors or distortions, decoding can be used to recover the encoded original data units from the processed source data. In the presence of unrecoverable errors, the decoding process can generate an indication that the original data cannot be fully recovered. This indication of decoding failure can initiate a retransmission of the data. With the increasing use of fiber optic lines for data communication and the increasing rates at which data can be read from and stored in data storage devices (e.g., disk drives, tapes, etc.), there is a growing demand not only for the efficient use of data storage and transmission capacity but also for the ability to encode and decode data at high rates. Summary of the Invention

[0012] The following summary outlines some aspects of this disclosure to provide a basic understanding of the techniques discussed. This disclosure is not a general overview of all anticipated features of this disclosure, nor is it intended to identify key or essential elements of all aspects of this disclosure, nor to describe the scope of any or all aspects of this disclosure. Its sole purpose is to present, in a general sense, some concepts of one or more aspects of this disclosure as a prelude to the more detailed description that follows. After considering this discussion, and particularly after reading the "Detailed Description" section, one skilled in the art will understand how the features of this disclosure provide advantages including improved communication between access points and stations in a wireless network.

[0013] While encoding efficiency and high data rates are important, it is also important that encoders and / or decoders can be implemented at a reasonable cost for encoding and / or decoding systems that are to be used in a wide range of devices (e.g., consumer devices).

[0014] With the increasing demand for mobile broadband access, there is a need for further improvements to NR technology. Preferably, these improvements should be applicable to other multiple access technologies and telecommunications standards that employ these technologies. One area for improvement is the coding / decoding field, which is applicable to NR. For example, technologies for high-performance LDPC codes used in NR are desirable.

[0015] Certain aspects of this disclosure generally relate to methods and apparatus for enhanced puncturing of low-density parity-check (LDPC) codes. Communication systems typically need to operate at several different rates. LDPC codes are an option for providing simple implementations that offer encoding and decoding at different rates. For example, higher-rate LDPC codes can be generated by puncturing lower-rate LDPC codes.

[0016] Certain aspects of this disclosure provide methods for wireless communication that can be performed by a transmitting device. The method typically includes: encoding a set of information bits based on an LDPC code to generate a codeword, the LDPC code being defined by a fundamental matrix having a first number of variable nodes and a second number of parity nodes; puncturing the codeword according to a puncturing pattern designed to puncture bits corresponding to at least two of the variable nodes to generate a punctured codeword; adding at least one additional parity bit to the punctured at least two variable nodes; and transmitting the punctured codeword.

[0017] This disclosure provides an apparatus for wireless communication, such as a transmitting device. The apparatus typically includes: units for encoding a set of information bits based on an LDPC code to generate a codeword, the LDPC code being defined by a basic matrix having a first number of variable nodes and a second number of parity nodes; units for puncturing the codeword according to a puncturing pattern designed to puncture bits corresponding to at least two of the variable nodes to generate a punctured codeword; units for adding at least one additional parity bit to the punctured at least two variable nodes; and units for transmitting the punctured codeword.

[0018] This disclosure provides an apparatus for wireless communication, such as a transmitting device. The apparatus typically includes at least one processor coupled to a memory, and the at least one processor is configured to: encode a set of information bits based on an LDPC code to generate a codeword, the LDPC code being defined by a fundamental matrix having a first number of variable nodes and a second number of parity nodes; puncture the codeword according to a puncturing pattern designed to puncture bits corresponding to at least two of the variable nodes to generate a punctured codeword; and add at least one additional parity bit to the punctured at least two variable nodes. The apparatus includes a transmitter configured to transmit the punctured codeword.

[0019] Certain aspects of this disclosure provide a computer-readable medium having computer-executable code stored thereon. The computer-executable code typically includes: code for encoding a set of information bits based on an LDPC code to generate a codeword, the LDPC code being defined by a basic matrix having a first number of variable nodes and a second number of parity nodes; code for puncturing the codeword according to a puncturing pattern designed to puncture bits corresponding to at least two of the variable nodes to generate a punctured codeword; code for adding at least one additional parity bit to the punctured at least two variable nodes; and code for transmitting the punctured codeword.

[0020] Other aspects, features, and embodiments of this disclosure will become apparent to those skilled in the art after browsing the following description of specific exemplary aspects of this disclosure in conjunction with the accompanying drawings. While features of this disclosure may be discussed with respect to certain aspects and the drawings below, all aspects of this disclosure may include one or more advantageous features discussed herein. In other words, while one or more aspects may be discussed as having certain advantageous features, one or more of these features may also be used in accordance with the various aspects of this disclosure discussed herein. Similarly, while exemplary aspects may be discussed below as embodiments of devices, systems, or methods, it should be understood that such exemplary embodiments may be implemented in a variety of devices, systems, and methods. Attached Figure Description

[0021] In accordance with the manner in which the foregoing features of this disclosure can be understood in detail, a more specific description of the description briefly summarized above can be made by referring to various aspects, some of which are illustrated in the accompanying drawings. However, the drawings illustrate only certain typical aspects of this disclosure and are not intended to limit its scope, as the description may be adapted to other equivalent aspects.

[0022] Figure 1This is a block diagram illustrating an exemplary wireless communication network according to certain aspects of this disclosure.

[0023] Figure 2 This is a block diagram illustrating an example logical architecture of a distributed radio access network (RAN) according to certain aspects of this disclosure.

[0024] Figure 3 This is a diagram illustrating an example physical architecture of a distributed RAN according to certain aspects of this disclosure.

[0025] Figure 4 This is a block diagram illustrating the design of an exemplary base station (BS) and user equipment (UE) according to certain aspects of this disclosure.

[0026] Figure 5 This is a diagram illustrating an example of implementing a communication protocol stack according to certain aspects of this disclosure.

[0027] Figure 6 An example of a subframe around the downlink (DL) is shown, according to certain aspects of this disclosure.

[0028] Figure 7 An example of a subframe around the uplink (UL) is shown, according to certain aspects of this disclosure.

[0029] Figure 8 It is a graphical representation of an exemplary low-density parity-check (LDPC) code according to certain aspects of this disclosure.

[0030] Figure 8A Based on certain aspects of this disclosure Figure 8 The matrix representation of an example LDPC code.

[0031] Figure 9 Based on certain aspects of this disclosure Figure 8 A graphical representation of the lifting of the LDPC code.

[0032] Figure 10 It is the integer representation of the matrix of a quasi-cyclic 802.11 LDPC code.

[0033] Figure 11 This is a simplified block diagram illustrating an exemplary encoder according to certain aspects of this disclosure.

[0034] Figure 12 This is a simplified block diagram illustrating an exemplary decoder according to certain aspects of this disclosure.

[0035] Figure 13This is a flowchart illustrating an example operation of encoding information by a transmitting device based on an enhanced punched and LDPC code structure for wireless communication, according to certain aspects of this disclosure.

[0036] Figure 14 A graphical representation of an exemplary LDPC code having multiple relatively low-degree variable nodes with punctures and additional parity bits, according to certain aspects of this disclosure, is shown.

[0037] For ease of understanding, the same reference numerals have been used where possible to denote common elements with respect to the drawings. It is contemplated that elements disclosed in one embodiment may be advantageously used in other embodiments without special explanation. Detailed Implementation

[0038] This disclosure provides apparatus, methods, processing systems, and computer program products for encoding (and / or decoding) for new radio (NR) access technologies, such as 5G radio access. NR can refer to radio equipment configured to operate according to a new air interface or a fixed transport layer. NR can include support for enhanced mobile broadband (eMBB) services for wide bandwidth (e.g., 80 MHz and above), millimeter wave (mmW) services for high carrier frequencies (e.g., 60 GHz), massive machine-type communication (mMTC) services for non-backward compatible MTC technologies, and / or mission-critical (MiCr) services for ultra-reliable low-latency communication (URLLC) services. These services may include latency and reliability requirements. NR may use low-density parity-check (LDPC) coding and / or polar codes.

[0039] This disclosure provides techniques for enhanced puncturing and low-density parity-check (LDPC) code structures, for example, to obtain LDPC codes with enhanced performance. In several aspects, puncturing can be performed on multiple relatively low-degree variable nodes, rather than on a single high-degree variable node. The degree of a variable node refers to the number of connections between variables and check nodes in the fundamental graph. In a large fundamental graph (also called a fundamental code or fundamental PCM), variable nodes can support a higher degree of connectivity compared to variable nodes in a smaller fundamental graph. Furthermore, to effectively increase the code rate, additional parity bits can be added to the LDPC code structure, each parity bit corresponding to a variable node of degree one formed by the parity check of two punctured nodes.

[0040] Various aspects of this disclosure are described more fully below with reference to the accompanying drawings. However, this disclosure may be implemented in many different forms and should not be construed as limited to any specific structure or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. Based on the teachings herein, those skilled in the art will understand that the scope of this disclosure is intended to cover any aspect of this disclosure disclosed herein, whether implemented independently of or in combination with any other aspect of this disclosure. For example, any number of aspects set forth herein may be used to implement an apparatus or to carry out a method. Furthermore, the scope of this disclosure is intended to cover such an apparatus or method implemented using structures, functions, or structures and functions other than those set forth herein or not of the aspects set forth herein. It should be understood that any aspect of this disclosure disclosed herein may be implemented by one or more elements of the claims. The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

[0041] While specific aspects are described herein, numerous variations and arrangements of these aspects are within the scope of this disclosure. Although some benefits and advantages of preferred aspects have been mentioned, the scope of this disclosure is not intended to be limited to specific benefits, uses, or purposes. Rather, aspects of this disclosure are intended to be broadly applicable to various wireless technologies, system configurations, networks, and transport protocols, some of which are illustrated in the accompanying drawings and shown in the following description of preferred aspects. The detailed description and accompanying drawings are merely illustrative and not restrictive of this disclosure, the scope of which is defined by the appended claims and their equivalents.

[0042] The techniques described in this article can be used in various wireless communication networks, such as Code Division Multiple Access (CDMA) networks, Time Division Multiple Access (TDMA) networks, Frequency Division Multiple Access (FDMA) networks, Orthogonal FDMA (OFDMA) networks, and Single Carrier FDMA (SC-FDMA) networks. The terms "network" and "system" are generally used interchangeably. CDMA networks can implement radio technologies such as Universal Terrestrial Radio Access (UTRA) and CDMA2000. UTRA includes Wideband CDMA (W-CDMA) and Low Chip Rate (LCR). CDMA2000 encompasses the IS-2000, IS-95, and IS-856 standards. TDMA networks can implement radio technologies such as Global System for Mobile Communications (GSM). OFDMA networks can implement technologies such as Evolved UTRA (E-UTRA), IEEE 802.11, IEEE 802.16, and IEEE 802.20. Radio technologies such as UTRA, E-UTRA, and GSM are parts of the Universal Mobile Telecommunications System (UMTS). 3GPP LTE and LTE-Advanced (LTE-A) are versions of UMTS using E UTRA. UTRA, E-UTRA, UMTS, LTE, LTE-A, and GSM are described in documents from an organization called the Third Generation Partnership Project (3GPP). CDMA2000 is described in documents from an organization called the Third Generation Partnership Project 2 (3GPP2). These communication networks are listed only as examples of networks in which the technologies described in this disclosure can be applied; however, this disclosure is not limited to the communication networks described above. For clarity, it should be noted that although aspects may be described using terms commonly associated with 3G and / or 4G wireless technologies, aspects of this disclosure can be applied to other generation-based communication systems, such as new radio (NR) technologies including 5G and its successors.

[0043] Wireless communication system context

[0044] Figure 1 An exemplary wireless communication network 100 is shown that can perform aspects of this disclosure. For example, a transmitting device such as UE 120 or BS 110 can encode a set of information bits to generate codewords based on a low-density parity-check (LDPC) code. The transmitting device can perform puncturing of the LDPC according to a puncturing pattern. The puncturing pattern can be designed to puncture bits corresponding to at least two variable nodes. The punctured variable nodes can be the highest-degree variable nodes in the fundamental matrix, while being relatively low-degree variable nodes relative to variable nodes in other LDPC codes. High-degree variable nodes have many connections to parity nodes. A large fundamental graph (e.g., with many parity nodes) can support / include more-degree variable nodes relative to a small fundamental graph (e.g., with few parity nodes). Additional parity bits can be added to the LDPC code structure for each pair of punctured variable nodes.

[0045] like Figure 1As shown, the wireless communication network 100 may include multiple BSs 110 and other network entities. A BS may be a station communicating with a UE. Each BS 110 may provide communication coverage for a specific geographic area. In 3GPP, the term "cell" may refer to the coverage area of ​​a Node B and / or Node B subsystem serving that coverage area, depending on the context in which the term is used. In NR systems, the term "cell" and gNB, Node B, 5G NB, AP, NR BS, TRP, etc., may be interchangeable. In some examples, a cell may not necessarily be stationary, and the geographic area of ​​a cell may move depending on the location of a mobile BS. In some examples, BSs may use any suitable transport network to interconnect with each other and / or with one or more other BSs or network nodes (not shown) within the wireless communication network 100 via various types of backhaul interfaces (such as direct physical connections, virtual networks, etc.).

[0046] Typically, any number of wireless networks can be deployed in a given geographical area. Each wireless network can support a specific Radio Access Technology (RAT) and can operate on one or more frequencies. A RAT can also be referred to as a radio technology, air interface, etc. A frequency can also be referred to as a carrier, frequency channel, etc. Each frequency can support a single RAT in a given geographical area to avoid interference between wireless networks with different RATs. In some cases, NR or 5G RAT networks can be deployed.

[0047] A Base Station (BS) can provide communication coverage for macrocells, picocells, femtocells, and / or other cell types. A macrocell can cover a relatively large geographic area (e.g., a radius of several kilometers) and allow unrestricted access for UEs with service subscriptions. A picocell can cover a relatively small geographic area and allow unrestricted access for UEs with service subscriptions. A femtocell can cover a relatively small geographic area (e.g., a home) and allow restricted access for UEs associated with the femtocell (e.g., UEs in a Closed Subscriber Group (CSG), UEs of users in a home, etc.). A BS for a macrocell can be referred to as a macro BS. A BS for a picocell can be referred to as a pico BS. A BS for a femtocell can be referred to as a femtocell BS or a home BS. Figure 1 In the example shown, BS 110a, BS 110b, and BS 110c can be macro BSs for macro cells 102a, 102b, and 102c, respectively. A BS can support one or more (e.g., three) cells.

[0048] The wireless communication network 100 may also include relay stations. A relay station is a station that receives data and / or other information transmissions from an upstream station (e.g., BS 110 or UE 120) and sends data and / or other information transmissions to a downstream station (e.g., UE 120 or BS 110). A relay station may also be a UE that relays transmissions for other UEs. Figure 1 In the example shown, relay station 110r can communicate with BS 110a and UE 120r to facilitate communication between BS 110a and UE 120r. A relay station can also be referred to as a relay, relay eNB, etc.

[0049] The wireless communication network 100 can be a heterogeneous network comprising different types of base stations (BSs) (e.g., macro BSs, pico BSs, femto BSs, relays, etc.). These different types of BSs can have different transmit power levels, different coverage areas, and different effects on interference in the wireless communication network 100. For example, a macro BS can have a high transmit power level (e.g., 20 watts), while a pico BS, femto BS, and relay can have a lower transmit power level (e.g., 1 watt).

[0050] The wireless communication network 100 can support synchronous or asynchronous operation. For synchronous operation, the base stations (BSs) can have similar frame timings, and transmissions from different BSs can be approximately time-aligned. For asynchronous operation, the BSs can have different frame timings, and transmissions from different BSs may not be time-aligned. The techniques described herein can be used for both synchronous and asynchronous operations.

[0051] Network controller 130 can be coupled to a group of BSs and provide coordination and control for these BSs. Network controller 130 can communicate with BS 110 via backhaul. BS 110 can also communicate with each other directly or indirectly, for example, via wireless or wired backhaul.

[0052] UE 120 (e.g., UE 120x, UE 120y, etc.) may be distributed throughout the wireless communication network 100, and each UE may be stationary or mobile. UE may also be referred to as a mobile station, terminal, access terminal, subscriber unit, station, client device (CPE), cellular phone, smartphone, personal digital assistant (PDA), wireless modem, wireless communication device, handheld device, laptop computer, cordless phone, wireless local loop (WLL) station, tablet computer, camera, gaming device, netbook, smartbook, ultrabook, medical device or medical apparatus, biometric sensor / device, wearable devices such as smartwatches, smart clothing, smart glasses, smart wristbands, smart jewelry (e.g., smart rings, smart bracelets, etc.), entertainment devices (e.g., music devices, video devices, satellite radio devices, etc.), vehicle components or sensors, smart meters / sensors, industrial manufacturing equipment, GPS devices, or any other suitable device configured to communicate via wireless or wired media. Some UEs can be considered evolved machine-type communications (MTC) devices or evolved MTC (eMTC) devices. MTC and eMTC UEs include, for example, robots, drones, remote devices, sensors, meters, monitors, location tags, etc., that can communicate with a BS, another device (e.g., a remote device), or some other entity. Wireless nodes can provide connectivity, for example, to or from a network (e.g., a wide area network such as the Internet or cellular networks), via wired or wireless communication links. Some UEs can be considered Internet of Things (IoT) devices.

[0053] exist Figure 1 In the diagram, a solid line with a double arrow indicates a desired transmission between the UE and the serving BS, which is designated as the BS serving the UE on the downlink and / or uplink. A thin dashed line with a double arrow indicates interference transmission between the UE and the BS.

[0054] Some wireless networks (e.g., LTE) utilize Orthogonal Frequency Division Multiplexing (OFDM) on the downlink and Single-Carrier Frequency Division Multiplexing (SC-FDM) on the uplink. OFDM and SC-FDM divide the system bandwidth into multiple (K) orthogonal subcarriers, often referred to as tone, frequency modulation (bin), etc. Each subcarrier can be modulated with data. Typically, modulation symbols are transmitted in the frequency domain using OFDM and in the time domain using SC-FDM. The spacing between adjacent subcarriers can be fixed, and the total number of subcarriers (K) can depend on the system bandwidth. For example, the subcarrier spacing can be 15 kHz, and the minimum resource allocation (called a "resource block" (RB)) can be 12 subcarriers (i.e., 180 kHz). Therefore, for system bandwidths of 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz, or 20 MHz, the nominal Fast Fourier Transform (FFT) size can be equal to 128, 256, 512, 1024, or 2048, respectively. The system bandwidth can also be divided into subbands. For example, a subband can cover 1.08MHz (i.e., 6 RBs), and there can be 1, 2, 4, 8, or 16 subbands for system bandwidths of 1.25MHz, 2.5MHz, 5MHz, 10MHz, or 20MHz, respectively.

[0055] While aspects of the examples described herein may be associated with LTE technology, aspects of this disclosure may be applied to other wireless communication systems such as NR.

[0056] NR can utilize OFDM with CP on both uplink and downlink, and includes support for half-duplex operation using TDD. A single-component carrier bandwidth of 100MHz can be supported. NR RBs can span 12 subcarriers with a subcarrier bandwidth of 75kHz over a duration of 0.1ms. Each radio frame can consist of 50 subframes of 10ms length. Therefore, each subframe can have a length of 0.2ms. Each subframe can indicate the link direction for data transmission (i.e., downlink or uplink), and the link direction of each subframe can be dynamically switched. Each subframe can include DL / UL data and DL / UL control data. UL and DL subframes for NR can be referenced as follows. Figure 7 and Figure 8 A more detailed description is provided. Beamforming can be supported, and beam direction can be dynamically configured. Precoded MIMO transmission can also be supported. MIMO configuration in DL can support up to 8 transmit antennas with multi-layer DL transmission, up to 8 multi-layer DL transmission streams, and up to 2 streams per UE. Multi-layer transmission with up to 2 streams per UE can be supported. Aggregation of multiple cells can be supported using up to 8 serving cells. Alternatively, NR can support different air interfaces in addition to OFDM-based air interfaces.

[0057] In some examples, access to the air interface can be scheduled. A scheduling entity (e.g., BS 110 or UE 120) allocates resources for communication among some or all devices and apparatuses within its service area or cell. In this disclosure, as further discussed below, the scheduling entity may be responsible for scheduling, allocating, reconfiguring, and releasing resources for one or more subordinate entities. That is, for scheduled communication, the subordinate entity utilizes the resources allocated by the scheduling entity. The BS is not the only entity that can be used as a scheduling entity. That is, in some examples, the UE can act as a scheduling entity, scheduling resources for one or more subordinate entities (e.g., one or more other UEs). In this example, the UE is acting as a scheduling entity, and other UEs utilize the resources scheduled by the UE for wireless communication. The UE can act as a scheduling entity in peer-to-peer (P2P) networks and / or mesh networks. In the mesh network example, in addition to communicating with a scheduling entity, UEs may optionally communicate directly with each other.

[0058] Thus, in a wireless communication network with scheduled access to time-frequency resources and with cellular, P2P, and mesh configurations, a scheduling entity and one or more subordinate entities can communicate using the scheduled resources.

[0059] A radio access network (RAN) may include one or more central units (CUs) and distributed units (DUs). An NRBS (e.g., gNB, 5G NB, NB, 5G NB, TRP, AP) may correspond to one or more BSs. NR cells may be configured as access cells (ACells) or data-only cells (DCells). DCells may be cells used for carrier aggregation or dual connectivity, but not for initial access, cell selection / reselection, or handover.

[0060] Figure 2 It shows that it can be used Figure 1 The illustrated example logical architecture of the distributed RAN 200 implemented in the wireless communication system 100 is shown. The 5G access node (AN) 206 may include an access node controller (ANC) 202. The ANC 202 may be a CU of the distributed RAN 200. The backhaul interface of the next-generation core network (NG-CN) 204 may terminate at the ANC 202. The backhaul interface to adjacent next-generation access nodes (NG-ANs) may terminate at the ANC 202. The ANC 202 may include one or more TRPs 208.

[0061] TRP 208 includes a DU. TRP 208 can connect to one ANC (ANC 202) or more ANCs (not shown). For example, for RAN sharing, Radio as a Service (RaaS), and service-specific AND deployments, the TRP can connect to more than one ANC 202. TRP 208 may include one or more antenna ports. TRP 208 can be configured to provide services to a UE (e.g., UE 120) individually (e.g., dynamically selected) or jointly (e.g., jointly transmitted).

[0062] The exemplary logical architecture of the distributed RAN 200 can be used to illustrate the fronthaul definition. The logical architecture can support fronthauling solutions across different deployment types. For example, the logical architecture can be based on transmit network capabilities (e.g., bandwidth, latency, and / or jitter). The logical architecture can share features and / or components with LTE. The NG-AN 210 can support dual connectivity with NR. The NG-AN 210 can share common fronthaul for both LTE and NR. The logical architecture can enable cooperation between and within TRPs 208. For example, cooperation can be pre-configured within TRPs 208 and / or across TRPs 208 via ANC 202. Inter-TRP interfaces may not exist.

[0063] The logical architecture of the distributed RAN 200 can include dynamic configurations that separate logical functions. (Refer to...) Figure 5 In more detail, the Radio Resource Control (RRC) layer, Packet Data Convergence Protocol (PDCP) layer, Radio Link Control (RLC) layer, Media Access Control (MAC) layer, and Physical (PHY) layer can be placed at the DU (e.g., TRP 208) or CU (e.g., ANC202).

[0064] Figure 3 An example physical architecture of a distributed RAN 300 according to aspects of this disclosure is shown. Figure 3 As shown, the distributed RAN 300 includes a centralized core network unit (C-CU) 302, a centralized RAN unit (C-RU) 304, and a DU 306.

[0065] The C-CU 302 can organize core network functions. The C-CU 302 can be deployed centrally. C-CU 302 functions can be offloaded (e.g., to Advanced Wireless Services (AWS)) to handle peak capacity. The C-RU 304 can organize one or more ANC functions. Optionally, the C-RU 304 can organize core network functions locally. The C-RU 304 can have a distributed deployment. The C-RU 304 can be located near the network edge. The DU 306 can organize one or more TRPs (Edge Node (EN), Edge Unit (EU), Radio Header Terminal (RH), Smart Radio Header Terminal (SRH), etc.). The DU 306 can be located at the edge of a network with radio frequency (RF) capabilities.

[0066] Figure 4 It shows Figure 1 The example components of BS 110 and UE 120 shown can be used to implement various aspects of this disclosure for high-performance, flexible and compact LDPC coding. Figure 4 One or more components of BS 110 and UE 120 shown can be used to implement various aspects of this disclosure. For example, antennas 452a-454r, demodulators / modulators 454a-454r, TX MIMO processor 466, receiver processor 458, transmitter processor 464 and / or controller / processor 480 of UE 120, and / or antennas 434a-434t, demodulators / modulators 432a-434t, TX MIMO processor 430, transmitter processor 420, receiver processor 438 and / or controller / processor 440 of BS 110 can be used to perform the functions described above. Figure 13 The operation 1300 described herein is explained.

[0067] For restricted association scenarios, BS 110 can be Figure 1 The BS 110c is a macro BS, while the UE 120 can be a UE 120y. The BS 110 can also be other types of BS. The BS 110 can be equipped with antennas 434a to 434t, while the UE 120 can be equipped with antennas 452a to 452r.

[0068] In BS 110, transmit processor 420 can receive data from data source 412 and control information from controller / processor 440. The control information can be used for the Physical Broadcast Channel (PBCH), Physical Control Format Indicator Channel (PCFICH), Physical Hybrid ARQ Indicator Channel (PHICH), Physical Downlink Control Channel (PDCCH), or other control channels or signals. Data can be used for the Physical Downlink Shared Channel (PDSCH), or other data channels or signals. Transmit processor 420 can process (e.g., encode and symbol map) the data and control information to obtain data symbols and control symbols, respectively. For example, transmit processor 420 can use an LDPC code design, discussed in more detail below, to encode information bits. Transmit processor 420 can also generate reference symbols, for example, for the Primary Synchronization Signal (PSS), Secondary Synchronization Signal (SSS), and Cell-Specific Reference Signal (CRS). The transmit (TX) multiple-input multiple-output (MIMO) processor 430 can perform spatial processing (e.g., precoding) on ​​data symbols, control symbols, and / or reference symbols (if applicable), and can provide the output symbol stream to modulators (MODs) 432a to 432t. Each modulator 432 can process the corresponding output symbol stream (e.g., for OFDM, etc.) to obtain an output sample stream. Each modulator 432 can further process (e.g., convert to analog, amplify, filter, and up-convert) the output sample stream to obtain a downlink signal. The downlink signal from modulators 432a to 432t can be transmitted via antennas 434a to 434t, respectively.

[0069] At UE 120, antennas 452a to 452r can receive downlink signals from BS 110 and can respectively provide the received signals to demodulators (DEMODs) 454a to 454r. Each demodulator 454 can adjust (e.g., filter, amplify, down-convert, and digitize) the corresponding received signal to obtain an input sample. Each demodulator 454 can also process the input sample (e.g., for OFDM, etc.) to obtain the received symbols. MIMO detector 456 can obtain the received symbols from all demodulators 454a to 454r, perform MIMO detection on the received symbols if applicable, and provide the detected symbols. Receiver processor 458 can process (e.g., demodulate, deinterleave, and decode) the detected symbols, provide the decoded data for UE 120 to data sink 460, and provide the decoded control information to controller / processor 480.

[0070] On the uplink, at UE 120, transmit processor 464 can receive and process data from data source 462 (e.g., for the Physical Uplink Shared Channel (PUSCH) or other data channels or signals) and control information from controller / processor 480 (e.g., for the Physical Uplink Control Channel (PUCCH) or other control channels or signals). Transmit processor 464 can also generate reference symbols for reference signals. Symbols from transmit processor 464 can (if applicable) be pre-coded by TX MIMO processor 466, further processed by demodulators 454a to 454r (e.g., for SC-FDM, etc.), and transmitted to BS 110. At BS 110, uplink signals from UE 120 can be received by antenna 434, processed by modulator 432, detected (if applicable) by MIMO detector 436, and further processed by receive processor 438 to obtain decoded data and control information transmitted by UE 120. The receiver processor 438 can provide decoded data to the data sink 439 and decoded control information to the controller / processor 440.

[0071] Memory 442 can store data and program code for BS 110, and memory 482 can store data and program code for UE 120. Scheduler 444 can schedule UE for data transmission on downlink and / or uplink.

[0072] Figure 5 Figure 500 illustrates examples of implementing a communication protocol stack according to various aspects of this disclosure. The illustrated communication protocol stack can be implemented by a device operating in a 5G system (e.g., a system supporting uplink-based mobility). Figure 500 illustrates a communication protocol stack including an RRC layer 510, a PDCP layer 515, an RLC layer 520, a MAC layer 525, and a PHY layer 530. In one example, the layers of the protocol stack can be implemented as separate modules of software, parts of a processor or ASIC, parts of a non-parallel device connected via a communication link, or various combinations thereof. Parallel and non-parallel implementations can be used, for example, in protocol stacks for network access devices (e.g., AN, CU, and / or DU) or UEs.

[0073] First alternative scheme 505-a illustrates a decoupled implementation of the protocol stack, wherein the implementation of the protocol stack is separated between a centralized network access device (e.g., ANC 202) and a distributed network access device (e.g., DU 208). In first alternative scheme 505-a, the RRC layer 510 and PDCP layer 515 can be implemented by the CU, and the RLC layer 520, MAC layer 525, and PHY layer 530 can be implemented by the DU. In various examples, the CU and DU can be co-located or non-co-located. First alternative scheme 505-a can be useful in macrocell, microcell, or picocell deployments.

[0074] The second alternative, 505-b, illustrates a unified implementation of the protocol stack, where the stack is implemented in a single network access device (e.g., Access Node (AN)), NR BS, NR NB, Network Node (NN), TRP, gNB, etc.). In this second alternative, the RRC layer 510, PDCP layer 515, RLC layer 520, MAC layer 525, and PHY layer 530 can each be implemented independently of the AN. The second alternative, 505-b, can be useful in femtocell deployments.

[0075] Regardless of whether the network access device implements part or all of the protocol stack, the UE can implement the entire protocol stack (e.g., RRC layer 510, PDCP layer 515, RLC layer 520, MAC layer 525, and PHY layer 530).

[0076] Figure 6 This is a diagram illustrating an example of a subframe 600 surrounding the DL. The subframe 600 surrounding the DL may include a control portion 602. The control portion 602 may exist in the initial or start portion of the subframe 600 surrounding the DL. The control portion 602 may include various scheduling and / or control information corresponding to the various portions of the subframe 600 surrounding the DL. In some configurations, the control portion 602 may be a Physical DL Control Channel (PDCCH), such as... Figure 6 As shown. Subframe 600 surrounding the DL may also include a DL data portion 604. The DL data portion 604 may be referred to as the payload surrounding subframe 600 of the DL. The DL data portion 604 may include communication resources for transmitting DL data from a scheduling entity (e.g., UE or BS) to a subordinate entity (e.g., UE). In some configurations, the DL data portion 604 may be a Physical DL Shared Channel (PDSCH).

[0077] Subframe 600 surrounding the DL may also include a common UL portion 606. The common UL portion 606 may be referred to as a UL burst, common UL burst, and / or various other suitable terms. The common UL portion 606 may include feedback information corresponding to various other portions of the subframe 600 surrounding the DL. For example, the common UL portion 606 may include feedback information corresponding to the control portion 602. Non-limiting examples of feedback information may include acknowledgment (ACK) signals, negative acknowledgment (NACK) signals, HARQ indicators, and / or various other suitable types of information. The common UL portion 606 may additionally or alternatively include information such as information relating to the Random Access Channel (RACH) procedure, scheduling requests (SR), and various other suitable types of information. Figure 6 As shown, the end of the DL data portion 604 can be temporally separated from the beginning of the common UL portion 606. This temporal separation can be referred to as a gap, guard period, guard interval, and / or various other suitable terms. This separation provides time for the switching from DL communication (e.g., a reception operation performed by a subordinate entity (e.g., a UE)) to UL communication (e.g., a transmission performed by a subordinate entity (e.g., a UE)). The above is merely one example of a subframe surrounding the DL, and alternative structures with similar characteristics may exist without departing from the aspects described herein.

[0078] Figure 7 This is a diagram illustrating an example of a subframe 700 surrounding the UL. The subframe 700 surrounding the UL may include a control section 702. The control section 702 may be present in the initial or beginning portion of the subframe 700 surrounding the UL. Figure 7 The control section 702 in the above reference can be similar to the one mentioned above. Figure 6 The control portion 602 is described. The subframe 700 surrounding the UL may also include a UL data portion 704. The UL data portion 704 may be referred to as the payload surrounding the subframe 700 of the UL. The UL data portion 704 may refer to communication resources used to transmit UL data from a subordinate entity (e.g., UE) to a scheduling entity (e.g., UE or BS). In some configurations, the control portion 702 may be a PDCCH.

[0079] like Figure 7 As shown, the end of control section 702 may be time-separated from the beginning of UL data section 704. This time separation may be referred to as a gap, protection period, protection interval, and / or various other suitable terms. This separation provides time for switching from DL communication (e.g., a receiving operation performed by a scheduling entity) to UL communication (e.g., a transmission performed by a scheduling entity). Subframe 700 surrounding the UL may also include a common UL section 706. Figure 7 The public UL section 706 in the above reference can be similar to the above reference. Figure 6 The common UL portion 606 is described. Common UL portion 706 may additionally or alternatively include information relating to the Channel Quality Indicator (CQI), Sounding Reference Signal (SRS), and various other suitable types of information. The foregoing is merely one example of a subframe surrounding the UL, and alternative structures with similar characteristics may exist without departing from the aspects described herein.

[0080] In some cases, two or more dependent entities (e.g., UEs) can communicate with each other using sidelink signals. Real-world applications of such sidelink communication can include public safety, proximity services, UE-to-network relay, vehicle-to-vehicle (V2V) communication, Internet of Things (IoE) communication, IoT communication, mission-critical mesh, and / or various other suitable applications. Generally, even if the scheduling entity can be used for scheduling and / or control purposes, a sidelink signal can refer to a signal transmitted from one dependent entity (e.g., UE1) to another dependent entity (e.g., UE2) without being relayed by the scheduling entity (e.g., UE or BS). In some examples, licensed spectrum (unlike wireless local area networks (WLANs) that typically use unlicensed spectrum) can be used to transmit sidelink signals.

[0081] The UE can operate in various radio resource configurations, including configurations associated with transmitting pilots using a dedicated resource set (e.g., Radio Resource Control (RRC) dedicated state, etc.) or configurations associated with transmitting pilots using a common resource set (e.g., RRC common state, etc.). When operating in RRC dedicated state, the UE can select the dedicated resource set for transmitting pilot signals to the network. When operating in RRC common state, the UE can select the common resource set for transmitting pilot signals to the network. In either case, the pilot signals transmitted by the UE can be received by one or more network access devices (such as AN or DU) or portions thereof. Each receiving network access device can be configured to receive and measure pilot signals transmitted on the common resource set, and also to receive and measure pilot signals transmitted on dedicated resource sets allocated to some UEs, wherein the network access devices for these UEs are members of a monitoring set for the network access devices for that UE. One or more receiving network access devices or the receiving network access devices sending the measurements of the pilot signals to the CU can use the measurements to identify the serving cell for these UEs, or to initiate a change of serving cell for one or more of these UEs.

[0082] Example error correction coding features

[0083] Many communication systems use error-correcting codes. Specifically, error-correcting codes compensate for the inherent unreliability of information transmission in these systems by introducing redundancy into the data stream. Low-density parity-check (LDPC) codes are a specific type of error-correcting code that uses an iterative coding system. Gallager codes are an early example of "regular" LDPC codes. Regular LDPC codes are linear block codes whose parity check matrix H has most elements set to "0".

[0084] LDPC codes can be represented by a bipartite graph (often called a "Tanner graph"). In a bipartite graph, one set of variable nodes corresponds to the bits of the codeword (e.g., information bits or system bits), and one set of parity nodes corresponds to the set of parity constraints that define the code. Therefore, the nodes of the graph are separated into two distinct sets and have edges connecting two different types of nodes (i.e., variable nodes and parity nodes). In a regular graph or code, all variable nodes have the same degree, and all its constraint nodes have the same degree. In this case, the code is a regular code. On the other hand, irregular codes have constraint nodes and / or variable nodes with different degrees. For example, some variable nodes may have a degree of 4, other nodes may have a degree of 3, and still others may have a degree of 2.

[0085] "Lifting" enables the implementation of LDPC codes using parallel encoding and / or decoding schemes, while reducing the complexity typically associated with large LDPC codes. Specifically, lifting is a technique used to generate relatively large LDPC codes from multiple copies of a smaller fundamental code. For example, a lifted LDPC code can be generated by producing multiple (Z) parallel copies of a fundamental graph, and then interconnecting these parallel copies by permuting the edge clusters of each copy of the fundamental graph. Thus, a larger graph can be obtained through "copying and permutation" operations, where multiple copies are overlapped, making vertices of the same type close together, while the entire graph consists of multiple disconnected subgraphs.

[0086] A lifted graph is created by copying the bipartite fundamental graph (G), which can also be called the prototype graph, multiple times (Z times), where Z can be called the lift, lift size, or lift size value. Variable nodes and check nodes are considered "neighbors" if they are connected by "edges" (i.e., lines connecting variable nodes and check nodes) in the graph. Additionally, for each edge (e) of the bipartite fundamental graph (G), a permutation is applied to Z copies of the edge (e) to interconnect N copies of G. The permutation is typically an integer value k associated with the edge, which can be called the lift value. A sequence of bits with a one-to-one association with a sequence of variable nodes is a valid codeword if and only if, for each check node, the sum of the bits associated with all neighboring variable nodes is zero modulo 2 (i.e., it includes an even number of 1s). If the permutation (lift value) used is cyclic, the resulting LDPC code can be quasi-cyclic (QC).

[0087] Figure 8-8A Graph and matrix representations of example LDPC codes according to certain aspects of this disclosure are shown respectively. For example, Figure 8 A bipartite graph 800 representing an LDPC code is shown. The bipartite graph 800 includes a set of five variable nodes 810 (represented by circles) connected to four check nodes 820 (represented by squares). Edges in the bipartite graph 800 (represented by lines connecting variable nodes 810 to check nodes 820) connect the variable nodes 810 to the check nodes 820. Therefore, the bipartite graph 800 consists of |V| = five variable nodes and |C| = four check nodes connected by |E| = 12 edges.

[0088] A bipartite graph 800 can be represented by a simplified adjacency matrix, such as... Figure 8A As shown. The matrix representation of 800A includes a parity check matrix (PCM) H and a codeword vector x, where x1-x5 represent the bits of codeword x. H is used to determine whether the received signal has been properly decoded. H has C rows corresponding to j check nodes and V columns (i.e., demodulation symbols) corresponding to i variable nodes, where the rows represent equations and the columns represent the bits of the codeword. Figure 8A In the graph H, there are 4 rows and 5 columns corresponding to 4 check nodes and 5 variable nodes from the bipartite graph 800. If the j-th check node is connected to the i-th variable node by an edge (i.e., the two nodes are neighbors), then there exists a "1" in the i-th column and j-th row of H. That is, the intersection of the i-th row and j-th column contains "1", where the edge connects the corresponding vertex; and "0", where no edge exists. H is valid if and only if x = 0 for the codeword vector x to represent a valid codeword (e.g., if for each constraint node, the sum of the bits adjacent to that constraint node (via the association of bits with the variable nodes) is 0 modulo 2 (i.e., these bits include an even number of 1s). Therefore, if the codeword is received correctly, then Hx = 0 (mod 2). When the product of the encoded received signal and H becomes "0", it indicates that no error has occurred.

[0089] The number of demodulated symbols or variable nodes is the LDPC code length. The number of non-zero elements in a row (column) is defined as the row (column) weight d(c)d(v). The degree of a node refers to the number of edges connected to that node. For example, as... Figure 8 As shown, variable node 801 has three connectivity levels and is connected to check nodes 811, 812, and 813 by edges. Variable node 802 has three connectivity levels and is connected to check nodes 811, 813, and 814 by edges. Variable node 803 has two connectivity levels and is connected to check nodes 811 and 814 by edges. Variable node 804 has two connectivity levels and is connected to check nodes 812 and 814 by edges. Variable node 805 has two connectivity levels and is connected to check nodes 812 and 813 by edges. This feature is... Figure 8A As shown in matrix H, the number of edges connected to variable node 810 is equal to the number of 1s in the corresponding column, and is called the variable node degree d(v). Similarly, the number of edges connected to check node 820 is equal to the number of 1s in the corresponding row, and is called the check node degree d(c). For example, as... Figure 8A As shown, the first column of matrix H corresponds to variable node 801. The corresponding entries in column (1,1,1,0) indicate the edge connections to check nodes 811, 812, and 813, while 0 indicates no edge connection to check node 814. The entries in the second, third, fourth, and fourth columns of H represent the edge connections from variable nodes 802, 803, 804, and 805 to the check nodes, respectively.

[0090] Figure 9 It is a bipartite graph 900, which shows Figure 8 The lifting of three copies of a bipartite graph 800. The three copies can be interconnected by permuting the same edges between them. If the permutation is limited to cyclic permutations, the resulting graph corresponds to a quasi-cyclic LDPC with lifting Z=3. The original graph from which the three copies are obtained is referred to in this paper as the fundamental graph. To derive graphs of different sizes from the fundamental graph, the "copy and permutation" operation can be applied to the fundamental graph.

[0091] The corresponding PCM of the lifted graph can be constructed from the PCM of the basic graph by replacing each entry in the basic PCM with a Z×Z matrix. "0" entries (those without a base edge) are replaced with a 0 matrix, and 1 entries (indicating a base edge) are replaced with a Z×Z permutation matrix. In the case of cyclic lifting, the permutation is cyclic.

[0092] The cyclically boosted LDPC code can also be interpreted as a binary polynomial modulo x.z The code on the ring with +1. In this interpretation, the binary polynomial (x) = b0 + b1x + b2x 2 +...+b z-1 x z-1 It can be associated with each variable node in the basic graph. Binary vectors (b0, b1, b2...b) z-1 This corresponds to the bits associated with the Z corresponding variable nodes in the lifted graph, i.e., Z copies of a single basic variable node. This is achieved by multiplying the corresponding binary polynomial by x. k This is used to perform cyclic permutations of binary vectors by k (called the lift value associated with the edges in the graph), where the multiplication is modulo x. z +1. The degree d parity check in the basic graph can be interpreted as checking adjacent binary polynomials B1(x)...B d The linear constraint of (x) is denoted as x k1 B1(x)+x k2 B2(x)+...+x kd B d (x)=0x k1 B1(x)+x k2 B2(x)+...+x kd B d (x) = 0, values ​​k1...k d It is the cyclic promotion value associated with the corresponding edge.

[0093] The resulting equation is equivalent to Z parity nodes in the cyclically boosted Tanner graph corresponding to a single associated parity node in the base graph. Therefore, the parity matrix for the boosted graph can be represented using a matrix of the base graph, where one entry is of the form x. k The monomial is replaced, and the 0 entry is promoted to 0; however, 0 is now interpreted as the 0 binary polynomial modulo x. z +1. x can be replaced by giving k. k Write out such a matrix. In this case, the zero polynomial is sometimes represented as "-1", and sometimes interpreted as another character so that it can be associated with x. 0 Distinguish them.

[0094] Typically, the square submatrix of the parity check matrix represents the parity check bits of the code. Complementary columns correspond to information bits that are set to be equal to the information bits to be encoded during encoding. Encoding can be achieved by solving the variables in the aforementioned square submatrix to satisfy the parity check equation. Matrix H can be divided into two parts, M and N, where M is a square part. Therefore, encoding is reduced to solving M... c=s=Nd, where c and d include x. In the case of quasi-cyclic codes or cyclically boosted codes, the above algebra can be interpreted as crossing a ring x of a binary polynomial. z +1 ring. In the case of quasi-cyclic 802.11LDPC codes, the coding submatrix M has as follows: Figure 10 The integer representation shown.

[0095] The received LDPC codewords can be decoded to produce a reconstructed version of the original codewords. In the absence of errors, or where errors can be corrected, decoding can be used to recover the original encoded data units. The decoder can use redundant bits to detect and correct bit errors. LDPC decoders typically operate by iteratively performing local operations and passing these results by exchanging messages along the edges within the bipartite graph 800, and by updating these messages by performing computations at the nodes based on the input messages. These steps can typically be repeated several times. For example, each variable node 810 in graph 800 can initially be provided with “soft bits” (e.g., bits representing the received codewords) indicating an estimate of the value of the associated bits, as determined by observations of the communication channel. Using these soft bits, the LDPC decoder can update messages by iteratively reading messages or portions thereof from memory and writing the updated messages or portions thereof back to memory. The update operations are typically based on parity constraints of the corresponding LDPC code. In implementations for boosted LDPC codes, messages on the same edges are typically processed in parallel.

[0096] LDPC codes designed for high-speed applications typically employ quasi-cyclic structures with large boost factors and relatively small fundamental graphs to support high parallelism in encoding and decoding operations. LDPC codes with higher code rates (e.g., the ratio of message length to codeword length) tend to have relatively few parity nodes. If the number of fundamental parity nodes is less than the degree of a variable node (e.g., the number of edges connecting to the variable node), then in the fundamental graph, the variable node is connected to at least one of the fundamental parity nodes by two or more edges (e.g., a variable node can have "bilateral" connections). Having fundamental variable nodes and fundamental parity nodes connected by two or more edges is generally undesirable for parallel hardware implementations. For example, such bilateral connections can lead to multiple concurrent read and write operations to the same memory location, which can in turn cause data consistency problems. In basic LDPC codes, two sides can trigger parallel reads of the same soft bit value memory location twice during a single parallel parity node update. Therefore, additional circuitry is typically required to combine the soft bit values ​​written back to memory to properly incorporate the two updates. Eliminating the two sides in LDPC codes helps avoid this additional complexity.

[0097] The design of LDPC codes based on cyclic lifting can be interpreted as codes on a ring of polynomial modules, where the polynomial module can be a binary polynomial module x. Z -1, where Z is the lifting size (e.g., the size of the cycle in a quasi-cyclic code). Therefore, encoding such a code can generally be interpreted as algebraic operations within this cycle.

[0098] In the standard definition of a set of irregular LDPC codes (degree distribution), all edges in a Tanner graph representation are statistically interchangeable. In other words, there exists an edge with a single statistical equivalence class. For a multi-edge LDPC code, edges with multiple equivalence classes are possible. In the standard definition of a set of irregular LDPC codes, nodes in the graph (both variable and constraint nodes) are specified by their degree (i.e., the number of edges to which these nodes are connected). In a multi-edge type setting, the edge degree is a vector; it specifies the number of edges independently connected to nodes from each edge equivalence class (type). The multi-edge type set consists of a finite number of edge types. The degree type of a constraint node is a vector of (non-negative) integers; the i-th entry of this vector records the number of sockets of type i connected to such nodes. This vector can be called the edge degree. Although the degree type of a variable node has two parts, it can be viewed as a vector of (non-negative) integers. The first part relates to the received distribution and will be called the received degree, and the second part specifies the edge degree. The edge degree serves the same purpose as that of a constraint node. Edges are categorized by type when they pair with sockets of the same type. The constraint that sockets must pair with sockets of the same type characterizes the polygonal type concept. In a polygonal type description, different node types can have different distributions of received data (e.g., associated bits can travel through different channels).

[0099] Punching is performed by removing bits from a codeword to produce a shorter codeword. Thus, the punctured variable nodes correspond to codeword bits that were not actually transmitted. Punching variable nodes in an LDPC code creates a shortened code (e.g., due to bit removal) while also effectively removing parity nodes. Specifically, for a matrix representation of an LDPC code that includes the bits to be punctured (where the variable nodes to be punctured have a degree of one (e.g., through row merging)), puncturing the variable nodes removes the associated bits from the code and effectively removes a single adjacent parity node from the graph. As a result, the number of parity nodes in the graph is reduced by one. Punching can be performed according to a puncturing pattern. The puncturing pattern specifies the bits to be punctured.

[0100] Figure 11 This is a simplified block diagram illustrating an encoder according to certain aspects of this disclosure. Figure 11This is a simplified block diagram 1100 illustrating a portion of a radio frequency (RF) modem 1150 that can be configured to provide signals including encoded messages for wireless transmission. In one example, a convolutional encoder 1102 in a BS 110 (or a UE 120 on the reverse path) receives a message 1120 for transmission. The message 1120 may contain data and / or encoded voice or other content directed to a receiving device. The encoder 1102 encodes the message using a suitable modulation and coding scheme (MCS), typically selected based on a configuration defined by the BS 110 or another network entity. The encoded bitstream 1122 generated by the encoder 1102 can then be selectively punctured by a puncturing module 1104, which may be a separate device or component or integrated with the encoder 1102. The puncturing module 1104 can determine whether the bitstream should be punctured before transmission or should be transmitted without puncturing. The decision to puncture the bitstream 1122 is typically based on network conditions, network configuration, RAN-defined preferences, and / or other reasons. Bitstream 1122 can be punctured according to puncturing pattern 1112 and used to encode message 1120. Punching module 1104 provides output 1124 to mapper 1106, which generates a sequence of Tx symbols 1126, which is modulated, amplified, or otherwise processed by Tx chain 1108 to generate RF signal 1128 for transmission through antenna 1110.

[0101] Depending on whether the modem section 1150 is configured to puncture the bitstream 1122, the output 1124 of the puncturing module 1104 can be either an unpunctured bitstream 1122 or a punctured version of the bitstream 1122. In one example, parity bits and / or other error-correcting bits can be punctured in the output 1124 of the encoder 1102 to transmit message 1120 within the limited bandwidth of the RF channel. In another example, the bitstream can be punctured to reduce the power required to transmit message 1120, to avoid interference or for other network-related reasons. These punctured codeword bits are not transmitted.

[0102] The decoder and decoding algorithm used to decode LDPC codewords operate by exchanging messages along the edges within the graph and updating these messages by performing computations at the nodes based on the input messages. Each variable node in the graph is initially provided with soft bits called the received value, which indicate an estimate of the value of associated bits, as determined by observations of, for example, a communication channel. Ideally, the estimates of the separate bits are statistically independent. This ideal may be violated in practice. The received word consists of a set of received values.

[0103] Figure 12This is a simplified block diagram illustrating a decoder according to certain aspects of this disclosure. Figure 12 This is a simplified schematic diagram showing a portion of an RF modem 1250, which can be configured to receive and decode wirelessly transmitted signals including punctured encoded messages. Punctured codeword bits can be considered as being erased. For example, during initialization, the LLR of a punctured node can be set to "0". In various examples, the modem 1250 receiving the signal can reside at the UE, at the BS, or at any other suitable device or unit for performing the described functions. Antenna 1202 provides RF signal 1220 to the UE. RF chain 1204 processes and demodulates RF signal 1220 and can provide symbol sequence 1222 to demapper 1206, which generates a bitstream 1224 representing the encoded message.

[0104] Demapper 1206 can provide a depunctured bitstream 1224. In one example, demapper 1206 may include a depuncturing module that can be configured to insert null values ​​at positions in the bitstream where the transmitter has removed punctured bits. The depuncturing module can be used when the puncturing pattern 1210 used to generate the punctured bitstream at the transmitter is known. The puncturing pattern 1210 can be used to identify LLRs 122 that can be ignored during decoding of the bitstream 1224 by the convolutional decoder 1208. The LLR can be associated with a set of depunctured bit positions in the bitstream 1224. Therefore, decoder 1208 can generate decoded message 1226 with reduced processing overhead by ignoring the identified LLRs 1228. The LDPC decoder may include multiple processing elements that perform parity or variable node operations in parallel. For example, when processing codewords with a boost size Z, the LDPC decoder can utilize several (Z) processing elements to simultaneously perform parity checks on all Z edges of the boosted graph.

[0105] The processing efficiency of decoder 1208 can be improved by configuring decoder 1208 to ignore LLR 1228 corresponding to punctured bits in messages transmitted in punctured bitstream 1222. Punctured bitstream 1222 can be punctured according to a puncturing pattern that defines certain bits to be removed from the encoded message. In one example, certain parity bits or other error correction bits may be removed. The puncturing pattern can be represented as a puncturing matrix or table that identifies the positions of the bits to be punctured in each message. The puncturing pattern can be selected to reduce the processing overhead for decoding message 1226 while maintaining consistency with the data rate on the communication channel and / or with the transmission power limits set by the network. The resulting punctured bitstream typically exhibits the error correction characteristics of high-rate error correction codes but with less redundancy. Therefore, puncturing can be effectively employed to reduce the processing overhead at decoder 1208 in the receiver when channel conditions result in a relatively high signal-to-noise ratio (SNR).

[0106] A convolutional decoder 1208 can be used to decode an m-bit information string from a bitstream encoded using convolutional codes. Decoder 1208 may include a Viterbi decoder, an algebraic decoder, or another suitable decoder. In one example, the Viterbi decoder employs a well-known Viterbi algorithm to find the most probable signaling state sequence (Viterbi path) corresponding to the received bitstream 1224. The bitstream 1224 can be decoded based on statistical analysis of the LLR calculated for the bitstream 1224. In one example, the Viterbi decoder can use a likelihood ratio test to generate an LLR based on the bitstream 1224 to compare and select the correct Viterbi path defining the signaling state sequence. The likelihood ratio can be used to statistically compare the fit of multiple candidate Viterbi paths using a likelihood ratio test that compares the logarithm of the likelihood ratio (i.e., the LLR) of each candidate Viterbi path to determine which path is more likely to have generated the symbol sequence of the bitstream 1224.

[0107] At the receiver, the same decoder used to decode an unpunctured bitstream can typically be used to decode a punctured bitstream, regardless of how many bits have been punctured. In a conventional receiver, LLR information is usually depunctured before attempting decryption by padding the LLR for the punctured state or position with zeros (de-punctured LLR). The decoder can ignore de-punctured LLRs, which effectively carry no information.

[0108] Example of enhanced punch and LDPC code structural features

[0109] One of the desired properties of low-density parity-check (LDPC) codes designed for wireless transmission is high performance against both Gaussian noise and fading channels. It is also desirable that the maximum degree of variable nodes (e.g., the connectivity or number of connections from variable nodes in a graph to parity nodes in a graph) is not very large (e.g., relative to a reference LDPC code).

[0110] Certain systems (e.g., 802.11n, 802.11ad, WiMAX, ATSC, etc.) can use polygonal LDPC code structures. Polygonal LDPC codes can have advantages over standard irregular LDPC codes. For example, polygonal LDPC code structures offer more degrees of freedom than standard irregular LDPC codes, which can be used to design codes with superior performance, low encoding / decoding complexity, and / or other desired properties.

[0111] Polygonal structures allow for the introduction of highly punctured variable nodes into the design, enabling the use of bounded node degree to reduce gaps with capacity. While punctured nodes contribute to achieving a design goal known as the matching condition, they can slow down the iterative decoder at the start of the decoding process. For example, punctured nodes may emit erase information along outgoing edges, causing connected check nodes to send little or no information in the first few iterations. In the context of boosted LDPC codes, for codes constructed by boosting (e.g., copying) relatively small basic codes, it is generally desirable that the basic codes have no bilateral sides or several bilateral sides (e.g., variable nodes connected to check nodes on both sides). Since highly punctured variable nodes connect to many check nodes, they can lead to the creation of bilateral sides, which can be done at a higher rate, for example, when the number of check nodes is relatively small.

[0112] Another desired feature for LDPC codes is support for Hybrid Automatic Repeat Request (HARQ) extensions. HARQ extensions can include adding additional parity bits and separating pre-existing parity by adding variable nodes of degree one. The pre-separated parity node can have at least two edges connected to the punctured variable node if the two separated parts are connected to the punctured variable node (which is desirable for achieving the desired performance). For example, an LDPC code design with a single punctured variable node of degree has two sides in the basic code. Therefore, it is desirable to have multiple punctured variable nodes with lower degrees rather than a single punctured variable node with higher degrees; however, for high-rate codes, good performance may be difficult to achieve. In other words, there may be a trade-off between avoiding two sides and achieving higher code rates.

[0113] Therefore, a technique for punching LDPC codes with fewer bilateral sides but still capable of achieving high performance across a wide range of code rates is desired.

[0114] This paper provides techniques for enhanced puncturing of multiple variable nodes with the highest degree in the basic graph, as well as enhanced puncturing of variable nodes with relatively low degree relative to other types of LDPC codes, and LDPC code structures with additional parity bits added to the polygonal type LDPC code structure, wherein the polygonal type LDPC code structure can help achieve the desired code rate and performance in Gaussian and fading channels.

[0115] Figure 13 An example operation 1300 for wireless communication according to certain aspects of this disclosure is illustrated. Operation 1300 can be performed, for example, by a transmitting device (e.g., UE 120 or BS 110). Operation 1300 can begin at 1302 by encoding a set of information bits to generate codewords based on an LDPC code (e.g., a polygonal type LDPC code). The LDPC code is defined by a fundamental matrix having a first number of variable nodes (columns in a fundamental matrix) and a second number of parity nodes (rows in a fundamental matrix). The variable nodes may have low connectivity to the parity nodes relative to the variable nodes in a reference LDPC code (e.g., an LDPC code with a single-height punctured node), and the fundamental matrix has at least one additional parity bit for the punctured variable nodes (e.g., one additional variable node or M-1 additional variable nodes for each pair of punctured variable nodes). At 1304, the transmitting device punctures the codeword according to a puncturing pattern designed to puncture bits corresponding to at least two (e.g., M variable nodes) of the variable nodes (e.g., the two highest-level variable nodes of the fundamental matrix), to generate a punctured codeword. At 1306, the transmitting device adds at least one additional parity bit to at least one pair of the punctured variable nodes to the directed fundamental graph.

[0116] At 1308, the transmitting device sends punctured codewords. According to some aspects, at least one additional variable node is formed by parity checking of the two punctured variable nodes. At least one additional variable node may have a connectivity of one to the parity node.

[0117] Depending on certain aspects, LDPC codes can be designed such that multiple lower-degree nodes are punctured instead of a single high-degree node. For example, two nodes with a specific degree can be punctured instead of a single punctured node with twice that degree. The punctured variable node can be the highest-degree variable node in the LDPC code structure, but is still a relatively low-degree variable node relative to other (e.g., regular) LDPC codes with a single punctured high-degree variable node. The presence of two punctured nodes that are lower-degree nodes can contribute to slower decoding convergence for these nodes, which can make it difficult to achieve good performance for high-rate codes, especially when the number of check nodes is relatively small. In some cases, the punctured node can be the highest-degree node in the fundamental graph (i.e., the variable node with the most connected edges to the check nodes in the fundamental graph); however, the punctured node can have low connectivity relative to the possible highest connectivity or degree of a punctured node in a reference LDPC code.

[0118] According to certain aspects, unpunctured additional bits can be added to the LDPC code structure. These unpunctured additional bits can be formed by taking the parity check of the two punctured nodes (e.g., the parity bit could be a variable node of degree one). Adding unpunctured extra bits to the LDPC code structure can have the effect of reducing the net puncturing rate. The overall structure with two punctured nodes and a transmitted additional parity bit can only effectively puncture only one degree of freedom from the code. The punctured nodes are preserved, allowing their advantages to remain, while the parity bit can allow for faster convergence and thus helps determine the value of the punctured bit during decoding. This structure can help improve the overall design performance on both Gaussian and fading channels, while supporting other desired characteristics discussed above.

[0119] Depending on certain aspects, an LDPC code structure can be used, in which the basic graph has a small number of punctured variable nodes with moderate (e.g., relatively low) degrees (e.g., degrees 3 to 7). The LDPC code structure can also include additional parity bits formed respectively from two such punctured nodes.

[0120] In one example implementation, an LDPC code structure with a basic graph of length 27 or 28 can be used. In the basic graph, two low-degree variable nodes can be punctured, and an additional parity bit can be added to the LDPC code structure formed by parity checking of the two punctured nodes. This LDPC code structure can be used, for example, at code rates from one-quarter to eight-ninths.

[0121] Depending on certain aspects, LDPC code structures with large fundamental graphs can involve a greater number of punctured low-degree nodes and a greater number of associated parity bits. For example, for m punctured variable nodes, m-1 parity bits of degree one can be added. Although in other cases, different numbers of parity bits can be added; for example, in some cases, fewer than m-1 parity bits can be used. Figure 14 In another example implementation shown, an LDPC code structure 1400 with a basic graph of length 36 can be used. In the basic graph, the three highest-degree variable nodes 1304 with relatively low degree in the LDPC code structure 1400 are punched, and two additional parity bits 1306 are added to the LDPC code structure 1400. Each additional parity bit is formed by parity checking two of the punched nodes and is connected to one of the parity nodes 1402.

[0122] It can be noted that the degree of a relatively low-degree punctured node does not include the edges used to form the additional parity bits. In the HARQ extension, the degree of a punctured node can increase significantly due to the addition of additional parity bits. One advantage of the polygonal type design is that it allows the introduction of variable nodes with a degree of one in a controlled manner. By puncturing all variable nodes with a degree of one and removing these variable nodes from the code graph by removing the parity nodes associated with them, a "core" graph can be obtained. The "degree" of the punctured variable node can be the degree of a node in the core graph.

[0123] The techniques and apparatus described herein are used to generate LDPC code structures with at least two relatively low-degree variable nodes that are punctured, and to add additional parity bits for pairing the punctured variable nodes. This provides better encoder / decoder operation and thus enhances the performance of the processor and / or processing system. For example, the use of lower-degree punctured nodes helps avoid bilateral issues in the graph that could slow down iterative decoding. By adding additional parity bits to the base graph for the punctured variable nodes, good performance can be achieved even in the presence of punctured variable nodes, and higher code rates can be realized while still avoiding bilateral issues in the graph. Therefore, encoding / decoding using the proposed LDPC code structure results in improved processing time.

[0124] The methods disclosed herein include one or more steps or actions for implementing the described methods. The method steps and / or actions may be interchanged without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and / or use of specific steps and / or actions may be modified without departing from the scope of the claims.

[0125] As used herein, the term "determine" encompasses a wide variety of actions. For example, "determine" can include estimation, calculation, processing, derivation, investigation, lookup (e.g., looking up a table, database, or other data structure), verification, etc. Furthermore, "determine" can include receiving (e.g., receiving information), accessing (e.g., accessing data in memory), etc. Additionally, "determine" can include resolving, selecting, choosing, establishing, etc.

[0126] In some cases, a device may have an interface for outputting frames for transmission, rather than actually sending frames. For example, a processor may output frames to an RF front-end for transmission via a bus interface. Similarly, instead of actually receiving frames, a device may have an interface for obtaining frames received from another device. For example, a processor may obtain (or receive) frames from an RF front-end for transmission via a bus interface.

[0127] The various operations described above can be performed by any suitable unit capable of performing the corresponding function. Units may include various hardware and / or software components and / or modules, including but not limited to circuits, application-specific integrated circuits (ASICs), or processors. Typically, in the case of operations shown in the accompanying drawings, these operations may have corresponding equivalent functional module components with similar numbering.

[0128] The various illustrative logic blocks, modules, and circuits described in connection with this disclosure may be used with a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device (PLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but alternatively, the processor may be any commercially available processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors incorporating a DSP core, or any other such configuration.

[0129] If implemented in hardware, an example hardware configuration could include a processing system in a wireless node. The processing system can be implemented using a bus architecture. The bus can include any number of interconnect buses and bridges, depending on the specific application and overall design constraints of the processing system. The bus can link various circuits, including processors, machine-readable media, and bus interfaces. Among other things, the bus interface can be used to connect a network adapter to the processing system via the bus. The network adapter can be used to implement signal processing functions at the PHY layer. In the wireless node (see...) Figure 1In this case, a user interface (e.g., keyboard, display, mouse, joystick, etc.) can also be connected to the bus. The bus can also link various other circuits such as timing sources, peripheral devices, voltage regulators, power management circuits, etc., which are well known in the art and will not be described further. The processor can be implemented using one or more general-purpose and / or special-purpose processors. Examples include microprocessors, microcontrollers, DSP processors, and other circuits that can execute software. Those skilled in the art will recognize how best to implement the described functions for processing the system, depending on the specific application and the overall design constraints imposed on the system.

[0130] If implemented in software, the functionality can be stored or transmitted as one or more instructions or code on a computer-readable medium. Software should be broadly interpreted as instructions, data, or any combination thereof, regardless of whether it is referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Computer-readable media includes both computer storage media and communication media, including any medium that facilitates the transfer of a computer program from one place to another. The processor may be responsible for managing the bus and general-purpose processing, including executing software modules stored on the machine-readable storage medium. The computer-readable storage medium can be coupled to the processor, allowing the processor to read information from and write information to the storage medium. Alternatively, the storage medium can be integrated with the processor. As an example, the machine-readable medium may include a transmission line, a carrier wave modulated by data, and / or a separate computer-readable storage medium on which instructions are stored, all of which can be accessed by the processor via a bus interface. Alternatively or additionally, the machine-readable medium or any portion thereof may be integrated into the processor, such as in-flight caches and / or general-purpose register files. Examples of machine-readable storage media may include, for example, RAM (random access memory), flash memory, ROM (read-only memory), PROM (programmable read-only memory), EPROM (erasable programmable read-only memory), EEPROM (electrically erasable programmable read-only memory), registers, disks, optical disks, hard disks, or any other suitable storage media, or any combination thereof. Machine-readable media may be embodied in a computer program product.

[0131] Software modules can include single instructions or many instructions, and can be distributed across multiple different code segments, different programs, and across multiple storage media. Computer-readable media can include multiple software modules. Software modules include instructions that, when executed by a device such as a processor, cause the processing system to perform various functions. Software modules can include transfer modules and receive modules. Each software module can reside in a single storage device or be distributed across multiple storage devices. For example, when a trigger event occurs, a software module can be loaded from a hard disk drive into RAM. During the execution of a software module, the processor can load some instructions into a cache to increase access speed. One or more cache lines can then be loaded into a general-purpose register file for processor execution. When referring to the functionality of the software module below, it will be understood that this functionality is implemented by the processor when instructions from that software module are executed.

[0132] Furthermore, any connection is appropriately referred to as computer-readable medium. For example, if software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared (IR), radio, and microwave, then coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are all included in the definition of medium. As used herein, disks and optical discs include compressed optical discs (CDs), laser discs, optical discs, digital versatile optical discs (DVDs), floppy disks, and... Disks typically reproduce data magnetically, while optical discs reproduce data optically using lasers. Therefore, in some aspects, computer-readable media can include non-transitory computer-readable media (e.g., tangible media). Furthermore, in other aspects, computer-readable media can include transient computer-readable media (e.g., signals). Combinations of the above should also be included within the scope of computer-readable media.

[0133] Therefore, certain aspects may include computer program products for performing the operations presented herein. For example, such computer program products may include computer-readable media having instructions stored thereon (and / or encoded thereon) that can be executed by one or more processors to perform the operations described herein.

[0134] Furthermore, it should be understood that modules and / or other suitable units for performing the methods and techniques described herein can be appropriately downloaded and / or otherwise obtained by the wireless node and / or base station. For example, such a device can be coupled to a server to facilitate the transmission of units for performing the methods described herein. Alternatively, the various methods described herein can be provided via storage units (e.g., RAM, ROM, physical storage media such as optical discs (CDs) or floppy disks), such that the wireless node and / or base station can obtain the various methods when the storage units are coupled to or provided to the device. Furthermore, any other suitable techniques for providing the methods and techniques described herein to the device can be utilized.

[0135] It should be understood that the claims are not limited to the precise configuration and components shown above. Various modifications, alterations, and variations may be made to the arrangement, operation, and details of the above-described methods and apparatus without departing from the scope of the claims.

Claims

1. A method for wireless communication, comprising: A set of information bits is encoded to generate codewords based on low-density parity-check (LDPC) codes, wherein the LDPC codes are defined by a basic graph having a first number of variable nodes and a second number of parity nodes. Punch holes in the bits of the codeword that correspond to at least two variable nodes in the first number of variable nodes in the basic graph to generate a punctured codeword. The basic graph includes at least one additional variable node for the at least two punched variable nodes, and each additional variable node is connected to a check node, the check node being coupled to the paired punched variable node; and Send a signal associated with the punched codeword.

2. The method of claim 1, wherein the at least two punched variable nodes have higher connectivity to the check node compared to other variable nodes in the base graph.

3. The method of claim 1, wherein the at least two punched variable nodes comprise M variable nodes, and wherein the at least one additional variable node comprises M-1 variable nodes.

4. The method according to claim 1, wherein the first number of variable nodes is 27 or 28 variable nodes.

5. The method of claim 1, wherein the at least two punctured variable nodes have a first connectivity to the check node that is lower than the second connectivity of the variable nodes in the reference LDPC code.

6. The method according to claim 1, further comprising: At least one boosted LDPC code is generated by taking Z copies of the LDPC code defined by the basic graph having at least two punctured variable nodes and at least one additional variable node.

7. An apparatus comprising: A unit for encoding a set of information bits to generate codewords based on a low-density parity-check (LDPC) code, wherein the LDPC code is defined by a basic graph having a first number of variable nodes and a second number of check nodes; A cell is used to punch holes in the bits of the codeword that correspond to at least two variable nodes from the first number of variable nodes in the basic graph, in order to generate a punctured codeword. The basic graph includes at least one additional variable node for the at least two punched variable nodes, and each additional variable node is connected to a check node, the check node being coupled to the paired punched variable node; and A unit for transmitting signals associated with the punched codeword.

8. The apparatus of claim 7, wherein the at least two punched variable nodes have higher connectivity to the check node compared to other variable nodes in the base graph.

9. The apparatus of claim 7, wherein the at least two punched variable nodes comprise M variable nodes, and wherein the at least one additional variable node comprises M-1 variable nodes.

10. The apparatus of claim 7, wherein the first number of variable nodes is 27 or 28 variable nodes.

11. The apparatus of claim 7, wherein the at least two punctured variable nodes have a first connectivity to the check node that is lower than the second connectivity of the variable nodes in the reference LDPC code.

12. The apparatus according to claim 7, further comprising: A unit for generating at least one boosted LDPC code by taking Z copies of the LDPC code defined by the basic graph having at least two punctured variable nodes and at least one additional variable node.

13. An apparatus comprising: At least one processor, coupled to memory, is configured as follows: A set of information bits is encoded to generate codewords based on low-density parity-check (LDPC) codes, wherein the LDPC codes are defined by a basic graph having a first number of variable nodes and a second number of parity nodes. Punch holes in the bits of the codeword that correspond to at least two variable nodes in the first number of variable nodes in the basic graph to generate a punctured codeword. The basic graph includes at least one additional variable node for the at least two punched variable nodes, and each additional variable node is connected to a check node, the check node being coupled to the paired punched variable node; and Send a signal associated with the punched codeword.

14. The apparatus of claim 13, wherein the at least two punched variable nodes have higher connectivity to the check node compared to other variable nodes in the base graph.

15. The apparatus of claim 13, wherein the at least two punched variable nodes comprise M variable nodes, and wherein the at least one additional variable node comprises M-1 variable nodes.

16. The apparatus of claim 13, wherein the first number of variable nodes is 27 or 28 variable nodes.

17. The apparatus of claim 13, wherein the at least two punctured variable nodes have a first connectivity to the check node that is lower than the second connectivity of the variable nodes in the reference LDPC code.

18. The apparatus according to claim 13, wherein, The at least one processor is further configured to: At least one boosted LDPC code is generated by taking Z copies of the LDPC code defined by the basic graph having at least two punctured variable nodes and at least one additional variable node.

19. A non-transitory computer-readable medium having computer-executable code stored thereon, comprising: Code for encoding a set of information bits to generate codewords based on low-density parity-check (LDPC) codes, wherein the LDPC codes are defined by a basic graph having a first number of variable nodes and a second number of check nodes; Code for punching bits in the codeword that correspond to at least two variable nodes in the first number of variable nodes in the basic graph to generate a punched codeword; The basic graph includes at least one additional variable node for the at least two punched variable nodes, wherein each additional variable node is connected to a check node, the check node being coupled to the paired punched variable node; and Code used to send signals associated with the punched codeword.

20. The non-transitory computer-readable medium of claim 19, wherein the at least two punched variable nodes have higher connectivity to the check node compared to other variable nodes in the basic graph.

21. The non-transitory computer-readable medium of claim 19, wherein the at least two punched variable nodes comprise M variable nodes, and wherein the at least one additional variable node comprises M-1 variable nodes.

22. The non-transitory computer-readable medium of claim 19, wherein the first number of variable nodes is 27 or 28 variable nodes.

23. The non-transitory computer-readable medium of claim 19, wherein the at least two punched variable nodes have a first connectivity to the check node that is lower than the second connectivity of the variable nodes in the reference LDPC code.

24. The non-transitory computer-readable medium of claim 19, further comprising: Code for generating at least one boosted LDPC code by taking Z copies of the LDPC code defined by the basic graph having at least two punctured variable nodes and at least one additional variable node.

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