A test system for transformer secondary multi-point grounding

Abstract

The invention provides a secondary multi-point grounding test system for a mutual inductor, comprising two layers of log files, namely: a first layer consisting of log summary information and test process and result information, which is subsequently exported to a U disk in a .CSV file format, and a second layer consisting of test waveform data, which is subsequently exported to a U disk in a COMTRADEA file format and read by tool software on a computer. The system has high-efficiency and high-reliability log records, which can store device on-site operating status information in detail and completely without occupying a lot of CPU resources, and all log files can be exported through the U disk.

Description

Technical Field

[0001] The invention relates to the technical field of mutual inductors, and in particular to a secondary multi-point grounding test system for mutual inductors. Background Art

[0002] During the use of the transformer secondary multi-point grounding test system, due to the different professional levels of operators, the complex on-site test environment, and the different secondary circuit wiring network layouts of each substation, the system often fails to test or the test is abnormal. These problems may be caused by incorrect system parameter settings, incorrect wiring methods, incorrect wiring positions, etc. In addition, when the equipment is returned to the factory for repair, detailed information on the use of the equipment on site is required to determine the equipment failure. Then, when the equipment fails, the conventional log file information cannot be retained in time, such as sudden power failure during equipment use, abnormal equipment protection, and equipment CPU crash. In order to remotely solve the problems encountered on site and return the device to the factory for repair, it is necessary to understand the detailed information on the use of the device on site, so as to accurately determine the various conditions that occur on site. Therefore, a reliable embedded log file is needed to record various parameter data during the test process, including the test start time, test end time, user set parameters, test intermediate process, test results, and test waveforms. Summary of the invention

[0003] The purpose of the present invention is to address the deficiencies of the above-mentioned prior art and provide a secondary multi-point grounding test system for a transformer, which can record data in real time and all log files can be exported through a USB flash drive.

[0004] To achieve the above object, the present invention adopts the following technical solutions:

[0005] The present invention provides a system for testing secondary multi-point grounding of a transformer, including two layers of log files, namely:

[0006] The first layer consists of log summary information and test process and result information, which is subsequently exported to a USB drive in .CSV file format;

[0007] The second layer is composed of test waveform data, which is subsequently exported to a USB flash drive in COMTRADEA file format and read by tool software on the computer.

[0008] Furthermore, the log summary information includes: the total number of log files and the current status value of each log.

[0009] Furthermore, the test process and result information corresponding to each log is stored in a 256-byte page space of the MX25L3206, without the need for cyclic writing.

[0010] Furthermore, the test process and result information includes: user set parameters, user test intermediate data and user test results;

[0011] The starting address of the waveform data to be tested and the number of bytes of the waveform data are saved in a 64K block space of the MX25L3206. When the 64K block space is full, the system starts from the first sector of the 64K block space, erases the original data, and writes new test process and result information, and repeats this cycle.

[0012] Furthermore, the test waveform data is stored in a 2M-byte space of MX25L3206. When the 2M-byte space is full, the system starts from the first block of the 2M-byte space, erases the original waveform data, and writes new waveform data, and repeats this cycle.

[0013] Furthermore, it also includes establishing an MX25L3206 free sector list in the memory for processing the sector address discontinuity problem caused by the deletion of a certain log file, and saving the CRC8 check result of the MX25L3206 free sector list to the last byte of the MX25L3206 free sector list.

[0014] It also includes establishing a 4K Byte write buffer image in the memory to write the data of the MX25L3206 chip. Except for the summary information which is programmed in page mode, other data are written in sector programming mode.

[0015] Further, the DMA channel 5 of the STM32U585VI chip is used to write the data to be written each time to the SPI2 interface through DMA, thereby writing the data into the MX25L3206.

[0016] Further, the MX25L3206 program process is:

[0017] S81, whether there is new data to be written, if not, continue to wait, if yes, proceed to S82;

[0018] S82, calculating the CRC8 checksum of the buffer image written in the memory and the saved data stored in the memory, after being destroyed by an abnormal condition, the data will not be written into the MX25L3206 chip;

[0019] S83, judging whether the CRC8 checksum of this time is equal to the result of the last calculation, if not equal, it means that the data written into the buffer image is destroyed, and all the data in the buffer image is discarded, if the result is equal, then entering S84;

[0020] S84, determine whether the number of bytes to be written exceeds the number of free bytes for writing the buffer image. If so, save the bytes written this time to the buffer image, and save the remaining bytes to be written to be written next time. Then call the DMA write function to write the contents of the buffer image into the MX25L3206 chip. Then return to S81. If not, enter S85.

[0021] S86, save the byte content to be written this time to the currently idle address of the write buffer image, and enter S86;

[0022] S87, recalculate the CRC8 checksum of writing the buffer image, save it, and then return to S81.

[0023] Furthermore, the data preservation process of the high reliability test process of the battery backup area is as follows:

[0024] S91, determine whether the test has started, if not, continue to wait, if started, enter S92;

[0025] S92, the test process save flag is saved to the BKP DR1 address of the battery backup area, and then enters S93;

[0026] S93, the test start time is saved to the BKP DP2 address of the battery backup area, and then enters S94;

[0027] S94, determine whether the test process data is updated, if not, transfer to S99, if updated, enter S95;

[0028] S95, saving the maximum output voltage to the BKP DR3 address of the battery backup area, and then entering S96;

[0029] S96, saving the maximum output current to the BKP DR4 address of the battery backup area, and then entering S97;

[0030] S97, saving the current output voltage to the BKP DR5 address of the battery backup area, and then entering S98;

[0031] S98, saving the current output current to the BKP DR6 address of the battery backup area, and then entering S99;

[0032] S99, determine whether the test is finished. If the test is not finished, return to S91. If the test is finished, proceed to the next step.

[0033] Further, the process of the DMA data storage configuration program is:

[0034] S101, reset Channel 5 of DMA1 of the STM32U585VI chip;

[0035] S102, setting the peripheral base address of Channel5 of the DMA1 to SPI->DR;

[0036] S103, setting the memory base address of Channel5 of the DMA1 as the first address of the write buffer image;

[0037] S104, setting the data transmission direction of Channel 5 of the DMA1 to memory to peripherals;

[0038] S105, setting the number of data transmission bytes of Channel 5 of the DMA1 to 4096;

[0039] S106, setting the peripheral address of Channel 5 of the DMA1 to not automatically increase during data transmission;

[0040] S107, setting the Channel5 peripheral data unit of the DMA1 to 1 byte;

[0041] S108, setting the memory data unit of Channel 5 of the DMA1 to 1 byte;

[0042] S109, setting Channel 5 of the DMA1 to the standard transmission mode;

[0043] S1010, setting the transmission mode of Channel 5 of the DMA1 to high priority;

[0044] S1011, setting Channel 5 of the DMA1 to non-memory to memory data transmission.

[0045] The beneficial effects of the present invention are as follows: the system has high efficiency and high reliability in log recording, which can not only save the on-site operation status information of the device in detail and completely, but also does not occupy a lot of CPU resources, and all log files can be exported through a U disk;

[0046] The 2-layer 3-block log file is used through BKP battery backup area storage technology, high-speed write algorithm, and DMA direct memory access technology to quickly and completely record the on-site use status of the device, and can fully reproduce and replay the entire process, providing powerful and intuitive data support for remote guidance of on-site customer usage issues and device return to factory repair. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 It is a structural schematic diagram of a secondary multi-point grounding test system for a transformer according to the present invention;

[0048] Figure 2 Write a program flow chart for MX25L3206;

[0049] Figure 3 Flowchart of data storage procedure for high reliability test process based on battery backup area;

[0050] Figure 4 Flowchart of the procedure for configuring data storage for DMA (direct memory access). DETAILED DESCRIPTION

[0051] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0052] Problems encountered on site cannot be reproduced. For example, not every test will produce abnormal conditions. In addition, if the test is destructive, multiple tests are not allowed. If a test requires a power outage or a superior issues a work ticket, it cannot be easily tested again.

[0053] Due to the limitations of on-site conditions and the uneven level of on-site testers, accurate and reliable data may not be provided sometimes;

[0054] When the device has a simple log file, if there is improper operation, such as wiring error or parameter setting error, the device may shut down or exit abnormally, and the log file cannot record the operation status of the device.

[0055] The log file fully records the working status of the device, which requires saving a large amount of data. The conventional log saving method occupies a lot of CPU resources, thus affecting the normal test and measurement work of the device.

[0056] Therefore, it is necessary to adopt a high-efficiency and high-reliability log recording method that can not only save the on-site operating status information of the device in detail and completely, but also does not occupy a lot of CPU resources, and all log files can be exported through a USB flash drive.

[0057] See also Figure 1 , a system for testing the secondary multi-point grounding of a transformer, including two layers of log files, namely:

[0058] The first layer consists of log summary information and test process and result information, which is subsequently exported to a USB drive in .CSV file format;

[0059] The second layer is composed of test waveform data, which is subsequently exported to a USB flash drive in COMTRADEA file format and read by tool software on the computer.

[0060] The 2-layer 3-block log file is used through BKP battery backup area storage technology, high-speed write algorithm, and DMA direct memory access technology to quickly and completely record the on-site use status of the device, and can fully reproduce and replay the entire process, providing powerful and intuitive data support for remote guidance of on-site customer usage issues and device return to factory repair.

[0061] The log summary information includes: the total number of log files and the current status value of each log.

[0062] This log file has the following characteristics:

[0063] Record the user-set parameters, such as setting the output voltage, setting the output frequency, setting the output time,

[0064] Record the user's test intermediate data, such as: actual maximum output voltage, actual maximum output current, current output voltage, current output current, test start time, test end time

[0065] Record the user test results, the correlation coefficient of the two sets of data sampled by the signal detector and the signal generator, and determine whether there is a conclusion of multi-point grounding

[0066] The sampled waveform data of the signal generator and signal detector during the test are recorded. The waveform data file is saved in COMTRADE (Common Format for Transient Data Exchange in Power Systems) format to facilitate later analysis using standard tool software.

[0067] The test intermediate process data is saved in the battery backup area (BKP) of the STM32U585VI. Even if an abnormal shutdown or illegal exit occurs during the test process, the intermediate process data will not be lost when the machine is turned on next time and can still be saved in the log file.

[0068] The entire log file is organized in a two-layer, three-block structure, namely: log summary information, test process and result information, which constitute one layer and are subsequently exported to a USB flash drive in .CSV file format; test waveform data constitutes one layer and is subsequently exported to a USB flash drive in COMTRADE (Common Format for Transient Data Exchange in Power Systems) file format, which can be directly read by the common computer-side tool software CAAP2008X;

[0069] The test process and result information corresponding to each log is stored in a 256-byte page space of MX25L3206, and no cyclic writing is required.

[0070] The test process and result information include: user set parameters, user test intermediate data and user test results;

[0071] The starting address of the waveform data to be tested and the number of bytes of the waveform data are saved in a 64K block space of the MX25L3206. When the 64K block space is full, the system starts from the first sector of the 64K block space, erases the original data, and writes new test process and result information, and repeats this cycle.

[0072] The program uses structures to organize and manage user-set parameters. Use the structure pointer to assign values ​​to read and write functions, and one line of code can complete the read and write process.

[0073] The structure is used in the program to organize and manage the intermediate data of the test, that is, the address where the test process and the waveform data of this test are saved and the number of bytes of the waveform data. The structure pointer is used to assign values ​​to the read and write functions, and one code can complete the read and write process.

[0074] The test waveform data is stored in a 2M-byte space of MX25L3206. When the 2M-byte space is full, the system starts from the first block of the 2M-byte space, erases the original waveform data, and writes new waveform data, and repeats this cycle.

[0075] It also includes establishing an MX25L3206 free sector list in memory for processing the discontinuous sector address problem caused by the deletion of a certain log file. At the same time, it can speed up the data saving speed to avoid the loss or error of the free sector list in the memory caused by abnormal situations;

[0076] And the result of the CRC8 check of the MX25L3206 free sector linked list is saved to the last byte of the MX25L3206 free sector linked list.

[0077] Before each use, the CRC8 check result of the free sector list in the memory is checked to see if it is the same as the previously saved result. If it is the same, it is used. If it is different, it is discarded.

[0078] It also includes establishing a 4K Byte write buffer image in the memory to write the data of the MX25L3206 chip. Except for the summary information which is programmed in page mode, other data are written in sector programming mode.

[0079] This can greatly improve the efficiency of data writing and avoid frequent sector read operations, sector erase operations, and sector write operations when data crosses sectors. In order to ensure that the content of the write buffer "image" in the memory is lost or wrong, the CRC8 check result of the "image" is calculated and saved to the last byte of the area. Before writing, calculate whether the CRC8 check result of the "image" is consistent with the previously saved result. If consistent, continue writing. If inconsistent, discard the "image". This method greatly improves the reliability of the device and ensures that the written data is absolutely correct.

[0080] The DMA channel 5 of the STM32U585VI chip is used to write the data to be written each time to the SPI2 interface through DMA, so as to write the data to the MX25L3206. The entire writing process does not require the CPU to participate, and the CPU is completely released (the CPU occupancy rate during the entire process is less than 1%), so as not to affect the normal test process of the device.

[0081] See also Figure 2 , the MX25L3206 program process is:

[0082] S81, whether there is new data to be written, if not, continue to wait, if yes, proceed to S82;

[0083] S82, calculating the CRC8 checksum of the buffer image written in the memory and the saved data stored in the memory, after being destroyed by an abnormal condition, the data will not be written into the MX25L3206 chip;

[0084] S83, judging whether the CRC8 checksum of this time is equal to the result of the last calculation, if not equal, it means that the data written into the buffer image is destroyed, and all the data in the buffer image is discarded, if the result is equal, then entering S84;

[0085] S84, determine whether the number of bytes to be written exceeds the number of free bytes for writing the buffer image. If so, save the bytes written this time to the buffer image, and save the remaining bytes to be written to be written next time. Then call the DMA write function to write the contents of the buffer image into the MX25L3206 chip. Then return to S81. If not, enter S85.

[0086] S86, save the byte content to be written this time to the currently idle address of the write buffer image, and enter S86;

[0087] S87, recalculate the CRC8 checksum of writing the buffer image, save it, and then return to S81.

[0088] Please refer to Figure 3 , the data saving process of the high reliability test process in the battery backup area is as follows:

[0089] S91, determine whether the test has started, if not, continue to wait, if started, enter S92;

[0090] S92, the test process save flag is saved to the BKP DR1 address of the battery backup area, and then enters S93;

[0091] S93, the test start time is saved to the BKP DP2 address of the battery backup area, and then enters S94;

[0092] S94, determine whether the test process data is updated, if not, transfer to S99, if updated, enter S95;

[0093] S95, saving the maximum output voltage to the BKP DR3 address of the battery backup area, and then entering S96;

[0094] S96, saving the maximum output current to the BKP DR4 address of the battery backup area, and then entering S97;

[0095] S97, saving the current output voltage to the BKP DR5 address of the battery backup area, and then entering S98;

[0096] S98, saving the current output current to the BKP DR6 address of the battery backup area, and then entering S99;

[0097] S99, determine whether the test is finished. If the test is not finished, return to S91. If the test is finished, proceed to the next step.

[0098] See also Figure 4 , the process of the DMA data storage configuration program is:

[0099] S101, reset Channel 5 of DMA1 of the STM32U585VI chip;

[0100] S102, setting the peripheral base address of Channel5 of the DMA1 to SPI->DR;

[0101] S103, setting the memory base address of Channel5 of the DMA1 as the first address of the write buffer image;

[0102] S104, setting the data transmission direction of Channel 5 of the DMA1 to memory to peripherals;

[0103] S105, setting the number of data transmission bytes of Channel 5 of the DMA1 to 4096;

[0104] S106, setting the peripheral address of Channel 5 of the DMA1 to not automatically increase during data transmission;

[0105] S107, setting the Channel5 peripheral data unit of the DMA1 to 1 byte;

[0106] S108, setting the memory data unit of Channel 5 of the DMA1 to 1 byte;

[0107] S109, setting Channel 5 of the DMA1 to the standard transmission mode;

[0108] S1010, setting the transmission mode of Channel 5 of the DMA1 to high priority;

[0109] S1011, setting Channel 5 of the DMA1 to non-memory to memory data transmission.

[0110] In order to solve the two major problems of log information preservation: abnormal shutdown or abnormal exit will cause the log information to be unable to be saved, and a large amount of log information will seriously affect the normal operation of the device. After research and analysis, we adopted two main measures to solve it: parameter setting values, test intermediate values ​​and test result values ​​are saved in the battery backup area (BKP) of the STM32U585VI chip. The content of this area will not be lost when the power is off or the chip is restarted. Using efficient writing algorithms and DMA direct data storage methods, a large amount of log information can be saved with a very low CPU occupancy rate. The specific plan is as follows:

[0111] The summary information is written by calling the NOR FLASH page programming function at the beginning of the test. After the initialization is completed, DMA (direct data storage) is used. The summary information does not exceed 256 bytes. Therefore, there is no need to write it cyclically.

[0112] Parameter setting values, test intermediate values ​​and test result values ​​are temporarily saved in the battery backup area (BKP) of the STM32U585VI chip. When the test system is shut down or exits abnormally due to improper operation or field wiring errors, these intermediate results are automatically saved in the log file at the next startup, and all log files can be exported through a USB flash drive. The DMA direct memory access function is used to write the log file information from the memory of the STM32U585VI chip to the MX25L3206 memory, and 4096 bytes (i.e., the space size of a sector of the MX25L3206 chip) are written at a time. This operation can reduce the cross-sector write judgment of the MX25L3206 chip during the write process, as well as the data sector division processing and sector erase operation execution process when writing across sectors. Whole sector writing and DMA direct memory access can greatly improve the writing speed without affecting the normal working process of the tester (the CPU occupancy of STM32U585VI during one writing process is less than 1%). The summary information and parameter setting values, test intermediate values, and test result values ​​are exported as .CSV files, which can be directly opened by the EXCEL software on the computer.

[0113] The detailed test waveform data is first temporarily stored in the memory of the STM32U585VI chip, and 4096 bytes (i.e. the space size of a sector of the MX25L3206 chip) are written at a time. This operation can reduce the cross-sector write judgment of the MX25L3206 chip during the write process, as well as the data sector division processing and sector erase operation execution process when writing across sectors. Writing one sector at a time can greatly improve the writing efficiency. The writing process uses DMA direct memory access, which can greatly increase the writing speed and does not affect the normal working process of the tester (the CPU occupancy rate of the STM32U585VI during a single writing process is less than 1%). The detailed test waveform data is exported in COMTRADE (Common Format for Transient Data Exchange of Power Systems) format files, which can be opened using the general COMTRADE tool software. Provide comprehensive, accurate and detailed records for the on-site use of the tester, and facilitate remote guidance and the function of solving various problems during the on-site use of the system.

[0114] The above-mentioned embodiments only express the implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims.

Claims

1. A system for testing secondary multi-point grounding of a transformer, characterized in that: Including two-layer log files, namely: The first layer consists of log summary information and test process and result information, which is subsequently exported to a USB drive in .CSV file format; The second layer is composed of test waveform data, which is subsequently exported to a USB flash drive in COMTRADEA file format and read by a tool software on the computer; The log summary information includes: the total number of log files and the current status value of each log; The test process and result information corresponding to each log is stored in a 256-byte page space of MX25L3206, without the need for cyclic writing; The test process and result information include: user set parameters, user test intermediate data and user test results; The starting address of the waveform data to be tested and the number of bytes of the waveform data are stored in a 64K block space of the MX25L3206. When the 64K block space is full, the system starts from the first sector of the 64K block space, erases the original data, and writes new test process and result information, and repeats this cycle. The test waveform data is stored in a 2M-byte space of MX25L3206. When the 2M-byte space is full, the system starts from the first block of the 2M-byte space, erases the original waveform data, and writes new waveform data, and repeats this cycle. It also includes establishing an MX25L3206 free sector linked list in the memory for processing the discontinuous sector address problem caused by deleting a certain log file, and saving the result of the CRC8 check of the MX25L3206 free sector linked list to the last byte of the MX25L3206 free sector linked list; It also includes establishing a 4K Byte write buffer image in the memory to write the data of the MX25L3206 chip. Except for the summary information which is programmed in page mode, other data writing is written in sector programming mode. The DMA channel 5 of the STM32U585VI chip is used to write the data to be written each time to the SPI2 interface through DMA, thereby writing the data into the MX25L3206.

2. A transformer secondary multi-point grounding test system according to claim 1, characterized in that: The operation process of the MX25L3206 is as follows: S81, whether there is new data to be written, if not, continue to wait, if yes, proceed to S82; S82, calculating the CRC8 checksum of the write buffer image in the memory and the saved data stored in the memory, after being destroyed by an abnormal condition, the data will not be written into the MX25L3206 chip; S83, judging whether the CRC8 checksum this time is equal to the last calculation result, if not equal, it means that the data written into the buffer image is destroyed, and all the data in the written buffer image is discarded, if the result is equal, entering S84; S84, determine whether the number of bytes to be written exceeds the number of free bytes of the write buffer image, if so, save the bytes to be written this time into the write buffer image, and leave the remaining bytes to be written for the next time, then call the DMA write function to write the contents of the write buffer image into the MX25L3206 chip; then return to S81, if not, enter S85; S85, save the byte content to be written this time to the currently idle address of the write buffer image, and enter S86; S86, recalculate the CRC8 checksum of the write buffer image, save it, and then return to S81.

3. A transformer secondary multi-point grounding test system according to claim 2, characterized in that: The data storage process of the high-reliability test process in the battery backup area is as follows: S91, determine whether the test has started, if not, continue to wait, if started, enter S92; S92, the test process save flag is saved to the BKP DR1 address of the battery backup area, and then enters S93; S93, the test start time is saved to the BKP DP2 address of the battery backup area, and then enters S94; S94, determine whether the test process data is updated, if not, transfer to S99, if updated, enter S95; S95, saving the maximum output voltage to the BKP DR3 address of the battery backup area, and then entering S96; S96, saving the maximum output current to the BKP DR4 address of the battery backup area, and then entering S97; S97, saving the current output voltage to the BKP DR5 address of the battery backup area, and then entering S98; S98, saving the current output current to the BKP DR6 address of the battery backup area, and then entering S99; S99, determine whether the test is finished. If the test is not finished, return to S91. If the test is finished, proceed to the next step.

4. A transformer secondary multi-point grounding test system according to claim 3, characterized in that: The DMA data storage configuration process is: S101, reset Channel 5 of DMA1 of the STM32U585VI chip; S102, setting the peripheral base address of Channel5 of the DMA1 to SPI->DR; S103, setting the Channel5 memory base address of the DMA1 as the first address of the write buffer image; S104, setting the data transmission direction of Channel 5 of the DMA1 to memory to peripherals; S105, setting the number of data transmission bytes of Channel 5 of the DMA1 to 4096; S106, setting the peripheral address of Channel 5 of the DMA1 to not automatically increase during data transmission; S107, setting the Channel5 peripheral data unit of the DMA1 to 1 byte; S108, setting the memory data unit of Channel 5 of the DMA1 to 1 byte; S109, setting Channel 5 of the DMA1 to the standard transmission mode; S1010, setting the transmission mode of Channel 5 of the DMA1 to high priority; S1011, setting Channel 5 of the DMA1 to non-memory to memory data transmission.

Images