Abnormal Channel Detection System and Method for Wafer Tester

Abstract

The present invention provides an abnormal channel detection system and method for a wafer tester, which are implemented by introducing two types of probers, including a type-I prober and a type-II prober. The type-I prober is configured to connect the drive pins of each channel of the wafer tester and the I / O pins of the same channel in one-to-one correspondence when connected to the probe interface board. The type-II prober is configured to connect the I / O pins of each odd channel and the I / O pins of each even channel of the wafer tester in one-to-one correspondence when connected to the probe interface board. The present invention can quickly detect the abnormal channels of the wafer tester.

Description

Technical Field

[0001] The present invention relates to the technical field of wafer testing, and particularly to an abnormal channel detection system and method for a wafer tester. Background Art

[0002] With the continuous development and progress of the integrated circuit manufacturing process, the precision of the manufactured components is getting higher and higher, and the testing process becomes increasingly important.

[0003] In the wafer testing stage, an automatic tester is used to perform wafer probing (Chip Probing, CP) on the wafer. The test head mechanism of the tester is connected to a special test probe card through a wire, and the test probe card leads out probes, which can perform the testing process on the wafer to be tested. As the testing progresses, the test head mechanism will continuously and repeatedly generate physical vibrations, and these vibrations will cause faults such as wire breakage in the test head mechanism, thereby affecting the testing.

[0004] In order to find the location where the test head mechanism is defective, in the prior art, it is necessary to go through several stages of confirmation operations, which will consume a lot of time, manpower, and material resources. Summary of the Invention

[0005] To solve the above problems, the present invention provides an abnormal channel detection system and method for a wafer tester, which can quickly find abnormal channels.

[0006] In a first aspect, the present invention provides a probe card adapted to a probe interface board of a wafer tester, the probe interface board being used to lead out signals on the driving pins and I / O pins of each channel of the wafer tester, and the probe card being provided with connection ports corresponding to the driving pins and I / O pins of each channel of the wafer tester led out by the probe interface board, and the two connection ports corresponding to the driving pin and the I / O pin of the same channel are connected.

[0007] In a second aspect, the present invention provides a probe card adapted to a probe interface board of a wafer tester, the probe interface board being used to lead out signals on the I / O pins of each channel of the wafer tester, and the probe card being provided with connection ports corresponding to the I / O pins of each channel of the wafer tester led out by the probe interface board, and the connection ports corresponding to the I / O pins of each odd channel and the connection ports corresponding to the I / O pins of each even channel are connected in a one-to-one correspondence.

[0008] In a third aspect, the present invention provides an abnormal channel detection system for a wafer tester, the wafer tester including a test head and a probe interface board located on the test head, the probe interface board being used to lead out signals on the driving pins and I / O pins of each channel of the wafer tester, and the abnormal channel detection system including:

[0009] A driving unit, configured to generate a first driving signal with the same waveform on the driving pins of each channel of the wafer tester when the probe interface board is connected to a Type-I probe card, or generate a second driving signal with the same waveform on the I / O pins of each odd channel of the wafer tester when the probe interface board is connected to a Type-II probe card, or generate a third driving signal with the same waveform on the I / O pins of each even channel of the wafer tester when the probe interface board is connected to a Type-II probe card, and the first driving signal, the second driving signal, and the third driving signal are all output through the probe interface board;

[0010] A voltage comparison unit for each channel, configured to generate a V-T curve graph showing the change of the output voltage of each channel over time according to the first driving signal, the second driving signal, or the third driving signal input to each channel;

[0011] A judgment unit, configured to judge whether each channel is an abnormal channel according to the V-T curve graph of each channel;

[0012] Wherein, the Type-I probe card is adapted to the probe interface board, and the Type-I probe card is provided with connection ports corresponding to the driving pins and I / O pins of each channel of the wafer tester led out by the probe interface board, and the two connection ports corresponding to the driving pin and the I / O pin of the same channel are connected;

[0013] The Type-II probe card is adapted to the probe interface board, and the Type-II probe card is provided with connection ports corresponding to the I / O pins of each channel of the wafer tester led out by the probe interface board, and the connection ports corresponding to the I / O pins of each odd channel and the connection ports corresponding to the I / O pins of each even channel are connected in a one-to-one correspondence.

[0014] Optionally, the driving unit, the voltage comparison unit for each channel, and the judgment unit are all located on the test head.

[0015] In a fourth aspect, the present invention provides an abnormal channel detection method for a wafer tester. The wafer tester includes a test head and a probe interface board located on the test head. The probe interface board is used to lead out signals on the driving pins and I / O pins of each channel of the wafer tester, and is implemented using the above abnormal channel detection system. The method includes the following steps:

[0016] When the probe interface board is connected to the Type-I probe card, the driving unit generates a first driving signal with the same waveform on the driving pins of each channel. The first driving signal output on the driving pins of each channel is input to the Type-I probe card through the probe interface board, returns to the probe interface board through the Type-I probe card, and is input to the voltage comparison unit of the same channel through the probe interface board;

[0017] The voltage comparison unit of each channel respectively generates a first V-T curve graph showing the change of the output voltage of each channel over time according to the first driving signal input to each channel;

[0018] The judgment unit judges whether each channel is abnormal according to the first V-T curve graph of each channel;

[0019] When the probe interface board is kept connected to the type II probe card, the driving unit generates a second driving signal with the same waveform on the I / O pins of each odd channel, wherein the second driving signal output on the I / O pins of each odd channel is input to the type II probe card through the probe interface board, returns to the probe interface board through the type II probe card, and is input to the voltage comparison unit of the corresponding connected even channel through the probe interface board;

[0020] The voltage comparison unit of each even channel respectively generates a second V-T curve graph showing the change of the output voltage of each even channel over time according to the second driving signal input to each even channel;

[0021] The judgment unit judges whether each even channel is abnormal according to the second V-T curve graph of each even channel;

[0022] When the probe interface board is kept connected to the type II probe card, the driving unit generates a third driving signal with the same waveform on the I / O pins of each even channel, wherein the third driving signal output on the I / O pins of each even channel is input to the type II probe card through the probe interface board, returns to the probe interface board through the type II probe card, and is input to the voltage comparison unit of the corresponding connected odd channel through the probe interface board;

[0023] The voltage comparison unit of each odd channel respectively generates a third V-T curve graph showing the change of the output voltage of each odd channel over time according to the third driving signal input to each odd channel;

[0024] The judgment unit judges whether each odd channel is abnormal according to the third V-T curve graph of each odd channel.

[0025] By applying the abnormal channel detection system and method provided by the present invention, the abnormal channels of the wafer tester can be quickly detected, saving a large amount of manpower and material resources. Description of the Drawings

[0026] Figure 1 It is a system block diagram of an abnormal channel detection system provided by an embodiment of the present invention. Detailed Embodiment

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present disclosure. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention. In addition, in the following description, the descriptions of well-known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present disclosure.

[0028] To quickly detect abnormal channels of a wafer tester, this embodiment provides two different types of probers. In this application, the two probers can be referred to as Type-I prober and Type-II prober. The two probers are adapted to the probe interface board of the wafer tester. Here, the probe interface board is used to lead out the signals on the drive pins and I / O pins of each channel of the wafer tester.

[0029] Specifically, as an implementation manner, the Type-I prober is provided with connection ports corresponding to the drive pins and I / O pins of each channel of the wafer tester led out by the probe interface board, and the two connection ports corresponding to the drive pin and the I / O pin of the same channel are connected. When connected to the probe interface board, the drive pins of each channel of the wafer tester and the I / O pins (i.e., input / output pins) of the same channel are connected in one-to-one correspondence, and the fault location of the drive pin can be detected.

[0030] The Type-II prober is provided with connection ports corresponding to the I / O pins of each channel of the wafer tester led out by the probe interface board, and the connection ports corresponding to the I / O pins of each odd channel and the connection ports corresponding to the I / O pins of each even channel are connected in one-to-one correspondence. When connected to the probe interface board, the I / O pins of each odd channel and the I / O pins of each even channel of the wafer tester are connected in one-to-one correspondence. For example, the I / O pin of channel 1 is connected to the I / O pin of channel 2, the I / O pin of channel 3 is connected to the I / O pin of channel 4, and so on, and the fault location of the I / O pin can be detected.

[0031] Based on the above two types of probers, this embodiment provides an abnormal channel detection system for a wafer tester. The wafer tester includes a test head and a probe interface board located on the test head. The probe interface board is used to lead out the signals on the drive pins and I / O pins of each channel of the wafer tester, as Figure 1 shown, the abnormal channel detection system includes the following parts:

[0032] A driving unit, configured to generate a first driving signal with the same waveform on the driving pins of each channel of the wafer tester when the probe interface board is connected to a type-I probe card, or to generate a second driving signal with the same waveform on the I / O pins of each odd-numbered channel of the wafer tester when the probe interface board is connected to a type-II probe card, or to generate a third driving signal with the same waveform on the I / O pins of each even-numbered channel of the wafer tester when the probe interface board is connected to a type-II probe card, and the first driving signal, the second driving signal, and the third driving signal are all output through the probe interface board;

[0033] A voltage comparison unit for each channel, configured to generate a V-T curve graph showing the change of the output voltage of each channel over time respectively according to the first driving signal, the second driving signal, or the third driving signal input to each channel;

[0034] A judgment unit, configured to judge whether each channel is an abnormal channel according to the V-T curve graph of each channel.

[0035] As can be known from the foregoing, when the probe interface board is connected to a type-I probe card, the type-I probe card connects the driving pins of each channel of the wafer tester and the I / O pins of the same channel in one-to-one correspondence, so that the first driving signal on the driving pins of each channel returns to the voltage comparison unit of each channel. When the probe interface board is connected to a type-II probe card, the type-II probe card connects the I / O pins of each odd-numbered channel of the wafer tester and the I / O pins of each even-numbered channel in one-to-one correspondence, so that the second driving signal on the I / O pins of each odd-numbered channel returns to the voltage comparison unit of the corresponding connected even-numbered channel, and the third driving signal on the I / O pins of each even-numbered channel returns to the voltage comparison unit of the corresponding connected odd-numbered channel.

[0036] Among them, the driving unit, the voltage comparison unit for each channel, and the judgment unit, as permanent institutions of the wafer tester, can be located on the test head or on the tester main body.

[0037] Applying the abnormal channel detection system of the above wafer tester, this embodiment also provides an abnormal channel detection method, including the following steps:

[0038] Step 1: Connect a type-I probe card to the probe interface board, and the driving unit generates a first driving signal with the same waveform on the driving pins of each channel. The first driving signal output on the driving pins of each channel is input to the type-I probe card through the probe interface board, returns to the probe interface board through the type-I probe card, and is input to the voltage comparison unit of the same channel through the probe interface board;

[0039] Step 2: The voltage comparison unit for each channel generates a first V-T curve graph showing the change of the output voltage of each channel over time respectively according to the first driving signal input to each channel;

[0040] Step 3: The judgment unit determines whether each channel is abnormal according to the first V-T curve graph of each channel;

[0041] Step 4: Connect the type-II probe card to the probe interface board. The driving unit generates a second driving signal with the same waveform on the I / O pins of each odd channel. The second driving signal output by each odd channel is input to the type-II probe card through the probe interface board, returns to the probe interface board through the type-II probe card, and is input to the voltage comparison unit of the corresponding even channel through the probe interface board;

[0042] Step 5: The voltage comparison unit of each even channel respectively generates a second V-T curve graph of the output voltage of each even channel changing with time according to the second driving signal input to each even channel;

[0043] Step 6: The judgment unit determines whether each even channel is abnormal according to the second V-T curve graph of each even channel;

[0044] Step 7: The driving unit generates a third driving signal with the same waveform on the I / O pins of each even channel. The third driving signal output on the I / O pins of each even channel is input to the type-II probe card through the probe interface board, returns to the probe interface board through the type-II probe card, and is input to the voltage comparison unit of the corresponding odd channel through the probe interface board;

[0045] Step 8: The voltage comparison unit of each odd channel respectively generates a third V-T curve graph of the output voltage of each odd channel changing with time according to the third driving signal input to each odd channel;

[0046] Step 9: The judgment unit determines whether each odd channel is abnormal according to the third V-T curve graph of each odd channel.

[0047] By applying the abnormal channel detection system and method provided in this embodiment, the abnormal channels of the wafer tester can be quickly detected, saving a large amount of manpower and material resources.

[0048] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. An abnormal channel detection system for a wafer tester, the wafer tester comprising a test head and a probe interface board located on the test head, the probe interface board being used for leading out signals on the drive pins and I / O pins of each channel of the wafer tester, characterized in that, The abnormal channel detection system includes: A driving unit configured to generate a first driving signal with the same waveform on the driving pins of each channel of the wafer tester when the probe interface board is connected to a type-I probe card, or to generate a second driving signal with the same waveform on the I / O pins of each odd channel of the wafer tester when the probe interface board is connected to a type-II probe card, or to generate a third driving signal with the same waveform on the I / O pins of each even channel of the wafer tester when the probe interface board is connected to a type-II probe card. The first driving signal, the second driving signal, and the third driving signal are all output through the probe interface board; A voltage comparison unit for each channel, configured to generate a V-T curve graph showing the change of the output voltage of each channel over time according to the first driving signal, the second driving signal, or the third driving signal input to each channel; A judgment unit configured to judge whether each channel is an abnormal channel according to the V-T curve graph of each channel; Among them, the type-I probe card is adapted to the probe interface board. The type-I probe card is provided with connection ports corresponding to the driving pins and I / O pins of each channel of the wafer tester led out by the probe interface board. The two connection ports corresponding to the driving pin and the I / O pin of the same channel are connected; The type-II probe card is adapted to the probe interface board. The type-II probe card is provided with connection ports corresponding to the I / O pins of each channel of the wafer tester led out by the probe interface board. The connection ports corresponding to the I / O pins of each odd channel and the connection ports corresponding to the I / O pins of each even channel are connected in one-to-one correspondence; 2. The abnormal channel detection system according to claim 1, characterized in that, The driving unit, the voltage comparison unit for each channel, and the judgment unit are all located on the test head; 3. An abnormal channel detection method for a wafer tester, the wafer tester comprising a test head and a probe interface board located on the test head, the probe interface board being used for leading out signals on the drive pins and I / O pins of each channel of the wafer tester, characterized in that, Implemented using the abnormal channel detection system according to claim 1, the method includes the following steps: When the probe interface board is connected to the type-I probe card, the driving unit generates a first driving signal with the same waveform on the driving pins of each channel. The first driving signal output on the driving pins of each channel is input to the type-I probe card through the probe interface board, returns to the probe interface board through the type-I probe card, and is input to the voltage comparison unit of the same channel through the probe interface board; The voltage comparison unit for each channel generates a first V-T curve graph showing the change of the output voltage of each channel over time according to the first driving signal input to each channel; The judgment unit judges whether each channel is abnormal according to the first V-T curve graph of each channel; When the probe interface board is connected to the type-II probe card, the driving unit generates a second driving signal with the same waveform on the I / O pins of each odd channel. The second driving signal output on the I / O pins of each odd channel is input to the type-II probe card through the probe interface board, returns to the probe interface board through the type-II probe card, and is input to the voltage comparison unit of the corresponding connected even channel through the probe interface board; The voltage comparison units of each even channel respectively generate second V-T curves showing the change of the output voltage of each even channel over time according to the second driving signals input to each even channel; The judgment unit judges whether each even channel is abnormal according to the second V-T curves of each even channel; When the probe interface board is kept connected to the Type II probe card, the driving unit generates third driving signals with the same waveform on the I / O pins of each even channel, wherein the third driving signals output on the I / O pins of each even channel are input to the Type II probe card through the probe interface board, returned to the probe interface board through the Type II probe card, and input to the voltage comparison units of the odd channels connected correspondingly through the probe interface board; The voltage comparison units of each odd channel respectively generate third V-T curves showing the change of the output voltage of each odd channel over time according to the third driving signals input to each odd channel; The judgment unit judges whether each odd channel is abnormal according to the third V-T curves of each odd channel.

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