Bidirectional Electrostatic Discharge Protection Device

Abstract

The present invention discloses a bidirectional electrostatic discharge protection device, which includes at least one bipolar junction transistor and at least one silicon controlled rectifier. The silicon controlled rectifier is serially coupled to the bipolar junction transistor. When an electrostatic discharge voltage is applied to the bipolar junction transistor and the silicon controlled rectifier, the absolute value of the breakdown voltage of the bipolar junction transistor is less than the absolute value of the breakdown voltage of the silicon controlled rectifier, and the absolute value of the holding voltage of the bipolar junction transistor is greater than the absolute value of the holding voltage of the silicon controlled rectifier.

Description

Technical Field

[0001] The present invention relates to an electrostatic discharge technology, and particularly to a bidirectional electrostatic discharge protection device. Background Art

[0002] Electrostatic discharge (ESD) damage has become a major reliability issue for CMOS integrated circuit products manufactured in nanoscale complementary metal-oxide-semiconductor (CMOS) processes. ESD protection components are typically designed to release ESD energy, thereby preventing ESD damage to integrated circuit chips.

[0003] The working principle of an electrostatic discharge protection device is as Figure 1 shown. On an integrated circuit chip, an electrostatic discharge (ESD) protection device 1 is connected in parallel with a circuit 2 to be protected. When an ESD event occurs, the ESD protection device 1 is instantaneously triggered. At the same time, the ESD protection device 1 can also provide a low-resistance path for the instantaneous ESD current to discharge, so that the energy of the ESD instantaneous current can be released through the ESD protection device 1. To achieve the purpose of bidirectional electrostatic discharge, bidirectional transient voltage suppressors have been implemented in U.S. Patent Nos. 10573635B2 and 10468513B1. U.S. Patent No. 10573635B2 discloses two bipolar junction transistors connected in series, and U.S. Patent No. 10468513B1 discloses a silicon-controlled rectifier. In practice, the holding voltage and breakdown voltage of both the bipolar junction transistor and the silicon-controlled rectifier must be higher than the operating voltage of the device to be protected to avoid latch-up events. However, when designing a bipolar junction transistor with the required breakdown voltage, the holding voltage of the bipolar junction transistor will be too high. Therefore, during an electrostatic discharge event, the bipolar junction transistor has a high on-resistance. When designing a silicon-controlled rectifier with the required holding voltage, the breakdown voltage of the silicon-controlled rectifier is also too high.

[0004] Therefore, in view of the above problems, the present invention proposes a bidirectional electrostatic discharge protection device to solve the problems caused by the prior art. Summary of the Invention

[0005] The present invention provides a bidirectional electrostatic discharge protection device, which has a lower clamping voltage and a lower holding voltage that are still higher than the operating voltage of the device to be protected when designing the required breakdown voltage without sacrificing the electrostatic discharge tolerance and without suffering from latch-up events.

[0006] In an embodiment of the present invention, a bidirectional electrostatic discharge protection device is provided, which includes at least one bipolar junction transistor and at least one silicon controlled rectifier. The silicon controlled rectifier is serially coupled to the bipolar junction transistor. When an electrostatic discharge voltage is applied to the bipolar junction transistor and the silicon controlled rectifier, the absolute value of the breakdown voltage of the bipolar junction transistor is less than the absolute value of the breakdown voltage of the silicon controlled rectifier, and the absolute value of the holding voltage of the bipolar junction transistor is greater than the absolute value of the holding voltage of the silicon controlled rectifier.

[0007] In an embodiment of the present invention, when a positive electrostatic discharge voltage is applied to the bipolar junction transistor and the silicon controlled rectifier, the bipolar junction transistor and the silicon controlled rectifier have a first representative current-voltage curve. When a negative electrostatic discharge voltage is applied to the bipolar junction transistor and the silicon controlled rectifier, the bipolar junction transistor and the silicon controlled rectifier have a second representative current-voltage curve. The first representative current-voltage curve and the second representative current-voltage curve are symmetric or asymmetric with respect to the zero voltage as the center.

[0008] In an embodiment of the present invention, the first representative current-voltage curve has a first breakdown voltage, a first holding voltage and a first clamping voltage, and the second representative current-voltage curve has a second breakdown voltage, a second holding voltage and a second clamping voltage. The absolute values of the first breakdown voltage, the first holding voltage and the first clamping voltage are respectively equal to the absolute values of the second breakdown voltage, the second holding voltage and the second clamping voltage.

[0009] In an embodiment of the present invention, the bidirectional electrostatic discharge protection device further includes a semiconductor substrate and an isolation structure. The semiconductor substrate has a first conductivity type, and an epitaxial layer is provided on the semiconductor substrate. The epitaxial layer has a second conductivity type opposite to the first conductivity type. The bipolar junction transistor, a first doped well region and at least one second doped well region are disposed in the epitaxial layer. The first doped well region and the second doped well region have the first conductivity type. A first heavily doped region and a second heavily doped region are disposed in the first doped well region. The first heavily doped region and the second heavily doped region have the second conductivity type and the first conductivity type respectively. At least one third heavily doped region and at least one fourth heavily doped region are disposed in the second doped well region. The third heavily doped region and the fourth heavily doped region have the first conductivity type and the second conductivity type respectively. The epitaxial layer, the first doped well region, the second doped well region, the first heavily doped region, the second heavily doped region, the third heavily doped region and the fourth heavily doped region form the silicon controlled rectifier. The bipolar junction transistor is coupled to the first heavily doped region and the second heavily doped region via an external wire. The isolation structure is disposed in the epitaxial layer and is located between the silicon controlled rectifier and the bipolar junction transistor. The isolation structure contacts the semiconductor substrate and isolates the silicon controlled rectifier and the bipolar junction transistor. The bottom position of the isolation structure is equal to or deeper than the bottom position of the epitaxial layer.

[0010] In an embodiment of the present invention, an isolation structure is disposed in a semiconductor substrate.

[0011] In an embodiment of the present invention, the isolation structure surrounds a silicon-controlled rectifier and a bipolar junction transistor.

[0012] In an embodiment of the present invention, the bidirectional electrostatic discharge protection device further includes a heavily doped buried layer, which is disposed between the semiconductor substrate and the epitaxial layer and under the bipolar junction transistor and the silicon-controlled rectifier. The heavily doped buried layer has a second conductivity type, and the isolation structure penetrates the heavily doped buried layer.

[0013] In an embodiment of the present invention, the first conductivity type is N-type, and the second conductivity type is P-type.

[0014] In an embodiment of the present invention, the first conductivity type is P-type, and the second conductivity type is N-type.

[0015] In an embodiment of the present invention, the bipolar junction transistor includes at least one third doped well region, at least one fifth heavily doped region, and at least one sixth heavily doped region. The third doped well region is disposed in the epitaxial layer, and the fifth and sixth heavily doped regions are disposed in the third doped well region. The conductivity types of the fifth and sixth heavily doped regions are opposite to that of the third doped well region, and the sixth heavily doped region is coupled to an external wire.

[0016] In an embodiment of the present invention, the fifth heavily doped region is coupled to a first pin, and the third and fourth doped regions are coupled to a second pin.

[0017] In an embodiment of the present invention, when a positive electrostatic discharge voltage is applied between the first pin and the second pin, the electrostatic discharge current sequentially passes through the fifth heavily doped region, the third doped well region, the sixth heavily doped region, the external wire, the first heavily doped region, the first doped well region, the epitaxial layer, the second doped well region, and the third doped region.

[0018] In an embodiment of the present invention, when a negative electrostatic discharge voltage is applied between the first pin and the second pin, the electrostatic discharge current sequentially passes through the fourth heavily doped region, the second doped well region, the epitaxial layer, the first doped well region, the second heavily doped region, the external wire, the sixth heavily doped region, the third doped well region, and the fifth heavily doped region.

[0019] In an embodiment of the present invention, at least one bipolar junction transistor includes a plurality of bipolar junction transistors.

[0020] In an embodiment of the present invention, at least one silicon-controlled rectifier includes a plurality of silicon-controlled rectifiers.

[0021] Based on the above, the bidirectional electrostatic discharge protection device is serially coupled to a bipolar junction transistor and a silicon controlled rectifier. Therefore, when designing the required breakdown voltage without sacrificing the electrostatic discharge tolerance and without suffering from latch-up events, the bidirectional electrostatic discharge protection device has a lower clamping voltage and a lower holding voltage that are still higher than the operating voltage of the device to be protected. Description of the Drawings

[0022] Figure 1 FIG. is a schematic diagram of an electrostatic discharge protection device on an integrated circuit chip of the prior art connected to a circuit to be protected.

[0023] Figure 2 FIG. is a schematic diagram of a first embodiment of the bidirectional electrostatic discharge protection device of the present invention.

[0024] Figure 3 FIG. is a current-voltage curve graph of the bidirectional electrostatic discharge protection device according to an embodiment of the present invention.

[0025] Figure 4 FIG. is a structural cross-sectional view of a second embodiment of the bidirectional electrostatic discharge protection device of the present invention.

[0026] Figure 5 FIG. is a structural cross-sectional view of a third embodiment of the bidirectional electrostatic discharge protection device of the present invention.

[0027] Figure 6 FIG. is a structural cross-sectional view of a fourth embodiment of the bidirectional electrostatic discharge protection device of the present invention.

[0028] Figure 7 FIG. is a structural cross-sectional view of a fifth embodiment of the bidirectional electrostatic discharge protection device of the present invention.

[0029] Figure 8 FIG. is a structural cross-sectional view of a sixth embodiment of the bidirectional electrostatic discharge protection device of the present invention.

[0030] Figure 9 FIG. is a structural cross-sectional view of a seventh embodiment of the bidirectional electrostatic discharge protection device of the present invention.

[0031] Figure 10 FIG. is a structural cross-sectional view of an eighth embodiment of the bidirectional electrostatic discharge protection device of the present invention.

[0032] Figure 11 FIG. is a structural cross-sectional view of a ninth embodiment of the bidirectional electrostatic discharge protection device of the present invention.

[0033] Explanation of the accompanying drawings: 1-electrostatic discharge protection device; 2-circuit to be protected; 3-bidirectional electrostatic discharge protection device; 30-bipolar junction transistor; 300-third doped well region; 301-fifth heavily doped region; 302-sixth heavily doped region; 31-silicon controlled rectifier; 310-first doped well region; 311-second doped well region; 312-first heavily doped region; 313-second heavily doped region; 314-third heavily doped region; 315-fourth heavily doped region; 32-first pin; 33-second pin; 34-semiconductor substrate; 35-isolation structure; 36-epitaxial layer; 37-external wire; 38-heavily doped buried layer; VE-electrostatic discharge voltage; Vb-first breakdown voltage; Vh-first holding voltage; Vc-first clamping voltage; Vb'-second breakdown voltage; Vh'-second holding voltage; Vc'-second clamping voltage. DETAILED DESCRIPTION

[0034] The embodiments of the present invention will be further explained below with the help of the relevant drawings. As much as possible, the same reference numerals represent the same or similar components in the drawings and the specification. In the drawings, the shapes and thicknesses may be exaggerated for simplicity and convenience. It is understood that the components not specifically shown in the drawings or described in the specification are in the form known to those skilled in the art. Those skilled in the art may make various changes and modifications based on the contents of the present invention.

[0035] Unless otherwise specified, some conditional sentences or words, such as "can", "could", "might", or "may", are generally intended to express that the present embodiment has, but can also be interpreted as features, elements or steps that may not be required. In other embodiments, these features, elements or steps may not be required.

[0036] The description of "one embodiment" or "an embodiment" in the following text refers to a specific element, structure or feature associated with at least one embodiment. Therefore, multiple descriptions of "one embodiment" or "an embodiment" appearing in multiple places in the following text do not refer to the same embodiment. Furthermore, specific components, structures and features in one or more embodiments can be combined in an appropriate manner.

[0037] In the specification and claims, certain terms are used to refer to specific components. However, those of ordinary skill in the art should understand that the same component may be referred to by different names. The specification and claims do not distinguish components by the difference in names, but by the difference in their functions. The term "comprising" mentioned in the specification and claims is an open-ended term and should be interpreted as "comprising but not limited to". In addition, "coupled" herein includes any direct and indirect connection means. Therefore, if it is described in the text that the first component is coupled to the second component, it means that the first component can be directly connected to the second component through electrical connection, wireless transmission, optical transmission or other signal connection means, or can be indirectly electrically or signal-connected to the second component through other components or connection means.

[0038] The present invention is particularly described by the following examples, which are only for illustrative purposes. Because for those skilled in the art, various modifications and refinements can be made without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be determined by what is defined in the claims. Throughout the specification and claims, unless the context clearly dictates otherwise, the meanings of "a" and "the" include such descriptions including "one or at least one" of the described components or elements. In addition, as used in the present invention, unless it is clearly apparent from a particular context to exclude the plural, the singular article also includes the description of plural components or elements. Moreover, when applied in the description herein and in all the following claims, unless the context clearly dictates otherwise, the meaning of "therein" can include "therein" and "thereon". The terms used throughout the specification and claims, unless otherwise noted, generally have the ordinary meanings of each term used in this field, in the context of this invention, and in the particular context. Certain terms used to describe the present invention will be discussed below or elsewhere in this specification to provide additional guidance to practitioners regarding the description of the present invention. The use of examples anywhere in the specification, including the use of examples of any of the terms discussed herein, is only for illustrative purposes and of course does not limit the scope and meaning of the present invention or any of the illustrative terms. Similarly, the present invention is not limited to the various embodiments presented in this specification.

[0039] In the following description, a bidirectional electrostatic discharge protection device will be provided, which is serially coupled to a bipolar junction transistor and a silicon controlled rectifier. Therefore, when designing the required breakdown voltage without sacrificing the electrostatic discharge tolerance and without suffering from latch-up events, the bidirectional electrostatic discharge protection device has a lower clamping voltage and a lower holding voltage that are still higher than the operating voltage of the device to be protected.

[0040] Figure 2Schematic diagram of the first embodiment of the bidirectional electrostatic discharge protection device of the present invention, Figure 3 Current-voltage curve of the bidirectional electrostatic discharge protection device of an embodiment of the present invention. Please refer to Figure 2 and Figure 3 , the bidirectional electrostatic discharge protection device 3 includes at least one bipolar junction transistor 30 and at least one silicon-controlled rectifier 31. For clarity and convenience, the first embodiment takes one bipolar junction transistor 30 and one silicon-controlled rectifier 31 as examples. In another embodiment, one or more bipolar junction transistors and one or more silicon-controlled rectifiers are used to be applicable to high-voltage applications. The silicon-controlled rectifier 31 is serially coupled to the bipolar junction transistor 30, and the bipolar junction transistor 30 can be an NPN bipolar junction transistor or a PNP bipolar junction transistor. The base of the bipolar junction transistor 30 is floating. The bipolar junction transistor 30 and the silicon-controlled rectifier 31 are respectively coupled to a first pin 32 and a second pin 33. When an electrostatic discharge voltage is applied to the bipolar junction transistor 30 and the silicon-controlled rectifier 31, the absolute value of the breakdown voltage of the bipolar junction transistor 30 is less than the absolute value of the breakdown voltage of the silicon-controlled rectifier 31, and the absolute value of the holding voltage of the bipolar junction transistor 30 is greater than the absolute value of the holding voltage of the silicon-controlled rectifier 31. When a positive electrostatic discharge voltage VE is applied to the bipolar junction transistor 30 and the silicon-controlled rectifier 31, the bipolar junction transistor 30 and the silicon-controlled rectifier 31 have a first representative current-voltage curve. When a negative electrostatic discharge voltage VE is applied to the bipolar junction transistor 30 and the silicon-controlled rectifier 31, the bipolar junction transistor 30 and the silicon-controlled rectifier 31 have a second representative current-voltage curve. The electrostatic discharge current of the current-voltage curve is represented by IE, and the first representative current-voltage curve and the second representative current-voltage curve are symmetric with each other centered on zero voltage, as shown by the thick solid line. Alternatively, the first representative current-voltage curve and the second representative current-voltage curve are asymmetric with each other centered on zero voltage.

[0041] When an electrostatic discharge voltage VE is applied to the bipolar junction transistor 30, the bipolar junction transistor 30 has a representative current-voltage curve, as shown by the dashed line. When the electrostatic discharge voltage VE is applied to the silicon controlled rectifier 31, the silicon controlled rectifier 31 has a representative current-voltage curve, as shown by the thin solid line. The bipolar junction transistor 30 has a lower breakdown voltage, a higher holding voltage, and a higher clamping voltage. The silicon controlled rectifier 31 has a lower breakdown voltage, a lower holding voltage, and a lower clamping voltage. By combining the characteristics of the bipolar junction transistor 30 and the silicon controlled rectifier 31, when designing the required breakdown voltage without sacrificing the electrostatic discharge tolerance and without suffering from latch-up events, the bidirectional electrostatic discharge protection device 2 has a lower clamping voltage and a lower holding voltage that are still higher than the operating voltage of the device to be protected. Specifically, the first representative current-voltage curve has a first breakdown voltage Vb, a first holding voltage Vh, and a first clamping voltage Vc, and the second representative current-voltage curve has a second breakdown voltage Vb’, a second holding voltage Vh’, and a second clamping voltage Vc’. The absolute values of the first breakdown voltage Vb, the first holding voltage Vh, and the first clamping voltage Vc are respectively equal to the absolute values of the second breakdown voltage Vb’, the second holding voltage Vh’, and the second clamping voltage Vc’. The bipolar junction transistor 30 is a bidirectional bipolar junction transistor, which means that when a positive or negative electrostatic discharge voltage is applied to the bidirectional bipolar junction transistor, the bipolar junction transistor 30 will have a breakdown voltage, a holding voltage, and a clamping voltage. Similarly, the silicon controlled rectifier 31 is a bidirectional silicon controlled rectifier, which means that when a positive or negative electrostatic discharge voltage is applied to the bidirectional silicon controlled rectifier, the silicon controlled rectifier 31 will have a breakdown voltage, a holding voltage, and a clamping voltage.

[0042] When a positive electrostatic discharge voltage is applied to the bipolar junction transistor 30 and the silicon controlled rectifier 31, the first breakdown voltage Vb is equal to the sum of the breakdown voltages of the bipolar junction transistor 30 and the silicon controlled rectifier 31. When a negative electrostatic discharge voltage is applied to the bipolar junction transistor 30 and the silicon controlled rectifier 31, the second breakdown voltage Vb' is equal to the sum of the breakdown voltages of the bipolar junction transistor 30 and the silicon controlled rectifier 31. When a positive electrostatic discharge voltage is applied to the bipolar junction transistor 30 and the silicon controlled rectifier 31, the first holding voltage Vh is equal to the sum of the holding voltages of the bipolar junction transistor 30 and the silicon controlled rectifier 31. When a negative electrostatic discharge voltage is applied to the bipolar junction transistor 30 and the silicon controlled rectifier 31, the second holding voltage Vh' is equal to the sum of the holding voltages of the bipolar junction transistor 30 and the silicon controlled rectifier 31. When a positive electrostatic discharge voltage is applied to the bipolar junction transistor 30 and the silicon controlled rectifier 31, the first clamping voltage Vc is equal to the sum of the clamping voltages of the bipolar junction transistor 30 and the silicon controlled rectifier 31. When a negative electrostatic discharge voltage is applied to the bipolar junction transistor 30 and the silicon controlled rectifier 31, the second clamping voltage Vc' is equal to the sum of the clamping voltages of the bipolar junction transistor 30 and the silicon controlled rectifier 31. Therefore, the series-coupled bipolar junction transistor 30 and silicon controlled rectifier 31 can design the required breakdown voltage without sacrificing electrostatic discharge tolerance and suffering from latch-up events, while achieving a lower clamping voltage and a lower holding voltage that are still higher than the operating voltage of the device to be protected.

[0043] Figure 4 A structural cross-sectional view of the second embodiment of the bidirectional electrostatic discharge protection device of the present invention. Please refer to Figure 4, the bidirectional electrostatic discharge protection device 3 further includes a semiconductor substrate 34 and an isolation structure 35. The semiconductor substrate 34 has a first conductivity type, and an epitaxial layer 36 is provided on the semiconductor substrate 34. The epitaxial layer 36 has a second conductivity type opposite to the first conductivity type. In the second embodiment, the first conductivity type is N-type and the second conductivity type is P-type. The bipolar junction transistor 30, a first doped well region 310, and at least one second doped well region 311 are disposed in the epitaxial layer 36. The first doped well region 310 and the second doped well region 311 have the first conductivity type. A first heavily doped region 312 and a second heavily doped region 313 are disposed in the first doped well region 310. The first heavily doped region 312 and the second heavily doped region 313 have the second conductivity type and the first conductivity type respectively. At least one third heavily doped region 314 and at least one fourth heavily doped region 315 are disposed in the second doped well region 311. For clarity and convenience, the second embodiment takes one second doped well region 311, one third heavily doped region 314, and one fourth heavily doped region 315 as examples. The third heavily doped region 314 and the fourth heavily doped region 315 have the first conductivity type and the second conductivity type respectively. The epitaxial layer 36, the first doped well region 310, the second doped well region 311, the first heavily doped region 312, the second heavily doped region 313, the third heavily doped region 314, and the fourth heavily doped region 315 form a silicon controlled rectifier 31. The bipolar junction transistor 30 is coupled to the first heavily doped region 312 and the second heavily doped region 313 via an external wire 37.

[0044] The isolation structure 35 includes an insulating material. The isolation structure 35 is disposed in the epitaxial layer 36 and is located between the silicon controlled rectifier 31 and the bipolar junction transistor 30. The isolation structure 35 contacts the semiconductor substrate 34 and isolates the silicon controlled rectifier 31 from the bipolar junction transistor 30. That is to say, there is no structure between the isolation structure 35 and the semiconductor substrate 34. For example, the isolation structure 35 can be located in the semiconductor substrate 34. In other words, the bottom position of the isolation structure 35 is equal to or deeper than the bottom position of the epitaxial layer 36. In addition, the isolation structure 35 can surround the silicon controlled rectifier 31 and the bipolar junction transistor 30. The bipolar junction transistor 30 may include at least one third doped well region 300, at least one fifth heavily doped region 301, and at least one sixth heavily doped region 302. For clarity and convenience, the second embodiment takes one third doped well region 300, one fifth heavily doped region 301, and one sixth heavily doped region 302 as examples. The fifth heavily doped region 301 is coupled to the first pin 32, and the third heavily doped region 314 and the fourth heavily doped region 315 are coupled to the second pin 33. In the second embodiment, the third doped well region 300, the fifth heavily doped region 301, and the sixth heavily doped region 302 are a P-type doped well region, an N-type heavily doped region, and an N-type heavily doped region respectively.

[0045] The following describes the operation of the bidirectional electrostatic discharge protection device 3 of the second embodiment. When a positive electrostatic discharge voltage is applied between the first pin 32 and the second pin 33, the electrostatic discharge current sequentially flows through the fifth heavily doped region 301, the third doped well region 300, the sixth heavily doped region 302, the external wire 37, the first heavily doped region 312, the first doped well region 310, the epitaxial layer 36, the second doped well region 311, and the third heavily doped region 314. The path through the external wire 37 is called the first current path. The interfaces between the fifth heavily doped region 301 and the third doped well region 300 and between the first doped well region 310 and the epitaxial layer 36 serve as breakdown interfaces. Since the energy band gap of the interface between the fifth heavily doped region 301 and the third doped well region 300 is smaller than that of the interface between the first doped well region 310 and the epitaxial layer 36, the breakdown voltage of the interface between the fifth heavily doped region 301 and the third doped well region 300 is lower than that of the interface between the first doped well region 310 and the epitaxial layer 36. When a positive electrostatic discharge voltage is applied between the first pin 32 and the second pin 33, the electrostatic discharge current also sequentially flows through the fifth heavily doped region 301, the third doped well region 300, the epitaxial layer 36, the semiconductor substrate 34, the epitaxial layer 36, the second doped well region 311, and the third heavily doped region 314. The path through the semiconductor substrate 34 is called the second current path. However, since the second current path is longer than the first current path, the second current path will be suppressed, that is, less electrostatic discharge current will flow through the second current path.

[0046] When a negative electrostatic discharge voltage is applied between the first pin 32 and the second pin 33, the electrostatic discharge current sequentially passes through the fourth heavily doped region 315, the second doped well region 311, the epitaxial layer 36, the first doped well region 310, the second heavily doped region 313, the external wire 37, the sixth heavily doped region 302, the third doped well region 300, and the fifth heavily doped region 301. The path through the external wire 37 is called the first current path. The interfaces between the sixth heavily doped region 302 and the third doped well region 300 and between the second doped well region 311 and the epitaxial layer 36 serve as breakdown interfaces. Since the band gap of the interface between the sixth heavily doped region 302 and the third doped well region 300 is smaller than that of the interface between the second doped well region 311 and the epitaxial layer 36, the breakdown voltage of the interface between the sixth heavily doped region 302 and the third doped well region 300 is lower than that of the interface between the second doped well region 311 and the epitaxial layer 36. When a negative electrostatic discharge voltage is applied between the first pin 32 and the second pin 33, the electrostatic discharge current also sequentially passes through the fourth heavily doped region 315, the second doped well region 311, the epitaxial layer 36, the semiconductor substrate 34, the epitaxial layer 36, the third doped well region 300, and the fifth heavily doped region 301. The path through the semiconductor substrate 34 is called the second current path. However, since the second current path is longer than the first current path, the second current path is suppressed, that is, less electrostatic discharge current passes through the second current path.

[0047] Figure 5 It is a structural cross-sectional view of the third embodiment of the bidirectional electrostatic discharge protection device of the present invention. Please refer to Figure 5 , the difference between the third embodiment and the second embodiment is that the third embodiment further includes a heavily doped buried layer 38, which is disposed between the semiconductor substrate 34 and the epitaxial layer 36 and under the bipolar junction transistor 30 and the silicon controlled rectifier 31. The heavily doped buried layer 38 has a second conductivity type, and the isolation structure 35 penetrates through the heavily doped buried layer 38. The doping concentration of the heavily doped buried layer 38 is greater than that of the epitaxial layer 36.

[0048] When a positive electrostatic discharge voltage is applied between the first pin 32 and the second pin 33, the electrostatic discharge current sequentially flows through the fifth heavily doped region 301, the third doped well region 300, the epitaxial layer 36, the heavily doped buried layer 38, the semiconductor substrate 34, the heavily doped buried layer 38, the epitaxial layer 36, the second doped well region 311, and the third heavily doped region 314. Since the doping concentration of the heavily doped buried layer 38 is greater than that of the epitaxial layer 36, this current path will be significantly suppressed. In other words, the heavily doped buried layer 38 will significantly suppress the current gain of this current path. Similarly, when a negative electrostatic discharge voltage is applied between the first pin 32 and the second pin 33, the electrostatic discharge current sequentially flows through the fourth heavily doped region 315, the second doped well region 311, the epitaxial layer 36, the heavily doped buried layer 38, the semiconductor substrate 34, the heavily doped buried layer 38, the epitaxial layer 36, the third doped well region 300, and the fifth heavily doped region 301, where this current path is also significantly suppressed.

[0049] Figure 6 This is a structural cross-sectional view of the fourth embodiment of the bidirectional electrostatic discharge protection device of the present invention. Please refer to Figure 6 , the difference between the fourth embodiment and the second embodiment lies in the bipolar junction transistor 30. In the fourth embodiment, the third doped well region 300, the fifth heavily doped region 301, and the sixth heavily doped region 302 can be an N-type doped well region, a P-type heavily doped region, and a P-type heavily doped region respectively. The remaining structures have been introduced in the second embodiment and will not be elaborated here. The interfaces between the third doped well region 300 and the sixth heavily doped region 302 and between the first doped well region 310 and the epitaxial layer 36 serve as breakdown interfaces. Since the energy band gap of the interface between the third doped well region 300 and the sixth heavily doped region 302 is smaller than that of the interface between the first doped well region 310 and the epitaxial layer 36, the breakdown voltage of the interface between the third doped well region 300 and the sixth heavily doped region 302 is smaller than that of the interface between the first doped well region 310 and the epitaxial layer 36.

[0050] Figure 7 This is a structural cross-sectional view of the fifth embodiment of the bidirectional electrostatic discharge protection device of the present invention. Please refer to Figure 7 , the difference between the fifth embodiment and the third embodiment lies in the bipolar junction transistor 30. In the fifth embodiment, the third doped well region 300, the fifth heavily doped region 301, and the sixth heavily doped region 302 can be an N-type doped well region, a P-type heavily doped region, and a P-type heavily doped region respectively. The remaining structures have been introduced in the third embodiment and will not be elaborated here.

[0051] Figure 8A structural cross-sectional view of the sixth embodiment of the bidirectional electrostatic discharge protection device of the present invention. The only difference between the sixth embodiment and the second embodiment lies in the conductivity types of the semiconductor substrate 34, the epitaxial layer 36, the first doped well region 310, and the second doped well region 311. The first conductivity type and the second conductivity type of the sixth embodiment are P-type and N-type respectively. The remaining structures have been introduced in the second embodiment and will not be repeated here.

[0052] Figure 9 A structural cross-sectional view of the seventh embodiment of the bidirectional electrostatic discharge protection device of the present invention. The only difference between the seventh embodiment and the third embodiment lies in the conductivity types of the semiconductor substrate 34, the epitaxial layer 36, the first doped well region 310, the heavily doped buried layer 38, and the second doped well region 311. The first conductivity type and the second conductivity type of the seventh embodiment are P-type and N-type respectively. The remaining structures have been introduced in the third embodiment and will not be repeated here.

[0053] Figure 10 A structural cross-sectional view of the eighth embodiment of the bidirectional electrostatic discharge protection device of the present invention. The only difference between the eighth embodiment and the fourth embodiment lies in the conductivity types of the semiconductor substrate 34, the epitaxial layer 36, the first doped well region 310, and the second doped well region 311. The first conductivity type and the second conductivity type of the eighth embodiment are P-type and N-type respectively. The remaining structures have been introduced in the fourth embodiment and will not be repeated here.

[0054] Figure 11 A structural cross-sectional view of the ninth embodiment of the bidirectional electrostatic discharge protection device of the present invention. The only difference between the ninth embodiment and the fifth embodiment lies in the conductivity types of the semiconductor substrate 34, the epitaxial layer 36, the first doped well region 310, the heavily doped buried layer 38, and the second doped well region 311. The first conductivity type and the second conductivity type of the ninth embodiment are P-type and N-type respectively. The remaining structures have been introduced in the fifth embodiment and will not be repeated here.

[0055] According to the above embodiments, the bidirectional electrostatic discharge protection device is serially coupled to a bipolar junction transistor and a silicon-controlled rectifier. Therefore, when designing the required breakdown voltage without sacrificing the electrostatic discharge tolerance and without suffering from latch-up events, the bidirectional electrostatic discharge protection device has a lower clamping voltage and a lower holding voltage that are still higher than the operating voltage of the device to be protected.

[0056] The above description is only a preferred embodiment of the present invention and is not intended to limit the scope of implementation of the present invention. Therefore, all equivalent changes and modifications made in accordance with the shape, structure, features, and spirit described in the claims of the present invention should be included within the scope of the present invention.

Claims

1. A bidirectional electrostatic discharge protection device, characterized in that, Comprising: At least one bipolar junction transistor; And At least one silicon controlled rectifier, serially coupled to the at least one bipolar junction transistor, wherein when an electrostatic discharge voltage is applied to the at least one bipolar junction transistor and the at least one silicon controlled rectifier, the absolute value of the breakdown voltage of the at least one bipolar junction transistor is less than the absolute value of the breakdown voltage of the at least one silicon controlled rectifier, and the absolute value of the holding voltage of the at least one bipolar junction transistor is greater than the absolute value of the holding voltage of the at least one silicon controlled rectifier.

2. The bidirectional electrostatic discharge protection device according to claim 1, wherein When a positive electrostatic discharge voltage is applied to the at least one bipolar junction transistor and the at least one silicon controlled rectifier, the at least one bipolar junction transistor and the at least one silicon controlled rectifier have a first representative current-voltage curve, and when a negative electrostatic discharge voltage is applied to the at least one bipolar junction transistor and the at least one silicon controlled rectifier, the at least one bipolar junction transistor and the at least one silicon controlled rectifier have a second representative current-voltage curve, and the first representative current-voltage curve and the second representative current-voltage curve are symmetric or asymmetric with respect to zero voltage as the center.

3. The bidirectional electrostatic discharge protection device according to claim 2, wherein The first representative current-voltage curve has a first breakdown voltage, a first holding voltage and a first clamping voltage, and the second representative current-voltage curve has a second breakdown voltage, a second holding voltage and a second clamping voltage, and the absolute values of the first breakdown voltage, the first holding voltage and the first clamping voltage are respectively equal to the absolute values of the second breakdown voltage, the second holding voltage and the second clamping voltage.

4. The bidirectional electrostatic discharge protection device according to claim 1, characterized in that Further comprising: A semiconductor substrate having a first conductivity type, an epitaxial layer is provided on the semiconductor substrate, the epitaxial layer having a second conductivity type opposite to the first conductivity type, the at least one bipolar junction transistor, a first doped well region and at least one second doped well region are provided in the epitaxial layer, the first doped well region and the at least one second doped well region have the first conductivity type, a first heavily doped region and a second heavily doped region are provided in the first doped well region, the first heavily doped region and the second heavily doped region have the second conductivity type and the first conductivity type respectively, at least one third heavily doped region and at least one fourth heavily doped region are provided in the at least one second doped well region, the at least one third heavily doped region and the at least one fourth heavily doped region have the first conductivity type and the second conductivity type respectively, the epitaxial layer, the first doped well region, the at least one second doped well region, the first heavily doped region, the second heavily doped region, the at least one third heavily doped region and the at least one fourth heavily doped region form the at least one silicon controlled rectifier, and the at least one bipolar junction transistor is coupled to the first heavily doped region and the second heavily doped region via an external wire; And An isolation structure is disposed in the epitaxial layer and located between the at least one silicon-controlled rectifier and the at least one bipolar junction transistor, wherein the isolation structure contacts the semiconductor substrate and isolates the at least one silicon-controlled rectifier from the at least one bipolar junction transistor, and a bottom position of the isolation structure is equal to or deeper than a bottom position of the epitaxial layer.

5. The bidirectional electrostatic discharge protection device according to claim 4, wherein The isolation structure is disposed in the semiconductor substrate.

6. The bidirectional electrostatic discharge protection device according to claim 4, wherein The isolation structure surrounds the at least one silicon-controlled rectifier and the at least one bipolar junction transistor.

7. The bidirectional electrostatic discharge protection device according to claim 4, wherein A heavily doped buried layer is further included, which is disposed between the semiconductor substrate and the epitaxial layer and below the at least one bipolar junction transistor and the at least one silicon-controlled rectifier, wherein the heavily doped buried layer has the second conductivity type, and the isolation structure penetrates through the heavily doped buried layer.

8. The bidirectional electrostatic discharge protection device according to claim 4, characterized in that, The first conductivity type is N-type, and the second conductivity type is P-type.

9. The bidirectional electrostatic discharge protection device according to claim 4, characterized in that, The first conductivity type is P-type, and the second conductivity type is N-type.

10. The bidirectional electrostatic discharge protection device according to claim 4, wherein, The at least one bipolar junction transistor includes: At least one third doped well region disposed in the epitaxial layer; and At least one fifth heavily doped region and at least one sixth heavily doped region disposed in the at least one third doped well region, wherein a conductivity type of the at least one fifth heavily doped region and the at least one sixth heavily doped region is opposite to a conductivity type of the at least one third doped well region, and the at least one sixth heavily doped region is coupled to the external wire.

11. The bidirectional electrostatic discharge protection device according to claim 10, wherein, The at least one fifth heavily doped region is coupled to a first pin, and the at least one third heavily doped region and the at least one fourth heavily doped region are coupled to a second pin.

12. The bidirectional electrostatic discharge protection device according to claim 11, wherein When a positive electrostatic discharge voltage is applied between the first pin and the second pin, the electrostatic discharge current sequentially passes through the at least one fifth heavily doped region, the at least one third doped well region, the at least one sixth heavily doped region, the external wire, the first heavily doped region, the first doped well region, the epitaxial layer, the at least one second doped well region, and the at least one third heavily doped region.

13. The bidirectional electrostatic discharge protection device according to claim 11, wherein When a negative electrostatic discharge voltage is applied between the first pin and the second pin, the electrostatic discharge current sequentially passes through the at least one fourth heavily doped region, the at least one second doped well region, the epitaxial layer, the first doped well region, the second heavily doped region, the external wire, the at least one sixth heavily doped region, the at least one third doped well region, and the at least one fifth heavily doped region.

14. The bidirectional electrostatic discharge protection device according to claim 1, characterized in that, The at least one bipolar junction transistor includes a plurality of bipolar junction transistors.

15. The bidirectional electrostatic discharge protection device according to claim 1, characterized in that, The at least one silicon-controlled rectifier includes a plurality of silicon-controlled rectifiers.

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